From patchwork Mon May 2 13:31:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12834209 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91281C433EF for ; Mon, 2 May 2022 13:32:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385308AbiEBNfx (ORCPT ); Mon, 2 May 2022 09:35:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39672 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385335AbiEBNfn (ORCPT ); Mon, 2 May 2022 09:35:43 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FCBCB84F; Mon, 2 May 2022 06:32:09 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7D88F61372; Mon, 2 May 2022 13:32:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D5431C385B1; Mon, 2 May 2022 13:32:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651498328; bh=cFALZTzlLK3Uat4m7PPK08qfJ5UbeCcorLAcosiDvzk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AnE784v5afnf9uOtB/69A5q8ndhlMjPJ36LvuFYYfbNUxKe13ZBHMTRIwGbKv4n7E OOBuyZPUXaaKc3Zi+cbwAw93u2pNb4zLd2VHtdFVdhl6R9ySrmnFYtGQ6gt+b+vWlC oN3g5E5JRo2P5z8gegCJPl3S1SWS6Hdd7g7+e19sLG0oroNx67jrTRHwqcUf7wTZ+5 5Hj14+z1Zu0CTiqunOexX+xhoN+2RpfsVnok5lgHeRDuZ7MyDVNXclScWtFBqbw9JT Wq/MHKy1UqhY+/FeLu3oUjcxSwYLgH50ITF/NhMObKfF/kdtYZI65XxRrDw0oYe5XB QiPomzTgMeDbw== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1nlW9n-000151-JW; Mon, 02 May 2022 15:32:07 +0200 From: Johan Hovold To: Vinod Koul , Kishon Vijay Abraham I Cc: Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold , Evan Green Subject: [PATCH v2 1/2] phy: qcom-qmp: fix pipe-clock imbalance on power-on failure Date: Mon, 2 May 2022 15:31:29 +0200 Message-Id: <20220502133130.4125-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220502133130.4125-1-johan+linaro@kernel.org> References: <20220502133130.4125-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Make sure to disable the pipe clock also if ufs-reset deassertion fails during power on. Note that the ufs-reset is asserted in qcom_qmp_phy_com_exit(). Fixes: c9b589791fc1 ("phy: qcom: Utilize UFS reset controller") Cc: Evan Green Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 8c2300bfe489..c37c0d8fea4e 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -5433,7 +5433,7 @@ static int qcom_qmp_phy_power_on(struct phy *phy) ret = reset_control_deassert(qmp->ufs_reset); if (ret) - goto err_lane_rst; + goto err_pcs_ready; qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl, cfg->pcs_misc_tbl_num); From patchwork Mon May 2 13:31:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12834211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30FE8C433F5 for ; Mon, 2 May 2022 13:32:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380767AbiEBNfx (ORCPT ); Mon, 2 May 2022 09:35:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39528 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385296AbiEBNfn (ORCPT ); Mon, 2 May 2022 09:35:43 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FEC6B852; Mon, 2 May 2022 06:32:09 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 7D19961371; Mon, 2 May 2022 13:32:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CEF55C385A4; Mon, 2 May 2022 13:32:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651498328; bh=vWs+PrQiKaRbhEnmbovR9L8IUflIyejz6ZkUmP87xKM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GowKgd8VEAqK2Qq5lA9uA2dkCLw+mypnQTqrJy9rJQ7Gs6a2Dn1FpvKnz93Zo3sTR mOleq1ZxFrTqGCXDJtLcefErD3v3WXVqSxavSYWXUGw2RUO1aa9Mjb/HGVlDzIIGCt 25oxtHiTZjKE9hf/lSU0ViSeRJih03GnBHbTU48dTMifb7mwfvkeGBP328DUGL28sT Hzygq+EN7fNlVa63Jtyaq0deLKgCSUpAZneq1gpi5n4BawZ4eWEMTekyt9t3LzNhi7 oY0j8CpdnAZI21NtglX9H8kQyWKr6DpnD/LlQpam+o7wDa1cP7ooQpLKPMvPSbO29a wYJFafpamXdxg== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1nlW9n-000153-M2; Mon, 02 May 2022 15:32:07 +0200 From: Johan Hovold To: Vinod Koul , Kishon Vijay Abraham I Cc: Andy Gross , Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 2/2] phy: qcom-qmp: rename error labels Date: Mon, 2 May 2022 15:31:30 +0200 Message-Id: <20220502133130.4125-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220502133130.4125-1-johan+linaro@kernel.org> References: <20220502133130.4125-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rename all error labels after what they are used for in order to improve readability and for consistency. Signed-off-by: Johan Hovold --- drivers/phy/qualcomm/phy-qcom-qmp.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index c37c0d8fea4e..515e3ec64e17 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -5199,7 +5199,7 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); if (ret) { dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); - goto err_reg_enable; + goto err_unlock; } for (i = 0; i < cfg->num_resets; i++) { @@ -5207,7 +5207,7 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) if (ret) { dev_err(qmp->dev, "%s reset assert failed\n", cfg->reset_list[i]); - goto err_rst_assert; + goto err_disable_regulators; } } @@ -5216,13 +5216,13 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) if (ret) { dev_err(qmp->dev, "%s reset deassert failed\n", qphy->cfg->reset_list[i]); - goto err_rst; + goto err_assert_reset; } } ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); if (ret) - goto err_rst; + goto err_assert_reset; if (cfg->has_phy_dp_com_ctrl) { qphy_setbits(dp_com, QPHY_V3_DP_COM_POWER_DOWN_CTRL, @@ -5264,12 +5264,12 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) return 0; -err_rst: +err_assert_reset: while (++i < cfg->num_resets) reset_control_assert(qmp->resets[i]); -err_rst_assert: +err_disable_regulators: regulator_bulk_disable(cfg->num_vregs, qmp->vregs); -err_reg_enable: +err_unlock: mutex_unlock(&qmp->phy_mutex); return ret; @@ -5375,14 +5375,14 @@ static int qcom_qmp_phy_power_on(struct phy *phy) if (ret) { dev_err(qmp->dev, "lane%d reset deassert failed\n", qphy->index); - goto err_lane_rst; + return ret; } } ret = clk_prepare_enable(qphy->pipe_clk); if (ret) { dev_err(qmp->dev, "pipe_clk enable failed err=%d\n", ret); - goto err_clk_enable; + goto err_reset_lane; } /* Tx, Rx, and PCS configurations */ @@ -5433,7 +5433,7 @@ static int qcom_qmp_phy_power_on(struct phy *phy) ret = reset_control_deassert(qmp->ufs_reset); if (ret) - goto err_pcs_ready; + goto err_disable_pipe_clk; qcom_qmp_phy_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl, cfg->pcs_misc_tbl_num); @@ -5472,17 +5472,17 @@ static int qcom_qmp_phy_power_on(struct phy *phy) PHY_INIT_COMPLETE_TIMEOUT); if (ret) { dev_err(qmp->dev, "phy initialization timed-out\n"); - goto err_pcs_ready; + goto err_disable_pipe_clk; } } return 0; -err_pcs_ready: +err_disable_pipe_clk: clk_disable_unprepare(qphy->pipe_clk); -err_clk_enable: +err_reset_lane: if (cfg->has_lane_rst) reset_control_assert(qphy->lane_rst); -err_lane_rst: + return ret; }