From patchwork Mon May 2 08:48:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmal Patel X-Patchwork-Id: 12834336 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C51FC433F5 for ; Mon, 2 May 2022 15:55:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229625AbiEBP6h (ORCPT ); Mon, 2 May 2022 11:58:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239572AbiEBP6g (ORCPT ); Mon, 2 May 2022 11:58:36 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6687C62F6 for ; Mon, 2 May 2022 08:55:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651506907; x=1683042907; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kuDzaMktPfohoYY++LU5r69lRzBv+FXY+OwYq58ZVu4=; b=B/bg0iS2EhcuOx4h4dXdlqoIxe/P8G5rlaq/mJxg7DyYsiRKuk6Eq+4D /JfDalze+9C6oPxCZwPxSGZ0D4UTi1fZibZLXPLjOAA0UnlHw33SyS0Op 1SVgvqOChAL7NiNtr4Lv0Kq7VmQl/BvMZSUWYmBPvoAa760hI1mNTyg5i EdIKBste1gLxmgax63Vfp/5h1SxkT9cP2rj6f6RLcVg1Up4ionSlNuUjc 4UXKN0C2TVl3h6yJEaB6NP8VZQ6BlByBKReDru/2Fuk+iGy2B2iE2xTdL AkHuSP35eyTyRgOsKi2vnA3uVoKKeNV3mHBuTa52BWs+bWrzrzP66PbhC A==; X-IronPort-AV: E=McAfee;i="6400,9594,10335"; a="353676486" X-IronPort-AV: E=Sophos;i="5.91,192,1647327600"; d="scan'208";a="353676486" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2022 08:54:11 -0700 X-IronPort-AV: E=Sophos;i="5.91,192,1647327600"; d="scan'208";a="583761645" Received: from unknown (HELO azvmdlinux1.ch.intel.com) ([10.2.230.15]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2022 08:54:10 -0700 From: Nirmal Patel To: Cc: Nirmal Patel Subject: [PATCH 1/2] PCI: vmd: Assign VMD IRQ domain before enumeration Date: Mon, 2 May 2022 01:48:59 -0700 Message-Id: <20220502084900.7903-2-nirmal.patel@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220502084900.7903-1-nirmal.patel@linux.intel.com> References: <20220502084900.7903-1-nirmal.patel@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org VMD creates and assigns a separate IRQ domain when MSI-X remapping is enabled. For example VMD-MSI. But VMD doesn't assign IRQ domain when MSI-X remapping is disabled resulting child devices getting default PCI-MSI IRQ domain. Now when interrupt remapping is enabled by intel-iommu all the PCI devices are assigned INTEL-IR-MSI domain including VMD endpoints. But devices behind VMD get PCI-MSI IRQ domain when VMD create a root bus and configures child devices. As a result DMAR errors were observed when interrupt remapping was enabled on Intel Icelake CPUs. For instance: DMAR: DRHD: handling fault status reg 2 DMAR: [INTR-REMAP] Request device [0xe2:0x00.0] fault index 0xa00 [fault reason 0x25] Blocked a compatibility format interrupt request Signed-off-by: Nirmal Patel --- drivers/pci/controller/vmd.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c index eb05cceab964..5015adc04d19 100644 --- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -853,6 +853,9 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) vmd_attach_resources(vmd); if (vmd->irq_domain) dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain); + else + dev_set_msi_domain(&vmd->bus->dev, + dev_get_msi_domain(&vmd->dev->dev)); vmd_acpi_begin(); From patchwork Mon May 2 08:49:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmal Patel X-Patchwork-Id: 12834337 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3E43AC433F5 for ; Mon, 2 May 2022 15:55:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349213AbiEBP6s (ORCPT ); Mon, 2 May 2022 11:58:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379602AbiEBP6q (ORCPT ); Mon, 2 May 2022 11:58:46 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E1C8F3F for ; Mon, 2 May 2022 08:55:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651506915; x=1683042915; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=y+sH+KYtpA3FTHJUlkj4OGG4z9G9ace9jIhjOhgviEk=; b=jtXJKzgxv6rYc+WDZotjsM1+0QH2kucS7f/IHsGkHc2rbcruRoJTHzpw 8D6YAKm+2XXumKOgLgeqGgQkTthI3wtCB+oD+VdXZCbs09rXb+d+2oIc+ nWSzfegb6Moyb8L9kmJuLMaSKzcqC9JsDcxN6QyKHkrXa0OWdjSKHl8v5 ReFbe+nsarVrRxcha4/RakS/m2aH0hwS00K8u2SJ7CRzs54cJuLBBLPLm 1XnpiKG0lOaJf/guix+BQhUM3QychaOvjQA/alFQZ5jnWh/ni+s9ccNGI E99Lqh5L5Z8Ma24bukpzZqa1oZrq5bq9sRti8sKEbdlloBuoeYPdeJlXR w==; X-IronPort-AV: E=McAfee;i="6400,9594,10335"; a="353676516" X-IronPort-AV: E=Sophos;i="5.91,192,1647327600"; d="scan'208";a="353676516" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2022 08:54:15 -0700 X-IronPort-AV: E=Sophos;i="5.91,192,1647327600"; d="scan'208";a="583761672" Received: from unknown (HELO azvmdlinux1.ch.intel.com) ([10.2.230.15]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2022 08:54:14 -0700 From: Nirmal Patel To: Cc: Nirmal Patel Subject: [PATCH 2/2] PCI: vmd: Revert 2565e5b69c44 ("PCI: vmd: Do not disable MSI-X remapping if interrupt remapping is enabled by IOMMU.") Date: Mon, 2 May 2022 01:49:00 -0700 Message-Id: <20220502084900.7903-3-nirmal.patel@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20220502084900.7903-1-nirmal.patel@linux.intel.com> References: <20220502084900.7903-1-nirmal.patel@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Revert 2565e5b69c44 ("PCI: vmd: Do not disable MSI-X remapping if interrupt remapping is enabled by IOMMU.") The commit 2565e5b69c44 was added as a workaround to enable MSI-X remapping if IOMMU enables interrupt remapping. VMD does not assign proper IRQ domain to child devices when MSI-X remapping is disabled. There is no dependency between MSI-X remapping by VMD and interrupt remapping by IOMMU. Signed-off-by: Nirmal Patel --- drivers/pci/controller/vmd.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c index 5015adc04d19..94a14a3d7e55 100644 --- a/drivers/pci/controller/vmd.c +++ b/drivers/pci/controller/vmd.c @@ -6,7 +6,6 @@ #include #include -#include #include #include #include @@ -813,8 +812,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) * acceptable because the guest is usually CPU-limited and MSI * remapping doesn't become a performance bottleneck. */ - if (iommu_capable(vmd->dev->dev.bus, IOMMU_CAP_INTR_REMAP) || - !(features & VMD_FEAT_CAN_BYPASS_MSI_REMAP) || + if (!(features & VMD_FEAT_CAN_BYPASS_MSI_REMAP) || offset[0] || offset[1]) { ret = vmd_alloc_irqs(vmd); if (ret)