From patchwork Tue May 3 20:07:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26B2FC433F5 for ; Tue, 3 May 2022 20:08:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239790AbiECULw (ORCPT ); Tue, 3 May 2022 16:11:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242214AbiECUL1 (ORCPT ); Tue, 3 May 2022 16:11:27 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4191940A07 for ; Tue, 3 May 2022 13:07:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608471; x=1683144471; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N35bzfnJVYl9IuxUxXqTlVNMXFMv5tpVwTu9lSAOung=; b=TNkAhuW2zubtZRd3E8ZdpqmX+oTZtnudF3Iocwhbod1Q4Ggrr3TivrEH SIsTEQR+3sTD0FxExY3JVl+/gt0FYX9BrRQ/5pZLCkUu3ZFjNzResrqEH 03XxutLqchXxgURoNCLrT06oGg8yMyfNtN34Nbu0qfVuiuf9UcRDfmEOp KkpmlbZXVony268OF3E6fH7ie///tuRK3ra1S9160xi/QxwZ3nc1a6Zfl KJyTHpbRLJmmtINpzQbEshHEdO4WTopsIaZhw+M4kN5ID75PFlMo3KiiR JNehIs8T8YiF9YoudnktZmu0/96i1h5Gdi2jb8ZH8EzklPn4yp2cIRR+J g==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="328116002" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="328116002" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:07:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705100" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:07:50 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 01/15] dmaengine: Remove dma_async_is_complete from client API Date: Tue, 3 May 2022 13:07:14 -0700 Message-Id: <20220503200728.2321188-2-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is never actually used by any existing DMA clients. It is only used, via dma_cookie_status, by providers. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 5 ++-- drivers/dma/amba-pl08x.c | 1 - drivers/dma/at_hdmac.c | 3 +- drivers/dma/dmaengine.h | 10 ++++++- include/linux/dmaengine.h | 28 ++----------------- 5 files changed, 15 insertions(+), 32 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index bfd057b21a000..85ecec2c40005 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -346,9 +346,8 @@ Further APIs the documentation in include/linux/dmaengine.h for a more complete description of this API. - This can be used in conjunction with dma_async_is_complete() and - the cookie returned from dmaengine_submit() to check for - completion of a specific DMA transaction. + This can be used with the cookie returned from dmaengine_submit() + to check for completion of a specific DMA transaction. .. note:: diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index a24882ba37643..fd52556c3edb4 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1544,7 +1544,6 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt( } /* - * Code accessing dma_async_is_complete() in a tight loop may give problems. * If slaves are relying on interrupts to signal completion this function * must not be called with interrupts disabled. */ diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 30ae36124b1db..bc0e1af2296c9 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -1483,8 +1483,7 @@ static int atc_terminate_all(struct dma_chan *chan) * @txstate: if not %NULL updated with transaction state * * If @txstate is passed in, upon return it reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. + * internal state. */ static enum dma_status atc_tx_status(struct dma_chan *chan, diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index 53f16d3f00294..a2ce377e9ed0f 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -79,7 +79,15 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, state->residue = 0; state->in_flight_bytes = 0; } - return dma_async_is_complete(cookie, complete, used); + + if (complete <= used) { + if ((cookie <= complete) || (cookie > used)) + return DMA_COMPLETE; + } else { + if ((cookie <= complete) && (cookie > used)) + return DMA_COMPLETE; + } + return DMA_IN_PROGRESS; } static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 842d4f7ca752d..194e334b33bbc 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1439,9 +1439,9 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * - * If @last and @used are passed in, upon return they reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. + * If @last and @used are passed in, upon return they reflect the most + * recently submitted (used) cookie and the most recently completed + * cookie. */ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) @@ -1457,28 +1457,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -/** - * dma_async_is_complete - test a cookie against chan state - * @cookie: transaction identifier to test status of - * @last_complete: last know completed transaction - * @last_used: last cookie value handed out - * - * dma_async_is_complete() is used in dma_async_is_tx_complete() - * the test logic is separated for lightweight testing of multiple cookies - */ -static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, - dma_cookie_t last_complete, dma_cookie_t last_used) -{ - if (last_complete <= last_used) { - if ((cookie <= last_complete) || (cookie > last_used)) - return DMA_COMPLETE; - } else { - if ((cookie <= last_complete) && (cookie > last_used)) - return DMA_COMPLETE; - } - return DMA_IN_PROGRESS; -} - static inline void dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) { From patchwork Tue May 3 20:07:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836157 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8E1CAC433EF for ; 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X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="328116016" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="328116016" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:07:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705132" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:07:53 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 02/15] dmaengine: Move dma_set_tx_state to the provider API header Date: Tue, 3 May 2022 13:07:15 -0700 Message-Id: <20220503200728.2321188-3-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is only used by DMA providers, not DMA clients. Move it next to the other cookie utility functions. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 11 +++++++++++ include/linux/dmaengine.h | 11 ----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index a2ce377e9ed0f..e72876a512a39 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -90,6 +90,17 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, return DMA_IN_PROGRESS; } +static inline void dma_set_tx_state(struct dma_tx_state *st, + dma_cookie_t last, dma_cookie_t used, u32 residue) +{ + if (!st) + return; + + st->last = last; + st->used = used; + st->residue = residue; +} + static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) { if (state) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 194e334b33bbc..8c4934bc038ec 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1457,17 +1457,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -static inline void -dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->last = last; - st->used = used; - st->residue = residue; -} - #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Tue May 3 20:07:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836156 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 579C0C433F5 for ; Tue, 3 May 2022 20:08:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242272AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242217AbiECULp (ORCPT ); Tue, 3 May 2022 16:11:45 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7880227148 for ; Tue, 3 May 2022 13:07:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608476; x=1683144476; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DKOyfI1DqoWNkzE+FDNUj3NX2/fsJnMkY1u5McZrles=; b=Q4RdX49beMW3rEtKD24Qvh/SgTwtTW/IpdTXOYtF7qob4oT0pBxg5A8K QkZ/xgmsKzWYBinlVr+rNwBbRX/fkLVo5A9q4ajOc1vmv7i7WhhHXbKBK JmLRZ2f8cjSVhB9wkNGAffKq7MSCjKiwztAnWac7txBSxsybe8z3j3yfi m4X4Xj42wnFxu/bfnUEGOXZ/S373eGARcCYk2JbTtIT9ZSP22hnlSoOAW kVV+gV7kYSxZD5jkaDoxzy20l3cjUOpFITZ0Bt8Ha/3vJHP/rJ5dJ0CZM 47O96Q8ttzQGQKqKh5jrA77HdsgMbDPLrfaJc5TDFycQAWxq0mCnjcBKg A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="328116021" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="328116021" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:07:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705147" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:07:55 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 03/15] dmaengine: Add dmaengine_async_is_tx_complete Date: Tue, 3 May 2022 13:07:16 -0700 Message-Id: <20220503200728.2321188-4-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is the replacement for dma_async_is_tx_complete with two changes: 1) The name prefix is 'dmaengine' as per convention 2) It no longer reports the 'last' or 'used' cookie Drivers should convert to using dmaengine_async_is_tx_complete. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 19 ++++--------------- .../driver-api/dmaengine/provider.rst | 6 +++--- drivers/dma/dmaengine.c | 2 +- drivers/dma/dmatest.c | 3 +-- include/linux/dmaengine.h | 16 ++++++++++++++++ 5 files changed, 25 insertions(+), 21 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index 85ecec2c40005..9ae489a4ca97f 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -259,8 +259,8 @@ The details of these operations are: dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) - This returns a cookie can be used to check the progress of DMA engine - activity via other DMA engine calls not covered in this document. + This returns a cookie that can be used to check the progress of a transaction + via dmaengine_async_is_tx_complete(). dmaengine_submit() will not start the DMA operation, it merely adds it to the pending queue. For this, see step 5, dma_async_issue_pending. @@ -339,23 +339,12 @@ Further APIs .. code-block:: c - enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) - - This can be used to check the status of the channel. Please see - the documentation in include/linux/dmaengine.h for a more complete - description of this API. + enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) This can be used with the cookie returned from dmaengine_submit() to check for completion of a specific DMA transaction. - .. note:: - - Not all DMA engine drivers can return reliable information for - a running DMA channel. It is recommended that DMA engine users - pause or stop (via dmaengine_terminate_all()) the channel before - using this API. - 5. Synchronize termination API .. code-block:: c diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 0072c9c7efd34..e9e9de18d6b02 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -543,10 +543,10 @@ where to put them) dma_cookie_t -- it's a DMA transaction ID that will increment over time. +- it's a DMA transaction ID. -- Not really relevant any more since the introduction of ``virt-dma`` - that abstracts it away. +- The value can be chosen by the provider, or use the helper APIs + such as dma_cookie_assign() and dma_cookie_complete(). DMA_CTRL_ACK diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 2cfa8458b51be..62669d229cd53 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -523,7 +523,7 @@ enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) dma_async_issue_pending(chan); do { - status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); if (time_after_eq(jiffies, dma_sync_wait_timeout)) { dev_err(chan->device->dev, "%s: timeout!\n", __func__); return DMA_ERROR; diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index f696246f57fdb..aa36359883242 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -832,8 +832,7 @@ static int dmatest_func(void *data) done->done, msecs_to_jiffies(params->timeout)); - status = dma_async_is_tx_complete(chan, cookie, NULL, - NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); } if (!done->done) { diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8c4934bc038ec..7143b2ecdd451 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1439,6 +1439,8 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * + * Note: This is deprecated. Use dmaengine_async_is_tx_complete instead. + * * If @last and @used are passed in, upon return they reflect the most * recently submitted (used) cookie and the most recently completed * cookie. @@ -1457,6 +1459,20 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } +/** + * dmaengine_async_is_tx_complete - poll for transaction completion + * @chan: DMA channel + * @cookie: transaction identifier to check status of + * + */ +static inline enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) +{ + struct dma_tx_state state; + + return chan->device->device_tx_status(chan, cookie, &state); +} + #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Tue May 3 20:07:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4877CC433FE for ; Tue, 3 May 2022 20:08:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240991AbiECUMW (ORCPT ); Tue, 3 May 2022 16:12:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242229AbiECULq (ORCPT ); Tue, 3 May 2022 16:11:46 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9128A40A17 for ; Tue, 3 May 2022 13:07:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608478; x=1683144478; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=prwrS1jSAxwYJXS6zrdVXKa0GwZvymzpmn7Mdh5vPkw=; b=CfTT/crKlKXyqx/vUfsmw2mBpolSKUhsOBrVL0ko2tsrf7mLMpns0Szy 0JYi0I+toibEWysaD03dHb2KFxWy9A3duANjyrQXhR9t41TaZx3i/AOCz nAvRcO1r63eb8X61Hme6fJbw+Co2htWmPtUQIkRyoxJ0EmcNXnQWac4ly KiMg8CM0LmHb5HN9OQFKUxMdHIzTH0vka/T7cc+vFXKllwBbPgjKQ0nG4 skQbSU+HX/YYrJ4XkKDNM9o9A66Gxl3qbMr61Z8zET9P4Uq2vOB/U1LpL xscmAoITGGNdP5AEyQ9bBVBaOMT/ZjrSibeqPucm4KARKEHeBDXy1fDdQ w==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="328116024" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="328116024" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:07:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705169" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:07:58 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 04/15] crypto: stm32/hash: Use dmaengine_async_is_tx_complete Date: Tue, 3 May 2022 13:07:17 -0700 Message-Id: <20220503200728.2321188-5-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Signed-off-by: Ben Walker --- drivers/crypto/stm32/stm32-hash.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index d33006d43f761..aef447847c499 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -453,8 +453,7 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev, msecs_to_jiffies(100))) err = -ETIMEDOUT; - if (dma_async_is_tx_complete(hdev->dma_lch, cookie, - NULL, NULL) != DMA_COMPLETE) + if (dmaengine_async_is_tx_complete(hdev->dma_lch, cookie) != DMA_COMPLETE) err = -ETIMEDOUT; if (err) { From patchwork Tue May 3 20:07:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AAE8C433EF for ; Tue, 3 May 2022 20:08:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242183AbiECUMX (ORCPT ); Tue, 3 May 2022 16:12:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242203AbiECULr (ORCPT ); Tue, 3 May 2022 16:11:47 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 269EE40A22 for ; Tue, 3 May 2022 13:08:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608482; x=1683144482; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ish3zyb3wTve90XvFtu1kIGKvniKF9Xm9CuOEXgIDNE=; b=Nv5qu3iz6fB8PT3IASL6KRGIYlcPqNUJicntgG02ZnnlaYEi7msUY3vV NQVdiKGJWGawmJ3m1Q1lxaBGNckY/bo10x38aQsFS9iyVopRZZo7PZotB LiY+ESjDZcS31uXy0PuuOvEpeHODrPPPcI0vI+g9TRI3SBBDO3vafj8U0 iI5b8QTTWiHSdlLJbPyc1GTNjUPLZl2YY31WGF7+MHKBcxDedmB7MSBx8 qrzjXbQSZkhpBncrksob16pBnIafR7LDH75yxXU2cLN0vVzw5nCTLjXdh mNYI46EFjzeRy31Qfe223BpW3H4Q2aerD9HXUooF2fFuhQLw8GdP23Jrj A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="328116032" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="328116032" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705197" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:01 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 05/15] media: omap_vout: Use dmaengine_async_is_tx_complete Date: Tue, 3 May 2022 13:07:18 -0700 Message-Id: <20220503200728.2321188-6-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Signed-off-by: Ben Walker --- drivers/media/platform/omap/omap_vout_vrfb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/omap/omap_vout_vrfb.c b/drivers/media/platform/omap/omap_vout_vrfb.c index 0cfa0169875f0..b9d252d5ced7a 100644 --- a/drivers/media/platform/omap/omap_vout_vrfb.c +++ b/drivers/media/platform/omap/omap_vout_vrfb.c @@ -289,7 +289,7 @@ int omap_vout_prepare_vrfb(struct omap_vout_device *vout, vout->vrfb_dma_tx.tx_status == 1, VRFB_TX_TIMEOUT); - status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); if (vout->vrfb_dma_tx.tx_status == 0) { pr_err("%s: Timeout while waiting for DMA\n", __func__); From patchwork Tue May 3 20:07:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A50EC4332F for ; Tue, 3 May 2022 20:08:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235028AbiECUMY (ORCPT ); Tue, 3 May 2022 16:12:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238249AbiECUMO (ORCPT ); Tue, 3 May 2022 16:12:14 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7161840A33 for ; Tue, 3 May 2022 13:08:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608489; x=1683144489; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xyHbfLI8a8CgyYpiH8fYGNSYJmN0GXzH1CH937wfWH8=; b=evNARNBfHyHkrAgzhMA33kYIRmYmyeSB1wd5Ej2nzMGM2gjYzM2dGtnr LHR3DrREm8h/1wODAJS/qCUliVtVvam2jH9jAUCX1Q3pCZT4CuW1qHYm2 MtIMi/5XN+KOS9QWBdrZLdCVy08PUnejvegj+lafIOGLhMw9Un6LE8LuA ORV+2nxnrlpQc04YM8E5ebk4hUg4AkIZW98jjx29ruMT4n3p27YYHcEF9 ir9chQQZ/EAIl/yHIf9yo00ljg+nHI3NhW8Zs6atng2MAYB6HdP4O8lAV vPVbtJerTFmCtzVqsCLfyOg4yOW6Gc8BMlwmI3LbU3xhnNZQQfKW5Gftv Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118185" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118185" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705260" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:08 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 06/15] rapidio: Use dmaengine_async_is_tx_complete Date: Tue, 3 May 2022 13:07:19 -0700 Message-Id: <20220503200728.2321188-7-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Signed-off-by: Ben Walker --- drivers/rapidio/devices/rio_mport_cdev.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/rapidio/devices/rio_mport_cdev.c b/drivers/rapidio/devices/rio_mport_cdev.c index 7df466e222820..ca66dbfef9c59 100644 --- a/drivers/rapidio/devices/rio_mport_cdev.c +++ b/drivers/rapidio/devices/rio_mport_cdev.c @@ -597,8 +597,7 @@ static void dma_xfer_callback(void *param) struct mport_dma_req *req = (struct mport_dma_req *)param; struct mport_cdev_priv *priv = req->priv; - req->status = dma_async_is_tx_complete(priv->dmach, req->cookie, - NULL, NULL); + req->status = dmaengine_async_is_tx_complete(priv->dmach, req->cookie); complete(&req->req_comp); kref_put(&req->refcount, dma_req_free); } From patchwork Tue May 3 20:07:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 345AAC433EF for ; Tue, 3 May 2022 20:09:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237151AbiECUMe (ORCPT ); Tue, 3 May 2022 16:12:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242244AbiECUMO (ORCPT ); Tue, 3 May 2022 16:12:14 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97D5C40A34 for ; Tue, 3 May 2022 13:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608490; x=1683144490; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X9OIsEa+Ng5SJEUvwml16YClX2VsWtViESe/ytijsDQ=; b=Wt2fluMbo6ljL4/STBjyjDQcxXP8YhNLElmbB/5a8wbx22iaEIWivjC+ 89lkwQc8yBErtVjnA7EeZFvcQ8LB58KVmjwn9sL/MV/AeFPP4bnMPDrzh 2WUfA0ykJiagXXVP/1ZFjJrVtWRbfTFp1dfxuVeIKabOY6SUeTL7YNLey wkmPntxBdZ0tMEIaHLQjjMqqEZDlnQ6AUhAfInlKu+oxoTofWFlq6VRid PhTugeasVatJQqyYwSmVAJ/J2EJ2S/ub+zE3Pu1XrAcX9ZXMt3Ger19LD xsT2ahgNFxqUrG2tQ6ElqX+q+woGRxjE+bfMRINUX7fLtW7e0StGB5wCu g==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118194" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118194" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705277" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:09 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 07/15] media: pxa_camera: Use dmaengine_async_is_tx_complete Date: Tue, 3 May 2022 13:07:20 -0700 Message-Id: <20220503200728.2321188-8-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous PAI will be removed in favor of the new one. Signed-off-by: Ben Walker --- drivers/media/platform/pxa_camera.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/pxa_camera.c b/drivers/media/platform/pxa_camera.c index 3ba00b0f93200..29406b4c77406 100644 --- a/drivers/media/platform/pxa_camera.c +++ b/drivers/media/platform/pxa_camera.c @@ -1048,9 +1048,18 @@ static void pxa_camera_dma_irq(struct pxa_camera_dev *pcdev, } last_buf = list_entry(pcdev->capture.prev, struct pxa_buffer, queue); - last_status = dma_async_is_tx_complete(pcdev->dma_chans[chan], - last_buf->cookie[chan], - NULL, &last_issued); + last_status = dmaengine_async_is_tx_complete(pcdev->dma_chans[chan], + last_buf->cookie[chan]); + /* + * Peek into the channel and read the last cookie that was issued. + * This is a layering violation - the dmaengine API does not officially + * provide this information. Since this camera driver is tightly coupled + * with a specific DMA device we know exactly how this cookie value will + * behave. Otherwise, this wouldn't be safe. + */ + last_issued = pcdev->dma_chans[chan]->cookie; + barrier(); + if (camera_status & overrun && last_status != DMA_COMPLETE) { dev_dbg(pcdev_to_dev(pcdev), "FIFO overrun! CISR: %x\n", From patchwork Tue May 3 20:07:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836161 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 719A1C433FE for ; Tue, 3 May 2022 20:08:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238249AbiECUMZ (ORCPT ); Tue, 3 May 2022 16:12:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242208AbiECUMO (ORCPT ); Tue, 3 May 2022 16:12:14 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7F21403EE for ; Tue, 3 May 2022 13:08:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608493; x=1683144493; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zJw+avBBfzNjSAH0rdstJtKW9T+bmcZv7PFzprtJRhE=; b=HywMcvMcZ28mhWEJ4RsStnFeqXjhPKJcpHqu4iaFazi8RmwvvY1E5HlW F25/arTidtTmWHzyIVAWNEOwkvpf5/Op5G6RLTlgFEO3rFSjPXT0F5mUj ESgOvkViE2MqXhvqdVp70KTIMnclGeyKghDTd/V78S/ejRDKj3M8NuojU mKsxDs92Ry5iwy53NfD7DHR9mE3EozMfKocGfZbn4H5ckt2ksUcqumIYR iXm2ykXf67w1OL5VClW2kkXaEArNo5tE5WLEtGniRRcDOW2TM/KVgUKSJ 7pvvormm5CdawPMxv67hyFQq/9z2pVXlXRcXm2o1cOWwGFYBi0pY5PthH w==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118212" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118212" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705307" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:13 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 08/15] dmaengine: Remove dma_async_is_tx_complete Date: Tue, 3 May 2022 13:07:21 -0700 Message-Id: <20220503200728.2321188-9-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Everything has now been converted over to dmaengine_async_is_tx_complete, so this can be removed. Signed-off-by: Ben Walker --- include/linux/dmaengine.h | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 7143b2ecdd451..17f210adc14cb 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1432,33 +1432,6 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) chan->device->device_issue_pending(chan); } -/** - * dma_async_is_tx_complete - poll for transaction completion - * @chan: DMA channel - * @cookie: transaction identifier to check status of - * @last: returns last completed cookie, can be NULL - * @used: returns last issued cookie, can be NULL - * - * Note: This is deprecated. Use dmaengine_async_is_tx_complete instead. - * - * If @last and @used are passed in, upon return they reflect the most - * recently submitted (used) cookie and the most recently completed - * cookie. - */ -static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) -{ - struct dma_tx_state state; - enum dma_status status; - - status = chan->device->device_tx_status(chan, cookie, &state); - if (last) - *last = state.last; - if (used) - *used = state.used; - return status; -} - /** * dmaengine_async_is_tx_complete - poll for transaction completion * @chan: DMA channel From patchwork Tue May 3 20:07:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43D82C433FE for ; Tue, 3 May 2022 20:09:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242243AbiECUMh (ORCPT ); Tue, 3 May 2022 16:12:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242248AbiECUMO (ORCPT ); Tue, 3 May 2022 16:12:14 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 809B54091F for ; Tue, 3 May 2022 13:08:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608497; x=1683144497; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EbbEXh7fqV+Eq+U9c5rTacCPFidH3eYK07jxNFHa2K0=; b=QoRzrzJUJe14YgiaeU68ZurJ56vDBlfMaxntRMiTcNCQvJY9wMQO/pk2 5kUGs4jV5b5X819toKbzMQoj4IkMtBEoaEr9J1Sfe5US+ThwfpK+CSThu jXKvOiOoPnsZEHXSqwzVqtkmK+mLglZUaIbcLl49nbhGkgMC1inmZOIQP ynx5N7oFINRxrNUvDSztgXHKqhX0Ns+WBBkyaqt4NYuMR/wEpanh9iUMZ WmHqU/GukdatUkftvglVnanQm3CueLnkam5v+qTc01XsjYc/8E1ceWfOV hEPmiuKwWGhFge8nOWyVx2FpKepXUeOcQYzqYLQ4jPMz9IDxLsENPHQXi g==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118230" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118230" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705338" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:16 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 09/15] dmaengine: Remove last, used from dma_tx_state Date: Tue, 3 May 2022 13:07:22 -0700 Message-Id: <20220503200728.2321188-10-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Nothing uses these and they don't convey usable information. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 4 ---- include/linux/dmaengine.h | 4 ---- 2 files changed, 8 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index e72876a512a39..08c7bd7cfc229 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -74,8 +74,6 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, complete = chan->completed_cookie; barrier(); if (state) { - state->last = complete; - state->used = used; state->residue = 0; state->in_flight_bytes = 0; } @@ -96,8 +94,6 @@ static inline void dma_set_tx_state(struct dma_tx_state *st, if (!st) return; - st->last = last; - st->used = used; st->residue = residue; } diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 17f210adc14cb..827007146eb94 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -716,16 +716,12 @@ static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descr /** * struct dma_tx_state - filled in to report the status of * a transfer. - * @last: last completed DMA cookie - * @used: last issued DMA cookie (i.e. the one in progress) * @residue: the remaining number of bytes left to transmit * on the selected transfer for states DMA_IN_PROGRESS and * DMA_PAUSED if this is implemented in the driver, else 0 * @in_flight_bytes: amount of data in bytes cached by the DMA. */ struct dma_tx_state { - dma_cookie_t last; - dma_cookie_t used; u32 residue; u32 in_flight_bytes; }; From patchwork Tue May 3 20:07:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18493C433F5 for ; Tue, 3 May 2022 20:09:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242228AbiECUMf (ORCPT ); Tue, 3 May 2022 16:12:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237700AbiECUMU (ORCPT ); Tue, 3 May 2022 16:12:20 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA5134092C for ; Tue, 3 May 2022 13:08:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608500; x=1683144500; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8kVLYvPbcNoatEokGPXxnoQICDXSPYXK/lbnKDbF9mc=; b=DRd0yvl0HLrlHR4L1ZsPsHnUGE76ipqoM7olwtsTltK+Ne9DmilgCkOk GFJ2E2cpjBF7cFeP0FNtqKCVS8bVnoY7iU2MK0S2vcxHOylV35FpNyCXQ Z7XSri0DvA/20ZwVhJ0Bv4pqL+gzyej0gRL/OJASCMq+RLNsbxxFm9CD8 OZPtOA9ZZ+Wa0dpYo/q2QKFweaTW/i8oXOcAFsV498eYskbrDspsci6I6 VDaaG8oo5+kyUGiG60w4gEj6wdR7cXwve6mdeVccX8QpI+HK72gKVHMWb K397+L4DDEoW7CmF4qdvyNDbTzk/tmUnJqLloeXl6W3zCp1LBadPpFLqQ w==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118233" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118233" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705352" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:20 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 10/15] dmaengine: Providers should prefer dma_set_residue over dma_set_tx_state Date: Tue, 3 May 2022 13:07:23 -0700 Message-Id: <20220503200728.2321188-11-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dma_set_tx_state function will go away shortly. The two functions are functionally equivalent. Signed-off-by: Ben Walker --- drivers/dma/imx-sdma.c | 3 +-- drivers/dma/mmp_tdma.c | 3 +-- drivers/dma/mxs-dma.c | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 70c0aa931ddf4..f1ef059da4652 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -1750,8 +1750,7 @@ static enum dma_status sdma_tx_status(struct dma_chan *chan, spin_unlock_irqrestore(&sdmac->vc.lock, flags); - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - residue); + dma_set_residue(txstate, residue); return sdmac->status; } diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c index a262e0eb4cc94..753b431ca206b 100644 --- a/drivers/dma/mmp_tdma.c +++ b/drivers/dma/mmp_tdma.c @@ -539,8 +539,7 @@ static enum dma_status mmp_tdma_tx_status(struct dma_chan *chan, struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); tdmac->pos = mmp_tdma_get_pos(tdmac); - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - tdmac->buf_len - tdmac->pos); + dma_set_residue(txstate, tdmac->buf_len - tdmac->pos); return tdmac->status; } diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 994fc4d2aca42..ab9eca6d682dc 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -664,8 +664,7 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan, residue -= bar; } - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - residue); + dma_set_residue(txstate, residue); return mxs_chan->status; } From patchwork Tue May 3 20:07:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836164 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB045C41535 for ; Tue, 3 May 2022 20:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242165AbiECUM2 (ORCPT ); Tue, 3 May 2022 16:12:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45698 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242212AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED80B4093F for ; Tue, 3 May 2022 13:08:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608503; x=1683144503; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EnJ5Su7RR3jjj7To4p4p1aGGCrzCsNhKtD7qZhiBzvo=; b=iRWN7xeMTdOnrb6jpT2W/WwaGw83veYD2yM4pwof3sY0dGkeJs+hhxdn CHQ2ep+DpS2yYc5wYji77DagM1FTAh6kUhgYybYyl8vX3ziYAW1ULfZI5 jEcQDH2tLdx0Lc1H/KKWzdxwcc8zaXThoRBo9XXUvGtP0jQr2MU+PA5Zz H3yzwV8O50EY75jWm87WymsBo7RYQD3FHF8Bc5B5TPhSh+t88G4D/SpXu lhai+UBE3ohMeF2SOuEzKf6qg8o82gPJ7p8CaX4uVLQ/J7aT1iyKR0SQ1 q6fdYZLf0sXZhgjrvpmNs7uZ+Sla0Gdhc3kGqtXt/LNLBOsPYiQbIhxGq A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118243" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118243" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705365" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:23 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 11/15] dmaengine: Remove dma_set_tx_state Date: Tue, 3 May 2022 13:07:24 -0700 Message-Id: <20220503200728.2321188-12-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Nothing calls this anymore. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index 08c7bd7cfc229..7a5203175e6a8 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -88,15 +88,6 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, return DMA_IN_PROGRESS; } -static inline void dma_set_tx_state(struct dma_tx_state *st, - dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->residue = residue; -} - static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) { if (state) From patchwork Tue May 3 20:07:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836166 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A6ECC433FE for ; Tue, 3 May 2022 20:09:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240795AbiECUMa (ORCPT ); Tue, 3 May 2022 16:12:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242253AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D9AD40938 for ; Tue, 3 May 2022 13:08:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608508; x=1683144508; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AbCtiizXn7mtWsj4iItd1wCayDjqPN6a2w8lSyAntQQ=; b=UEZhKjTc+cHeiXLbqLJuDjglv+SxAzMQOaIw7mIQedVc2MGLPjE+nI13 WQEOQcP4QLQI9+1K7THMM9LZX6vq9uIx5C766+wy27uMCNl+HIqy7ckb4 /joWbXzLBEKAJmLxgIAqpNtLmmRD4rhm8isZD+Fmu9KQ+6yDrv4UfTq95 1YY8Syg/xTkPCxr2GkxDbEoP2bHT1Xf32kmGPtU0GL3SQgmBp7tBQzXUM jtcFIC17ORcvuUC4YvmZUGDqECQzfWiyVaBZcBPTtaqQhaNgt7ziKMSvO 8vDINbVMKQMX++NdDM5q1iI9h9GrklGAh4MsZKclcJivplUeEPTDJklq2 A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118258" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118258" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705376" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:27 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 12/15] dmaengine: Add provider documentation on cookie assignment Date: Tue, 3 May 2022 13:07:25 -0700 Message-Id: <20220503200728.2321188-13-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Clarify the rules on assigning cookies to DMA transactions. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 45 +++++++++++++++---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index e9e9de18d6b02..7c8ace703c96f 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -421,7 +421,9 @@ supported. - tx_submit: A pointer to a function you have to implement, that is supposed to push the current transaction descriptor to a - pending queue, waiting for issue_pending to be called. + pending queue, waiting for issue_pending to be called. Each + descriptor is given a cookie to identify it. See the section + "Cookie Management" below. - In this structure the function pointer callback_result can be initialized in order for the submitter to be notified that a @@ -526,6 +528,40 @@ supported. - May sleep. +Cookie Management +------------------ + +When a transaction is queued for submission via tx_submit(), the provider +must assign that transaction a cookie (dma_cookie_t) to uniquely identify it. +The provider is allowed to perform this assignment however it wants, but for +convenience the following utility functions are available to create +monotonically increasing cookies + + .. code-block:: c + + void dma_cookie_init(struct dma_chan *chan); + + Called once at channel creation + + .. code-block:: c + + dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx); + + Assign a cookie to the given descriptor + + .. code-block:: c + + void dma_cookie_complete(struct dma_async_tx_descriptor *tx); + + Mark the descriptor as complete and invalidate the cookie + + .. code-block:: c + + enum dma_status dma_cookie_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *state); + + Report the status of the cookie and filling in state, if not NULL. + Misc notes ========== @@ -541,13 +577,6 @@ where to put them) - Makes sure that dependent operations are run before marking it as complete. -dma_cookie_t - -- it's a DMA transaction ID. - -- The value can be chosen by the provider, or use the helper APIs - such as dma_cookie_assign() and dma_cookie_complete(). - DMA_CTRL_ACK - If clear, the descriptor cannot be reused by provider until the From patchwork Tue May 3 20:07:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F3622C4321E for ; Tue, 3 May 2022 20:08:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242189AbiECUM1 (ORCPT ); Tue, 3 May 2022 16:12:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242259AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 114AB40A38 for ; Tue, 3 May 2022 13:08:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608512; x=1683144512; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pRf/mFVLi8zRLZl/MF8/vdPKSW7aMtpTIvfW+QX4Rco=; b=Hytse5QR8GYOkp9GjU7X8b21gyuB805pWvcwRgYkYw7jT7wxvS5qJFWZ 3VsrTOIabY+tuxSmrQb4kjWpfYbnVOPdMExlT46BUNa6lePGxWMQDvw7y hhycSPNM7KCdBYbyjo3hGesLKEmuO7gbgvA7O9iG3Dm+gJeUkhOhB6Aiz jNvV5JBlK+CfmLfA/wHl5T29ttFAWKLUQ3VA9uhNJTqQO9kSWNC2eyKPZ RpUfsF2rthbXS1VwkKSL48XrEOR5twVttY27XlMpPnNE4UpkVud+iRtp3 4Kvj4A3wd5m38MGQU/iuWspJwMbChPVZPGOXNKDJZ6JwqvtlPQ/kdI6GG w==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118270" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118270" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705392" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:31 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 13/15] dmaengine: idxd: idxd_desc.id is now a u16 Date: Tue, 3 May 2022 13:07:26 -0700 Message-Id: <20220503200728.2321188-14-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is going to be packed into the cookie. It does not need to be negative or larger than u16. Signed-off-by: Ben Walker --- drivers/dma/idxd/idxd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index a9021e332a5b4..40835160ef883 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -328,7 +328,7 @@ struct idxd_desc { struct dma_async_tx_descriptor txd; struct llist_node llnode; struct list_head list; - int id; + u16 id; int cpu; struct idxd_wq *wq; }; From patchwork Tue May 3 20:07:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836165 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDE81C4332F for ; Tue, 3 May 2022 20:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242196AbiECUM2 (ORCPT ); Tue, 3 May 2022 16:12:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242261AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F5CA40A3B for ; Tue, 3 May 2022 13:08:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608516; x=1683144516; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5vPGZF8ptP0uLGzMxnYOhisEDIAqIkno9kzecpnsDuc=; b=XR0jnmmjYs5yyAZ/Z2S+8mQX7Nf5j4n4EA6ylYdzZDy7XY4CDebQe3nt cfJezALwOFsS5gIBt37nIdeYG0DTv5r38C4p9igHuyv8TVoWROtWfn0Fm 1uPQGyTlxEtwiIKZaXYu/pjvK9VV4P+UE3szUtuuHSTVgyp8LqtPJMs9Y S3cp6AhNCQ83RdQiXF47AS0KJC7ZwvZKveRhDy4/BvORFLdYykdGe0lyh Ks8DVTsVf1KKMOX7WULdd+3kRrZx62fhYBNnlI4IqioStAx4+RYl2jLXD kCWAhIESWdY8sgyUPIdxZ4t9UujhWovG67794ajYU0M59rdIbBYukXj3Q A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118276" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118276" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705412" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:35 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 14/15] dmaengine: idxd: Support device_tx_status Date: Tue, 3 May 2022 13:07:27 -0700 Message-Id: <20220503200728.2321188-15-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This can now be supported even for devices that complete operations out of order. Add support for directly polling transactions. Signed-off-by: Ben Walker --- drivers/dma/idxd/device.c | 1 + drivers/dma/idxd/dma.c | 85 ++++++++++++++++++++++++++++++++++++++- drivers/dma/idxd/idxd.h | 1 + 3 files changed, 85 insertions(+), 2 deletions(-) diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c index f98dd443a4edb..48424693c7a49 100644 --- a/drivers/dma/idxd/device.c +++ b/drivers/dma/idxd/device.c @@ -148,6 +148,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq) desc->iax_completion = &wq->iax_compls[i]; desc->compl_dma = wq->compls_addr + idxd->data->compl_size * i; desc->id = i; + desc->gen = 1; desc->wq = wq; desc->cpu = -1; } diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index ccd4a67bdb4ba..7bb9ecad43ec5 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -12,6 +12,23 @@ #include "registers.h" #include "idxd.h" + +#define DMA_COOKIE_BITS (sizeof(dma_cookie_t) * 8) +/* + * The descriptor id takes the lower 16 bits of the cookie. + */ +#define DESC_ID_BITS 16 +#define DESC_ID_MASK ((1 << DESC_ID_BITS) - 1) +/* + * The 'generation' is in the upper half of the cookie. But dma_cookie_t + * is signed, so we leave the upper-most bit for the sign. Further, we + * need to flag whether a cookie corresponds to an operation that is + * being completed via interrupt to avoid polling it, which takes + * the second most upper bit. So we subtract two bits from the upper half. + */ +#define DESC_GEN_MAX ((1 << (DMA_COOKIE_BITS - DESC_ID_BITS - 2)) - 1) +#define DESC_INTERRUPT_FLAG (1 << (DMA_COOKIE_BITS - 2)) + static inline struct idxd_wq *to_idxd_wq(struct dma_chan *c) { struct idxd_dma_chan *idxd_chan; @@ -151,13 +168,67 @@ static void idxd_dma_free_chan_resources(struct dma_chan *chan) idxd_wq_refcount(wq)); } + static enum dma_status idxd_dma_tx_status(struct dma_chan *dma_chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { - return DMA_OUT_OF_ORDER; + u8 status; + struct idxd_wq *wq; + struct idxd_desc *desc; + u32 idx; + + memset(txstate, 0, sizeof(*txstate)); + + if (dma_submit_error(cookie)) + return DMA_ERROR; + + wq = to_idxd_wq(dma_chan); + + idx = cookie & DESC_ID_MASK; + if (idx >= wq->num_descs) + return DMA_ERROR; + + desc = wq->descs[idx]; + + if (desc->txd.cookie != cookie) { + /* + * The user asked about an old transaction + */ + return DMA_COMPLETE; + } + + /* + * For descriptors completed via interrupt, we can't go + * look at the completion status directly because it races + * with the IRQ handler recyling the descriptor. However, + * since in this case we can rely on the interrupt handler + * to invalidate the cookie when the command completes we + * know that if we get here, the command is still in + * progress. + */ + if ((cookie & DESC_INTERRUPT_FLAG) != 0) + return DMA_IN_PROGRESS; + + status = desc->completion->status & DSA_COMP_STATUS_MASK; + + if (status) { + /* + * Check against the original status as ABORT is software defined + * and 0xff, which DSA_COMP_STATUS_MASK can mask out. + */ + if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) + idxd_dma_complete_txd(desc, IDXD_COMPLETE_ABORT, true); + else + idxd_dma_complete_txd(desc, IDXD_COMPLETE_NORMAL, true); + + return DMA_COMPLETE; + } + + return DMA_IN_PROGRESS; } + /* * issue_pending() does not need to do anything since tx_submit() does the job * already. @@ -174,7 +245,17 @@ static dma_cookie_t idxd_dma_tx_submit(struct dma_async_tx_descriptor *tx) int rc; struct idxd_desc *desc = container_of(tx, struct idxd_desc, txd); - cookie = dma_cookie_assign(tx); + cookie = (desc->gen << DESC_ID_BITS) | (desc->id & DESC_ID_MASK); + + if ((desc->hw->flags & IDXD_OP_FLAG_RCI) != 0) + cookie |= DESC_INTERRUPT_FLAG; + + if (desc->gen == DESC_GEN_MAX) + desc->gen = 1; + else + desc->gen++; + + tx->cookie = cookie; rc = idxd_submit_desc(wq, desc); if (rc < 0) { diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index 40835160ef883..d06ddfddd8612 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -329,6 +329,7 @@ struct idxd_desc { struct llist_node llnode; struct list_head list; u16 id; + u16 gen; int cpu; struct idxd_wq *wq; }; From patchwork Tue May 3 20:07:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12836162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 779C9C4332F for ; Tue, 3 May 2022 20:08:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241801AbiECUM1 (ORCPT ); Tue, 3 May 2022 16:12:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242219AbiECUMV (ORCPT ); Tue, 3 May 2022 16:12:21 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EE1FB40E41 for ; Tue, 3 May 2022 13:08:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651608518; x=1683144518; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=svOEFZ0iM4zTNd+iiLiugoQxXLlbWcFdAikX4WDfSss=; b=lI1iR5K8YKEsVn64B1+U4C0UKXVLJyE9OplX2gdt3u0JxNZ69P/0quks Nj23O0YlevBZ7nJCS6JRoXcFSNiuojKOkpOvTkfgc6wqSh8INwkf8ufOj JMHYjZpb/P7mEpX+DXQOtIhy6v1OWVEJ3lmXK+6MixzJjpFxWaDERtVf+ p7/HVChjqTWP7PAlUZqF6Syjg9Sh9P/ya9RFhEIAS/67uMBdB3pvjsdnQ xuR6ewRJFYUIxpvPLG5lWnXbAoGdBO/g6TQtgyWR5H8AfLwl2v9OV8Qez MWEmiOePMKQu8fXR2V8/TMoQEyyaCr7g8qydDPFv1eLfmaMlx2JkFF9Ly A==; X-IronPort-AV: E=McAfee;i="6400,9594,10336"; a="248118284" X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="248118284" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 May 2022 13:08:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,196,1647327600"; d="scan'208";a="516705424" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga003.jf.intel.com with ESMTP; 03 May 2022 13:08:38 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, mchehab@kernel.org, mporter@kernel.crashing.org, alex.bou9@gmail.com, Ben Walker Subject: [PATCH v2 15/15] dmaengine: Revert "cookie bypass for out of order completion" Date: Tue, 3 May 2022 13:07:28 -0700 Message-Id: <20220503200728.2321188-16-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220503200728.2321188-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This reverts commit 47ec7f09bc107720905c96bc37771e4ed1ff0aed. This is no longer necessary now that all assumptions about the order of completions have been removed from the dmaengine client API. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 19 ------------------- drivers/dma/dmatest.c | 11 +---------- drivers/dma/idxd/dma.c | 1 - include/linux/dmaengine.h | 2 -- 4 files changed, 1 insertion(+), 32 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 7c8ace703c96f..5bb4738ece0c2 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -262,22 +262,6 @@ Currently, the types available are: want to transfer a portion of uncompressed data directly to the display to print it -- DMA_COMPLETION_NO_ORDER - - - The device does not support in order completion. - - - The driver should return DMA_OUT_OF_ORDER for device_tx_status if - the device is setting this capability. - - - All cookie tracking and checking API should be treated as invalid if - the device exports this capability. - - - At this point, this is incompatible with polling option for dmatest. - - - If this cap is set, the user is recommended to provide an unique - identifier for each descriptor sent to the DMA device in order to - properly track the completion. - - DMA_REPEAT - The device supports repeated transfers. A repeated transfer, indicated by @@ -461,9 +445,6 @@ supported. - In the case of a cyclic transfer, it should only take into account the current period. - - Should return DMA_OUT_OF_ORDER if the device does not support in order - completion and is completing the operation out of order. - - This function can be called in an interrupt context. - device_config diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index aa36359883242..e78b315d31f83 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -839,10 +839,7 @@ static int dmatest_func(void *data) result("test timed out", total_tests, src->off, dst->off, len, 0); goto error_unmap_continue; - } else if (status != DMA_COMPLETE && - !(dma_has_cap(DMA_COMPLETION_NO_ORDER, - dev->cap_mask) && - status == DMA_OUT_OF_ORDER)) { + } else if (status != DMA_COMPLETE) { result(status == DMA_ERROR ? "completion error status" : "completion busy status", total_tests, src->off, @@ -1020,12 +1017,6 @@ static int dmatest_add_channel(struct dmatest_info *info, dtc->chan = chan; INIT_LIST_HEAD(&dtc->threads); - if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) && - info->params.polled) { - info->params.polled = false; - pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n"); - } - if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { if (dmatest == 0) { cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index 7bb9ecad43ec5..4d35597cf5315 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -289,7 +289,6 @@ int idxd_register_dma_device(struct idxd_device *idxd) dma->dev = dev; dma_cap_set(DMA_PRIVATE, dma->cap_mask); - dma_cap_set(DMA_COMPLETION_NO_ORDER, dma->cap_mask); dma->device_release = idxd_dma_release; if (idxd->hw.opcap.bits[0] & IDXD_OPCAP_MEMMOVE) { diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 827007146eb94..ba568d0373dec 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -39,7 +39,6 @@ enum dma_status { DMA_IN_PROGRESS, DMA_PAUSED, DMA_ERROR, - DMA_OUT_OF_ORDER, }; /** @@ -63,7 +62,6 @@ enum dma_transaction_type { DMA_SLAVE, DMA_CYCLIC, DMA_INTERLEAVE, - DMA_COMPLETION_NO_ORDER, DMA_REPEAT, DMA_LOAD_EOT, /* last transaction type for creation of the capabilities mask */