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[94.253.144.244]) by smtp.googlemail.com with ESMTPSA id hw7-20020a170907a0c700b006f3ef214e73sm4963822ejc.217.2022.05.09.04.00.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 04:00:34 -0700 (PDT) From: Robert Marko To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, shawnguo@kernel.org, linus.walleij@linaro.org, kostap@marvell.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, pali@kernel.org, marek.behun@nic.cz Cc: Robert Marko Subject: [PATCH 1/2] dt-bindings: vendor-prefixes: add Methode Electronics Date: Mon, 9 May 2022 13:00:27 +0200 Message-Id: <20220509110028.144226-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_040038_780405_1FA0C30E X-CRM114-Status: UNSURE ( 9.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add vendor prefix for Methode Electronics, Inc. (https://www.methode.com) Signed-off-by: Robert Marko Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 01430973ecec..e5ec476f54cd 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -764,6 +764,8 @@ patternProperties: description: Cisco Meraki, LLC "^merrii,.*": description: Merrii Technology Co., Ltd. + "^methode,.*": + description: Methode Electronics, Inc. "^micrel,.*": description: Micrel Inc. "^microchip,.*": From patchwork Mon May 9 11:00:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 12843338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DA52C433EF for ; Mon, 9 May 2022 11:02:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hgap8RmoZLL5IhYnJwGKC1pUWs81OnwNunRrXemFsSU=; b=3upXpI0TicVb06 g6Hd0egGWtShgKKv2smRoStxB/Z8YTFWvdZJMWf60g+ZtxEWkBi7KJieZOK7tlA0Xm6XyQLYO2EKT QKL3jrxudOigGHSUmACXG4foW8XBdKGe1EZKlT0dUcYleAxXGl+u2Q3FNdTZuc5AcoYyTHNjnMgmI nLIt0A+mcpc/wDBQyWTUMBSiuozPweeIYqZMKOaYJ12nz3hnusynkmNhrYC66Zz2A3uGPTNi/QGNb +X0f4QTZNqfKkZNJ88ODgRjj00nNeiSJMIaWA9yGy0MjZZQfSzW8xr447u7JXbXi9Ek9PGGJVaN7j JVQlkSfyj6ikygkbMS1w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1no18U-00Dx5r-JW; Mon, 09 May 2022 11:01:07 +0000 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1no182-00Dwwe-VD for linux-arm-kernel@lists.infradead.org; Mon, 09 May 2022 11:00:42 +0000 Received: by mail-ej1-x62c.google.com with SMTP id l18so26016669ejc.7 for ; Mon, 09 May 2022 04:00:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K9C/dOs+COLporee6Egh1ahx65haWLbpcqSzk8GrRKY=; b=iH5TErsDifUOIuQcIKUmXt37hX972ny5G1Q1A5T57sV8QY/1wn38qyb2PwE/VJxQCu t+5vxfCUNm7vRWcJRdRlT/RphIQsW09fx+O17RSfw0IiK5mSGgqYW6YtekZfGQ/WPq84 VAxSXfHCORAcU0sJKRoLmSR9wPOZVzoFeo7/dtZJZpdZjMyezBo8AE0Zb8lKI5llgZiO DE7z7c1h7DfCNaP8/2heK+3BOWlkMBCgMd5SucJMe5n5lByVzLaRoSBbWjfLdN03CTOv lUydmpssZ4XoOfWwmREi0bo0HNxFLkH0DdqoU8elOimpm3Ey43Rhfb1it7BweWJ7JQND drKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K9C/dOs+COLporee6Egh1ahx65haWLbpcqSzk8GrRKY=; b=yMcVuuDBjw9vkzUPvA/luWapFOsnZwuoMMT0y0Wd9URGeTj3II+xbO/fxHnXTtVUbz u87CpNBSn9B2xkDkqAVR4k7c2tOy+IJCL0vZF2hnQYSWZAbBjqFRd9D1XOhBsl8FmQO1 mbNyk4zCUgyzoX4M5Dlbk4GzEmhI1co8/s+ZdxVRuNPIUfdMvfFhEnF7KWQ98FDnUO2M 25NpEgPkGoypaquRC5XuT9kXc1472crTXaHL5WFjLqKzSBvmuZXUTccBGC9tCiK2jaqd h5MhAR93RE0DVF22GUqFTJ/j9AOcsohv/jekssmq1mM5PFLPKmtmGh/mi7QpbPNe2GsZ 5bWw== X-Gm-Message-State: AOAM5320v1b7HRVC51R0wKsop1p5cceBvrLkAK3FV6l6asJomydYPcNO CdWVKuZPcaraUHEO9G2uyyOcPA== X-Google-Smtp-Source: ABdhPJza++Loo4dFcU6TUoRfB7Pf+eTPDr8GrjTW2XkhQo/47G11FQS0KoBnVF2y+nX3nqV3ZCEX4Q== X-Received: by 2002:a17:907:62a6:b0:6ef:8118:d3e2 with SMTP id nd38-20020a17090762a600b006ef8118d3e2mr13713700ejc.605.1652094036401; Mon, 09 May 2022 04:00:36 -0700 (PDT) Received: from fedora.robimarko.hr (cpezg-94-253-144-244-cbl.xnet.hr. [94.253.144.244]) by smtp.googlemail.com with ESMTPSA id hw7-20020a170907a0c700b006f3ef214e73sm4963822ejc.217.2022.05.09.04.00.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 May 2022 04:00:35 -0700 (PDT) From: Robert Marko To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, shawnguo@kernel.org, linus.walleij@linaro.org, kostap@marvell.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, pali@kernel.org, marek.behun@nic.cz Cc: Robert Marko Subject: [PATCH 2/2] arm64: dts: marvell: add support for Methode eDPU Date: Mon, 9 May 2022 13:00:28 +0200 Message-Id: <20220509110028.144226-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220509110028.144226-1-robert.marko@sartura.hr> References: <20220509110028.144226-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_040039_079149_CF10F5D8 X-CRM114-Status: GOOD ( 20.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Methode eDPU is an Armada 3720 powered board based on the Methode uDPU. They feature the same CPU, RAM, and storage as well as the form factor. However, eDPU only has one SFP slot plus a copper G.hn port. In order to reduce duplication, split the uDPU DTS into a common one. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/marvell/Makefile | 1 + .../boot/dts/marvell/armada-3720-eDPU.dts | 14 ++ .../boot/dts/marvell/armada-3720-uDPU.dts | 148 +--------------- .../boot/dts/marvell/armada-3720-uDPU.dtsi | 163 ++++++++++++++++++ 4 files changed, 179 insertions(+), 147 deletions(-) create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 1c794cdcb8e6..104d7d7e8215 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # Mvebu SoC Family dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb +dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-eDPU.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-emmc.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin-ultra.dtb diff --git a/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts new file mode 100644 index 000000000000..6b573a6854cc --- /dev/null +++ b/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "armada-3720-uDPU.dtsi" + +/ { + model = "Methode eDPU Board"; + compatible = "methode,edpu", "marvell,armada3720"; +}; + +ð0 { + phy-mode = "2500base-x"; +}; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts index 95d46e8d081c..b146fae9f60b 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts @@ -1,67 +1,13 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Device tree for the uDPU board. - * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) - * Copyright (C) 2016 Marvell - * Copyright (C) 2019 Methode Electronics - * Copyright (C) 2019 Telus - * - * Vladimir Vid - */ /dts-v1/; -#include -#include "armada-372x.dtsi" +#include "armada-3720-uDPU.dtsi" / { model = "Methode uDPU Board"; compatible = "methode,udpu", "marvell,armada3720"; - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x20000000>; - }; - - leds { - pinctrl-names = "default"; - compatible = "gpio-leds"; - - power1 { - label = "udpu:green:power"; - gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; - }; - - power2 { - label = "udpu:red:power"; - gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; - }; - - network1 { - label = "udpu:green:network"; - gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; - }; - - network2 { - label = "udpu:red:network"; - gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; - }; - - alarm1 { - label = "udpu:green:alarm"; - gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; - }; - - alarm2 { - label = "udpu:red:alarm"; - gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; - }; - }; - sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>; @@ -71,50 +17,6 @@ sfp_eth0: sfp-eth0 { tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; - - sfp_eth1: sfp-eth1 { - compatible = "sff,sfp"; - i2c-bus = <&i2c1>; - los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; - maximum-power-milliwatt = <3000>; - }; -}; - -&sdhci0 { - status = "okay"; - bus-width = <8>; - mmc-ddr-1_8v; - mmc-hs400-1_8v; - marvell,pad-type = "fixed-1-8v"; - non-removable; - no-sd; - no-sdio; -}; - -&spi0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi_quad_pins>; - - m25p80@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <54000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - /* only bootloader is located on the SPI */ - partition@0 { - label = "uboot"; - reg = <0 0x400000>; - }; - }; - }; }; &pinctrl_nb { @@ -122,11 +24,6 @@ i2c1_recovery_pins: i2c1-recovery-pins { groups = "i2c1"; function = "gpio"; }; - - i2c2_recovery_pins: i2c2-recovery-pins { - groups = "i2c2"; - function = "gpio"; - }; }; &i2c0 { @@ -139,50 +36,7 @@ &i2c0 { sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; }; -&i2c1 { - status = "okay"; - pinctrl-names = "default", "recovery"; - pinctrl-0 = <&i2c2_pins>; - pinctrl-1 = <&i2c2_recovery_pins>; - /delete-property/mrvl,i2c-fast-mode; - scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - - lm75@48 { - status = "okay"; - compatible = "lm75"; - reg = <0x48>; - }; - - lm75@49 { - status = "okay"; - compatible = "lm75"; - reg = <0x49>; - }; -}; - ð0 { phy-mode = "sgmii"; - status = "okay"; - managed = "in-band-status"; - phys = <&comphy1 0>; sfp = <&sfp_eth0>; }; - -ð1 { - phy-mode = "sgmii"; - status = "okay"; - managed = "in-band-status"; - phys = <&comphy0 1>; - sfp = <&sfp_eth1>; -}; - -&usb3 { - status = "okay"; - phys = <&usb2_utmi_otg_phy>; - phy-names = "usb2-utmi-otg-phy"; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi new file mode 100644 index 000000000000..5e38acc92a31 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi @@ -0,0 +1,163 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree for the uDPU board. + * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) + * Copyright (C) 2016 Marvell + * Copyright (C) 2019 Methode Electronics + * Copyright (C) 2019 Telus + * + * Vladimir Vid + */ + +/dts-v1/; + +#include +#include "armada-372x.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + leds { + pinctrl-names = "default"; + compatible = "gpio-leds"; + + power1 { + label = "udpu:green:power"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + + power2 { + label = "udpu:red:power"; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + + network1 { + label = "udpu:green:network"; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + }; + + network2 { + label = "udpu:red:network"; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + + alarm1 { + label = "udpu:green:alarm"; + gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; + }; + + alarm2 { + label = "udpu:red:alarm"; + gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; + }; + }; + + sfp_eth1: sfp-eth1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <3000>; + }; +}; + +&sdhci0 { + status = "okay"; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; + non-removable; + no-sd; + no-sdio; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; + + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <54000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* only bootloader is located on the SPI */ + partition@0 { + label = "firmware"; + reg = <0x0 0x180000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; + }; + }; + }; +}; + +&pinctrl_nb { + i2c2_recovery_pins: i2c2-recovery-pins { + groups = "i2c2"; + function = "gpio"; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default", "recovery"; + pinctrl-0 = <&i2c2_pins>; + pinctrl-1 = <&i2c2_recovery_pins>; + /delete-property/mrvl,i2c-fast-mode; + scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + nct375@48 { + status = "okay"; + compatible = "ti,tmp75c"; + reg = <0x48>; + }; + + nct375@49 { + status = "okay"; + compatible = "ti,tmp75c"; + reg = <0x49>; + }; +}; + +ð0 { + status = "okay"; + managed = "in-band-status"; + phys = <&comphy1 0>; +}; + +ð1 { + phy-mode = "sgmii"; + status = "okay"; + managed = "in-band-status"; + phys = <&comphy0 1>; + sfp = <&sfp_eth1>; +}; + +&usb3 { + status = "okay"; + phys = <&usb2_utmi_otg_phy>; + phy-names = "usb2-utmi-otg-phy"; +}; + +&uart0 { + status = "okay"; +};