From patchwork Tue May 10 01:52:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72A1BC433F5 for ; Tue, 10 May 2022 01:56:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VbQOZB+sgKc6QmLtnSpPbfWlCF7DH6tW4wzcv3TuQA4=; b=Ped1E5xVx9ROfw dlqyVb/+YqY9ZUSzWCOa5+Be6L9uOcyQKLayngGMdSXO95Rcmaibei6CvJq/DKVgs9fpvGpu+Et6t ail/6z3zRb2GXdNfo3I2dDJm4Wekrqea8QSwiN8ApkKv6qS+6WzAly+tbT1WxVsGGb+mPvdePByig L4Gxt+zgrJXdvhxt6EqTY+Gb9k7N6m0qMvm21wMUhGUhhFQik11ibNkS4Zta3QKuHrm9VFikSzaTI DjwmEU1jlJB/+6kH35URzHILfUZSzdfY3dVL1sUd0laglOlUUPHmWSLlScWJmjovwxBqZpLBh52lG 0FD3N8iwDUBYZupqkjvA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF58-00H4Kb-TN; Tue, 10 May 2022 01:54:34 +0000 Received: from mo-csw1515.securemx.jp ([210.130.202.154] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3i-00H3lL-AK for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:10 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1515) id 24A1qitE021488; Tue, 10 May 2022 10:52:44 +0900 X-Iguazu-Qid: 34tKMNGQISoOUyKFxf X-Iguazu-QSIG: v=2; s=0; t=1652147564; q=34tKMNGQISoOUyKFxf; m=tTZIWtyWe8wzEuERRF1BanNQhESQ6HwBHYCTt79WgW4= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1510) id 24A1qhl6025328 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:43 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 1/9] arm64: dts: visconti: Update the clock providers for UART Date: Tue, 10 May 2022 10:52:21 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-2-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185306_599492_F9F14835 X-CRM114-Status: UNSURE ( 9.70 ) X-CRM114-Notice: Please train this message. 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Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 4 ---- .../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 4 ---- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 14 ++++++++------ 3 files changed, 8 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 9375b0faeea2..9b0666df6593 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -32,14 +32,10 @@ memory@80000000 { &uart0 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &uart1 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &piether { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts index d0817463706e..56701e0e1dab 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts @@ -32,14 +32,10 @@ memory@80000000 { &uart0 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &uart1 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &piether { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 1683113a3c43..3b51e875630c 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -129,12 +129,6 @@ timer { ; }; - uart_clk: uart-clk { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - }; - clk25mhz: clk25mhz { compatible = "fixed-clock"; #clock-cells = <0>; @@ -243,6 +237,8 @@ uart0: serial@28200000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART0>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -252,6 +248,8 @@ uart1: serial@28201000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART1>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -261,6 +259,8 @@ uart2: serial@28202000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART2>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -270,6 +270,8 @@ uart3: serial@28203000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART2>; + clock-names = "apb_pclk"; status = "disabled"; }; From patchwork Tue May 10 01:52:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844400 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24E64C433F5 for ; Tue, 10 May 2022 01:56:05 +0000 (UTC) DKIM-Signature: v=1; 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Tue, 10 May 2022 01:53:10 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 24A1qjg0028588; Tue, 10 May 2022 10:52:45 +0900 X-Iguazu-Qid: 2wGrARG6y18UU1rl0U X-Iguazu-QSIG: v=2; s=0; t=1652147565; q=2wGrARG6y18UU1rl0U; m=thu007a9e57J8qiCUHfkQi+xp7PHiJoJ3lDwowbCWK0= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1111) id 24A1qiSe022817 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 2/9] arm64: dts: visconti: Update the clock providers for I2C Date: Tue, 10 May 2022 10:52:22 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-3-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185306_109846_CCAE4A79 X-CRM114-Status: UNSURE ( 9.60 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Replace I2C clock with common clock framework. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 1 - arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 9 +++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi index f0a93db6dde6..03827ce06ee3 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi @@ -40,5 +40,4 @@ mmc-slot@0 { &i2c0 { status = "okay"; - clocks = <&clk150mhz>; }; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 3b51e875630c..048b5dc7ae18 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -284,6 +284,7 @@ i2c0: i2c@28030000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C0>; status = "disabled"; }; @@ -296,6 +297,7 @@ i2c1: i2c@28031000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C1>; status = "disabled"; }; @@ -308,6 +310,7 @@ i2c2: i2c@28032000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C2>; status = "disabled"; }; @@ -320,6 +323,7 @@ i2c3: i2c@28033000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C3>; status = "disabled"; }; @@ -332,6 +336,7 @@ i2c4: i2c@28034000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C4>; status = "disabled"; }; @@ -344,6 +349,7 @@ i2c5: i2c@28035000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C5>; status = "disabled"; }; @@ -356,6 +362,7 @@ i2c6: i2c@28036000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C6>; status = "disabled"; }; @@ -368,6 +375,7 @@ i2c7: i2c@28037000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C7>; status = "disabled"; }; @@ -380,6 +388,7 @@ i2c8: i2c@28038000 { clock-frequency = <400000>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PII2C8>; status = "disabled"; }; From patchwork Tue May 10 01:52:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6441AC433EF for ; Tue, 10 May 2022 01:55:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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q=2wGqyLn9T3vbyctJBe; m=JCgZA7eIZwXi42xXttiBqso4BAIt6viVmPzhvQDnw9c= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1113) id 24A1qhVO026791 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 3/9] arm64: dts: visconti: Update the clock providers for watchdog timer Date: Tue, 10 May 2022 10:52:23 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-4-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185306_046942_DAEA4312 X-CRM114-Status: UNSURE ( 9.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove fixed clock and source common clock for watchdog timer. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 1 - arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 1 - arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 7 +------ 3 files changed, 1 insertion(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 9b0666df6593..45ddf6f03175 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -58,7 +58,6 @@ phy0: ethernet-phy@1 { &wdt { status = "okay"; - clocks = <&wdt_clk>; }; &gpio { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi index 03827ce06ee3..adfe8406c24c 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi @@ -13,7 +13,6 @@ &wdt { status = "okay"; - clocks = <&wdt_clk>; }; &gpio { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 048b5dc7ae18..6050796a1678 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -171,12 +171,6 @@ extclk100mhz: extclk100mhz { clock-output-names = "extclk100mhz"; }; - wdt_clk: wdt-clk { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - }; - osc2_clk: osc2-clk { compatible = "fixed-clock"; clock-frequency = <20000000>; @@ -490,6 +484,7 @@ piether: ethernet@28000000 { wdt: wdt@28330000 { compatible = "toshiba,visconti-wdt"; reg = <0 0x28330000 0 0x1000>; + clocks = <&pismu TMPV770X_CLK_WDTCLK>; status = "disabled"; }; From patchwork Tue May 10 01:52:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD9DBC433F5 for ; Tue, 10 May 2022 01:55:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ujv3tJ4S38KphnquzdwqBZLs0HCnWFmBprYF3JoPrOk=; b=k1e/Z7NrC+R52f wAqyc2WaupWpigfBxJlENKjrqDiUpYFqjDh9RzUctQ02tDBczWqz30Sd6WRrYauQjRn5QD+47jYFj CagVmK77QWKLOfFTHWTlcJch5uieLlaX0jOzaIZkHODHVQZkDFo0jWgP3lEWfgWuFVKv6D6P1sZhV sdM4SnKEJki7wgw0chOSKnrt/oUFe/2P1U28DA5cRjGIKq0vl0H9oN+UhdFuS12dzMT8Ue5Mp1F/5 v8RVqE5MZ7Z5IIHsf4FppBuVp87iBNwuZVF5d5nZTM+yy6XrpMpDSz5BXt7xPttkp0VnJ/UWssKoL KhfdssPJIo6/UPkGDvKw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF4i-00H46k-4E; Tue, 10 May 2022 01:54:08 +0000 Received: from mo-csw1514.securemx.jp ([210.130.202.153] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3h-00H3lH-JH for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:09 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1514) id 24A1qjhs003919; Tue, 10 May 2022 10:52:45 +0900 X-Iguazu-Qid: 34tMbOxKUJOM4eLy9N X-Iguazu-QSIG: v=2; s=0; t=1652147564; q=34tMbOxKUJOM4eLy9N; m=R1jSCNcHLEoaFBNyV6StyWjZNtQapTTo6wL7OMiuW9k= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1511) id 24A1qivq019637 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 4/9] arm64: dts: visconti: Update the clock providers for SPI Date: Tue, 10 May 2022 10:52:24 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-5-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185305_894202_90DC8A3F X-CRM114-Status: UNSURE ( 9.66 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove fixed clock and source common clock for SPI. Signed-off-by: Nobuhiro Iwamatsu --- .../dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 2 -- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 21 ++++++++++++------- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi index adfe8406c24c..0c8321022a73 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi @@ -25,8 +25,6 @@ &spi0_pins { &spi0 { status = "okay"; - clocks = <&clk300mhz>, <&clk150mhz>; - clock-names = "sspclk", "apb_pclk"; mmc-slot@0 { compatible = "mmc-spi-slot"; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 6050796a1678..196cda7b5d90 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -143,13 +143,6 @@ clk125mhz: clk125mhz { clock-output-names = "clk125mhz"; }; - clk150mhz: clk150mhz { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - clock-output-names = "clk150mhz"; - }; - clk300mhz: clk300mhz { compatible = "fixed-clock"; clock-frequency = <300000000>; @@ -395,6 +388,8 @@ spi0: spi@28140000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI1>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -407,6 +402,8 @@ spi1: spi@28141000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI1>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -419,6 +416,8 @@ spi2: spi@28142000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI2>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -431,6 +430,8 @@ spi3: spi@28143000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI3>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -443,6 +444,8 @@ spi4: spi@28144000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI4>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -455,6 +458,8 @@ spi5: spi@28145000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI5>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -467,6 +472,8 @@ spi6: spi@28146000 { num-cs = <1>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pismu TMPV770X_CLK_PISPI6>; + clock-names = "apb_pclk"; status = "disabled"; }; From patchwork Tue May 10 01:52:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844402 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A3E7C433F5 for ; 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Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 2 -- .../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 2 -- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 16 ++-------------- 3 files changed, 2 insertions(+), 18 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 45ddf6f03175..527bb437dd90 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -42,8 +42,6 @@ &piether { status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; - clocks = <&clk300mhz>, <&clk125mhz>; - clock-names = "stmmaceth", "phy_ref_clk"; mdio0 { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts index 56701e0e1dab..ed7aa7e457b1 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts @@ -42,8 +42,6 @@ &piether { status = "okay"; phy-handle = <&phy0>; phy-mode = "rgmii-id"; - clocks = <&clk300mhz>, <&clk125mhz>; - clock-names = "stmmaceth", "phy_ref_clk"; mdio0 { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 196cda7b5d90..7c80a9434e10 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -136,20 +136,6 @@ clk25mhz: clk25mhz { clock-output-names = "clk25mhz"; }; - clk125mhz: clk125mhz { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - #clock-cells = <0>; - clock-output-names = "clk125mhz"; - }; - - clk300mhz: clk300mhz { - compatible = "fixed-clock"; - clock-frequency = <300000000>; - #clock-cells = <0>; - clock-output-names = "clk300mhz"; - }; - clk600mhz: clk600mhz { compatible = "fixed-clock"; #clock-cells = <0>; @@ -485,6 +471,8 @@ piether: ethernet@28000000 { snps,txpbl = <4>; snps,rxpbl = <4>; snps,tso; + clocks = <&pismu TMPV770X_CLK_PIETHER_BUS>, <&pismu TMPV770X_CLK_PIETHER_125M>; + clock-names = "stmmaceth", "phy_ref_clk"; status = "disabled"; }; From patchwork Tue May 10 01:52:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5F20C433EF for ; Tue, 10 May 2022 01:55:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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q=2wGr4Oa011E4R7HqRU; m=d6iPStV5WN59X0D/0+KgIj+zhCh66bQ5aFdQ1JZRDdI= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1110) id 24A1qig5024951 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 6/9] arm64: dts: visconti: Update the clock providers for PCIe host controller Date: Tue, 10 May 2022 10:52:26 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185305_889929_DA74AC2B X-CRM114-Status: GOOD ( 10.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove fixed clock and source common clock for PCIe host controller. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 2 -- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 16 ++-------------- 2 files changed, 2 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 527bb437dd90..d209fdc98597 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -72,6 +72,4 @@ &pwm { &pcie { status = "okay"; - clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; - clock-names = "ref", "core", "aux"; }; diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 7c80a9434e10..0fc32c036f30 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -129,20 +129,6 @@ timer { ; }; - clk25mhz: clk25mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - clock-output-names = "clk25mhz"; - }; - - clk600mhz: clk600mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - clock-output-names = "clk600mhz"; - }; - extclk100mhz: extclk100mhz { compatible = "fixed-clock"; #clock-cells = <0>; @@ -520,6 +506,8 @@ pcie: pcie@28400000 { 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; max-link-speed = <2>; + clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>; + clock-names = "ref", "core", "aux"; status = "disabled"; }; }; From patchwork Tue May 10 01:52:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9AD7C433F5 for ; Tue, 10 May 2022 01:55:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WJ9EsZPGYvxE+jFG7KWfkhfpjlKJ43L4rg89Lu4qFHQ=; b=RxS4+UGDa6/xxy OWkWmuHCLO6lihniq3X0h7sZelQniUd3BaREHHiZnlKzX0Yy3hGyDsoHrhEGVj40bciN3rFWes3hO ew6TwfYIbM+/cpMlIH8fMXcaNbGOXKclS5Vw5iJNj8tWm9k4J7/kIfn6fHllTUaS/KddRvQD5FPv+ QOZMeJD0NH11B0g4d2n8s+KXyhhuc8Dwsye5cYJ8Bff/rgXs0wMiLhrskFCkkdB+xPwFXd6j6dGZw PYqo9NzxB0OcAMO1CJCnlQZ+LRSEMJqDBvCnlQrXsmIotrxo/Kq8qAu2g8d55eEbW3Oe8nA9T8kMu LlxgWR5bIpS4iGveBn9w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3t-00H3pk-VE; Tue, 10 May 2022 01:53:18 +0000 Received: from mo-csw1514.securemx.jp ([210.130.202.153] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3h-00H3l6-8D for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:07 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1514) id 24A1qjX7003922; Tue, 10 May 2022 10:52:45 +0900 X-Iguazu-Qid: 34tKGLvGN3Fukht54y X-Iguazu-QSIG: v=2; s=0; t=1652147565; q=34tKGLvGN3Fukht54y; m=L+EKIWGekzJwNL87LswEqgjkJLYXP4mOjpiIrUwWpTA= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1511) id 24A1qiX4019649 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 7/9] dt-bindings: net: toshiba, visconti-dwmac: Update the common clock properties Date: Tue, 10 May 2022 10:52:27 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-8-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185305_538670_63707F98 X-CRM114-Status: UNSURE ( 9.54 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The clock for this driver switched to the common clock controller driver. Therefore, update common clock properties for ethernet device in the binding document. Signed-off-by: Nobuhiro Iwamatsu Acked-by: Rob Herring --- .../devicetree/bindings/net/toshiba,visconti-dwmac.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml b/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml index b12bfe61c67a..0988ed8d1c12 100644 --- a/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml @@ -52,6 +52,7 @@ unevaluatedProperties: false examples: - | + #include #include soc { @@ -63,7 +64,7 @@ examples: reg = <0 0x28000000 0 0x10000>; interrupts = ; interrupt-names = "macirq"; - clocks = <&clk300mhz>, <&clk125mhz>; + clocks = <&pismu TMPV770X_CLK_PIETHER_BUS>, <&pismu TMPV770X_CLK_PIETHER_125M>; clock-names = "stmmaceth", "phy_ref_clk"; snps,txpbl = <4>; snps,rxpbl = <4>; From patchwork Tue May 10 01:52:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 55CA6C433F5 for ; Tue, 10 May 2022 01:54:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Uhm1uQYK90qkZbcreKH5Atb60Oc7ohldxeluFW4hs6I=; b=YHTuCNVUkiCboZ x/xXA1VpVh4Fd9cQCuCc+vdRkaEV8RdRWm2XVgo52idApDnbSTkXehvB+LAaCR+A50VDOk2Ubp14W MS3qG4G8DmKg5wD0/y/d0sF9s5VVWsjCBfVjiLYJQXrrLuED55fQqBdseZyqZl8g69Tcv5ikvK2vc o4CXf6lAjQwNcok/Mi1eA5BWNwe9YQL3+msB2DWD3/FpuvXhKdPLR4bKXqBNVea8mPQpH3yyZvZCI FqODnquIk61CqbbZ6Yyu5lGYFVoiOKkUZEwTj0ZsUqmVagSskKhU9FXi9LWw1lAN9Be8KqszFt+Qb GTE1LLCmOrsAyN6vVT7w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3k-00H3ng-Lt; Tue, 10 May 2022 01:53:08 +0000 Received: from mo-csw1116.securemx.jp ([210.130.202.158] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3h-00H3lG-Ff for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:07 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 24A1qlOC028716; Tue, 10 May 2022 10:52:47 +0900 X-Iguazu-Qid: 2wGrARG6y18UYiX0Cd X-Iguazu-QSIG: v=2; s=0; t=1652147566; q=2wGrARG6y18UYiX0Cd; m=FzHKgqSlhrxTHuX5TvL1S9qWGcoIzJjyZhs3KJ6egbQ= Received: from imx12-a.toshiba.co.jp (imx12-a.toshiba.co.jp [61.202.160.135]) by relay.securemx.jp (mx-mr1111) id 24A1qise022842 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:46 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 8/9] dt-bindings: watchdog: toshiba, visconti-wdt: Update the common clock properties Date: Tue, 10 May 2022 10:52:28 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-9-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185305_816628_2FB6B450 X-CRM114-Status: UNSURE ( 9.48 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The clock for this driver switched to the common clock controller driver. Therefore, update common clock properties for watchdog in the binding document. Signed-off-by: Nobuhiro Iwamatsu Acked-by: Rob Herring --- .../bindings/watchdog/toshiba,visconti-wdt.yaml | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml index 690e19ce4b87..edfefb97b6b1 100644 --- a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml @@ -35,20 +35,16 @@ additionalProperties: false examples: - | + #include + soc { #address-cells = <2>; #size-cells = <2>; - wdt_clk: wdt-clk { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - }; - watchdog@28330000 { compatible = "toshiba,visconti-wdt"; reg = <0 0x28330000 0 0x1000>; - clocks = <&wdt_clk>; + clocks = <&pismu TMPV770X_CLK_WDTCLK>; timeout-sec = <20>; }; }; From patchwork Tue May 10 01:52:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77306C433EF for ; Tue, 10 May 2022 01:55:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WKlDs55gQBHr6fu+3FwHNrW/Y7hae478fcpD4gA23Sw=; b=lOEhw17vlNzZlq /vpcvn54JV/1rHIN+ijBCZLbyENTjebhJItmh4Mu0t8iF7R6NAPOXNLo0d6a4mHdfZqyv+YJWRgC7 PZIOe+fYEWRXXiiCvufI+7YPd12HCx7yEyGZSzewsq6ffb3Tp4KZlGgc+VSqKJ1Fg03MLXKi+1MGO j9KTLAy17lhvMvFO2o+XnC19/9oQsInECQmacwj9TUFci741u/FaZp5q411Xkb3aFo9pR/fKNXxUJ h4cumRMtGVOvO14dv4AqRG/QyZhjM1qHQS0UcPVGhDjVOw2++J4VWuemqEmkFwUBiuL3fqTCCYPyA cy8WE5S50o8Hkm0+ncSw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF4X-00H423-Ja; Tue, 10 May 2022 01:53:57 +0000 Received: from mo-csw1516.securemx.jp ([210.130.202.155] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3h-00H3lF-K0 for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:08 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1516) id 24A1qjp8001628; Tue, 10 May 2022 10:52:45 +0900 X-Iguazu-Qid: 34tMVM9Q0JF9iEn4ca X-Iguazu-QSIG: v=2; s=0; t=1652147565; q=34tMVM9Q0JF9iEn4ca; m=vub4mpChjxRqc8Gh+v9NRTuNPGbmvR7EI1WLMiVnuYw= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1513) id 24A1qit2010916 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:44 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 9/9] dt-bindings: pci: toshiba, visconti-pcie: Update the common clock properties Date: Tue, 10 May 2022 10:52:29 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-10-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185305_894655_94DDFD73 X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The clock for this driver switched to the common clock controller driver. Therefore, update common clock properties for PCIe controller in the binding document. Signed-off-by: Nobuhiro Iwamatsu Acked-by: Rob Herring --- .../devicetree/bindings/pci/toshiba,visconti-pcie.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml index 30b6396d83c8..b9d0484606cc 100644 --- a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml @@ -69,6 +69,7 @@ unevaluatedProperties: false examples: - | + #include #include #include @@ -102,7 +103,7 @@ examples: 0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; + clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>; clock-names = "ref", "core", "aux"; max-link-speed = <2>; };