From patchwork Wed May 11 00:06:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kim, Dongwon" X-Patchwork-Id: 12845649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9125CC433F5 for ; Wed, 11 May 2022 00:10:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ECFF610E443; Wed, 11 May 2022 00:10:42 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9377E10E443 for ; Wed, 11 May 2022 00:10:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652227842; x=1683763842; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=32cZwzaupVbqe0RPXzW/p9zHEOnc0oUy4MpECS5PJis=; b=D51MlKqsNt/fZABq5R/wB8LOGq3iue4ukPR+YMbB+wjnFPZYSc4ZRFgg zHoB87S5l8I8Zx3ZyIxBwoauSCAcbLgmIC4H9Cj6vNQqT6pA7XRksi7Wk mFcuV8BOGIve78Z0hgLkSqRo9pOnmm2l+z6t36pDLtGCvUE9+7iEKDON3 gIOj26TnOWwqcT7bYfxi3MZKM5RZpxJ51u8Cr+sFc5v76mVMiq8e+nLry wwYs+qyyNPf5Gr000jw5eMSsCkE66frQ0mV/jdT+cvAciW93vAIVBEg18 zA0eZ0nTOAbwDCv5jqHAgCscqAnSH4cGZHrsO+oLR3kWrNlMI/kd+NkKH A==; X-IronPort-AV: E=McAfee;i="6400,9594,10343"; a="269203213" X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="269203213" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2022 17:10:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="623707915" Received: from dongwonk-z390-aorus-ultra-intel-gfx.fm.intel.com ([10.105.129.122]) by fmsmga008.fm.intel.com with ESMTP; 10 May 2022 17:10:41 -0700 From: Dongwon Kim To: dri-devel@lists.freedesktop.org Subject: [PATCH 1/3] drm/virtio: .release ops for virtgpu fence release Date: Tue, 10 May 2022 17:06:21 -0700 Message-Id: <20220511000623.12938-1-dongwon.kim@intel.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vivek Kasireddy , Gerd Hoffmann , Dongwon Kim , Gurchetan Singh Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" virtio_gpu_fence_release is added to free virtio-gpu-fence upon release of dma_fence. Cc: Gurchetan Singh Cc: Gerd Hoffmann Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim --- drivers/gpu/drm/virtio/virtgpu_fence.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/virtio/virtgpu_fence.c b/drivers/gpu/drm/virtio/virtgpu_fence.c index f28357dbde35..ba659ac2a51d 100644 --- a/drivers/gpu/drm/virtio/virtgpu_fence.c +++ b/drivers/gpu/drm/virtio/virtgpu_fence.c @@ -63,12 +63,20 @@ static void virtio_gpu_timeline_value_str(struct dma_fence *f, char *str, (u64)atomic64_read(&fence->drv->last_fence_id)); } +static void virtio_gpu_fence_release(struct dma_fence *f) +{ + struct virtio_gpu_fence *fence = to_virtio_gpu_fence(f); + + kfree(fence); +} + static const struct dma_fence_ops virtio_gpu_fence_ops = { .get_driver_name = virtio_gpu_get_driver_name, .get_timeline_name = virtio_gpu_get_timeline_name, .signaled = virtio_gpu_fence_signaled, .fence_value_str = virtio_gpu_fence_value_str, .timeline_value_str = virtio_gpu_timeline_value_str, + .release = virtio_gpu_fence_release, }; struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev, From patchwork Wed May 11 00:06:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kim, Dongwon" X-Patchwork-Id: 12845650 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BA641C433F5 for ; Wed, 11 May 2022 00:10:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C937510E44B; Wed, 11 May 2022 00:10:46 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id F109010E44B for ; Wed, 11 May 2022 00:10:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652227843; x=1683763843; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hQERbqxYO4QPGFr6BAiKznCLu4mhW9VxKKbA37bj8T4=; b=lez80eKdjX+UoxMYKUUmXZGnRokzsn9uTzXHDUJB/EuHgVVkl6duTwGi rNEFP/2KDwlm+R815wDWUzfzQT2/vm9nFOH/W8OOECbYAEtgFVWwpsozu yzWmBOQbX2QIL9+GMOMtFuPcewclHDdO9lsD7HhODj0nshVRsx81qi0on fwctrn+yBEZXZPsISyAG+AGDMfYNkrSdWEvXbcOy2EXZ17LPb6Z52F+9g 4f2W1/izBUxIapnzlAR0hMLr1/QVcNdN/VFqUp4loNkZ3aLEDrFn3yt1f TP05oXl0ZB4UMq1qb0Z8qtmMz4jmUUWPMxvS/erL3lvDc4aoIWXa7AW5T g==; X-IronPort-AV: E=McAfee;i="6400,9594,10343"; a="269203214" X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="269203214" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2022 17:10:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="623707919" Received: from dongwonk-z390-aorus-ultra-intel-gfx.fm.intel.com ([10.105.129.122]) by fmsmga008.fm.intel.com with ESMTP; 10 May 2022 17:10:42 -0700 From: Dongwon Kim To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/3] drm/virtio: fence created per cursor/plane update Date: Tue, 10 May 2022 17:06:22 -0700 Message-Id: <20220511000623.12938-2-dongwon.kim@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220511000623.12938-1-dongwon.kim@intel.com> References: <20220511000623.12938-1-dongwon.kim@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vivek Kasireddy , Gerd Hoffmann , Dongwon Kim , Gurchetan Singh Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Having one fence for a vgfb would cause conflict in case there are multiple planes referencing the same vgfb (e.g. Xorg screen covering two displays in extended mode) being flushed simultaneously. So it makes sence to use a separated fence for each plane update to prevent this. vgfb->fence is not required anymore with the suggested code change so both prepare_fb and cleanup_fb are removed since only fence creation/ freeing are done in there. Cc: Gurchetan Singh Cc: Gerd Hoffmann Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim --- drivers/gpu/drm/virtio/virtgpu_drv.h | 1 - drivers/gpu/drm/virtio/virtgpu_plane.c | 98 +++++++++----------------- 2 files changed, 35 insertions(+), 64 deletions(-) diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/virtgpu_drv.h index 0a194aaad419..4c59c1e67ca5 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.h +++ b/drivers/gpu/drm/virtio/virtgpu_drv.h @@ -186,7 +186,6 @@ struct virtio_gpu_output { struct virtio_gpu_framebuffer { struct drm_framebuffer base; - struct virtio_gpu_fence *fence; }; #define to_virtio_gpu_framebuffer(x) \ container_of(x, struct virtio_gpu_framebuffer, base) diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c index 6d3cc9e238a4..9856e9941e37 100644 --- a/drivers/gpu/drm/virtio/virtgpu_plane.c +++ b/drivers/gpu/drm/virtio/virtgpu_plane.c @@ -137,29 +137,36 @@ static void virtio_gpu_resource_flush(struct drm_plane *plane, struct virtio_gpu_device *vgdev = dev->dev_private; struct virtio_gpu_framebuffer *vgfb; struct virtio_gpu_object *bo; + struct virtio_gpu_object_array *objs; + struct virtio_gpu_fence *fence; vgfb = to_virtio_gpu_framebuffer(plane->state->fb); bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]); - if (vgfb->fence) { - struct virtio_gpu_object_array *objs; + if (bo && bo->dumb && (plane->state->fb != new_state->fb) && + ((plane->type == DRM_PLANE_TYPE_PRIMARY && bo->guest_blob) || + plane->type != DRM_PLANE_TYPE_PRIMARY)) + fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, + 0); + + if (fence) { objs = virtio_gpu_array_alloc(1); - if (!objs) + if (!objs) { + kfree(fence); return; + } virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]); virtio_gpu_array_lock_resv(objs); - virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y, - width, height, objs, vgfb->fence); - virtio_gpu_notify(vgdev); + } + + virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y, + width, height, objs, fence); + virtio_gpu_notify(vgdev); - dma_fence_wait_timeout(&vgfb->fence->f, true, + if (fence) { + dma_fence_wait_timeout(&fence->f, true, msecs_to_jiffies(50)); - dma_fence_put(&vgfb->fence->f); - vgfb->fence = NULL; - } else { - virtio_gpu_cmd_resource_flush(vgdev, bo->hw_res_handle, x, y, - width, height, NULL, NULL); - virtio_gpu_notify(vgdev); + dma_fence_put(&fence->f); } } @@ -239,47 +246,6 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane, rect.y2 - rect.y1); } -static int virtio_gpu_plane_prepare_fb(struct drm_plane *plane, - struct drm_plane_state *new_state) -{ - struct drm_device *dev = plane->dev; - struct virtio_gpu_device *vgdev = dev->dev_private; - struct virtio_gpu_framebuffer *vgfb; - struct virtio_gpu_object *bo; - - if (!new_state->fb) - return 0; - - vgfb = to_virtio_gpu_framebuffer(new_state->fb); - bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]); - if (!bo || (plane->type == DRM_PLANE_TYPE_PRIMARY && !bo->guest_blob)) - return 0; - - if (bo->dumb && (plane->state->fb != new_state->fb)) { - vgfb->fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, - 0); - if (!vgfb->fence) - return -ENOMEM; - } - - return 0; -} - -static void virtio_gpu_plane_cleanup_fb(struct drm_plane *plane, - struct drm_plane_state *old_state) -{ - struct virtio_gpu_framebuffer *vgfb; - - if (!plane->state->fb) - return; - - vgfb = to_virtio_gpu_framebuffer(plane->state->fb); - if (vgfb->fence) { - dma_fence_put(&vgfb->fence->f); - vgfb->fence = NULL; - } -} - static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -310,21 +276,31 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, if (bo && bo->dumb && (plane->state->fb != old_state->fb)) { /* new cursor -- update & wait */ struct virtio_gpu_object_array *objs; + struct virtio_gpu_fence *fence; + fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, + 0); objs = virtio_gpu_array_alloc(1); - if (!objs) + if (!objs) { + if (fence) + kfree(fence); + return; + } + virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]); virtio_gpu_array_lock_resv(objs); virtio_gpu_cmd_transfer_to_host_2d (vgdev, 0, plane->state->crtc_w, plane->state->crtc_h, - 0, 0, objs, vgfb->fence); + 0, 0, objs, fence); virtio_gpu_notify(vgdev); - dma_fence_wait(&vgfb->fence->f, true); - dma_fence_put(&vgfb->fence->f); - vgfb->fence = NULL; + + if (fence) { + dma_fence_wait(&fence->f, true); + dma_fence_put(&fence->f); + } } if (plane->state->fb != old_state->fb) { @@ -358,15 +334,11 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, } static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = { - .prepare_fb = virtio_gpu_plane_prepare_fb, - .cleanup_fb = virtio_gpu_plane_cleanup_fb, .atomic_check = virtio_gpu_plane_atomic_check, .atomic_update = virtio_gpu_primary_plane_update, }; static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = { - .prepare_fb = virtio_gpu_plane_prepare_fb, - .cleanup_fb = virtio_gpu_plane_cleanup_fb, .atomic_check = virtio_gpu_plane_atomic_check, .atomic_update = virtio_gpu_cursor_plane_update, }; From patchwork Wed May 11 00:06:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kim, Dongwon" X-Patchwork-Id: 12845651 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 957ABC433F5 for ; Wed, 11 May 2022 00:10:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DD8DB10E47D; Wed, 11 May 2022 00:10:48 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8C5DD10E4B4 for ; Wed, 11 May 2022 00:10:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652227843; x=1683763843; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qypx/lrMAjQjVjtfmRKPIbXo2skHPhcxneMs7mE91Ro=; b=c0Et0bj77DSZHUk6bqqabYEYTpqrinuSDQYGF2ZG5jYvg73aifE0PAgP n+XIHss9BdtCGRdaf+8JuN3aHDw5FGwL/lhugdKigKhmtITMbebwLqX13 sDDXS4t2gXD9PYLmgqa+SfGoAO+iYa52whcGkTj+Oe7pR86M3e/SYh8Ol EGOsWEhmzoVKl/mr3L7q9QoySbW16L3EP0EBQiGnxKdgViPBa5VOp78An WeBAL92HftLgZtqhw4L6D5aLfAh9yn1ngHvZXC33f4Dd5d49PlPoswasb fOxxpoFHWEwSSebFGiIafHvLJi5VdydGaMOLJb0x3iivbvZDrxo7E0THv w==; X-IronPort-AV: E=McAfee;i="6400,9594,10343"; a="269203216" X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="269203216" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2022 17:10:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="623707923" Received: from dongwonk-z390-aorus-ultra-intel-gfx.fm.intel.com ([10.105.129.122]) by fmsmga008.fm.intel.com with ESMTP; 10 May 2022 17:10:43 -0700 From: Dongwon Kim To: dri-devel@lists.freedesktop.org Subject: [PATCH 3/3] drm/virtio: use the fence for every plane update Date: Tue, 10 May 2022 17:06:23 -0700 Message-Id: <20220511000623.12938-3-dongwon.kim@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220511000623.12938-1-dongwon.kim@intel.com> References: <20220511000623.12938-1-dongwon.kim@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vivek Kasireddy , Gerd Hoffmann , Dongwon Kim , Gurchetan Singh Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Trying to use the fence to make plane update to wait for the host to consume the buffer for better synchronization in all cases Cc: Gurchetan Singh Cc: Gerd Hoffmann Cc: Vivek Kasireddy Signed-off-by: Dongwon Kim Reported-by: kernel test robot Reported-by: kernel test robot Reported-by: Dan Carpenter --- drivers/gpu/drm/virtio/virtgpu_plane.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c index 9856e9941e37..0333181e9dbf 100644 --- a/drivers/gpu/drm/virtio/virtgpu_plane.c +++ b/drivers/gpu/drm/virtio/virtgpu_plane.c @@ -142,12 +142,7 @@ static void virtio_gpu_resource_flush(struct drm_plane *plane, vgfb = to_virtio_gpu_framebuffer(plane->state->fb); bo = gem_to_virtio_gpu_obj(vgfb->base.obj[0]); - - if (bo && bo->dumb && (plane->state->fb != new_state->fb) && - ((plane->type == DRM_PLANE_TYPE_PRIMARY && bo->guest_blob) || - plane->type != DRM_PLANE_TYPE_PRIMARY)) - fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, - 0); + fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); if (fence) { objs = virtio_gpu_array_alloc(1);