From patchwork Wed May 11 09:50:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846000 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5B3BC433F5 for ; Wed, 11 May 2022 09:50:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235635AbiEKJuq (ORCPT ); Wed, 11 May 2022 05:50:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232388AbiEKJuh (ORCPT ); Wed, 11 May 2022 05:50:37 -0400 Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-eopbgr20077.outbound.protection.outlook.com [40.107.2.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1449353A47 for ; Wed, 11 May 2022 02:50:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=gkPKE91PDoFf2z9qQAiga9pC2nSvv3TRpeQmyTATeGs061dcjm5awj8zqW+SMCYZMiZ/3JcBjV6A8OULQYwGlwVr0wIAJMhzEF6hFTSs3+5uiPnsNG97sMLERRrDV8kW5D/3OUNdwj7S2NF9RyzxRCldySdG5vebOpGEopBuEZPMKQZHkA76XKj+fi6WfS96/NTyAgNY9VTxXd8nIOfgbz9vdAmD+h6hK091SHIjECJzdB0tpRPQtfSl0kMzP4jQosBMUbJcBluANQJl2wts88u1BOCe3PKmDoCoeeHLD+h1Cu86NBPcNFCe6DWcyeKkBK2bzYhCjH3uNntqnoXQLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dHzhrLKdDEq8KIq9ngV+gd2GkrWhevmOu2fnqWOy67Q=; b=jz4gbxjO3D/WalyQSCiw826xq510wAppOOaIZfsOyZe0fDyJ3SWhHtrjzxZeSub67/MgtHeE9nod/+gMhKKVb9tx7oRRkPxSwySq/7zvmp1nwILQzrRchc3u3xXgx3wTQutIAsn/NQp9mLHtGNEv7WGfC1oogika2PpGzJVWdK1SRqcFZsHavB6zQQs06A9rwfzstgTALXRTWIuR0twTWhchep8+XUYexOvb8Ug3jV0Rlbg26YXlKJDLxHbgPR1qQ2SvZDPhAcSIIvY7c0fUI8S+eXLR9wszlCSkdk7NCcs+LGqv7lxVu1DqLObHpWb/yYBjVEIWdJwwT7tjU+OKbA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dHzhrLKdDEq8KIq9ngV+gd2GkrWhevmOu2fnqWOy67Q=; b=a3weWuET1OGK4J3R5e8yntEIOaqgg7cj5N+OtmMSJNsggZWucBqZv/Ui3G/o7/S5BtcxH2wzeX4T2XpD6iywr48nKVicwS9lViZnj003ZaIxtFyL+iK7RNRrDnP+U5LMcawf1hEVx4V3GigZzPH3XlWwh4WxatUAet5etUnRAL8= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by PAXPR04MB9155.eurprd04.prod.outlook.com (2603:10a6:102:22e::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5206.27; Wed, 11 May 2022 09:50:34 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5%5]) with mapi id 15.20.5250.013; Wed, 11 May 2022 09:50:34 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 1/8] net: dsa: felix: program host FDB entries towards PGID_CPU for tag_8021q too Date: Wed, 11 May 2022 12:50:13 +0300 Message-Id: <20220511095020.562461-2-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 82dcf6be-bc9c-4a2d-83ad-08da3333b1a6 X-MS-TrafficTypeDiagnostic: PAXPR04MB9155:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: w1fuXiqLT3e+TWw9Tp/b1YzL8x8t5d94boodbXo3GW+LJRLBb5NYssU2qOC0zF3C8iTPG6KNoCpF+Hgg/2WyDtn+qBc9otnZYrTWI1OqtAng6dhH9JLeWvua1MW5whkHZZwOLlH9bfkYrm6G6W2+6eL5dxlzpniI71x9JUh0YjkAMfyMZHz4e1g5vSRGkcZx5X9gMeaEEbysqa9q+UMzKsttNOmdabEWQFNG7pEbpFrrHGZPuwd+aihD3/9qA5WdTOCl0J/Zh5E6mCHrkPx49ezUyz0jHAey7LZdiPHmvQmw7NyNt8xTHcsE8v9+BM5hUR6UL57odukh+C69DKHKsjbC4lXFyfRjBPo37/iIj2QkM9HXn8WfO6uDWmWh6P8XsQQsvJCcdWOA6srCvhlKxVfwJ223yVAVlBh9v4vNEG+hamiswqeGxVBRriBWxcnJ/qcOZ9YdvuIBLe4dJ3M4Th3FeK2OovHVwRdFwPYrFfMLMJkqbUSudFWSI81TDjswGSzx2qCwvTe+7z41RzQSx4GXj91A83UlWeVd2o59BxQNvYLMjIlIDiOqr1H0A2+6MFwVxCrIcQCRmrWUb+2R79sK1fwkiMIhWA1/ekxJj51sURNq2SNE57bPTiBqCcuIDFPNBH7xipOp3yUxw5GOH+q/4sHR+1mBR6TgYM+pQCMkmXM8Bsj1T/Ozmyk1j1yUgIxAAaopDbdajRc//PEPBiCS9solobkd3Ym7yNarXM3jLMFRZHrTri4Csk/3AUX+YZbSzYMn8GJWdH8/tRLDSo7K/LbHXI9DFZ+m4rQu6VsXIkg6w6FruRVTLEegaGNYd8kD2H1ft3M2ynGe5+wiUHLPIt1BMqvmOFzHgHrx5P8/LlPTBlw3AWvyr8ycGPxgntbnh1VtiZwhbiMMof/g+IFWe9syByiffBq40/IDam/VfaXvsnblJlzfosawAbAorOS7H5VoZidGk69WvOnmw4ms6pAjJ0LZO2X1+IqzsgHuAKVXYwBQFUUS9Z6tog6wKFMMggvGiFp37UiBGc+q00SXNunRDXY6Xvr3/ACdip0Z6tU0SRya3K+dPrvJ37DgBPKzM+Fp+7DglmgaNA6nt8ooLQwuX8As56ODZcMiPEKgw8tAn/E6hXWjcZZDytyh/s/b830M/5hZS9LEuwJAGYEgiHu5T+wRNhnrdkDyML4h/yZNHdFXTId4pLRgiNKeBG6awE/cGXio5tu0ay7wnDwMgp2MBjVSuSPwZs9azLdthSRmpyy4fV7021dROLau5DUwHsmjv2DPV9ygdVRGxlEk/Nar7SrsoO4MQF5jChnzLE9Vi3HfbDi88QMXvh4fi0ae6K2tieiWmwy4MDNfV7k0dv/+NvtyasxlBrXlDR5WLtEqskjb6DMlC5g4lZZoY7eff3ZIV29Xe/NnQTWzJXlXALFdfEtjxAvSJtbbjsKcePpRkpd0eej4Csr8I1ZAeLWplqlUsoG+9QEiAV5ki+c3NGs33qiGlrdUmtfy7UFJ5b5q2lUZ2kigdpAYxUDKhyAzimcEpxTG6ima2JJ+hlLrKfnMU+gFm6PM7Ki1v9u7wawaPPnkTi+MArI071uUqD+Udy1A8g1qfQe96e+XzfWGJ/vU4pUfopUrADsF9Cpa72lHVh4OWUDTPEtG60BClhPL60RCB7f+wUBJA/+Y85HhM17QZ/2oSkieuN5MUNCSK3CqiEfN6SIwLMBNygvzbf0qA3ZASEKTy4ySJhdtsacHqLQIAi7OiHdLDw3eVdg= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82dcf6be-bc9c-4a2d-83ad-08da3333b1a6 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5136.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2022 09:50:34.5206 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 48am8hgsyYLIANJ1XJaAsW8Sqf++QwEq1wuLAOCr58B/iKc0LUQ1C0AgUf6MOExNcYnGzANUhFzFA1mDTnE9gA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB9155 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org I remembered why we had the host FDB migration procedure in place. It is true that host FDB entry migration can be done by changing the value of PGID_CPU, but the problem is that only host FDB entries learned while operating in NPI mode go to PGID_CPU. When the CPU port operates in tag_8021q mode, the FDB entries are learned towards the unicast PGID equal to the physical port number of this CPU port, bypassing the PGID_CPU indirection. So host FDB entries learned in tag_8021q mode are not migrated any longer towards the NPI port. Fix this by extracting the NPI port -> PGID_CPU redirection from the ocelot switch lib, moving it to the Felix DSA driver, and applying it for any CPU port regardless of its kind (NPI or tag_8021q). Fixes: 51349ba7f2f0 ("net: dsa: felix: stop migrating FDBs back and forth on tag proto change") Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 12 ++++++++++-- drivers/net/ethernet/mscc/ocelot.c | 7 +------ 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index a23781d9a15c..5af4f9b3ee32 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -668,15 +668,19 @@ static int felix_fdb_add(struct dsa_switch *ds, int port, struct dsa_db db) { struct net_device *bridge_dev = felix_classify_db(db); + struct dsa_port *dp = dsa_to_port(ds, port); struct ocelot *ocelot = ds->priv; if (IS_ERR(bridge_dev)) return PTR_ERR(bridge_dev); - if (dsa_is_cpu_port(ds, port) && !bridge_dev && + if (dsa_port_is_cpu(dp) && !bridge_dev && dsa_fdb_present_in_other_db(ds, port, addr, vid, db)) return 0; + if (dsa_port_is_cpu(dp)) + port = PGID_CPU; + return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev); } @@ -685,15 +689,19 @@ static int felix_fdb_del(struct dsa_switch *ds, int port, struct dsa_db db) { struct net_device *bridge_dev = felix_classify_db(db); + struct dsa_port *dp = dsa_to_port(ds, port); struct ocelot *ocelot = ds->priv; if (IS_ERR(bridge_dev)) return PTR_ERR(bridge_dev); - if (dsa_is_cpu_port(ds, port) && !bridge_dev && + if (dsa_port_is_cpu(dp) && !bridge_dev && dsa_fdb_present_in_other_db(ds, port, addr, vid, db)) return 0; + if (dsa_port_is_cpu(dp)) + port = PGID_CPU; + return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev); } diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 5f81938c58a9..7a9ee91c8427 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -1349,15 +1349,10 @@ EXPORT_SYMBOL(ocelot_drain_cpu_queue); int ocelot_fdb_add(struct ocelot *ocelot, int port, const unsigned char *addr, u16 vid, const struct net_device *bridge) { - int pgid = port; - - if (port == ocelot->npi) - pgid = PGID_CPU; - if (!vid) vid = ocelot_vlan_unaware_pvid(ocelot, bridge); - return ocelot_mact_learn(ocelot, pgid, addr, vid, ENTRYTYPE_LOCKED); + return ocelot_mact_learn(ocelot, port, addr, vid, ENTRYTYPE_LOCKED); } EXPORT_SYMBOL(ocelot_fdb_add); From patchwork Wed May 11 09:50:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846001 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4DB2C433F5 for ; Wed, 11 May 2022 09:50:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236182AbiEKJuu (ORCPT ); Wed, 11 May 2022 05:50:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233255AbiEKJuj (ORCPT ); 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Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by PAXPR04MB9155.eurprd04.prod.outlook.com (2603:10a6:102:22e::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5206.27; Wed, 11 May 2022 09:50:36 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5%5]) with mapi id 15.20.5250.013; Wed, 11 May 2022 09:50:36 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 2/8] net: dsa: felix: bring the NPI port indirection for host MDBs to surface Date: Wed, 11 May 2022 12:50:14 +0300 Message-Id: <20220511095020.562461-3-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f9694d03-fbfb-4c69-ab28-08da3333b2d7 X-MS-TrafficTypeDiagnostic: PAXPR04MB9155:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The only caller of the ocelot switch lib which uses the NPI port is the Felix DSA driver. Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 6 ++++++ drivers/net/ethernet/mscc/ocelot.c | 6 ------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 5af4f9b3ee32..f8a587ae9c6b 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -745,6 +745,9 @@ static int felix_mdb_add(struct dsa_switch *ds, int port, dsa_mdb_present_in_other_db(ds, port, mdb, db)) return 0; + if (port == ocelot->npi) + port = ocelot->num_phys_ports; + return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev); } @@ -762,6 +765,9 @@ static int felix_mdb_del(struct dsa_switch *ds, int port, dsa_mdb_present_in_other_db(ds, port, mdb, db)) return 0; + if (port == ocelot->npi) + port = ocelot->num_phys_ports; + return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev); } diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 7a9ee91c8427..29e8011e4a91 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -2339,9 +2339,6 @@ int ocelot_port_mdb_add(struct ocelot *ocelot, int port, struct ocelot_pgid *pgid; u16 vid = mdb->vid; - if (port == ocelot->npi) - port = ocelot->num_phys_ports; - if (!vid) vid = ocelot_vlan_unaware_pvid(ocelot, bridge); @@ -2399,9 +2396,6 @@ int ocelot_port_mdb_del(struct ocelot *ocelot, int port, struct ocelot_pgid *pgid; u16 vid = mdb->vid; - if (port == ocelot->npi) - port = ocelot->num_phys_ports; - if (!vid) vid = ocelot_vlan_unaware_pvid(ocelot, bridge); From patchwork Wed May 11 09:50:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846007 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 290CEC433EF for ; Wed, 11 May 2022 09:52:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236920AbiEKJwB (ORCPT ); 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Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 3/8] net: dsa: felix: bring the NPI port indirection for host flooding to surface Date: Wed, 11 May 2022 12:50:15 +0300 Message-Id: <20220511095020.562461-4-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e3c7d88b-21dc-4cba-0e02-08da3333b404 X-MS-TrafficTypeDiagnostic: PAXPR04MB9155:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The only caller of the ocelot switch lib which uses the NPI port is the Felix DSA driver. Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 3 +++ drivers/net/ethernet/mscc/ocelot.c | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index f8a587ae9c6b..59221d838a45 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -794,6 +794,9 @@ static int felix_bridge_flags(struct dsa_switch *ds, int port, { struct ocelot *ocelot = ds->priv; + if (port == ocelot->npi) + port = ocelot->num_phys_ports; + ocelot_port_bridge_flags(ocelot, port, val); return 0; diff --git a/drivers/net/ethernet/mscc/ocelot.c b/drivers/net/ethernet/mscc/ocelot.c index 29e8011e4a91..e0d1d5b59981 100644 --- a/drivers/net/ethernet/mscc/ocelot.c +++ b/drivers/net/ethernet/mscc/ocelot.c @@ -2943,9 +2943,6 @@ EXPORT_SYMBOL(ocelot_port_pre_bridge_flags); void ocelot_port_bridge_flags(struct ocelot *ocelot, int port, struct switchdev_brport_flags flags) { - if (port == ocelot->npi) - port = ocelot->num_phys_ports; - if (flags.mask & BR_LEARNING) ocelot_port_set_learning(ocelot, port, !!(flags.val & BR_LEARNING)); From patchwork Wed May 11 09:50:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846008 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0132C433EF for ; Wed, 11 May 2022 09:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233173AbiEKJwH (ORCPT ); Wed, 11 May 2022 05:52:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45146 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234827AbiEKJup (ORCPT ); Wed, 11 May 2022 05:50:45 -0400 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60077.outbound.protection.outlook.com [40.107.6.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F12AD2AD8 for ; Wed, 11 May 2022 02:50:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=K1W/4rFFWQvKCGk0w4MLGxaNavyWA6e5sDbW510cT4stvxZba5AjU2K9OTM9q0M4HtUvY0LYWUZHQQqW9lKGhAQsExLelMaFXPreyNmH48YxuvotK/JJvlMgfVFXrdlF5qnPOxdI8LdaqKJR/bY4NfqPrXMRm07s3zYzydqGtULFesgjyOxIRPLfobJzwFOEUwlNCbsDoC9QCXddZaiW3dwyGp+LrHYN6TzLMCcHwSEDci2oZnG6lvz74v0fJo5NyHSISXntsB8y4+rpky3BJXdlSN2Sualnq5cIp1BbLpBW2i//lA+K73bHK8e7dTamA3AEw72pzsEktMXXZG/Kzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=FNuz4/RCvAOqZqFy0qHPFT60QcJRVljacC5NzvfJ0SA=; b=UF3aoyJsdXvCSIw+Uv7s3lGxKE0B6EatW371yBR+T4erBaXTfNLSPGKgJ9+ZY7UskZFdV9OFWoSrBDjk8M6WzhZoNWvPXA9wNVlPOc3TnN0Ifp164mfGpu9IJau7bvOquI2Bc7eDLytzerTKEgEYezBQASRMSZ4d7kPkqbYhqzECYRsIeMbZyK05juLTZW0zFgSclubg3LHFeM8OH2Ygw9TlHqLEAiyV2vTtMsZbUKe8O9Ygm9kMW7qKIRYUJ5ZzFsaZ0KFJErolPZ0iwiS+NLlhxN/eTYKR9mtnUcmT7LQJrhDuNpbhUw3ERcdQCmb0PaiMJcrLheN9c/5bUfdj5g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=FNuz4/RCvAOqZqFy0qHPFT60QcJRVljacC5NzvfJ0SA=; b=f2ecm0AVaHqlvxltXW4ymKvU+zClxE4ws3DGkPgHFmxNoUX8GgO2TtP+Cda7Pi7jzRFleSZKnOX5UiRJ/+xxuSTH0QlTmSbEWl0wLWVrs/zL2sgtTcSpTyBpWZpHeCXF985yVH5Fz4oPjcnD3Dg1rpe5kx68LNSm9ICmwb8KrTM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by AM0PR04MB4964.eurprd04.prod.outlook.com (2603:10a6:208:c8::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5250.13; Wed, 11 May 2022 09:50:40 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5%5]) with mapi id 15.20.5250.013; Wed, 11 May 2022 09:50:40 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. 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Signed-off-by: Vladimir Oltean --- v1->v2: none include/net/dsa.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/net/dsa.h b/include/net/dsa.h index efd33956df37..76257a9f0e1b 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -590,6 +590,17 @@ static inline u32 dsa_user_ports(struct dsa_switch *ds) return mask; } +static inline u32 dsa_cpu_ports(struct dsa_switch *ds) +{ + struct dsa_port *cpu_dp; + u32 mask = 0; + + dsa_switch_for_each_cpu_port(cpu_dp, ds) + mask |= BIT(cpu_dp->index); + + return mask; +} + /* Return the local port used to reach an arbitrary switch device */ static inline unsigned int dsa_routing_port(struct dsa_switch *ds, int device) { From patchwork Wed May 11 09:50:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846004 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 165DEC433FE for ; Wed, 11 May 2022 09:51:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231679AbiEKJvv (ORCPT ); Wed, 11 May 2022 05:51:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236604AbiEKJvK (ORCPT ); Wed, 11 May 2022 05:51:10 -0400 Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60077.outbound.protection.outlook.com [40.107.6.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47A006324 for ; Wed, 11 May 2022 02:50:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=asdSrvCWb92uipQPwOSVghgM9AGAssm0KetNIDPeAueSKmULW7bJu48F49CzePw4Ft3npTQMU9XLXKBVru+98yu9Srvub96IXw3T6ql7UBnho15PH2FLyu1dqjZUsjO34ZkvCJZBGt9n+ZzmVyoW6PhYOM6i0um8qNzN/UfmdEi+xpwPbIGIDTdJfm7a5+oOXcEd6GaPPDQwcB3OZuDnq2iUvncHeiDR+10f2sLDYlIVlIjz6c3rhm2jz2OEkBNwoTWiDVyqe9yrhohQSaYcG3GPh0RmzrERnuM+0sWLnb3GSQ8SyNOz4x3uABYhfJzNFOG+kj5xACz9tQszuecz9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=IsIjrbNRHEv0QMzHJoekyaYHsZORoM247/IutFo4WIM=; b=VSDY0OfA1cwfcRlX7zNOVxiMvIkYGtyHqXw2UdjOPUYIW1wXJjlPapQOnoHOR3n3aK81driuaal4fvOEq3xDtZAdAhsr7gYeK3TH5BB9ZeGGEab8hw8RByUkJXT083I6eoqhEX/2gr6YiiQjvD5dBMr3HcVD5nuD+APAGP6Q4aJo6lovqF4MaDJTvqhi5oT2yNduCUR9xmndOU+KpafXB2aeM48XJDw8FwbpTAvaYBwJOnP+j2FZmTXOP4qyT6CySJ/7TjlScTML9JmMW9nwzBL2eVpqyrCNQQh5FaWGu5FlBIv0ts25huAbKZglXI4oQ9AJJMnBFxCRxrnnCjz/FQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IsIjrbNRHEv0QMzHJoekyaYHsZORoM247/IutFo4WIM=; b=PAEvPDUV7mPtew1qpCDLxXJ9MjwbmvuuW3b7hPuBe4yTnvn+7ifVl1DHdhqXmlkOaEGABq6TtQUGucGXaX2rTxUdsq3z5bfbGUBIWONvI8tWdgRZnfMsVrUQ2LdnJbEv1Exg8x3m4A5/6Jd2ygXG4hQX5zWh17BAX3Jh1msvwjc= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) by AM0PR04MB4964.eurprd04.prod.outlook.com (2603:10a6:208:c8::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5250.13; Wed, 11 May 2022 09:50:43 +0000 Received: from VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5]) by VI1PR04MB5136.eurprd04.prod.outlook.com ([fe80::fd1f:cc16:dafe:4bf5%5]) with mapi id 15.20.5250.013; Wed, 11 May 2022 09:50:43 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 5/8] net: dsa: felix: manage host flooding using a specific driver callback Date: Wed, 11 May 2022 12:50:17 +0300 Message-Id: <20220511095020.562461-6-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: c33311eb-d566-40a3-31fc-08da3333b69d X-MS-TrafficTypeDiagnostic: AM0PR04MB4964:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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There are 2 reasons why this approach is not good enough, however. (1) Other drivers, like sja1105, support configuring flooding as a function of {ingress port, egress port}, whereas the DSA ->port_bridge_flags() function only operates on an egress port. So with that driver we'd have useless host flooding from user ports which don't need it. (2) Even with the felix driver, support for multiple CPU ports makes it difficult to piggyback on ->port_bridge_flags(). The way in which the felix driver is going to support host-filtered addresses with multiple CPU ports is that it will direct these addresses towards both CPU ports (in a sort of multicast fashion), then restrict the forwarding to only one of the two using the forwarding masks. Consequently, flooding will also be enabled towards both CPU ports. However, ->port_bridge_flags() gets passed the index of a single CPU port, and that leaves the flood settings out of sync between the 2 CPU ports. This is to say, it's better to have a specific driver method for host flooding, which takes the user port as argument. This solves problem (1) by allowing the driver to do different things for different user ports, and problem (2) by abstracting the operation and letting the driver do whatever, rather than explicitly making the DSA core point to the CPU port it thinks needs to be touched. This new method also creates a problem, which is that cross-chip setups are not handled. However I don't have hardware right now where I can test what is the proper thing to do, and there isn't hardware compatible with multi-switch trees that supports host flooding. So it remains a problem to be tackled in the future. Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 32 ++++++++++++++++++++++++++++++ drivers/net/dsa/ocelot/felix.h | 2 ++ include/net/dsa.h | 2 ++ net/dsa/dsa_priv.h | 1 + net/dsa/port.c | 8 ++++++++ net/dsa/slave.c | 36 ++++++---------------------------- 6 files changed, 51 insertions(+), 30 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 59221d838a45..6b67ab4e05ab 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -634,6 +634,37 @@ static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, return felix->tag_proto; } +static void felix_port_set_host_flood(struct dsa_switch *ds, int port, + bool uc, bool mc) +{ + struct ocelot *ocelot = ds->priv; + struct felix *felix = ocelot_to_felix(ocelot); + unsigned long mask, val; + + if (uc) + felix->host_flood_uc_mask |= BIT(port); + else + felix->host_flood_uc_mask &= ~BIT(port); + + if (mc) + felix->host_flood_mc_mask |= BIT(port); + else + felix->host_flood_mc_mask &= ~BIT(port); + + if (felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q) + mask = dsa_cpu_ports(ds); + else + mask = BIT(ocelot->num_phys_ports); + + val = (felix->host_flood_uc_mask) ? mask : 0; + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC); + + val = (felix->host_flood_mc_mask) ? mask : 0; + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC); + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4); + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6); +} + static int felix_set_ageing_time(struct dsa_switch *ds, unsigned int ageing_time) { @@ -1876,6 +1907,7 @@ const struct dsa_switch_ops felix_switch_ops = { .port_get_dscp_prio = felix_port_get_dscp_prio, .port_add_dscp_prio = felix_port_add_dscp_prio, .port_del_dscp_prio = felix_port_del_dscp_prio, + .port_set_host_flood = felix_port_set_host_flood, }; struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port) diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h index a5e570826773..b34bde43f11b 100644 --- a/drivers/net/dsa/ocelot/felix.h +++ b/drivers/net/dsa/ocelot/felix.h @@ -72,6 +72,8 @@ struct felix { resource_size_t imdio_base; enum dsa_tag_protocol tag_proto; struct kthread_worker *xmit_worker; + unsigned long host_flood_uc_mask; + unsigned long host_flood_mc_mask; }; struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port); diff --git a/include/net/dsa.h b/include/net/dsa.h index 76257a9f0e1b..cfb287b0d311 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -978,6 +978,8 @@ struct dsa_switch_ops { int (*port_bridge_flags)(struct dsa_switch *ds, int port, struct switchdev_brport_flags flags, struct netlink_ext_ack *extack); + void (*port_set_host_flood)(struct dsa_switch *ds, int port, + bool uc, bool mc); /* * VLAN support diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h index 7c9abd5a0ab9..d9722e49864b 100644 --- a/net/dsa/dsa_priv.h +++ b/net/dsa/dsa_priv.h @@ -291,6 +291,7 @@ int dsa_port_hsr_join(struct dsa_port *dp, struct net_device *hsr); void dsa_port_hsr_leave(struct dsa_port *dp, struct net_device *hsr); int dsa_port_tag_8021q_vlan_add(struct dsa_port *dp, u16 vid, bool broadcast); void dsa_port_tag_8021q_vlan_del(struct dsa_port *dp, u16 vid, bool broadcast); +void dsa_port_set_host_flood(struct dsa_port *dp, bool uc, bool mc); /* slave.c */ extern const struct dsa_device_ops notag_netdev_ops; diff --git a/net/dsa/port.c b/net/dsa/port.c index 075a8db536c6..e1bc41654e35 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -920,6 +920,14 @@ int dsa_port_bridge_flags(struct dsa_port *dp, return 0; } +void dsa_port_set_host_flood(struct dsa_port *dp, bool uc, bool mc) +{ + struct dsa_switch *ds = dp->ds; + + if (ds->ops->port_set_host_flood) + ds->ops->port_set_host_flood(ds, dp->index, uc, mc); +} + int dsa_port_vlan_msti(struct dsa_port *dp, const struct switchdev_vlan_msti *msti) { diff --git a/net/dsa/slave.c b/net/dsa/slave.c index 5ee0aced9410..801a5d445833 100644 --- a/net/dsa/slave.c +++ b/net/dsa/slave.c @@ -262,37 +262,13 @@ static int dsa_slave_close(struct net_device *dev) return 0; } -/* Keep flooding enabled towards this port's CPU port as long as it serves at - * least one port in the tree that requires it. - */ -static void dsa_port_manage_cpu_flood(struct dsa_port *dp) +static void dsa_slave_manage_host_flood(struct net_device *dev) { - struct switchdev_brport_flags flags = { - .mask = BR_FLOOD | BR_MCAST_FLOOD, - }; - struct dsa_switch_tree *dst = dp->ds->dst; - struct dsa_port *cpu_dp = dp->cpu_dp; - struct dsa_port *other_dp; - int err; - - list_for_each_entry(other_dp, &dst->ports, list) { - if (!dsa_port_is_user(other_dp)) - continue; - - if (other_dp->cpu_dp != cpu_dp) - continue; - - if (other_dp->slave->flags & IFF_ALLMULTI) - flags.val |= BR_MCAST_FLOOD; - if (other_dp->slave->flags & IFF_PROMISC) - flags.val |= BR_FLOOD | BR_MCAST_FLOOD; - } - - err = dsa_port_pre_bridge_flags(dp, flags, NULL); - if (err) - return; + bool mc = dev->flags & (IFF_PROMISC | IFF_ALLMULTI); + struct dsa_port *dp = dsa_slave_to_port(dev); + bool uc = dev->flags & IFF_PROMISC; - dsa_port_bridge_flags(cpu_dp, flags, NULL); + dsa_port_set_host_flood(dp, uc, mc); } static void dsa_slave_change_rx_flags(struct net_device *dev, int change) @@ -310,7 +286,7 @@ static void dsa_slave_change_rx_flags(struct net_device *dev, int change) if (dsa_switch_supports_uc_filtering(ds) && dsa_switch_supports_mc_filtering(ds)) - dsa_port_manage_cpu_flood(dp); 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Wed, 11 May 2022 09:50:44 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 6/8] net: dsa: remove port argument from ->change_tag_protocol() Date: Wed, 11 May 2022 12:50:18 +0300 Message-Id: <20220511095020.562461-7-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6ddd7a6a-522b-4619-bbc2-08da3333b7d0 X-MS-TrafficTypeDiagnostic: AM0PR04MB4964:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Different switch drivers have different requirements, some may need to replicate some settings for each CPU port, some may need to apply some settings on a single CPU port, while some may have to configure some global settings and then some per-CPU-port settings. In any case, the current model where DSA calls ->change_tag_protocol for each CPU port turns out to be impractical for drivers where there are global things to be done. For example, felix calls dsa_tag_8021q_register(), which makes no sense per CPU port, so it suppresses the second call. Let drivers deal with replication towards all CPU ports, and remove the CPU port argument from the function prototype. Signed-off-by: Vladimir Oltean Acked-by: Luiz Angelo Daros de Luca --- v1->v2: none drivers/net/dsa/mv88e6xxx/chip.c | 22 +++++++++++++--- drivers/net/dsa/ocelot/felix.c | 39 ++++++++--------------------- drivers/net/dsa/realtek/rtl8365mb.c | 2 +- include/net/dsa.h | 6 ++++- net/dsa/dsa2.c | 18 ++++++------- net/dsa/switch.c | 10 +++----- 6 files changed, 46 insertions(+), 51 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 53fd12e7a21c..5d2c57a7c708 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -6329,11 +6329,12 @@ static enum dsa_tag_protocol mv88e6xxx_get_tag_protocol(struct dsa_switch *ds, return chip->tag_protocol; } -static int mv88e6xxx_change_tag_protocol(struct dsa_switch *ds, int port, +static int mv88e6xxx_change_tag_protocol(struct dsa_switch *ds, enum dsa_tag_protocol proto) { struct mv88e6xxx_chip *chip = ds->priv; enum dsa_tag_protocol old_protocol; + struct dsa_port *cpu_dp; int err; switch (proto) { @@ -6358,11 +6359,24 @@ static int mv88e6xxx_change_tag_protocol(struct dsa_switch *ds, int port, chip->tag_protocol = proto; mv88e6xxx_reg_lock(chip); - err = mv88e6xxx_setup_port_mode(chip, port); + dsa_switch_for_each_cpu_port(cpu_dp, ds) { + err = mv88e6xxx_setup_port_mode(chip, cpu_dp->index); + if (err) { + mv88e6xxx_reg_unlock(chip); + goto unwind; + } + } mv88e6xxx_reg_unlock(chip); - if (err) - chip->tag_protocol = old_protocol; + return 0; + +unwind: + chip->tag_protocol = old_protocol; + + mv88e6xxx_reg_lock(chip); + dsa_switch_for_each_cpu_port_continue_reverse(cpu_dp, ds) + mv88e6xxx_setup_port_mode(chip, cpu_dp->index); + mv88e6xxx_reg_unlock(chip); return err; } diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 6b67ab4e05ab..0edec7c2b847 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -575,14 +575,13 @@ static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu, * tag_8021q setup can fail, the NPI setup can't. So either the change is made, * or the restoration is guaranteed to work. */ -static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu, +static int felix_change_tag_protocol(struct dsa_switch *ds, enum dsa_tag_protocol proto) { struct ocelot *ocelot = ds->priv; struct felix *felix = ocelot_to_felix(ocelot); enum dsa_tag_protocol old_proto = felix->tag_proto; - bool cpu_port_active = false; - struct dsa_port *dp; + struct dsa_port *cpu_dp; int err; if (proto != DSA_TAG_PROTO_SEVILLE && @@ -590,33 +589,17 @@ static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu, proto != DSA_TAG_PROTO_OCELOT_8021Q) return -EPROTONOSUPPORT; - /* We don't support multiple CPU ports, yet the DT blob may have - * multiple CPU ports defined. The first CPU port is the active one, - * the others are inactive. In this case, DSA will call - * ->change_tag_protocol() multiple times, once per CPU port. - * Since we implement the tagging protocol change towards "ocelot" or - * "seville" as effectively initializing the NPI port, what we are - * doing is effectively changing who the NPI port is to the last @cpu - * argument passed, which is an unused DSA CPU port and not the one - * that should actively pass traffic. - * Suppress DSA's calls on CPU ports that are inactive. - */ - dsa_switch_for_each_user_port(dp, ds) { - if (dp->cpu_dp->index == cpu) { - cpu_port_active = true; - break; - } - } - - if (!cpu_port_active) - return 0; + dsa_switch_for_each_cpu_port(cpu_dp, ds) { + felix_del_tag_protocol(ds, cpu_dp->index, old_proto); - felix_del_tag_protocol(ds, cpu, old_proto); + err = felix_set_tag_protocol(ds, cpu_dp->index, proto); + if (err) { + felix_set_tag_protocol(ds, cpu_dp->index, old_proto); + return err; + } - err = felix_set_tag_protocol(ds, cpu, proto); - if (err) { - felix_set_tag_protocol(ds, cpu, old_proto); - return err; + /* Stop at first CPU port */ + break; } felix->tag_proto = proto; diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index 3d70e8a77ecf..3bb42a9f236d 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -1778,7 +1778,7 @@ static int rtl8365mb_cpu_config(struct realtek_priv *priv) return 0; } -static int rtl8365mb_change_tag_protocol(struct dsa_switch *ds, int cpu_index, +static int rtl8365mb_change_tag_protocol(struct dsa_switch *ds, enum dsa_tag_protocol proto) { struct realtek_priv *priv = ds->priv; diff --git a/include/net/dsa.h b/include/net/dsa.h index cfb287b0d311..14f07275852b 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -579,6 +579,10 @@ static inline bool dsa_is_user_port(struct dsa_switch *ds, int p) dsa_switch_for_each_port((_dp), (_ds)) \ if (dsa_port_is_cpu((_dp))) +#define dsa_switch_for_each_cpu_port_continue_reverse(_dp, _ds) \ + dsa_switch_for_each_port_continue_reverse((_dp), (_ds)) \ + if (dsa_port_is_cpu((_dp))) + static inline u32 dsa_user_ports(struct dsa_switch *ds) { struct dsa_port *dp; @@ -803,7 +807,7 @@ struct dsa_switch_ops { enum dsa_tag_protocol (*get_tag_protocol)(struct dsa_switch *ds, int port, enum dsa_tag_protocol mprot); - int (*change_tag_protocol)(struct dsa_switch *ds, int port, + int (*change_tag_protocol)(struct dsa_switch *ds, enum dsa_tag_protocol proto); /* * Method for switch drivers to connect to the tagging protocol driver diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c index cf933225df32..d0a2452a1e24 100644 --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c @@ -809,22 +809,18 @@ static int dsa_switch_setup_tag_protocol(struct dsa_switch *ds) { const struct dsa_device_ops *tag_ops = ds->dst->tag_ops; struct dsa_switch_tree *dst = ds->dst; - struct dsa_port *cpu_dp; int err; if (tag_ops->proto == dst->default_proto) goto connect; - dsa_switch_for_each_cpu_port(cpu_dp, ds) { - rtnl_lock(); - err = ds->ops->change_tag_protocol(ds, cpu_dp->index, - tag_ops->proto); - rtnl_unlock(); - if (err) { - dev_err(ds->dev, "Unable to use tag protocol \"%s\": %pe\n", - tag_ops->name, ERR_PTR(err)); - return err; - } + rtnl_lock(); + err = ds->ops->change_tag_protocol(ds, tag_ops->proto); + rtnl_unlock(); + if (err) { + dev_err(ds->dev, "Unable to use tag protocol \"%s\": %pe\n", + tag_ops->name, ERR_PTR(err)); + return err; } connect: diff --git a/net/dsa/switch.c b/net/dsa/switch.c index 704975e5c1c2..2b56218fc57c 100644 --- a/net/dsa/switch.c +++ b/net/dsa/switch.c @@ -809,14 +809,12 @@ static int dsa_switch_change_tag_proto(struct dsa_switch *ds, ASSERT_RTNL(); - dsa_switch_for_each_cpu_port(cpu_dp, ds) { - err = ds->ops->change_tag_protocol(ds, cpu_dp->index, - tag_ops->proto); - if (err) - return err; + err = ds->ops->change_tag_protocol(ds, tag_ops->proto); + if (err) + return err; + dsa_switch_for_each_cpu_port(cpu_dp, ds) dsa_port_set_tag_protocol(cpu_dp, tag_ops); - } /* Now that changing the tag protocol can no longer fail, let's update * the remaining bits which are "duplicated for faster access", and the From patchwork Wed May 11 09:50:19 2022 Content-Type: text/plain; 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Wed, 11 May 2022 09:50:47 +0000 From: Vladimir Oltean To: netdev@vger.kernel.org Cc: Jakub Kicinski , "David S. Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 7/8] net: dsa: felix: dynamically determine tag_8021q CPU port for traps Date: Wed, 11 May 2022 12:50:19 +0300 Message-Id: <20220511095020.562461-8-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: dfb8da2f-c83f-4e47-3115-08da3333b910 X-MS-TrafficTypeDiagnostic: AM0PR04MB4964:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ge0HIKaozflkS8BSKMHQIkbI6IeTG958q6NHExRurdJHtcVaic9yTUX4Fi42cMGo99S+EMc++1A802QafTpp3xlR0SpISBUNN9/+RnqGTDKidLVqodHS2kB3rR+NBKAijmMZRToENDeJRg96GVGF08ZxO3IrR+4RFshdbYpMFvpiD9EFlY2AeQ6WKlpVCA1fInj/L8yXrLN+fiHaB3qnPDwSgbFeeSmuQw4yEFKo6EhodtvBcxUxWKsy0hxPaH6kSXcz0ugMqsRgyCZ78jT5IH5ZLfqZlC5JJ4w4n8+ILMarHwVjwq9upRrFmhI4dqOtEieHHsdLdalM9dnOQHp7EfM/VesuvDC0sHBaPJZt0GjVLyn3faQ/oNV0HXO1cPPOjvhzJlnmZLgSApA7S4IQoV0tZ+/e1NGXBtSjKpB//iiGYvaERPUZ71q4dikqF4yNTYtuFTeuqXiWME7DVwgj+XSSoHOzpL4MaH5uwSkGgrc26zTU3B3ULRF1RYToRKNBoCrAI1B39lKWvWdyQB69yYgIBTPEbP0fZEd8HDwYRZtMVebLQ8ndBkW60WQmUL+fVhNV2xv6qJELz+uu9Mo8oLrlRJY/39EaGBKssV3orwRKccyO+3nlHn59iDw0BSajQ0rPqewJm4E3lIRMyaZcX92epykn+/WLfMFkQ/KqobLzwY34fGQnhrxYcB9RkYTOQTDqgl4C3FQq0utlFRaUopeIcr8UFOlGs7OJ2OJ+D1DfIZORGgoIB4kbhASCOlvAI99LyFzEnYbWTJojKYfBT93BXYFBzz99K9M8x9gkODoKIo83B1zWcM/5Cux31gnliFnwCM5is6BGw0sUGZPeJ+9pYYEFxCorgkfwerVg8zQ5VdwU8D34JAjXxjYbRQWs+BZJOg4SWqeOjL+NC8NGWHblxZPJk259FvI4JkUSaSFPti8pD+ThKMKBOrnX8Y9sWms7jGAZCVYljhhSDL83T6GSbwHKLJPGbb8JsZLOMK2uF1EB9/hFk31pyUeMvR7kX28Y3vK3AVvWVpY4gFuGh6/k7hTNCnEJWpK1PiLvA6dRPxEkZONl8d4t3jK2g7E/3fh//cN2x3wy7CyrWzlp6ZsO6GSBMpgqJ0+ARDAvOlO7Ea1F7sLXWPdGIgu4wlR8FBlK27V5xLgPwDNZ6ebPEL/xZkaR9iXOkdk8onidTqNWvwpbPRTYZiitm1AaXD5mvkS/OFTeVST0mN+63THvhP/zGLX3BPZhOPQtrNrcxnHhIY8jlUa8BibzHPL2CMkFACthjPcsleLmln2n1riUlPyTKzTuePHmT/nbas0qy3j/dJ1uVnGs+mz2RJniWZAOPXAyJzfab0jVyw+daLfj1dlENxk3Xk9iYO1UyGLobHRLK9JTnVkBTkRqDLaiG+eVzLTUTtWGvVXX1sRm8r5YLkGIv8FZS7O0d7QrXDdm7PvM8QOnKmkGtN1TVAqF+2opIhjVP2PN6vzzF36cgDyQQ3IaNRr/CHonWQsJdyu/xPcqX69zlQAZqq8UyNZWlGc42p45Zza5Ej4XyoIx2omUF4R+22zuL7vYch6KZHMJl0eexzWfdVjGu7znw9tTqobhbFkVqcbGddpy7+OyH9UJXlXnidhV3eALyr/h2aTcaD131TpZEwC+h+c4nnDFLsU5dzQUl0ADIAF/gm2Rlyum1FO3qs2wD9PYo4cDNfUpATlsw3zrWXTeaqYuY7BSEIwjLgp470hi8NTjWFE9cSK2ryz5bt74knqq6PTadDUr+xM= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: dfb8da2f-c83f-4e47-3115-08da3333b910 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5136.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2022 09:50:46.8947 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Bekx7TlCu5RPRcBvanSDt5V4olni1lw+qeJy5iJ3ab3l2M7IchZhq+mVCGJlDlQe3oz/Oqe88AKdwEj5LqktyQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4964 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Ocelot switches support a single active CPU port at a time (at least as a trapping destination, i.e. for control traffic). This is true regardless of whether we are using the native copy-to-CPU-port-module functionality, or a redirect action towards the software-defined tag_8021q CPU port. Currently we assume that the trapping destination in tag_8021q mode is the first CPU port, yet in the future we may want to migrate the user ports to the second CPU port. For that to work, we need to make sure that the tag_8021q trapping destination is a CPU port that is active, i.e. is used by at least some user port on which the trap was added. Otherwise, we may end up redirecting the traffic to a CPU port which isn't even up. Note that due to the current design where we simply choose the CPU port of the first port from the trap's ingress port mask, it may be that a CPU port absorbes control traffic from user ports which aren't affine to it as per user space's request. This isn't ideal, but is the lesser of two evils. Following the user-configured affinity for traps would mean that we can no longer reuse a single TCAM entry for multiple traps, which is what we actually do for e.g. PTP. Either we duplicate and deduplicate TCAM entries on the fly when user-to-CPU-port mappings change (which is unnecessarily complicated), or we redirect trapped traffic to all tag_8021q CPU ports if multiple such ports are in use. The latter would have actually been nice, if it actually worked, but it doesn't, since a OCELOT_MASK_MODE_REDIRECT action towards multiple ports would not take PGID_SRC into consideration, and it would just duplicate the packet towards each (CPU) port, leading to duplicates in software. Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 0edec7c2b847..e76a5d434626 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -313,6 +313,21 @@ static void felix_8021q_cpu_port_deinit(struct ocelot *ocelot, int port) mutex_unlock(&ocelot->fwd_domain_lock); } +static int felix_trap_get_cpu_port(struct dsa_switch *ds, + const struct ocelot_vcap_filter *trap) +{ + struct dsa_port *dp; + int first_port; + + if (WARN_ON(!trap->ingress_port_mask)) + return -1; + + first_port = __ffs(trap->ingress_port_mask); + dp = dsa_to_port(ds, first_port); + + return dp->cpu_dp->index; +} + /* On switches with no extraction IRQ wired, trapped packets need to be * replicated over Ethernet as well, otherwise we'd get no notification of * their arrival when using the ocelot-8021q tagging protocol. @@ -326,19 +341,12 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds, struct ocelot_vcap_filter *trap; enum ocelot_mask_mode mask_mode; unsigned long port_mask; - struct dsa_port *dp; bool cpu_copy_ena; - int cpu = -1, err; + int err; if (!felix->info->quirk_no_xtr_irq) return 0; - /* Figure out the current CPU port */ - dsa_switch_for_each_cpu_port(dp, ds) { - cpu = dp->index; - break; - } - /* We are sure that "cpu" was found, otherwise * dsa_tree_setup_default_cpu() would have failed earlier. */ @@ -356,7 +364,7 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds, * port module. */ mask_mode = OCELOT_MASK_MODE_REDIRECT; - port_mask = BIT(cpu); + port_mask = BIT(felix_trap_get_cpu_port(ds, trap)); cpu_copy_ena = !!trap->take_ts; } else { /* Trap packets only to the CPU port module, which is From patchwork Wed May 11 09:50:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 12846009 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26F2DC433FE for ; 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Miller" , Paolo Abeni , Eric Dumazet , Florian Fainelli , Vivien Didelot , Andrew Lunn , Vladimir Oltean , Tobias Waldekranz , =?utf-8?q?Marek_Beh=C3=BAn?= , Ansuel Smith , DENG Qingfang , =?utf-8?q?Alvin_=C5=A0ipraga?= , Claudiu Manoil , Alexandre Belloni , UNGLinuxDriver@microchip.com, Colin Foster , Linus Walleij , Luiz Angelo Daros de Luca Subject: [PATCH v2 net-next 8/8] net: dsa: felix: reimplement tagging protocol change with function pointers Date: Wed, 11 May 2022 12:50:20 +0300 Message-Id: <20220511095020.562461-9-vladimir.oltean@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220511095020.562461-1-vladimir.oltean@nxp.com> References: <20220511095020.562461-1-vladimir.oltean@nxp.com> X-ClientProxiedBy: AS9PR06CA0158.eurprd06.prod.outlook.com (2603:10a6:20b:45c::16) To VI1PR04MB5136.eurprd04.prod.outlook.com (2603:10a6:803:55::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cbd4e43a-2493-486c-f632-08da3333ba3e X-MS-TrafficTypeDiagnostic: AM0PR04MB4964:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vJmYNnw2nROQUNgtHMM5Wo2H3a/1fGAXTIaHr2JCGsrWGZxUmeGLq235miO3o1y4xGaSBBze0BvQ+BV2Vtr7P8WPc1jAuQ+7SyXupY1/haOwx8jbsxwVCmimWZWUFFAXXMLyFFXslFtpUTcbfnAETIJmys44HMnNEMT9ZGJVygE4g5acAcIRr6yKhvsKLL5uGdq17O3M7AjtHXpM1mRqzBls+UAVsypzVuY4rU6KIM+AGABbwWLFoM8ZuCecSXS3+ovu4t8NWPz5WQo4pOPyDQMOT0dHevWK1iKcrqfJ55//3nUgFZwCzVr5EZXn06lE/PBwqGp035JwCH76wBKnrmY3jGUpHViV50YUjTmCctqM6Jtuq8Ty4CqvQByhw200Z9cHC7UIN4h16h3z9tz/9XmbfUaSQ6rMl4ejtAtORIEW6ZyWjVliQN5VqUTO9DPtGXBqL92seXncs/BYqag/LyjJtccB8qxkYpltAJtZsqQBWPqIEHCU6hP2PuOgxCg2Y8q7DEDkU6yljKQsZ/VieRyfUNG1hOyF49BaakfW8iejHrLIzYO4F/BY/bWsYwnZ6CoTNgUzfA+DIth0Yqxk2uZJf11JGbZS38RpbF0Wzw9PyfOX88J7Mt2+1VjMwQVYwC+4BaFZKsV6tBtYyDGPKOObNyT9+Zgy75Hm8EcEjxF7oL9BlYwqoeV38aP/L/AuK8MAfafzIDSrQ/QptQA3lBABAlrBz75AVALT6foviqZbX7AbOgTD/fbSoubPfMwaCdPgD9wtsSX2pMxSuSdGGLhUj7EdQbWxAMbEY5TYtxP5DV4qlMDAZ45TONJJzUz+u7OzgPpOH/UjyRGqi1KeHNzbAz6zYNULddltDejVyOPN/zk6K9yMd7WXN6MUYGn8QaaYF6qFMqcea921Zr2fGIIR2FMmnX/Lx+Dd9qmiH3COTj8PLaFTMjl4DoZw7a5ikLQWVRvNDXCHvmM3NcLchA0ALECRj5Y5bM0vSDy4GB0jvQcOxSESk/U73+vB90NOz9YF1LA7/YpU5UGn/1jWPicolu/ng+G4W8+UsUfuZmY8S5v+FVdd7msYEo3S3pHJ67pYVkU3vUoGqBlQMZchWsTBcnRdrB6L7sys85rMUueMUMV3GdpnLUv3am6SWEW/D+YK+HwnD/aGABSTrPjwkwvwXb3OkTR52tgi5bb4xm6iAne0kF8e7hrkrRbGEZMS4yNGx1Ke495z0IUAt15k9XZomRizLa/bYdfOwC94ntwQmovAGjS3rR24QOBqrHdm9b6LysoAW0ubZSYwRwjs8lbcznknxjjpw4mFV5sEqVEyh5Kf2xk4drJoSBnt6b7WgOvjJNyHrxKpQXALEV2/jW48+yGw7le+JdIt10R5oW94PXNprS/JOR4xDkx9wiKMbdUax6II1GiNct7n6SG2Vs9Yv3nGcuLl7xzXXT4ThJHSkyfABiXw7opuKDQl9u3upFM8NsimdXqZA4fWIbLrZjKtLmg4XBLdDxlZpVd4E1PyDK9xGz0nirtf5Y4snVuxeedK1iKQVbfLZjrh8X4wPfYg8uBq5+I3MzTjusjVGuAyAig+hAWmY2vcSUzYxRmNf/ONuuVIUv0xpoe4JS14Hry9uzioBjOyvAyGc/2xxONGB6p6dFuvNJjpuCo5beBVas+7LMmFjnaocDS+Ip6K/ZBSbGdYpoGPtfGZxMH/02vMnBuU+QK5eSkl4JTRN6A1Y6AOyqV9cvH4VeXMO/49Vm7rx7xqRp9R6R/aaRZS2Qg= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: cbd4e43a-2493-486c-f632-08da3333ba3e X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5136.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2022 09:50:49.0039 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 3mZSf8xO3SZu22cq/kVnVH5bTa7p43DEu3fmQ1IWwAuDVLJtPnhNRxut2Oc8spau+ACu7+8BjNPd4sH5qWlP0w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4964 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org The error handling for the current tagging protocol change procedure is a bit brittle (we dismantle the previous tagging protocol entirely before setting up the new one). By identifying which parts of a tagging protocol are unique to itself and which parts are shared with the other, we can implement a protocol change procedure where error handling is a bit more robust, because we start setting up the new protocol first, and tear down the old one only after the setup of the specific and shared parts succeeded. The protocol change is a bit too open-coded too, in the area of migrating host flood settings and MDBs. By identifying what differs between tagging protocols (the forwarding masks for host flooding) we can implement a more straightforward migration procedure which is handled in the shared portion of the protocol change, rather than individually by each protocol. Therefore, a more structured approach calls for the introduction of a structure of function pointers per tagging protocol. This covers setup, teardown and the host forwarding mask. In the future it will also cover how to prepare for a new DSA master. The initial tagging protocol setup (at driver probe time) and the final teardown (at driver removal time) are also adapted to call into the structured methods of the specific protocol in current use. This is especially relevant for teardown, where we previously called felix_del_tag_protocol() only for the first CPU port. But by not specifying which CPU port this is for, we gain more flexibility to support multiple CPU ports in the future. Signed-off-by: Vladimir Oltean --- v1->v2: none drivers/net/dsa/ocelot/felix.c | 399 +++++++++++++++++---------------- drivers/net/dsa/ocelot/felix.h | 14 ++ 2 files changed, 216 insertions(+), 197 deletions(-) diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index e76a5d434626..beac90bc642c 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -42,43 +42,6 @@ static struct net_device *felix_classify_db(struct dsa_db db) } } -static void felix_migrate_pgid_bit(struct dsa_switch *ds, int from, int to, - int pgid) -{ - struct ocelot *ocelot = ds->priv; - bool on; - u32 val; - - val = ocelot_read_rix(ocelot, ANA_PGID_PGID, pgid); - on = !!(val & BIT(from)); - val &= ~BIT(from); - if (on) - val |= BIT(to); - else - val &= ~BIT(to); - - ocelot_write_rix(ocelot, val, ANA_PGID_PGID, pgid); -} - -static void felix_migrate_flood_to_npi_port(struct dsa_switch *ds, int port) -{ - struct ocelot *ocelot = ds->priv; - - felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_UC); - felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_MC); - felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_BC); -} - -static void -felix_migrate_flood_to_tag_8021q_port(struct dsa_switch *ds, int port) -{ - struct ocelot *ocelot = ds->priv; - - felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_UC); - felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_MC); - felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_BC); -} - /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that * the tagger can perform RX source port identification. */ @@ -392,13 +355,107 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds, return 0; } -static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu) +/* The CPU port module is connected to the Node Processor Interface (NPI). This + * is the mode through which frames can be injected from and extracted to an + * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU + * running Linux, and this forms a DSA setup together with the enetc or fman + * DSA master. + */ +static void felix_npi_port_init(struct ocelot *ocelot, int port) +{ + ocelot->npi = port; + + ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M | + QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port), + QSYS_EXT_CPU_CFG); + + /* NPI port Injection/Extraction configuration */ + ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, + ocelot->npi_xtr_prefix); + ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, + ocelot->npi_inj_prefix); + + /* Disable transmission of pause frames */ + ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); +} + +static void felix_npi_port_deinit(struct ocelot *ocelot, int port) +{ + /* Restore hardware defaults */ + int unused_port = ocelot->num_phys_ports + 2; + + ocelot->npi = -1; + + ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port), + QSYS_EXT_CPU_CFG); + + ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, + OCELOT_TAG_PREFIX_DISABLED); + ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, + OCELOT_TAG_PREFIX_DISABLED); + + /* Enable transmission of pause frames */ + ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1); +} + +static int felix_tag_npi_setup(struct dsa_switch *ds) +{ + struct dsa_port *dp, *first_cpu_dp = NULL; + struct ocelot *ocelot = ds->priv; + + dsa_switch_for_each_user_port(dp, ds) { + if (first_cpu_dp && dp->cpu_dp != first_cpu_dp) { + dev_err(ds->dev, "Multiple NPI ports not supported\n"); + return -EINVAL; + } + + first_cpu_dp = dp->cpu_dp; + } + + if (!first_cpu_dp) + return -EINVAL; + + felix_npi_port_init(ocelot, first_cpu_dp->index); + + return 0; +} + +static void felix_tag_npi_teardown(struct dsa_switch *ds) { struct ocelot *ocelot = ds->priv; - struct dsa_port *dp; + + felix_npi_port_deinit(ocelot, ocelot->npi); +} + +static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds) +{ + struct ocelot *ocelot = ds->priv; + + return BIT(ocelot->num_phys_ports); +} + +static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = { + .setup = felix_tag_npi_setup, + .teardown = felix_tag_npi_teardown, + .get_host_fwd_mask = felix_tag_npi_get_host_fwd_mask, +}; + +static int felix_tag_8021q_setup(struct dsa_switch *ds) +{ + struct ocelot *ocelot = ds->priv; + struct dsa_port *dp, *cpu_dp; int err; - felix_8021q_cpu_port_init(ocelot, cpu); + err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD)); + if (err) + return err; + + dsa_switch_for_each_cpu_port(cpu_dp, ds) { + felix_8021q_cpu_port_init(ocelot, cpu_dp->index); + + /* TODO we could support multiple CPU ports in tag_8021q mode */ + break; + } dsa_switch_for_each_available_port(dp, ds) { /* This overwrites ocelot_init(): @@ -416,21 +473,6 @@ static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu) ANA_PORT_CPU_FWD_BPDU_CFG, dp->index); } - err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD)); - if (err) - return err; - - err = ocelot_migrate_mdbs(ocelot, BIT(ocelot->num_phys_ports), - BIT(cpu)); - if (err) - goto out_tag_8021q_unregister; - - felix_migrate_flood_to_tag_8021q_port(ds, cpu); - - err = felix_update_trapping_destinations(ds, true); - if (err) - goto out_migrate_flood; - /* The ownership of the CPU port module's queues might have just been * transferred to the tag_8021q tagger from the NPI-based tagger. * So there might still be all sorts of crap in the queues. On the @@ -441,27 +483,12 @@ static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu) ocelot_drain_cpu_queue(ocelot, 0); return 0; - -out_migrate_flood: - felix_migrate_flood_to_npi_port(ds, cpu); - ocelot_migrate_mdbs(ocelot, BIT(cpu), BIT(ocelot->num_phys_ports)); -out_tag_8021q_unregister: - dsa_tag_8021q_unregister(ds); - return err; } -static void felix_teardown_tag_8021q(struct dsa_switch *ds, int cpu) +static void felix_tag_8021q_teardown(struct dsa_switch *ds) { struct ocelot *ocelot = ds->priv; - struct dsa_port *dp; - int err; - - err = felix_update_trapping_destinations(ds, false); - if (err) - dev_err(ds->dev, "felix_teardown_mmio_filtering returned %d", - err); - - dsa_tag_8021q_unregister(ds); + struct dsa_port *dp, *cpu_dp; dsa_switch_for_each_available_port(dp, ds) { /* Restore the logic from ocelot_init: @@ -473,110 +500,99 @@ static void felix_teardown_tag_8021q(struct dsa_switch *ds, int cpu) dp->index); } - felix_8021q_cpu_port_deinit(ocelot, cpu); -} - -/* The CPU port module is connected to the Node Processor Interface (NPI). This - * is the mode through which frames can be injected from and extracted to an - * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU - * running Linux, and this forms a DSA setup together with the enetc or fman - * DSA master. - */ -static void felix_npi_port_init(struct ocelot *ocelot, int port) -{ - ocelot->npi = port; - - ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M | - QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port), - QSYS_EXT_CPU_CFG); + dsa_switch_for_each_cpu_port(cpu_dp, ds) { + felix_8021q_cpu_port_deinit(ocelot, cpu_dp->index); - /* NPI port Injection/Extraction configuration */ - ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, - ocelot->npi_xtr_prefix); - ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, - ocelot->npi_inj_prefix); + /* TODO we could support multiple CPU ports in tag_8021q mode */ + break; + } - /* Disable transmission of pause frames */ - ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0); + dsa_tag_8021q_unregister(ds); } -static void felix_npi_port_deinit(struct ocelot *ocelot, int port) +static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds) { - /* Restore hardware defaults */ - int unused_port = ocelot->num_phys_ports + 2; + return dsa_cpu_ports(ds); +} - ocelot->npi = -1; +static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = { + .setup = felix_tag_8021q_setup, + .teardown = felix_tag_8021q_teardown, + .get_host_fwd_mask = felix_tag_8021q_get_host_fwd_mask, +}; - ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port), - QSYS_EXT_CPU_CFG); +static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask, + bool uc, bool mc, bool bc) +{ + struct ocelot *ocelot = ds->priv; + unsigned long val; - ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR, - OCELOT_TAG_PREFIX_DISABLED); - ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR, - OCELOT_TAG_PREFIX_DISABLED); + val = uc ? mask : 0; + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC); - /* Enable transmission of pause frames */ - ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1); + val = mc ? mask : 0; + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC); + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4); + ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6); } -static int felix_setup_tag_npi(struct dsa_switch *ds, int cpu) +static void +felix_migrate_host_flood(struct dsa_switch *ds, + const struct felix_tag_proto_ops *proto_ops, + const struct felix_tag_proto_ops *old_proto_ops) { struct ocelot *ocelot = ds->priv; - int err; - - err = ocelot_migrate_mdbs(ocelot, BIT(cpu), - BIT(ocelot->num_phys_ports)); - if (err) - return err; - - felix_migrate_flood_to_npi_port(ds, cpu); + struct felix *felix = ocelot_to_felix(ocelot); + unsigned long mask; - felix_npi_port_init(ocelot, cpu); + if (old_proto_ops) { + mask = old_proto_ops->get_host_fwd_mask(ds); + felix_set_host_flood(ds, mask, false, false, false); + } - return 0; + mask = proto_ops->get_host_fwd_mask(ds); + felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask, + !!felix->host_flood_mc_mask, true); } -static void felix_teardown_tag_npi(struct dsa_switch *ds, int cpu) +static int felix_migrate_mdbs(struct dsa_switch *ds, + const struct felix_tag_proto_ops *proto_ops, + const struct felix_tag_proto_ops *old_proto_ops) { struct ocelot *ocelot = ds->priv; + unsigned long from, to; + + if (!old_proto_ops) + return 0; + + from = old_proto_ops->get_host_fwd_mask(ds); + to = proto_ops->get_host_fwd_mask(ds); - felix_npi_port_deinit(ocelot, cpu); + return ocelot_migrate_mdbs(ocelot, from, to); } -static int felix_set_tag_protocol(struct dsa_switch *ds, int cpu, - enum dsa_tag_protocol proto) +/* Configure the shared hardware resources for a transition between + * @old_proto_ops and @proto_ops. + * Manual migration is needed because as far as DSA is concerned, no change of + * the CPU port is taking place here, just of the tagging protocol. + */ +static int +felix_tag_proto_setup_shared(struct dsa_switch *ds, + const struct felix_tag_proto_ops *proto_ops, + const struct felix_tag_proto_ops *old_proto_ops) { + bool using_tag_8021q = (proto_ops == &felix_tag_8021q_proto_ops); int err; - switch (proto) { - case DSA_TAG_PROTO_SEVILLE: - case DSA_TAG_PROTO_OCELOT: - err = felix_setup_tag_npi(ds, cpu); - break; - case DSA_TAG_PROTO_OCELOT_8021Q: - err = felix_setup_tag_8021q(ds, cpu); - break; - default: - err = -EPROTONOSUPPORT; - } + err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops); + if (err) + return err; - return err; -} + felix_update_trapping_destinations(ds, using_tag_8021q); -static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu, - enum dsa_tag_protocol proto) -{ - switch (proto) { - case DSA_TAG_PROTO_SEVILLE: - case DSA_TAG_PROTO_OCELOT: - felix_teardown_tag_npi(ds, cpu); - break; - case DSA_TAG_PROTO_OCELOT_8021Q: - felix_teardown_tag_8021q(ds, cpu); - break; - default: - break; - } + felix_migrate_host_flood(ds, proto_ops, old_proto_ops); + + return 0; } /* This always leaves the switch in a consistent state, because although the @@ -586,33 +602,45 @@ static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu, static int felix_change_tag_protocol(struct dsa_switch *ds, enum dsa_tag_protocol proto) { + const struct felix_tag_proto_ops *old_proto_ops, *proto_ops; struct ocelot *ocelot = ds->priv; struct felix *felix = ocelot_to_felix(ocelot); - enum dsa_tag_protocol old_proto = felix->tag_proto; - struct dsa_port *cpu_dp; int err; - if (proto != DSA_TAG_PROTO_SEVILLE && - proto != DSA_TAG_PROTO_OCELOT && - proto != DSA_TAG_PROTO_OCELOT_8021Q) + switch (proto) { + case DSA_TAG_PROTO_SEVILLE: + case DSA_TAG_PROTO_OCELOT: + proto_ops = &felix_tag_npi_proto_ops; + break; + case DSA_TAG_PROTO_OCELOT_8021Q: + proto_ops = &felix_tag_8021q_proto_ops; + break; + default: return -EPROTONOSUPPORT; + } - dsa_switch_for_each_cpu_port(cpu_dp, ds) { - felix_del_tag_protocol(ds, cpu_dp->index, old_proto); + old_proto_ops = felix->tag_proto_ops; - err = felix_set_tag_protocol(ds, cpu_dp->index, proto); - if (err) { - felix_set_tag_protocol(ds, cpu_dp->index, old_proto); - return err; - } + err = proto_ops->setup(ds); + if (err) + goto setup_failed; - /* Stop at first CPU port */ - break; - } + err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops); + if (err) + goto setup_shared_failed; + if (old_proto_ops) + old_proto_ops->teardown(ds); + + felix->tag_proto_ops = proto_ops; felix->tag_proto = proto; return 0; + +setup_shared_failed: + proto_ops->teardown(ds); +setup_failed: + return err; } static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds, @@ -630,7 +658,7 @@ static void felix_port_set_host_flood(struct dsa_switch *ds, int port, { struct ocelot *ocelot = ds->priv; struct felix *felix = ocelot_to_felix(ocelot); - unsigned long mask, val; + unsigned long mask; if (uc) felix->host_flood_uc_mask |= BIT(port); @@ -642,18 +670,9 @@ static void felix_port_set_host_flood(struct dsa_switch *ds, int port, else felix->host_flood_mc_mask &= ~BIT(port); - if (felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q) - mask = dsa_cpu_ports(ds); - else - mask = BIT(ocelot->num_phys_ports); - - val = (felix->host_flood_uc_mask) ? mask : 0; - ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC); - - val = (felix->host_flood_mc_mask) ? mask : 0; - ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC); - ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4); - ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6); + mask = felix->tag_proto_ops->get_host_fwd_mask(ds); + felix_set_host_flood(ds, mask, !!felix->host_flood_uc_mask, + !!felix->host_flood_mc_mask, true); } static int felix_set_ageing_time(struct dsa_switch *ds, @@ -1332,7 +1351,6 @@ static int felix_setup(struct dsa_switch *ds) { struct ocelot *ocelot = ds->priv; struct felix *felix = ocelot_to_felix(ocelot); - unsigned long cpu_flood; struct dsa_port *dp; int err; @@ -1366,21 +1384,10 @@ static int felix_setup(struct dsa_switch *ds) if (err) goto out_deinit_ports; - dsa_switch_for_each_cpu_port(dp, ds) { - /* The initial tag protocol is NPI which always returns 0, so - * there's no real point in checking for errors. - */ - felix_set_tag_protocol(ds, dp->index, felix->tag_proto); - - /* Start off with flooding disabled towards the NPI port - * (actually CPU port module). - */ - cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)); - ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_UC); - ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_MC); - - break; - } + /* The initial tag protocol is NPI which won't fail during initial + * setup, there's no real point in checking for errors. + */ + felix_change_tag_protocol(ds, felix->tag_proto); ds->mtu_enforcement_ingress = true; ds->assisted_learning_on_cpu_port = true; @@ -1409,10 +1416,8 @@ static void felix_teardown(struct dsa_switch *ds) struct felix *felix = ocelot_to_felix(ocelot); struct dsa_port *dp; - dsa_switch_for_each_cpu_port(dp, ds) { - felix_del_tag_protocol(ds, dp->index, felix->tag_proto); - break; - } + if (felix->tag_proto_ops) + felix->tag_proto_ops->teardown(ds); dsa_switch_for_each_available_port(dp, ds) ocelot_deinit_port(ocelot, dp->index); diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h index b34bde43f11b..9e07eb7ee28d 100644 --- a/drivers/net/dsa/ocelot/felix.h +++ b/drivers/net/dsa/ocelot/felix.h @@ -59,6 +59,19 @@ struct felix_info { struct resource *res); }; +/* Methods for initializing the hardware resources specific to a tagging + * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs, + * for "ocelot-8021q"). + * It is important that the resources configured here do not have side effects + * for the other tagging protocols. If that is the case, their configuration + * needs to go to felix_tag_proto_setup_shared(). + */ +struct felix_tag_proto_ops { + int (*setup)(struct dsa_switch *ds); + void (*teardown)(struct dsa_switch *ds); + unsigned long (*get_host_fwd_mask)(struct dsa_switch *ds); +}; + extern const struct dsa_switch_ops felix_switch_ops; /* DSA glue / front-end for struct ocelot */ @@ -71,6 +84,7 @@ struct felix { resource_size_t switch_base; resource_size_t imdio_base; enum dsa_tag_protocol tag_proto; + const struct felix_tag_proto_ops *tag_proto_ops; struct kthread_worker *xmit_worker; unsigned long host_flood_uc_mask; unsigned long host_flood_mc_mask;