From patchwork Wed May 11 15:53:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 12846398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 95AEFC433FE for ; Wed, 11 May 2022 15:53:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344060AbiEKPxh (ORCPT ); Wed, 11 May 2022 11:53:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344047AbiEKPxf (ORCPT ); Wed, 11 May 2022 11:53:35 -0400 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9202979832; Wed, 11 May 2022 08:53:34 -0700 (PDT) Received: by mail-ej1-x62a.google.com with SMTP id ks9so4978267ejb.2; Wed, 11 May 2022 08:53:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yjOB8oqEwj9sflBfsTrbSM5ZU+W2PCPtGpyHnXQbiBE=; b=DEe5lwmx+2gl2/ljAQlEQrJ1PN8mf3JLE2GLEOI8Pc10Qd60sdbvlnNgdIjftPFcXU DjMiBmrvgwzcqgEkOqHilryRors0zI0ldL3Yrz9TqPC/H0ia7astUlcXSIkhwqLsOKX8 ydamXn4CY3Wq5lQyHaXMsRP/r+dRITClHBqwhXbAPBuz5M0m4JEs3VQq+KS0cr/in9Z5 yrwtOrC8B5SzGtAcs75Ng6wkqTfkEqnOQRrlrgqKbX/IR2ngEwu30fa+NPrd2iowUIoA PwMFHrGVXoaQMgmu3pxfqseLOSfk1dX9ay2Gfm8VKHB8Rfhf41cAX2yYbe9EgU7EB4tq BwYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yjOB8oqEwj9sflBfsTrbSM5ZU+W2PCPtGpyHnXQbiBE=; b=oNdxLIeJmncuxCoHMoWdWyrUxR0fep54Ql91Qa9CosJr5db1YBGA1Tbda5TT1W/t/y MXNT1OgSbvjTegpi3MXmVkuDnzNqtee2IC1/HciroJPnxiz4ISfpknEAm6WwnTac3jMl JXJX3vnRWnjez0Uk7pUslXF1mMvfEZERICKDo16s6wjZTUioqFz3POikG4qbLqIEMSh8 9SIpVvWNviCJBh7k8jZe/6ybCeBBmV9Wl+eUQvGMIGFusrly9wZJNRfjZXAW/zwwEYkb hxHL2+tlyL/tnm8MWIO6YSsouzDqH7BsYj1Jfi6dw7LXgYyJvwdRuHfzMy+Ur1HYthRK 2Zpw== X-Gm-Message-State: AOAM532uh6gv0XAIayUF+55HDE/lWsIiZ/HNRwNnglU5iJ7L8N5y8l3X 3Y4iirYV0QhL7xQ9noLgwH8= X-Google-Smtp-Source: ABdhPJyWSUkwh8FQB0XXOTQIraeUsjzWhAMctVfXQSgsFRY6m2slte57mkSqtEgbc+2cMTXMJL4F1A== X-Received: by 2002:a17:907:1623:b0:6f6:e9ce:9926 with SMTP id hb35-20020a170907162300b006f6e9ce9926mr21965119ejc.360.1652284413040; Wed, 11 May 2022 08:53:33 -0700 (PDT) Received: from localhost.localdomain (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id fb21-20020a1709073a1500b006f3ef214e1fsm1072458ejc.133.2022.05.11.08.53.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 May 2022 08:53:32 -0700 (PDT) From: Nicolas Frattaroli To: Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner Cc: Nicolas Frattaroli , Ezequiel Garcia , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: media: rockchip-vpu: Add RK3568 VEPU compatible Date: Wed, 11 May 2022 17:53:06 +0200 Message-Id: <20220511155309.2637-2-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220511155309.2637-1-frattaroli.nicolas@gmail.com> References: <20220511155309.2637-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The RK3568 and RK3566 have a Hantro VPU node solely dedicated to encoding. This patch adds a compatible for it, and also allows the bindings to only come with a vepu interrupt. Signed-off-by: Nicolas Frattaroli --- .../devicetree/bindings/media/rockchip-vpu.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml index bacb60a34989..965ca80b5cea 100644 --- a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml +++ b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml @@ -22,6 +22,7 @@ properties: - rockchip,rk3288-vpu - rockchip,rk3328-vpu - rockchip,rk3399-vpu + - rockchip,rk3568-vepu - rockchip,px30-vpu - items: - const: rockchip,rk3188-vpu @@ -39,7 +40,9 @@ properties: interrupt-names: oneOf: - - const: vdpu + - enum: + - vdpu + - vepu - items: - const: vepu - const: vdpu @@ -76,6 +79,18 @@ required: additionalProperties: false +allOf: + # compatibles that end in -vepu should only have the vepu interrupt + - if: + properties: + compatible: + contains: + pattern: "^[a-zA-Z0-9\\-,_.]+\\-vepu$" + then: + properties: + interrupt-names: + const: vepu + examples: - | #include From patchwork Wed May 11 15:53:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Frattaroli X-Patchwork-Id: 12846399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FF00C433EF for ; Wed, 11 May 2022 15:53:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344080AbiEKPx6 (ORCPT ); Wed, 11 May 2022 11:53:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243134AbiEKPx4 (ORCPT ); Wed, 11 May 2022 11:53:56 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 280B1AE258; Wed, 11 May 2022 08:53:55 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id z2so4971797ejj.3; Wed, 11 May 2022 08:53:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dUweJsekqn20RiGCHeTdxpbDFbYhVgStBTWjqPTC0OA=; b=cyTtogAdcREKIftueghnF0sDVo//N1OZwgehStWkfnvKyI8bEyee2moKrfR+WWVvMI lv9zRWQUappmQK2ic6Eir90cj93KO5VDwRvEzBtFDBbcjgbHEh/PHlM78eDcL+7JrQ9X qGw4O3RS8gLpgcqGv7JkWeaKkl4JWCyO9ddzvZjUUR4aPyZ6sgwc25U2WodEJu6cZoI0 SenLc7N90eX0AuY3idnywtZwF8PwlSIhSPOq7rlKzj1GIvA8h5eRoaubsbWWmQCG4vLP fLz2phzw3vaR5jCz2x9zy4r4PLUA5Br3sjHeXzkxnZl9up7OCowgLhCw44QsX8qokhnX QQ5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dUweJsekqn20RiGCHeTdxpbDFbYhVgStBTWjqPTC0OA=; b=hKwd1V59E052c5N2IHI5WJIAHP4PYDpGmIGCjZR0Lz65JJ+uedK0TTESZxfwX55STI jcb3n2YzSc/+cpSkjQIO1+nYIsWndJoO9P77Mpx3EZvfqe0Er/Zu3bTGMtzHDCuxMple rMLq1/fgrleYdzy0fJLkQdvOBy9g8roU7u4ZswpfHUx3ADGvUraQWQOXJUl0Ka1Wduy5 XpyiG1lMb7r7ifD8tJczbxMgYEwgQd8vAQqnVuiweraK/zg2mUAf9vrABB07oApOsZjG OJO0Ibr3P3R3Xxtlwdy+MjBtfp7oqcbirAd1/roKkcSQ+3RmPh3OoffGRa0Bv2JzF7K+ LBtA== X-Gm-Message-State: AOAM533SmcKU0Zg4FUfpj3/s6RF9afDN1+Tn8Gm+c0DLG9h1cwGFwOo5 UXdhBcEqlwFJObpuf0ZKWR4= X-Google-Smtp-Source: ABdhPJx56wlYGNygo2oYyc1gSjL/5348c7Sgrxk0TlJvf62vEm+dYrg4aJ1wLPgNm73KSMvWOPdJFQ== X-Received: by 2002:a17:906:b74b:b0:6f4:cd08:6fec with SMTP id fx11-20020a170906b74b00b006f4cd086fecmr27063368ejb.155.1652284419934; Wed, 11 May 2022 08:53:39 -0700 (PDT) Received: from localhost.localdomain (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id fb21-20020a1709073a1500b006f3ef214e1fsm1072458ejc.133.2022.05.11.08.53.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 May 2022 08:53:36 -0700 (PDT) From: Nicolas Frattaroli To: Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Greg Kroah-Hartman , Heiko Stuebner Cc: Nicolas Frattaroli , linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/3] media: hantro: Add support for RK356x encoder Date: Wed, 11 May 2022 17:53:07 +0200 Message-Id: <20220511155309.2637-3-frattaroli.nicolas@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220511155309.2637-1-frattaroli.nicolas@gmail.com> References: <20220511155309.2637-1-frattaroli.nicolas@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The RK3566 and RK3568 SoCs come with a small Hantro instance which is solely dedicated to encoding. This patch adds the necessary structs to the Hantro driver to allow the JPEG encoder of it to function. Through some sleuthing through the vendor's MPP source code and after closer inspection of the TRM, it was determined that the hardware likely supports VP8 and H.264 as well. Tested with the following GStreamer command: gst-launch-1.0 videotestsrc ! v4l2jpegenc ! matroskamux ! \ filesink location=foo.mkv Signed-off-by: Nicolas Frattaroli --- drivers/staging/media/hantro/hantro_drv.c | 1 + drivers/staging/media/hantro/hantro_hw.h | 1 + .../staging/media/hantro/rockchip_vpu_hw.c | 25 +++++++++++++++++++ 3 files changed, 27 insertions(+) diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index dc768884cb79..0b38b41136e2 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -628,6 +628,7 @@ static const struct of_device_id of_hantro_match[] = { { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, }, { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, }, { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, + { .compatible = "rockchip,rk3568-vepu", .data = &rk3568_vepu_variant, }, #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, }, diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index ed018e293ba0..b312da654d38 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -300,6 +300,7 @@ extern const struct hantro_variant rk3066_vpu_variant; extern const struct hantro_variant rk3288_vpu_variant; extern const struct hantro_variant rk3328_vpu_variant; extern const struct hantro_variant rk3399_vpu_variant; +extern const struct hantro_variant rk3568_vepu_variant; extern const struct hantro_variant sama5d4_vdec_variant; extern const struct hantro_variant sunxi_vpu_variant; diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c index 163cf92eafca..a97a4ea8ede4 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -417,6 +417,14 @@ static const struct hantro_codec_ops rk3399_vpu_codec_ops[] = { }, }; +static const struct hantro_codec_ops rk3568_jpeg_enc_codec_ops[] = { + [HANTRO_MODE_JPEG_ENC] = { + .run = rockchip_vpu2_jpeg_enc_run, + .reset = rockchip_vpu2_enc_reset, + .done = rockchip_vpu2_jpeg_enc_done, + }, +}; + /* * VPU variant. */ @@ -439,6 +447,10 @@ static const struct hantro_irq rockchip_vpu2_irqs[] = { { "vdpu", rockchip_vpu2_vdpu_irq }, }; +static const struct hantro_irq rk3568_vepu_irqs[] = { + { "vepu", rockchip_vpu2_vepu_irq }, +}; + static const char * const rk3066_vpu_clk_names[] = { "aclk_vdpu", "hclk_vdpu", "aclk_vepu", "hclk_vepu" @@ -545,6 +557,19 @@ const struct hantro_variant rk3399_vpu_variant = { .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) }; +const struct hantro_variant rk3568_vepu_variant = { + .enc_offset = 0x0, + .enc_fmts = rockchip_vpu_enc_fmts, + .num_enc_fmts = ARRAY_SIZE(rockchip_vpu_enc_fmts), + .codec = HANTRO_JPEG_ENCODER, + .codec_ops = rk3568_jpeg_enc_codec_ops, + .irqs = rk3568_vepu_irqs, + .num_irqs = ARRAY_SIZE(rk3568_vepu_irqs), + .init = rockchip_vpu_hw_init, + .clk_names = rockchip_vpu_clk_names, + .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) +}; + const struct hantro_variant px30_vpu_variant = { .enc_offset = 0x0, .enc_fmts = rockchip_vpu_enc_fmts,