From patchwork Tue May 17 01:36:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: qianfan X-Patchwork-Id: 12851804 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C5F5C433F5 for ; Tue, 17 May 2022 01:53:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236826AbiEQBxm (ORCPT ); Mon, 16 May 2022 21:53:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232437AbiEQBxl (ORCPT ); Mon, 16 May 2022 21:53:41 -0400 Received: from m12-13.163.com (m12-13.163.com [220.181.12.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C5CF134B9C; Mon, 16 May 2022 18:53:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=Sv4p5 7RP4vVkhn/nojtlVRpzvQRuq8AhJ6Z3TmpD4+w=; b=VxH5ML3iwGU3p2+s48oUA VlBBYuU1SIfOAwIg4a2DQ1H3ahskebu2lahBGeRqfSIeD74nHbIcFTcnxmNPCjCv ALCYc2BjIxAW0DSTFSgb3I43FFFHsY4qt52PxMQg93zZu+unp19LrZdyRdqFMQ44 3coOnfQvmoiHx/0JkuempQ= Received: from DESKTOP-B1R4FVG.localdomain (unknown [218.201.129.20]) by smtp9 (Coremail) with SMTP id DcCowAB3USwR_IJiF3ohDQ--.61255S3; Tue, 17 May 2022 09:36:19 +0800 (CST) From: qianfanguijin@163.com To: linux-sunxi@lists.linux.dev Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, qianfan Zhao Subject: [PATCH v5 1/3] ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board Date: Tue, 17 May 2022 09:36:05 +0800 Message-Id: <20220517013607.2252-2-qianfanguijin@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220517013607.2252-1-qianfanguijin@163.com> References: <20220517013607.2252-1-qianfanguijin@163.com> MIME-Version: 1.0 X-CM-TRANSID: DcCowAB3USwR_IJiF3ohDQ--.61255S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7Aw4UuryxWFW3uw4UGw4fuFg_yoW8ur4xpw 17CrZ7Gwn3WF15t347WrWDGr1UCFykW3yYvF15C34fJrsrXaykXryftwnakrZ8Xr4fJ3y0 93s5Xr97Xw4DX3JanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0ziQVyfUUUUU= X-Originating-IP: [218.201.129.20] X-CM-SenderInfo: htld0w5dqj3xxmlqqiywtou0bp/xtbCqRwE7V0Dfef3EwAAs8 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: qianfan Zhao The CPU of sun8i-r40 is powered by PMIC, let's add "cpu-supply" node. Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland --- arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++ arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 4 ++++ arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 4 ++++ arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index a6a1087a0c9b..4f30018ec4a2 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -113,6 +113,10 @@ &ahci { status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi index 265e0fa57a32..b872b51a346d 100644 --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -6,6 +6,10 @@ #include "sun8i-r40.dtsi" +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &i2c0 { status = "okay"; diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts index 6931aaab2382..0eb1990742ff 100644 --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts @@ -88,6 +88,10 @@ &ahci { status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts index 47954551f573..fdf8bd12faaa 100644 --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts @@ -107,6 +107,10 @@ &ahci { status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; From patchwork Tue May 17 01:36:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: qianfan X-Patchwork-Id: 12851814 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B7C4C433EF for ; Tue, 17 May 2022 02:24:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233914AbiEQCYJ (ORCPT ); Mon, 16 May 2022 22:24:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229553AbiEQCYE (ORCPT ); Mon, 16 May 2022 22:24:04 -0400 Received: from m12-13.163.com (m12-13.163.com [220.181.12.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4B9E53D1FC; Mon, 16 May 2022 19:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=lTBhx p2EfVojczwDke4E/Onuf36SXf/m+vxj1MMdS2Y=; b=K6NlZ9QpriWOehObiwcCW pE3iFoBEuRVoIUNkpmAnABQTWS8xwo6jXXfDwuQ5jbHAhPGifkxC5uTlGvPQuGiy kUsAAnQ9eT0171ARPVgOufstlCt9tFJLy0bZgjlR45aNrDd9IDvSeFkNoFonE878 KrJ3CCaBcKTwmrhIejxA8A= Received: from DESKTOP-B1R4FVG.localdomain (unknown [218.201.129.20]) by smtp9 (Coremail) with SMTP id DcCowAB3USwR_IJiF3ohDQ--.61255S4; Tue, 17 May 2022 09:36:19 +0800 (CST) From: qianfanguijin@163.com To: linux-sunxi@lists.linux.dev Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, qianfan Zhao Subject: [PATCH v5 2/3] ARM: dts: sun8i-r40: add opp table for cpu Date: Tue, 17 May 2022 09:36:06 +0800 Message-Id: <20220517013607.2252-3-qianfanguijin@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220517013607.2252-1-qianfanguijin@163.com> References: <20220517013607.2252-1-qianfanguijin@163.com> MIME-Version: 1.0 X-CM-TRANSID: DcCowAB3USwR_IJiF3ohDQ--.61255S4 X-Coremail-Antispam: 1Uf129KBjvJXoWxGrWxXF1UKw4xur17Xry5urg_yoWrZFy8pw 17Zr4kGrs7Wr1Yq342gry8KF18uFWv9F4Yyry5C348Jrn7X34DJr97tr9akrWDXr43X3yI 9Fs5Xr9rtw1DZaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07Ubo7tUUUUU= X-Originating-IP: [218.201.129.20] X-CM-SenderInfo: htld0w5dqj3xxmlqqiywtou0bp/1tbiQhQE7VaECXNrTAAAsw Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: qianfan Zhao OPP table value is get from allwinner lichee linux-3.10 kernel driver Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 1 + arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi | 52 +++++++++++++++++++ arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 1 + arch/arm/boot/dts/sun8i-r40.dtsi | 8 +++ arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 1 + .../boot/dts/sun8i-v40-bananapi-m2-berry.dts | 1 + 6 files changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 4f30018ec4a2..28197bbcb1d5 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi new file mode 100644 index 000000000000..4faa22d3bac8 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi @@ -0,0 +1,52 @@ +/{ + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1000000 1000000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1100000 1100000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1160000 1160000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <2000000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu0_opp_table>; +}; diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi index b872b51a346d..9f39b5a2bb35 100644 --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -5,6 +5,7 @@ // Copyright (C) 2017 Icenowy Zheng #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" &cpu0 { cpu-supply = <®_dcdc2>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 291f4784e86c..ae2a5ebd9924 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -84,24 +84,32 @@ cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; }; diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts index 0eb1990742ff..9f472521f4a4 100644 --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts @@ -45,6 +45,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts index fdf8bd12faaa..434871040aca 100644 --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts @@ -42,6 +42,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include From patchwork Tue May 17 01:36:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: qianfan X-Patchwork-Id: 12851802 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69545C4332F for ; Tue, 17 May 2022 01:38:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229692AbiEQBiF (ORCPT ); Mon, 16 May 2022 21:38:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236861AbiEQBiD (ORCPT ); Mon, 16 May 2022 21:38:03 -0400 Received: from m12-13.163.com (m12-13.163.com [220.181.12.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 28C7042EEF; Mon, 16 May 2022 18:38:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=k0ctV enGMMCdu3p7b3myrdeaZuuz8j0YlMGMike2E58=; b=FkmEWkafRVvthQnx/j2sK /7z7EOTH1BAtpoONhF8/ExSjcVQY/mdPTfcxWiXdwTGaVPA2TXD2rCJxbb7vIFV2 b9V6oW9WIU/pXuMubfKzsnRlkYmZKLerWC1VkRmBrpRL5b5/aIa73E7kqPIo4asF 5gbfMc+M596rkBjId5e0hU= Received: from DESKTOP-B1R4FVG.localdomain (unknown [218.201.129.20]) by smtp9 (Coremail) with SMTP id DcCowAB3USwR_IJiF3ohDQ--.61255S5; Tue, 17 May 2022 09:36:20 +0800 (CST) From: qianfanguijin@163.com To: linux-sunxi@lists.linux.dev Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, qianfan Zhao Subject: [PATCH v5 3/3] ARM: dts: sun8i-r40: Add thermal trip points/cooling maps Date: Tue, 17 May 2022 09:36:07 +0800 Message-Id: <20220517013607.2252-4-qianfanguijin@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220517013607.2252-1-qianfanguijin@163.com> References: <20220517013607.2252-1-qianfanguijin@163.com> MIME-Version: 1.0 X-CM-TRANSID: DcCowAB3USwR_IJiF3ohDQ--.61255S5 X-Coremail-Antispam: 1Uf129KBjvJXoW7Aw4UArW7Wr4fJFW5Jw1kZrb_yoW8CF4xpF 1xCw4FqF1jgr1Sq3Wa9r4DXas8Ca4vkF48Krs7WFykAr98XFZrtry2yw1ftFyDGF1rAw40 9w4Yvr1xG3Z8A37anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07U9Aw3UUUUU= X-Originating-IP: [218.201.129.20] X-CM-SenderInfo: htld0w5dqj3xxmlqqiywtou0bp/1tbiGhUE7VaEBpyRLgAAsR Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: qianfan Zhao For the trip points, I used values from the BSP code. The critical trip point value is 30°C above the maximum recommended ambient temperature (85°C) for the SoC from the datasheet, so there's some headroom even at such a high ambient temperature. Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland --- arch/arm/boot/dts/sun8i-r40.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index ae2a5ebd9924..b43f3f72a915 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -86,6 +86,7 @@ cpu0: cpu@0 { reg = <0>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -94,6 +95,7 @@ cpu1: cpu@1 { reg = <1>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -102,6 +104,7 @@ cpu2: cpu@2 { reg = <2>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -110,6 +113,7 @@ cpu3: cpu@3 { reg = <3>; clocks = <&ccu CLK_CPU>; clock-names = "cpu"; + #cooling-cells = <2>; }; }; @@ -125,6 +129,30 @@ cpu_thermal: cpu0-thermal { polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal: gpu-thermal {