From patchwork Thu May 19 13:47:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12855082 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B385FC433EF for ; Thu, 19 May 2022 13:52:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238652AbiESNu4 (ORCPT ); Thu, 19 May 2022 09:50:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238915AbiESNuf (ORCPT ); Thu, 19 May 2022 09:50:35 -0400 Received: from mail-qv1-xf32.google.com (mail-qv1-xf32.google.com [IPv6:2607:f8b0:4864:20::f32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 01420427C7; Thu, 19 May 2022 06:50:06 -0700 (PDT) Received: by mail-qv1-xf32.google.com with SMTP id dm17so4629237qvb.2; Thu, 19 May 2022 06:50:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0XR4ztzwAfmurkh92tXKLFkllUmpZEqqatJbPeBbcOM=; b=m+kywaRl9XQL9PMsizCVDjVI4pa4msSwSGHHkLzTxeizpWwebWTLOtp0fGGy7zcdA3 JNUQc3vk1MYM56qDik0bw+s1rFMdPA5/2s5l7IdzpbBj1Nno28ggt0dM2M84iU4cW+ba 7mtzTUMAGu0K/k8LTaw9Cz27HE6mHrCe32yDTj5h3kXfwxm0rPqC+v7p4u8PacpXGYLQ vgR6fF+OG3mt4jYAZGiESEB3mqlZLGN6vFHJ5yJZLJpB+bAXjxGF5cvaZ68tNTt5pRfo 8mMnPQIy0Dqtei/2DeV72q+PmDLnmTUtuUYlYtdB25xJ7LryAD8n08vvKC00fnOz31H5 rwIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0XR4ztzwAfmurkh92tXKLFkllUmpZEqqatJbPeBbcOM=; b=0rP1eUe124m4H0uLGQo6YaWsSndwal/ZodZ+a3kAHXaW/upjk4DjCN/xlU9FwVwil6 UVlnAFf1HNtrj68bW4yzB3YhQ1a+0bDULyvuualIPvBG5c3RRQPkTmRrbCyzeDn0rbvn v0GzGqzGZESBmJboPplRfaJT8pYnJ8iC4TnGNOZSgVe/cXsr7Ug0ZegGzAOdhQkQSOlJ FhveFTWLQzJX0qARrIBXXxy2+4sAAFNOsiuPnRZj31ssSIn19ltEw5IdZHoORtRIX3or JZB7XUQPH4q3KtP5quU4uKrBgb8DLHvddOEdsv25+e7pjzL6CSZqRkCaeShlzfkmBDT1 1T0w== X-Gm-Message-State: AOAM5338HhCJwboSwqdw21b01Z09gT+GxYo9K78XxrHHeq3ciARmPSaj YW3YsWdCQhAIRIZzw1GCOZc= X-Google-Smtp-Source: ABdhPJz3B+e46dXhNUkl2WT1y31axELp3CqGKGpHA3AN7h3CTzl9SjS7mKx+1xlBV234PR20g/oMdw== X-Received: by 2002:a05:6214:e4a:b0:45a:dfa5:404a with SMTP id o10-20020a0562140e4a00b0045adfa5404amr3973844qvc.126.1652968163004; Thu, 19 May 2022 06:49:23 -0700 (PDT) Received: from localhost.localdomain ([217.138.206.82]) by smtp.gmail.com with ESMTPSA id i186-20020a3754c3000000b0069fc13ce23dsm1315024qkb.110.2022.05.19.06.49.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:49:22 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 1/6] clk: mediatek: gate: Export mtk_clk_register_gates_with_dev Date: Thu, 19 May 2022 17:47:23 +0400 Message-Id: <20220519134728.456643-2-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana This allows it to be used in drivers built as modules. Signed-off-by: Yassine Oudjana Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/clk-gate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c index 421806236228..0c867136e49d 100644 --- a/drivers/clk/mediatek/clk-gate.c +++ b/drivers/clk/mediatek/clk-gate.c @@ -261,6 +261,7 @@ int mtk_clk_register_gates_with_dev(struct device_node *node, return PTR_ERR(hw); } +EXPORT_SYMBOL_GPL(mtk_clk_register_gates_with_dev); int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks, int num, From patchwork Thu May 19 13:47:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12855081 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70914C4332F for ; Thu, 19 May 2022 13:52:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239084AbiESNuz (ORCPT ); Thu, 19 May 2022 09:50:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239079AbiESNuf (ORCPT ); Thu, 19 May 2022 09:50:35 -0400 Received: from mail-qk1-x733.google.com (mail-qk1-x733.google.com [IPv6:2607:f8b0:4864:20::733]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 93DE7DFF65; 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Thu, 19 May 2022 06:49:30 -0700 (PDT) Received: from localhost.localdomain ([217.138.206.82]) by smtp.gmail.com with ESMTPSA id i186-20020a3754c3000000b0069fc13ce23dsm1315024qkb.110.2022.05.19.06.49.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:49:30 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 2/6] clk: mediatek: Use mtk_clk_register_gates_with_dev in simple probe Date: Thu, 19 May 2022 17:47:24 +0400 Message-Id: <20220519134728.456643-3-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana Register gates with dev in mtk_clk_simple_probe. Signed-off-by: Yassine Oudjana Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/clk-mtk.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 41e60a7e8ff9..3a8875b6c37f 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -434,7 +434,8 @@ int mtk_clk_simple_probe(struct platform_device *pdev) if (!clk_data) return -ENOMEM; - r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, clk_data); + r = mtk_clk_register_gates_with_dev(node, mcd->clks, mcd->num_clks, + clk_data, &pdev->dev); if (r) goto free_data; From patchwork Thu May 19 13:47:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12855086 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66092C433F5 for ; Thu, 19 May 2022 13:52:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230293AbiESNwj (ORCPT ); Thu, 19 May 2022 09:52:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239277AbiESNuk (ORCPT ); Thu, 19 May 2022 09:50:40 -0400 Received: from mail-qv1-xf35.google.com (mail-qv1-xf35.google.com [IPv6:2607:f8b0:4864:20::f35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18D5949F0D; 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Thu, 19 May 2022 06:49:38 -0700 (PDT) Received: from localhost.localdomain ([217.138.206.82]) by smtp.gmail.com with ESMTPSA id i186-20020a3754c3000000b0069fc13ce23dsm1315024qkb.110.2022.05.19.06.49.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:49:38 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 3/6] clk: mediatek: reset: Return reset data pointer on register Date: Thu, 19 May 2022 17:47:25 +0400 Message-Id: <20220519134728.456643-4-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana Return a struct mtk_clk_rst_data * when registering a reset controller in preparation for adding an unregister helper that will take it as an argument. Make the necessary changes in drivers that do not currently discard the return value of register functions. Signed-off-by: Yassine Oudjana --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/clk-mt8192.c | 7 +++++-- drivers/clk/mediatek/clk-mtk.c | 9 +++++--- drivers/clk/mediatek/reset.c | 34 ++++++++++++++++--------------- drivers/clk/mediatek/reset.h | 14 +++++++------ 4 files changed, 37 insertions(+), 27 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8192.c b/drivers/clk/mediatek/clk-mt8192.c index ebbd2798d9a3..a658a74644de 100644 --- a/drivers/clk/mediatek/clk-mt8192.c +++ b/drivers/clk/mediatek/clk-mt8192.c @@ -1255,6 +1255,7 @@ static int clk_mt8192_infra_probe(struct platform_device *pdev) { struct clk_hw_onecell_data *clk_data; struct device_node *node = pdev->dev.of_node; + struct mtk_clk_rst_data *rst_data; int r; clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); @@ -1265,9 +1266,11 @@ static int clk_mt8192_infra_probe(struct platform_device *pdev) if (r) goto free_clk_data; - r = mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc); - if (r) + rst_data = mtk_register_reset_controller_with_dev(&pdev->dev, &clk_rst_desc); + if (IS_ERR(rst_data)) { + r = PTR_ERR(rst_data); goto free_clk_data; + } r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); if (r) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 3a8875b6c37f..1b5591733e2b 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -424,6 +424,7 @@ int mtk_clk_simple_probe(struct platform_device *pdev) const struct mtk_clk_desc *mcd; struct clk_hw_onecell_data *clk_data; struct device_node *node = pdev->dev.of_node; + struct mtk_clk_rst_data *rst_data; int r; mcd = of_device_get_match_data(&pdev->dev); @@ -446,10 +447,12 @@ int mtk_clk_simple_probe(struct platform_device *pdev) platform_set_drvdata(pdev, clk_data); if (mcd->rst_desc) { - r = mtk_register_reset_controller_with_dev(&pdev->dev, - mcd->rst_desc); - if (r) + rst_data = mtk_register_reset_controller_with_dev(&pdev->dev, + mcd->rst_desc); + if (IS_ERR(rst_data)) { + r = PTR_ERR(rst_data); goto unregister_clks; + } } return r; diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index 290ceda84ce4..09862baf1d57 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -110,8 +110,9 @@ static int reset_xlate(struct reset_controller_dev *rcdev, return data->desc->rst_idx_map[reset_spec->args[0]]; } -int mtk_register_reset_controller(struct device_node *np, - const struct mtk_clk_rst_desc *desc) +struct mtk_clk_rst_data +*mtk_register_reset_controller(struct device_node *np, + const struct mtk_clk_rst_desc *desc) { struct regmap *regmap; const struct reset_control_ops *rcops = NULL; @@ -120,7 +121,7 @@ int mtk_register_reset_controller(struct device_node *np, if (!desc) { pr_err("mtk clock reset desc is NULL\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } switch (desc->version) { @@ -132,18 +133,18 @@ int mtk_register_reset_controller(struct device_node *np, break; default: pr_err("Unknown reset version %d\n", desc->version); - return -EINVAL; + return ERR_PTR(-EINVAL); } regmap = device_node_to_regmap(np); if (IS_ERR(regmap)) { pr_err("Cannot find regmap for %pOF: %pe\n", np, regmap); - return -EINVAL; + return ERR_PTR(-EINVAL); } data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) - return -ENOMEM; + return ERR_PTR(-ENOMEM); data->desc = desc; data->regmap = regmap; @@ -163,14 +164,15 @@ int mtk_register_reset_controller(struct device_node *np, if (ret) { pr_err("could not register reset controller: %d\n", ret); kfree(data); - return ret; + return ERR_PTR(ret); } - return 0; + return data; } -int mtk_register_reset_controller_with_dev(struct device *dev, - const struct mtk_clk_rst_desc *desc) +struct mtk_clk_rst_data +*mtk_register_reset_controller_with_dev(struct device *dev, + const struct mtk_clk_rst_desc *desc) { struct device_node *np = dev->of_node; struct regmap *regmap; @@ -180,7 +182,7 @@ int mtk_register_reset_controller_with_dev(struct device *dev, if (!desc) { dev_err(dev, "mtk clock reset desc is NULL\n"); - return -EINVAL; + return ERR_PTR(-EINVAL); } switch (desc->version) { @@ -192,18 +194,18 @@ int mtk_register_reset_controller_with_dev(struct device *dev, break; default: dev_err(dev, "Unknown reset version %d\n", desc->version); - return -EINVAL; + return ERR_PTR(-EINVAL); } regmap = device_node_to_regmap(np); if (IS_ERR(regmap)) { dev_err(dev, "Cannot find regmap %pe\n", regmap); - return -EINVAL; + return ERR_PTR(-EINVAL); } data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); if (!data) - return -ENOMEM; + return ERR_PTR(-ENOMEM); data->desc = desc; data->regmap = regmap; @@ -223,10 +225,10 @@ int mtk_register_reset_controller_with_dev(struct device *dev, ret = devm_reset_controller_register(dev, &data->rcdev); if (ret) { dev_err(dev, "could not register reset controller: %d\n", ret); - return ret; + return ERR_PTR(ret); } - return 0; + return data; } EXPORT_SYMBOL_GPL(mtk_register_reset_controller_with_dev); diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h index 913fe676cba7..7418dd0d046f 100644 --- a/drivers/clk/mediatek/reset.h +++ b/drivers/clk/mediatek/reset.h @@ -64,19 +64,21 @@ struct mtk_clk_rst_data { * @np: Pointer to device node. * @desc: Constant pointer to description of clock reset. * - * Return: 0 on success and errorno otherwise. + * Return: Pointer to struct mtk_clk_rst_data on success and error pointer otherwise. */ -int mtk_register_reset_controller(struct device_node *np, - const struct mtk_clk_rst_desc *desc); +struct mtk_clk_rst_data +*mtk_register_reset_controller(struct device_node *np, + const struct mtk_clk_rst_desc *desc); /** * mtk_register_reset_controller - Register mediatek clock reset controller with device * @np: Pointer to device. * @desc: Constant pointer to description of clock reset. * - * Return: 0 on success and errorno otherwise. + * Return: Pointer to struct mtk_clk_rst_data on success and error pointer otherwise. */ -int mtk_register_reset_controller_with_dev(struct device *dev, - const struct mtk_clk_rst_desc *desc); +struct mtk_clk_rst_data +*mtk_register_reset_controller_with_dev(struct device *dev, + const struct mtk_clk_rst_desc *desc); #endif /* __DRV_CLK_MTK_RESET_H */ From patchwork Thu May 19 13:47:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12855084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D641DC43217 for ; Thu, 19 May 2022 13:52:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232500AbiESNwp (ORCPT ); Thu, 19 May 2022 09:52:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239288AbiESNum (ORCPT ); Thu, 19 May 2022 09:50:42 -0400 Received: from mail-qt1-x833.google.com (mail-qt1-x833.google.com [IPv6:2607:f8b0:4864:20::833]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F062D028B; 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Thu, 19 May 2022 06:49:46 -0700 (PDT) Received: from localhost.localdomain ([217.138.206.82]) by smtp.gmail.com with ESMTPSA id i186-20020a3754c3000000b0069fc13ce23dsm1315024qkb.110.2022.05.19.06.49.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:49:45 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 4/6] clk: mediatek: reset: Implement mtk_unregister_reset_controller() API Date: Thu, 19 May 2022 17:47:26 +0400 Message-Id: <20220519134728.456643-5-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana Add a function to unregister a reset controller previously registered with mtk_register_reset_controller() or mtk_register_reset_controller_with_dev(), and do the necessary cleanup. Signed-off-by: Yassine Oudjana --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/reset.c | 7 +++++++ drivers/clk/mediatek/reset.h | 6 ++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index 09862baf1d57..c1ab8c87ec27 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -232,4 +232,11 @@ struct mtk_clk_rst_data } EXPORT_SYMBOL_GPL(mtk_register_reset_controller_with_dev); +void mtk_unregister_reset_controller(struct mtk_clk_rst_data *data) +{ + reset_controller_unregister(&data->rcdev); + kfree(data); +} +EXPORT_SYMBOL_GPL(mtk_unregister_reset_controller); + MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/reset.h b/drivers/clk/mediatek/reset.h index 7418dd0d046f..0feaea4115a8 100644 --- a/drivers/clk/mediatek/reset.h +++ b/drivers/clk/mediatek/reset.h @@ -81,4 +81,10 @@ struct mtk_clk_rst_data *mtk_register_reset_controller_with_dev(struct device *dev, const struct mtk_clk_rst_desc *desc); +/** + * mtk_unregister_reset_controller - Unregister mediatek clock reset controller + * @data: Pointer to previously registered struct mtk_clk_rst_data. + */ +void mtk_unregister_reset_controller(struct mtk_clk_rst_data *data); + #endif /* __DRV_CLK_MTK_RESET_H */ From patchwork Thu May 19 13:47:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12855083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3D6DC433FE for ; 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Thu, 19 May 2022 06:49:54 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 5/6] clk: mediatek: Unregister reset controller on simple remove Date: Thu, 19 May 2022 17:47:27 +0400 Message-Id: <20220519134728.456643-6-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana Store clk_data and rst_data pointers in a new wrapper struct, set it as platform driver data, then use it in mtk_clk_simple_remove to unregister the reset controller. Signed-off-by: Yassine Oudjana --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/clk-mtk.c | 47 +++++++++++++++++++++------------- drivers/clk/mediatek/clk-mtk.h | 5 ++++ 2 files changed, 34 insertions(+), 18 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 1b5591733e2b..3382802663f4 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -422,35 +422,41 @@ void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num, int mtk_clk_simple_probe(struct platform_device *pdev) { const struct mtk_clk_desc *mcd; - struct clk_hw_onecell_data *clk_data; + struct mtk_simple_clk_controller *clk_ctrl; struct device_node *node = pdev->dev.of_node; - struct mtk_clk_rst_data *rst_data; int r; mcd = of_device_get_match_data(&pdev->dev); if (!mcd) return -EINVAL; - clk_data = mtk_alloc_clk_data(mcd->num_clks); - if (!clk_data) + clk_ctrl = kzalloc(sizeof(*clk_ctrl), GFP_KERNEL); + if (!clk_ctrl) return -ENOMEM; + clk_ctrl->clk_data = mtk_alloc_clk_data(mcd->num_clks); + if (!clk_ctrl->clk_data) { + r = -ENOMEM; + goto free_clk_ctrl; + } + r = mtk_clk_register_gates_with_dev(node, mcd->clks, mcd->num_clks, - clk_data, &pdev->dev); + clk_ctrl->clk_data, &pdev->dev); if (r) - goto free_data; + goto free_clk_data; - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); + r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_ctrl->clk_data); if (r) goto unregister_clks; - platform_set_drvdata(pdev, clk_data); + platform_set_drvdata(pdev, clk_ctrl); if (mcd->rst_desc) { - rst_data = mtk_register_reset_controller_with_dev(&pdev->dev, - mcd->rst_desc); - if (IS_ERR(rst_data)) { - r = PTR_ERR(rst_data); + clk_ctrl->rst_data = + mtk_register_reset_controller_with_dev(&pdev->dev, + mcd->rst_desc); + if (IS_ERR(clk_ctrl->rst_data)) { + r = PTR_ERR(clk_ctrl->rst_data); goto unregister_clks; } } @@ -458,9 +464,11 @@ int mtk_clk_simple_probe(struct platform_device *pdev) return r; unregister_clks: - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); -free_data: - mtk_free_clk_data(clk_data); + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_ctrl->clk_data); +free_clk_data: + mtk_free_clk_data(clk_ctrl->clk_data); +free_clk_ctrl: + kfree(clk_ctrl); return r; } EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); @@ -468,12 +476,15 @@ EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); int mtk_clk_simple_remove(struct platform_device *pdev) { const struct mtk_clk_desc *mcd = of_device_get_match_data(&pdev->dev); - struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev); + struct mtk_simple_clk_controller *clk_ctrl = platform_get_drvdata(pdev); struct device_node *node = pdev->dev.of_node; of_clk_del_provider(node); - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); - mtk_free_clk_data(clk_data); + if (clk_ctrl->rst_data) + mtk_unregister_reset_controller(clk_ctrl->rst_data); + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_ctrl->clk_data); + mtk_free_clk_data(clk_ctrl->clk_data); + kfree(clk_ctrl); return 0; } diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 1b95c484d5aa..fa092bca97c8 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -189,6 +189,11 @@ void mtk_free_clk_data(struct clk_hw_onecell_data *clk_data); struct clk_hw *mtk_clk_register_ref2usb_tx(const char *name, const char *parent_name, void __iomem *reg); +struct mtk_simple_clk_controller { + struct clk_hw_onecell_data *clk_data; + struct mtk_clk_rst_data *rst_data; +}; + struct mtk_clk_desc { const struct mtk_gate *clks; size_t num_clks; From patchwork Thu May 19 13:47:28 2022 Content-Type: text/plain; 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Thu, 19 May 2022 06:50:01 -0700 (PDT) Received: from localhost.localdomain ([217.138.206.82]) by smtp.gmail.com with ESMTPSA id i186-20020a3754c3000000b0069fc13ce23dsm1315024qkb.110.2022.05.19.06.49.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 May 2022 06:50:01 -0700 (PDT) From: Yassine Oudjana X-Google-Original-From: Yassine Oudjana To: Michael Turquette , Stephen Boyd , Matthias Brugger , Philipp Zabel Cc: Yassine Oudjana , Chen-Yu Tsai , Miles Chen , AngeloGioacchino Del Regno , Chun-Jie Chen , =?utf-8?b?Sm9zw6kgRXhww7NzaXRv?= , Rex-BC Chen , Yassine Oudjana , linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht Subject: [PATCH 6/6] clk: mediatek: Add support for other clock types in simple probe/remove Date: Thu, 19 May 2022 17:47:28 +0400 Message-Id: <20220519134728.456643-7-y.oudjana@protonmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220519134728.456643-1-y.oudjana@protonmail.com> References: <20220519134728.456643-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Yassine Oudjana Simple probe/remove functions currently support gates only. Add PLLs, fixed clocks, fixed factors and muxes to support most clock controllers. struct mtk_clk_desc now takes descriptions for all of these clocks, and only the ones set will be registered. Most clock controllers will only use a subset of the types supported. Signed-off-by: Yassine Oudjana --- Dependencies: - clk: mediatek: Move to struct clk_hw provider APIs (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220510104804.544597-1-wenst@chromium.org/ - Cleanup MediaTek clk reset drivers and support MT8192/MT8195 (series) https://patchwork.kernel.org/project/linux-mediatek/cover/20220503093856.22250-1-rex-bc.chen@mediatek.com/ - Export required symbols to compile clk drivers as module (single patch) https://patchwork.kernel.org/project/linux-mediatek/patch/20220518111652.223727-7-angelogioacchino.delregno@collabora.com/ drivers/clk/mediatek/clk-mtk.c | 88 +++++++++++++++++++++++++++++----- drivers/clk/mediatek/clk-mtk.h | 17 ++++++- 2 files changed, 92 insertions(+), 13 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 3382802663f4..df1209d5b6fb 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -15,8 +15,10 @@ #include #include -#include "clk-mtk.h" #include "clk-gate.h" +#include "clk-mtk.h" +#include "clk-mux.h" +#include "clk-pll.h" struct clk_hw_onecell_data *mtk_alloc_clk_data(unsigned int clk_num) { @@ -434,20 +436,55 @@ int mtk_clk_simple_probe(struct platform_device *pdev) if (!clk_ctrl) return -ENOMEM; - clk_ctrl->clk_data = mtk_alloc_clk_data(mcd->num_clks); + clk_ctrl->clk_data = mtk_alloc_clk_data(mcd->num_plls + + mcd->num_fixed_clks + + mcd->num_factors + + mcd->num_muxes + + mcd->num_gates); if (!clk_ctrl->clk_data) { r = -ENOMEM; goto free_clk_ctrl; } - r = mtk_clk_register_gates_with_dev(node, mcd->clks, mcd->num_clks, - clk_ctrl->clk_data, &pdev->dev); - if (r) - goto free_clk_data; + if (mcd->plls) { + r = mtk_clk_register_plls(node, mcd->plls, mcd->num_plls, + clk_ctrl->clk_data); + if (r) + goto free_clk_data; + } + + if (mcd->fixed_clks) { + r = mtk_clk_register_fixed_clks(mcd->fixed_clks, mcd->num_fixed_clks, + clk_ctrl->clk_data); + if (r) + goto unregister_plls; + } + + if (mcd->factors) { + r = mtk_clk_register_factors(mcd->factors, mcd->num_factors, + clk_ctrl->clk_data); + if (r) + goto unregister_fixed_clks; + } + + if (mcd->muxes) { + spin_lock_init(&clk_ctrl->mux_lock); + r = mtk_clk_register_muxes(mcd->muxes, mcd->num_muxes, node, + &clk_ctrl->mux_lock, clk_ctrl->clk_data); + if (r) + goto unregister_factors; + } + + if (mcd->gates) { + r = mtk_clk_register_gates_with_dev(node, mcd->gates, mcd->num_gates, + clk_ctrl->clk_data, &pdev->dev); + if (r) + goto unregister_muxes; + } r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_ctrl->clk_data); if (r) - goto unregister_clks; + goto unregister_gates; platform_set_drvdata(pdev, clk_ctrl); @@ -457,14 +494,30 @@ int mtk_clk_simple_probe(struct platform_device *pdev) mcd->rst_desc); if (IS_ERR(clk_ctrl->rst_data)) { r = PTR_ERR(clk_ctrl->rst_data); - goto unregister_clks; + goto unregister_clk_provider; } } return r; -unregister_clks: - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_ctrl->clk_data); +unregister_clk_provider: + of_clk_del_provider(node); +unregister_gates: + if (mcd->gates) + mtk_clk_unregister_gates(mcd->gates, mcd->num_gates, clk_ctrl->clk_data); +unregister_muxes: + if (mcd->muxes) + mtk_clk_unregister_muxes(mcd->muxes, mcd->num_muxes, clk_ctrl->clk_data); +unregister_factors: + if (mcd->factors) + mtk_clk_unregister_factors(mcd->factors, mcd->num_factors, clk_ctrl->clk_data); +unregister_fixed_clks: + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, mcd->num_fixed_clks, + clk_ctrl->clk_data); +unregister_plls: + if (mcd->plls) + mtk_clk_unregister_plls(mcd->plls, mcd->num_plls, clk_ctrl->clk_data); free_clk_data: mtk_free_clk_data(clk_ctrl->clk_data); free_clk_ctrl: @@ -480,9 +533,22 @@ int mtk_clk_simple_remove(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; of_clk_del_provider(node); + if (clk_ctrl->rst_data) mtk_unregister_reset_controller(clk_ctrl->rst_data); - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_ctrl->clk_data); + + if (mcd->gates) + mtk_clk_unregister_gates(mcd->gates, mcd->num_gates, clk_ctrl->clk_data); + if (mcd->muxes) + mtk_clk_unregister_muxes(mcd->muxes, mcd->num_muxes, clk_ctrl->clk_data); + if (mcd->factors) + mtk_clk_unregister_factors(mcd->factors, mcd->num_factors, clk_ctrl->clk_data); + if (mcd->fixed_clks) + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, mcd->num_fixed_clks, + clk_ctrl->clk_data); + if (mcd->plls) + mtk_clk_unregister_plls(mcd->plls, mcd->num_plls, clk_ctrl->clk_data); + mtk_free_clk_data(clk_ctrl->clk_data); kfree(clk_ctrl); diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index fa092bca97c8..23bce98bca20 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -13,6 +13,9 @@ #include #include +#include "clk-gate.h" +#include "clk-mux.h" +#include "clk-pll.h" #include "reset.h" #define MAX_MUX_GATE_BIT 31 @@ -191,12 +194,22 @@ struct clk_hw *mtk_clk_register_ref2usb_tx(const char *name, struct mtk_simple_clk_controller { struct clk_hw_onecell_data *clk_data; + spinlock_t mux_lock; struct mtk_clk_rst_data *rst_data; }; struct mtk_clk_desc { - const struct mtk_gate *clks; - size_t num_clks; + const struct mtk_pll_data *plls; + size_t num_plls; + const struct mtk_fixed_clk *fixed_clks; + size_t num_fixed_clks; + const struct mtk_fixed_factor *factors; + size_t num_factors; + const struct mtk_mux *muxes; + size_t num_muxes; + const struct mtk_gate *gates; + size_t num_gates; + const struct mtk_clk_rst_desc *rst_desc; };