From patchwork Wed May 25 13:57:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861211 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B343CC433F5 for ; Wed, 25 May 2022 13:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244517AbiEYN6F (ORCPT ); Wed, 25 May 2022 09:58:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236984AbiEYN6F (ORCPT ); Wed, 25 May 2022 09:58:05 -0400 Received: from mail-oi1-x233.google.com (mail-oi1-x233.google.com [IPv6:2607:f8b0:4864:20::233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BF1B91575; Wed, 25 May 2022 06:58:04 -0700 (PDT) Received: by mail-oi1-x233.google.com with SMTP id t144so21862513oie.7; Wed, 25 May 2022 06:58:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d1b5nILyGqqpNbh83B6jQJVoKjYjPJ5yWnONtHERzTk=; b=WebDmmFh5GpeE3XP8N35Cr+1d3W/PKwx4R3sVlXX5fkUfew7SZ02lEBxMv4YkP/G+b QocVfWlUuO27rC8CSGSk0QP+mHMoG/X64sbNb+kuoNX3oxBH6xXZvv/1UOHuK/fTy0oZ VwMZtCkBuyDiz+HntCDrNSG6/6BzZLt5HPJCjKlYr8fgdTnNS/mLdJ96jDBoovFceVI0 kHU0P5rfhcf4IlNp9iYfkbN8E1Evng+sA72DjO+3/lRl/81T2UnKF/Dz7C5JdojM9Dzc zu67D468fCaiAjYBkj/LYsQx/rKYdOL5bNrpdP5JzdZLUzy43GEiRT4JpgZGsMnGPYbq ZIrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=d1b5nILyGqqpNbh83B6jQJVoKjYjPJ5yWnONtHERzTk=; b=gVfvubWEea/6eOxApJtFiqN/O2Dy1Sd+E2NNPoy/1RQ/zZNayfi1tbRIEl3Avwd769 FBJ8iAc0wBW+9KXWEBknochpWI+iyFjbHlbaLMptmtUSzaBv38o+GrbirtXY/FhhWTTL pZuiJDbY/PLnyppoIjwzIA10Xz2KjuiMzDWmR7vwL55boRtY2Iz9JJdgR41n0cbdXQpo 5KFi3WawDyiXIlCwlZyLIrA5jlqO25iAo3acFs1E7/pdhw+/loekdXB+XAcKep+DVje7 +ver3O3wUnLraAKUZAk84RJEB4vl018Z3cGICfOis2s6KIhYW98qE1iuxUo8lEw0CdWK R6Uw== X-Gm-Message-State: AOAM530xjCPM8ifhDJtfMlqEKQJa5zZq5z8D13MWqXbBVqA5YmA/hm+y ESJ2Nq4ywMkaN6hf5rUowMMDxF4t1BmYKA== X-Google-Smtp-Source: ABdhPJy7D20wc3bUV56gL+dEwyOhdNvi+KQdvMb2nOlFf6e1zoC5DBu7hfuwGrGPgNkv3VVhfMjtLA== X-Received: by 2002:aca:f306:0:b0:32b:4753:db60 with SMTP id r6-20020acaf306000000b0032b4753db60mr5208399oih.157.1653487083486; Wed, 25 May 2022 06:58:03 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id w187-20020acadfc4000000b0032b7b588f3asm2137256oig.46.2022.05.25.06.58.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:02 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 01/40] hwmon: (lm90) Generate sysfs and udev events for all alarms Date: Wed, 25 May 2022 06:57:19 -0700 Message-Id: <20220525135758.2944744-2-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org So far the driver only generated sysfs and udev events for minimum and maximum alarms. Also generate events for critical and emergency alarms. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 3820f0e61510..83d027c134be 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1829,6 +1829,26 @@ static bool lm90_is_tripped(struct i2c_client *client, u16 *status) hwmon_notify_event(data->hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2); + if (st & LM90_STATUS_LTHRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_crit_alarm, 0); + if (st & LM90_STATUS_RTHRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_crit_alarm, 1); + if (st2 & MAX6696_STATUS2_R2THRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_crit_alarm, 2); + + if (st2 & MAX6696_STATUS2_LOT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_emergency_alarm, 0); + if (st2 & MAX6696_STATUS2_ROT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_emergency_alarm, 1); + if (st2 & MAX6696_STATUS2_R2OT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, + hwmon_temp_emergency_alarm, 2); + return true; } From patchwork Wed May 25 13:57:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861212 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6986C433EF for ; Wed, 25 May 2022 13:58:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244541AbiEYN6J (ORCPT ); Wed, 25 May 2022 09:58:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232943AbiEYN6I (ORCPT ); Wed, 25 May 2022 09:58:08 -0400 Received: from mail-oo1-xc2f.google.com (mail-oo1-xc2f.google.com [IPv6:2607:f8b0:4864:20::c2f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EB8C941A0; Wed, 25 May 2022 06:58:06 -0700 (PDT) Received: by mail-oo1-xc2f.google.com with SMTP id x28-20020a4a621c000000b0040e85d338f2so1718844ooc.5; Wed, 25 May 2022 06:58:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xLlFec5N8qrCBt/iBc/xnPVxAShfXkm+TdYxUalLIOY=; b=A3gSbXeYcmleVu0APARKNmEvxlcfA6JFGhdOPtrojODqLGfusp94onMMlmmNrpD97w Kt40ICKT86sWpz1Lfaf89aXNCXidO91qaGWoit9rbh37NLmQNL9TS4uG6iMUZdBwKmcW VlLHOu6MCMjaQ2cWtaCqQe6vvf4Mx1X2i6xEeXU9OLVuHL+OwTf1PIs12KEIdcD4M3dE cSJiJk8U94BF+J7bc12lIKxODWFtaI6Dp1N0OK+2Y8qIdu7mSA8e1HpvWMY2Yj7//hWw uZbD7lzgl3hqUvBJEGndM4Wa1sHZtRwwwk55MLZWP3r84eCIk8x3aQfyby8HYrQnxHtH ZhXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=xLlFec5N8qrCBt/iBc/xnPVxAShfXkm+TdYxUalLIOY=; b=lsdwRzSNe5mnCOuGB2QgF7pBho8IBJ3LDmaJGRotkWhkDhFU0x3kKkvCAxNjNLROTb rsoe4Tl6aJgH5gSAwr9285gyY9Y/Ro7m7uIJzxRAnrjypi+4NbZ2SddEoP07DHk+pZAA IZXGdbzfq2A5EDG89Erhv7C3NrVngQyLyJ/5m89eQ05QV8sgwYiaUBxrYuNy/f3a59gQ +0cnlyNU8EFG7iR544xKc771gDL0yh1EUKOiSixpIn0EkmFA9fcvLhQM2kDjc2ouCv9z VWiChXspmZV8gq26iZEw6PAqR1OKCuzYH6/itujlCS+0By2TA7LtuVwMVbn/BEDEbPvF /qjA== X-Gm-Message-State: AOAM532xIfwOoIroAC/lOCVQfZgoFc4Nox21alzBPejwvzdrQpckRR3q T6f4uehX5jXLEussKpQn9Kfn+bRfSyX9ag== X-Google-Smtp-Source: ABdhPJwMZYSunFxmnkeN6oe6Pu9Yff2KrSKIRlZpoScjpXN8apmYuVdYCOrG7pLx86iC/vKioFYg6A== X-Received: by 2002:a4a:ba81:0:b0:40e:7cd9:afa1 with SMTP id d1-20020a4aba81000000b0040e7cd9afa1mr7470057oop.22.1653487085275; Wed, 25 May 2022 06:58:05 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id y11-20020a4a624b000000b0035e9f149b90sm6862085oog.3.2022.05.25.06.58.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:04 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 02/40] hwmon: (lm90) Rework alarm/status handling Date: Wed, 25 May 2022 06:57:20 -0700 Message-Id: <20220525135758.2944744-3-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Many chips supported by this driver clear status registers after it is read and update it in the next measurement cycle. Normally this falls under the radar because all registers are only read once per measurement cycle. However, there is an exception: Status registers are always read during interrupt and laert handling. This can result in invalid status reports if userspace reads an alarm attribute immediately afterwards. Rework alarm/status handling by keeping a shadow register with 'current' alarms, and by ensuring that the register is either only updated once per measurement cycle or not cleared. A second problem is related to alert handling: Alert handling is disabled for chips with broken alert after an alert was reported, but only re-enabled if attributes are read by the user. This means that alert conditions may appear and disappear unnoticed. Remedy the situation by introducing a worker to periodically read the status register(s) while alert handling is disabled, and re-enable alerts after the alert condition clears. Yet another problem is that sysfs and udev events are currently only reported to userspace if an alarm is raised, but not if an alarm condition clears. Use the new worker to detect that situation and also generate sysfs and udev events in that case. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 314 +++++++++++++++++++++++++++---------------- 1 file changed, 199 insertions(+), 115 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 83d027c134be..63ada2d0d839 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -92,6 +92,7 @@ #include #include #include +#include /* * Addresses to scan @@ -499,8 +500,11 @@ struct lm90_data { const struct hwmon_channel_info *info[3]; struct hwmon_chip_info chip; struct mutex update_lock; + struct delayed_work alert_work; bool valid; /* true if register values are valid */ + bool alarms_valid; /* true if status register values are valid */ unsigned long last_updated; /* in jiffies */ + unsigned long alarms_updated; /* in jiffies */ int kind; u32 flags; @@ -518,7 +522,9 @@ struct lm90_data { s8 temp8[TEMP8_REG_NUM]; s16 temp11[TEMP11_REG_NUM]; u8 temp_hyst; - u16 alarms; /* bitvector (upper 8 bits for max6695/96) */ + u16 reported_alarms; /* alarms reported as sysfs/udev events */ + u16 current_alarms; /* current alarms, reported by chip */ + u16 alarms; /* alarms not yet reported to user */ }; /* @@ -771,6 +777,158 @@ static int lm90_update_limits(struct device *dev) return 0; } +static void lm90_report_alarms(struct device *dev, struct lm90_data *data) +{ + u16 cleared_alarms = data->reported_alarms & ~data->current_alarms; + u16 new_alarms = data->current_alarms & ~data->reported_alarms; + struct device *hwmon_dev = data->hwmon_dev; + int st, st2; + + if (!cleared_alarms && !new_alarms) + return; + + st = new_alarms & 0xff; + st2 = new_alarms >> 8; + + if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) || + (st2 & MAX6696_STATUS2_LOT2)) + dev_dbg(dev, "temp%d out of range, please check!\n", 1); + if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) || + (st2 & MAX6696_STATUS2_ROT2)) + dev_dbg(dev, "temp%d out of range, please check!\n", 2); + if (st & LM90_STATUS_ROPEN) + dev_dbg(dev, "temp%d diode open, please check!\n", 2); + if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH | + MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2)) + dev_dbg(dev, "temp%d out of range, please check!\n", 3); + if (st2 & MAX6696_STATUS2_R2OPEN) + dev_dbg(dev, "temp%d diode open, please check!\n", 3); + + st |= cleared_alarms & 0xff; + st2 |= cleared_alarms >> 8; + + if (st & LM90_STATUS_LLOW) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0); + if (st & LM90_STATUS_RLOW) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1); + if (st2 & MAX6696_STATUS2_R2LOW) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2); + + if (st & LM90_STATUS_LHIGH) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0); + if (st & LM90_STATUS_RHIGH) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1); + if (st2 & MAX6696_STATUS2_R2HIGH) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2); + + if (st & LM90_STATUS_LTHRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0); + if (st & LM90_STATUS_RTHRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1); + if (st2 & MAX6696_STATUS2_R2THRM) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2); + + if (st2 & MAX6696_STATUS2_LOT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0); + if (st2 & MAX6696_STATUS2_ROT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1); + if (st2 & MAX6696_STATUS2_R2OT2) + hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2); + + data->reported_alarms = data->current_alarms; +} + +static int lm90_update_alarms_locked(struct lm90_data *data, bool force) +{ + if (force || !data->alarms_valid || + time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) { + struct i2c_client *client = data->client; + bool check_enable; + u16 alarms; + int val; + + data->alarms_valid = false; + + val = lm90_read_reg(client, LM90_REG_R_STATUS); + if (val < 0) + return val; + alarms = val & ~LM90_STATUS_BUSY; + + if (data->kind == max6696) { + val = lm90_read_reg(client, MAX6696_REG_R_STATUS2); + if (val < 0) + return val; + alarms |= val << 8; + } + /* + * If the update is forced (called from interrupt or alert + * handler) and alarm data is valid, the alarms may have been + * updated after the last update interval, and the status + * register may still be cleared. Only add additional alarms + * in this case. Alarms will be cleared later if appropriate. + */ + if (force && data->alarms_valid) + data->current_alarms |= alarms; + else + data->current_alarms = alarms; + data->alarms |= alarms; + + check_enable = (client->irq || !(data->config_orig & 0x80)) && + (data->config & 0x80); + + if (force || check_enable) + lm90_report_alarms(&client->dev, data); + + /* + * Re-enable ALERT# output if it was originally enabled, relevant + * alarms are all clear, and alerts are currently disabled. + * Otherwise (re)schedule worker if needed. + */ + if (check_enable) { + if (!(data->current_alarms & data->alert_alarms)) { + dev_dbg(&client->dev, "Re-enabling ALERT#\n"); + lm90_update_confreg(data, data->config & ~0x80); + /* + * We may have been called from the update handler. + * If so, the worker, if scheduled, is no longer + * needed. Cancel it. Don't synchronize because + * it may already be running. + */ + cancel_delayed_work(&data->alert_work); + } else { + schedule_delayed_work(&data->alert_work, + max_t(int, HZ, msecs_to_jiffies(data->update_interval))); + } + } + data->alarms_updated = jiffies; + data->alarms_valid = true; + } + return 0; +} + +static int lm90_update_alarms(struct lm90_data *data, bool force) +{ + int err; + + mutex_lock(&data->update_lock); + err = lm90_update_alarms_locked(data, force); + mutex_unlock(&data->update_lock); + + return err; +} + +static void lm90_alert_work(struct work_struct *__work) +{ + struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work); + struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work); + + /* Nothing to do if alerts are enabled */ + if (!(data->config & 0x80)) + return; + + lm90_update_alarms(data, true); +} + static int lm90_update_device(struct device *dev) { struct lm90_data *data = dev_get_drvdata(dev); @@ -819,11 +977,6 @@ static int lm90_update_device(struct device *dev) return val; data->temp11[REMOTE_TEMP] = val; - val = lm90_read_reg(client, LM90_REG_R_STATUS); - if (val < 0) - return val; - data->alarms = val & ~LM90_STATUS_BUSY; - if (data->kind == max6696) { val = lm90_select_remote_channel(data, 1); if (val < 0) @@ -838,24 +991,11 @@ static int lm90_update_device(struct device *dev) data->temp11[REMOTE2_TEMP] = val; lm90_select_remote_channel(data, 0); - - val = lm90_read_reg(client, MAX6696_REG_R_STATUS2); - if (val < 0) - return val; - data->alarms |= val << 8; } - /* - * Re-enable ALERT# output if it was originally enabled and - * relevant alarms are all clear - */ - if ((client->irq || !(data->config_orig & 0x80)) && - !(data->alarms & data->alert_alarms)) { - if (data->config & 0x80) { - dev_dbg(&client->dev, "Re-enabling ALERT#\n"); - lm90_update_confreg(data, data->config & ~0x80); - } - } + val = lm90_update_alarms_locked(data, false); + if (val < 0) + return val; data->last_updated = jiffies; data->valid = true; @@ -1212,7 +1352,7 @@ static const u8 lm90_fault_bits[3] = { 0, 2, 10 }; static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) { struct lm90_data *data = dev_get_drvdata(dev); - int err; + int err, bit; mutex_lock(&data->update_lock); err = lm90_update_device(dev); @@ -1225,22 +1365,33 @@ static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) *val = lm90_get_temp11(data, lm90_temp_index[channel]); break; case hwmon_temp_min_alarm: - *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1; - break; case hwmon_temp_max_alarm: - *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1; - break; case hwmon_temp_crit_alarm: - if (data->flags & LM90_HAVE_CRIT_ALRM_SWP) - *val = (data->alarms >> lm90_crit_alarm_bits_swapped[channel]) & 1; - else - *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1; - break; case hwmon_temp_emergency_alarm: - *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1; - break; case hwmon_temp_fault: - *val = (data->alarms >> lm90_fault_bits[channel]) & 1; + switch (attr) { + case hwmon_temp_min_alarm: + bit = BIT(lm90_min_alarm_bits[channel]); + break; + case hwmon_temp_max_alarm: + bit = BIT(lm90_max_alarm_bits[channel]); + break; + case hwmon_temp_crit_alarm: + if (data->flags & LM90_HAVE_CRIT_ALRM_SWP) + bit = BIT(lm90_crit_alarm_bits_swapped[channel]); + else + bit = BIT(lm90_crit_alarm_bits[channel]); + break; + case hwmon_temp_emergency_alarm: + bit = BIT(lm90_emergency_alarm_bits[channel]); + break; + case hwmon_temp_fault: + bit = BIT(lm90_fault_bits[channel]); + break; + } + *val = !!(data->alarms & bit); + data->alarms &= ~bit; + data->alarms |= data->current_alarms; break; case hwmon_temp_min: if (channel == 0) @@ -1699,6 +1850,8 @@ static void lm90_restore_conf(void *_data) struct lm90_data *data = _data; struct i2c_client *client = data->client; + cancel_delayed_work_sync(&data->alert_work); + /* Restore initial configuration */ lm90_write_convrate(data, data->convrate_orig); i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, @@ -1771,93 +1924,23 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data); } -static bool lm90_is_tripped(struct i2c_client *client, u16 *status) +static bool lm90_is_tripped(struct i2c_client *client) { struct lm90_data *data = i2c_get_clientdata(client); - int st, st2 = 0; - - st = lm90_read_reg(client, LM90_REG_R_STATUS); - if (st < 0) - return false; - - if (data->kind == max6696) { - st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2); - if (st2 < 0) - return false; - } - - *status = st | (st2 << 8); + int ret; - if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0) + ret = lm90_update_alarms(data, true); + if (ret < 0) return false; - if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) || - (st2 & MAX6696_STATUS2_LOT2)) - dev_dbg(&client->dev, - "temp%d out of range, please check!\n", 1); - if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) || - (st2 & MAX6696_STATUS2_ROT2)) - dev_dbg(&client->dev, - "temp%d out of range, please check!\n", 2); - if (st & LM90_STATUS_ROPEN) - dev_dbg(&client->dev, - "temp%d diode open, please check!\n", 2); - if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH | - MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2)) - dev_dbg(&client->dev, - "temp%d out of range, please check!\n", 3); - if (st2 & MAX6696_STATUS2_R2OPEN) - dev_dbg(&client->dev, - "temp%d diode open, please check!\n", 3); - - if (st & LM90_STATUS_LLOW) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_min_alarm, 0); - if (st & LM90_STATUS_RLOW) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_min_alarm, 1); - if (st2 & MAX6696_STATUS2_R2LOW) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_min_alarm, 2); - if (st & LM90_STATUS_LHIGH) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_max_alarm, 0); - if (st & LM90_STATUS_RHIGH) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_max_alarm, 1); - if (st2 & MAX6696_STATUS2_R2HIGH) - hwmon_notify_event(data->hwmon_dev, hwmon_temp, - hwmon_temp_max_alarm, 2); - - if (st & LM90_STATUS_LTHRM) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_crit_alarm, 0); - if (st & LM90_STATUS_RTHRM) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_crit_alarm, 1); - if (st2 & MAX6696_STATUS2_R2THRM) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_crit_alarm, 2); - - if (st2 & MAX6696_STATUS2_LOT2) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_emergency_alarm, 0); - if (st2 & MAX6696_STATUS2_ROT2) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_emergency_alarm, 1); - if (st2 & MAX6696_STATUS2_R2OT2) - hwmon_notify_event(hwmon_dev, hwmon_temp, - hwmon_temp_emergency_alarm, 2); - - return true; + return !!data->current_alarms; } static irqreturn_t lm90_irq_thread(int irq, void *dev_id) { struct i2c_client *client = dev_id; - u16 status; - if (lm90_is_tripped(client, &status)) + if (lm90_is_tripped(client)) return IRQ_HANDLED; else return IRQ_NONE; @@ -1911,6 +1994,7 @@ static int lm90_probe(struct i2c_client *client) data->client = client; i2c_set_clientdata(client, data); mutex_init(&data->update_lock); + INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work); /* Set the device type */ if (client->dev.of_node) @@ -2027,12 +2111,10 @@ static int lm90_probe(struct i2c_client *client) static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type, unsigned int flag) { - u16 alarms; - if (type != I2C_PROTOCOL_SMBUS_ALERT) return; - if (lm90_is_tripped(client, &alarms)) { + if (lm90_is_tripped(client)) { /* * Disable ALERT# output, because these chips don't implement * SMBus alert correctly; they should only hold the alert line @@ -2041,9 +2123,11 @@ static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type, struct lm90_data *data = i2c_get_clientdata(client); if ((data->flags & LM90_HAVE_BROKEN_ALERT) && - (alarms & data->alert_alarms)) { + (data->current_alarms & data->alert_alarms)) { dev_dbg(&client->dev, "Disabling ALERT#\n"); lm90_update_confreg(data, data->config | 0x80); + schedule_delayed_work(&data->alert_work, + max_t(int, HZ, msecs_to_jiffies(data->update_interval))); } } else { dev_dbg(&client->dev, "Everything OK\n"); From patchwork Wed May 25 13:57:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861213 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81F59C433F5 for ; Wed, 25 May 2022 13:58:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236667AbiEYN6K (ORCPT ); Wed, 25 May 2022 09:58:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51408 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244532AbiEYN6I (ORCPT ); Wed, 25 May 2022 09:58:08 -0400 Received: from mail-oi1-x22a.google.com (mail-oi1-x22a.google.com [IPv6:2607:f8b0:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAFA09CF63; Wed, 25 May 2022 06:58:07 -0700 (PDT) Received: by mail-oi1-x22a.google.com with SMTP id q8so25048035oif.13; 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Wed, 25 May 2022 06:58:07 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id k22-20020a056870959600b000f2c0ec657asm634399oao.0.2022.05.25.06.58.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:06 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 03/40] hwmon: (lm90) Reorder include files in alphabetical order Date: Wed, 25 May 2022 06:57:21 -0700 Message-Id: <20220525135758.2944744-4-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Reorder include files in alphabetical order to reduce the chance of duplicates and to make it clear where new include files should be added. Drop the unnecessary include of linux/sysfs.h. Include linux/device.h instead because that is what is actually used. No functional change. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 63ada2d0d839..b7f5b743c9f5 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -80,18 +80,18 @@ * concern all supported chipsets, unless mentioned otherwise. */ -#include +#include +#include +#include #include -#include +#include #include -#include #include -#include +#include #include #include -#include -#include #include +#include #include /* From patchwork Wed May 25 13:57:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861214 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B13FC433F5 for ; Wed, 25 May 2022 13:58:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244581AbiEYN6T (ORCPT ); Wed, 25 May 2022 09:58:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244543AbiEYN6K (ORCPT ); Wed, 25 May 2022 09:58:10 -0400 Received: from mail-ot1-x335.google.com (mail-ot1-x335.google.com [IPv6:2607:f8b0:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB1AE9CCAC; Wed, 25 May 2022 06:58:09 -0700 (PDT) Received: by mail-ot1-x335.google.com with SMTP id w19-20020a9d6393000000b0060aeb359ca8so10969713otk.6; Wed, 25 May 2022 06:58:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rCKqXle6qbQe/IsqkcPkNDc9pAVJQLLMF9gxVrNillo=; b=MMOiqenKDsaYJpTEKcsULjVgVvfZ3EclXp5/kYdvBODxhGQ7ByFTwqLSMSILyYbD+w ttZ/Y0wG4s/5e0VTxmckFILltU6wsgF+qhqHu0sz9ddK3QtPDZ4DIAcFt5kfrD4mRLPl NugbqFtPlEH0q9OAMU+naq4DY1ZnyvcYYBnJRxAiPRqpVHyhINR3L4EDQVT7OiunYh4y aXWBruOmjU54tz2RMnUKjQIAu6C8O8hvFqIn79/MV4g5oTyVzHPN5xDM1+ePDNo2XYuH G1UWc+fyJTRYtOhVhM8+H471EfOcKl0QccX1Sh8o7+Ul5inMaJJpXSnRA+GWFYb+pkvc c2ZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=rCKqXle6qbQe/IsqkcPkNDc9pAVJQLLMF9gxVrNillo=; b=4JUqW51s8+ChantkVHBYGHUoHAqz5+bmiRMEtQOaRcHOE4t1/BFe2tJGIJKEgxSbRa Tb3VdFLVPvmfDPOgVB6QRdFSuqX9cT2XmOvOUmdTW4Ry6qD00MaD+CFmJvC4Y9Gqdvo5 NLHE95qzp6voXGYbdTeD+K7FnNXegFtvuJNewGh+NCGA7127R15Avck5ZktFKvtbKXu1 nxfUjNipJi81+ofRsXN6/1g1wbR4HWI3ZkUtSwk/J9HwQTfkZMpd7lnyvyQ/X4tw0zM+ EFktWZkPt7Iy0UVwIQQ01R0ntygPgecjWDFMwpF2wHL/mK0bjKtfkFzlOHb62zdTYocQ PFuA== X-Gm-Message-State: AOAM533c9vyv6m+hP0CY6yaJKNgLqDb9IqrIfuunB2gZyGcyUA256Jnv KJYACuFk1PcAf5CiTxa6IYYCGPnyWkEGUg== X-Google-Smtp-Source: ABdhPJwihyfBN8k7mQw7B9ZIppfCIVBljrEHmVYWXkHQiy4N0TD7jAdK2uYvaNt/PVcAOYFkxxFOoQ== X-Received: by 2002:a9d:6316:0:b0:606:9578:ffe with SMTP id q22-20020a9d6316000000b0060695780ffemr12410732otk.256.1653487088929; Wed, 25 May 2022 06:58:08 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id a3-20020a056870b30300b000f1b1645a3esm6049669oao.1.2022.05.25.06.58.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:08 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 04/40] hwmon: (lm90) Reorder chip enumeration to be in alphabetical order Date: Wed, 25 May 2022 06:57:22 -0700 Message-Id: <20220525135758.2944744-5-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Reorder chip enumeration in alphabetical order to make it easier to see which chips are supported, and to clarify where to add support new chip types. No functional change. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index b7f5b743c9f5..6728520a21ca 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -113,8 +113,10 @@ static const unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680, - max6646, w83l771, max6696, sa56004, g781, tmp451, tmp461, max6654 }; +enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, + max6646, max6654, max6657, max6659, max6680, max6696, + sa56004, tmp451, tmp461, w83l771, +}; /* * The LM90 registers From patchwork Wed May 25 13:57:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861221 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2D61C433EF for ; Wed, 25 May 2022 13:58:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231317AbiEYN6l (ORCPT ); Wed, 25 May 2022 09:58:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51692 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244560AbiEYN6R (ORCPT ); Wed, 25 May 2022 09:58:17 -0400 Received: from mail-oo1-xc32.google.com (mail-oo1-xc32.google.com [IPv6:2607:f8b0:4864:20::c32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0A7FA502F; Wed, 25 May 2022 06:58:11 -0700 (PDT) Received: by mail-oo1-xc32.google.com with SMTP id f5-20020a4aa685000000b0040e7e819183so1904070oom.3; Wed, 25 May 2022 06:58:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jkeP4GwJvBOCaJylAO1wG73yjst6A2ktNXJqi4BU/pY=; b=cqVCQJfe04xaW1cxQT3cqw2mvzt6bVpHDpDLoPAejS6TsgOgCkhVJJtvMT2C0R5i9N bWjQewzqLmPORz/dR47FdtcI9CcnMyvBMXLlXFa+JFH2+olAH4W3SosE7KCV7wXcL2Z0 k9lxfhY5UNxOyxTzQ+86My3jSzhlKmtbhSnfgy9Cs/nqIS9/4vNQZQrD/71a7QSUEYqi hduVVMgKksChs+b69Fhm7Ndp/XE9YO121QeDjyQc6jrDlsWj0RkXY1iJyRkisnDMAEk5 XhQN+mcCZcLcLvjFdZfCcZ1/W3pCy6vNEJxMYHxH/EgtQ98n9CSLfGzFN2ZEPJ8fwLsN cKGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=jkeP4GwJvBOCaJylAO1wG73yjst6A2ktNXJqi4BU/pY=; b=Ri5LKHtqbXhE/77VR8+akNaaI06EZR2M4tuVNktmN13N12In7o6FKdCfxkrr/REUJO uTFoGiqVoRxs3cClpkhFfrYY0v+rWzzbvjKtbdltKuOmdrZRc6vr4QXIbal8umKFWGxq dtYOCX3tm+q25FFRQt4KYIttQIHtTpm05/t/LvaMWPSXsk7GP3Xs42QEnqSA6AolF95h 3isU1GuFpm5ib5LSCcoDHvWWuPBj2BJiTa50PB7p6kJVjlGAo6DMmA2rZjDG9f/adQOC 2vgE+dYUkm1jXA61T4lyH5ocxqaaHbObC5N/B9wkrSfH3Pjhl9w2f52a1d0+gTb8aRdc cpnA== X-Gm-Message-State: AOAM531ywWnQD3T1xMZetnkvyEgplIlCIo3J56EbGa2hzViL80Iv2JIW nwI0LdvwX87LLB9IRiAZZv9dlz52vN7TwA== X-Google-Smtp-Source: ABdhPJwkUSNuTTyyMbgqfJ52uV0l2q3NL/HtZPF7Yj90++bjom9RuOkDk1ke4NYdRG/6zcA4qXS05Q== X-Received: by 2002:a4a:b307:0:b0:324:c7f2:386 with SMTP id m7-20020a4ab307000000b00324c7f20386mr12921515ooo.18.1653487090927; Wed, 25 May 2022 06:58:10 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id w184-20020aca62c1000000b0032b99637366sm832463oib.25.2022.05.25.06.58.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:10 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 05/40] hwmon: (lm90) Use BIT macro Date: Wed, 25 May 2022 06:57:23 -0700 Message-Id: <20220525135758.2944744-6-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Use BIT macro instead of shift operation to improve readability. No functional change. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 55 ++++++++++++++++++++++---------------------- 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 6728520a21ca..0f3fadc1631c 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -80,6 +80,7 @@ * concern all supported chipsets, unless mentioned otherwise. */ +#include #include #include #include @@ -182,36 +183,36 @@ enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, /* * Device flags */ -#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */ +#define LM90_FLAG_ADT7461_EXT BIT(0) /* ADT7461 extended mode */ /* Device features */ -#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */ -#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */ -#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */ -#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */ -#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */ -#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */ -#define LM90_HAVE_EXTENDED_TEMP (1 << 8) /* extended temperature support*/ -#define LM90_PAUSE_FOR_CONFIG (1 << 9) /* Pause conversion for config */ -#define LM90_HAVE_CRIT (1 << 10)/* Chip supports CRIT/OVERT register */ -#define LM90_HAVE_CRIT_ALRM_SWP (1 << 11)/* critical alarm bits swapped */ +#define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ +#define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */ +#define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */ +#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */ +#define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */ +#define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */ +#define LM90_HAVE_EXTENDED_TEMP BIT(8) /* extended temperature support */ +#define LM90_PAUSE_FOR_CONFIG BIT(9) /* Pause conversion for config */ +#define LM90_HAVE_CRIT BIT(10) /* Chip supports CRIT/OVERT register */ +#define LM90_HAVE_CRIT_ALRM_SWP BIT(11) /* critical alarm bits swapped */ /* LM90 status */ -#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */ -#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */ -#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */ -#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */ -#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */ -#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */ -#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */ -#define LM90_STATUS_BUSY (1 << 7) /* conversion is ongoing */ - -#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */ -#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */ -#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */ -#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */ -#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */ -#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */ -#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */ +#define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ +#define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */ +#define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */ +#define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */ +#define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */ +#define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */ +#define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */ +#define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */ + +#define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */ +#define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */ +#define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */ +#define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */ +#define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */ +#define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */ +#define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */ /* * Driver data (common to all clients) From patchwork Wed May 25 13:57:24 2022 Content-Type: text/plain; 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Wed, 25 May 2022 06:58:12 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 5-20020a9d0005000000b00606387601a2sm6067420ota.34.2022.05.25.06.58.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:12 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 06/40] hwmon: (lm90) Move status register bit shifts to compile time Date: Wed, 25 May 2022 06:57:24 -0700 Message-Id: <20220525135758.2944744-7-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Handling bit shifts necessary to extract status bits during compile time reduces code and data size by almost 5% when building for x86_64. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 0f3fadc1631c..cc26dd08fbff 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1345,17 +1345,18 @@ static const u8 lm90_temp_emerg_index[3] = { LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG }; -static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 }; -static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 }; -static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 }; -static const u8 lm90_crit_alarm_bits_swapped[3] = { 1, 0, 9 }; -static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 }; -static const u8 lm90_fault_bits[3] = { 0, 2, 10 }; +static const u16 lm90_min_alarm_bits[3] = { BIT(5), BIT(3), BIT(11) }; +static const u16 lm90_max_alarm_bits[3] = { BIT(6), BIT(4), BIT(12) }; +static const u16 lm90_crit_alarm_bits[3] = { BIT(0), BIT(1), BIT(9) }; +static const u16 lm90_crit_alarm_bits_swapped[3] = { BIT(1), BIT(0), BIT(9) }; +static const u16 lm90_emergency_alarm_bits[3] = { BIT(15), BIT(13), BIT(14) }; +static const u16 lm90_fault_bits[3] = { BIT(0), BIT(2), BIT(10) }; static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) { struct lm90_data *data = dev_get_drvdata(dev); - int err, bit; + int err; + u16 bit; mutex_lock(&data->update_lock); err = lm90_update_device(dev); @@ -1374,22 +1375,22 @@ static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) case hwmon_temp_fault: switch (attr) { case hwmon_temp_min_alarm: - bit = BIT(lm90_min_alarm_bits[channel]); + bit = lm90_min_alarm_bits[channel]; break; case hwmon_temp_max_alarm: - bit = BIT(lm90_max_alarm_bits[channel]); + bit = lm90_max_alarm_bits[channel]; break; case hwmon_temp_crit_alarm: if (data->flags & LM90_HAVE_CRIT_ALRM_SWP) - bit = BIT(lm90_crit_alarm_bits_swapped[channel]); + bit = lm90_crit_alarm_bits_swapped[channel]; else - bit = BIT(lm90_crit_alarm_bits[channel]); + bit = lm90_crit_alarm_bits[channel]; break; case hwmon_temp_emergency_alarm: - bit = BIT(lm90_emergency_alarm_bits[channel]); + bit = lm90_emergency_alarm_bits[channel]; break; case hwmon_temp_fault: - bit = BIT(lm90_fault_bits[channel]); + bit = lm90_fault_bits[channel]; break; } *val = !!(data->alarms & bit); From patchwork Wed May 25 13:57:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6C7FC433FE for ; Wed, 25 May 2022 13:58:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244611AbiEYN6a (ORCPT ); Wed, 25 May 2022 09:58:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244580AbiEYN6T (ORCPT ); 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Wed, 25 May 2022 06:58:14 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 07/40] hwmon: (lm90) Stop using R_/W_ register prefix Date: Wed, 25 May 2022 06:57:25 -0700 Message-Id: <20220525135758.2944744-8-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The register write address either matches the read address, or it is the read address plus 6. Simplify the code and resolve the write address programmatically instead of having two defines for each register. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 234 +++++++++++++++++++++---------------------- 1 file changed, 117 insertions(+), 117 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index cc26dd08fbff..995b27a248e6 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -123,58 +123,42 @@ enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, * The LM90 registers */ -#define LM90_REG_R_MAN_ID 0xFE -#define LM90_REG_R_CHIP_ID 0xFF -#define LM90_REG_R_CONFIG1 0x03 -#define LM90_REG_W_CONFIG1 0x09 -#define LM90_REG_R_CONFIG2 0xBF -#define LM90_REG_W_CONFIG2 0xBF -#define LM90_REG_R_CONVRATE 0x04 -#define LM90_REG_W_CONVRATE 0x0A -#define LM90_REG_R_STATUS 0x02 -#define LM90_REG_R_LOCAL_TEMP 0x00 -#define LM90_REG_R_LOCAL_HIGH 0x05 -#define LM90_REG_W_LOCAL_HIGH 0x0B -#define LM90_REG_R_LOCAL_LOW 0x06 -#define LM90_REG_W_LOCAL_LOW 0x0C -#define LM90_REG_R_LOCAL_CRIT 0x20 -#define LM90_REG_W_LOCAL_CRIT 0x20 -#define LM90_REG_R_REMOTE_TEMPH 0x01 -#define LM90_REG_R_REMOTE_TEMPL 0x10 -#define LM90_REG_R_REMOTE_OFFSH 0x11 -#define LM90_REG_W_REMOTE_OFFSH 0x11 -#define LM90_REG_R_REMOTE_OFFSL 0x12 -#define LM90_REG_W_REMOTE_OFFSL 0x12 -#define LM90_REG_R_REMOTE_HIGHH 0x07 -#define LM90_REG_W_REMOTE_HIGHH 0x0D -#define LM90_REG_R_REMOTE_HIGHL 0x13 -#define LM90_REG_W_REMOTE_HIGHL 0x13 -#define LM90_REG_R_REMOTE_LOWH 0x08 -#define LM90_REG_W_REMOTE_LOWH 0x0E -#define LM90_REG_R_REMOTE_LOWL 0x14 -#define LM90_REG_W_REMOTE_LOWL 0x14 -#define LM90_REG_R_REMOTE_CRIT 0x19 -#define LM90_REG_W_REMOTE_CRIT 0x19 -#define LM90_REG_R_TCRIT_HYST 0x21 -#define LM90_REG_W_TCRIT_HYST 0x21 +#define LM90_REG_MAN_ID 0xFE +#define LM90_REG_CHIP_ID 0xFF +#define LM90_REG_CONFIG1 0x03 +#define LM90_REG_CONFIG2 0xBF +#define LM90_REG_CONVRATE 0x04 +#define LM90_REG_STATUS 0x02 +#define LM90_REG_LOCAL_TEMP 0x00 +#define LM90_REG_LOCAL_HIGH 0x05 +#define LM90_REG_LOCAL_LOW 0x06 +#define LM90_REG_LOCAL_CRIT 0x20 +#define LM90_REG_REMOTE_TEMPH 0x01 +#define LM90_REG_REMOTE_TEMPL 0x10 +#define LM90_REG_REMOTE_OFFSH 0x11 +#define LM90_REG_REMOTE_OFFSL 0x12 +#define LM90_REG_REMOTE_HIGHH 0x07 +#define LM90_REG_REMOTE_HIGHL 0x13 +#define LM90_REG_REMOTE_LOWH 0x08 +#define LM90_REG_REMOTE_LOWL 0x14 +#define LM90_REG_REMOTE_CRIT 0x19 +#define LM90_REG_TCRIT_HYST 0x21 /* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */ -#define MAX6657_REG_R_LOCAL_TEMPL 0x11 -#define MAX6696_REG_R_STATUS2 0x12 -#define MAX6659_REG_R_REMOTE_EMERG 0x16 -#define MAX6659_REG_W_REMOTE_EMERG 0x16 -#define MAX6659_REG_R_LOCAL_EMERG 0x17 -#define MAX6659_REG_W_LOCAL_EMERG 0x17 +#define MAX6657_REG_LOCAL_TEMPL 0x11 +#define MAX6696_REG_STATUS2 0x12 +#define MAX6659_REG_REMOTE_EMERG 0x16 +#define MAX6659_REG_LOCAL_EMERG 0x17 /* SA56004 registers */ -#define SA56004_REG_R_LOCAL_TEMPL 0x22 +#define SA56004_REG_LOCAL_TEMPL 0x22 #define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */ /* TMP451/TMP461 registers */ -#define TMP451_REG_R_LOCAL_TEMPL 0x15 +#define TMP451_REG_LOCAL_TEMPL 0x15 #define TMP451_REG_CONALERT 0x22 #define TMP461_REG_CHEN 0x16 @@ -401,25 +385,25 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT, .alert_alarms = 0x7c, .max_convrate = 6, - .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6654] = { .flags = LM90_HAVE_BROKEN_ALERT, .alert_alarms = 0x7c, .max_convrate = 7, - .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6657] = { .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT, .alert_alarms = 0x7c, .max_convrate = 8, - .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6659] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT, .alert_alarms = 0x7c, .max_convrate = 8, - .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6680] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT @@ -432,7 +416,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT, .alert_alarms = 0x1c7c, .max_convrate = 6, - .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT, @@ -443,21 +427,21 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT, .alert_alarms = 0x7b, .max_convrate = 9, - .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL, + .reg_local_ext = SA56004_REG_LOCAL_TEMPL, }, [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT, .alert_alarms = 0x7c, .max_convrate = 9, - .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL, + .reg_local_ext = TMP451_REG_LOCAL_TEMPL, }, [tmp461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT, .alert_alarms = 0x7c, .max_convrate = 9, - .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL, + .reg_local_ext = TMP451_REG_LOCAL_TEMPL, }, }; @@ -565,6 +549,29 @@ static int lm90_read_reg(struct i2c_client *client, u8 reg) return err; } +/* + * Return register write address + * + * The write address for registers 0x03 .. 0x08 is the read address plus 6. + * For other registers the write address matches the read address. + */ +static u8 lm90_write_reg_addr(u8 reg) +{ + if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH) + return reg + 6; + return reg; +} + +/* + * Write into LM90 register. + * Convert register address to write address if needed, then execute the + * operation. + */ +static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val) +{ + return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val); +} + static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl) { int oldh, newh, l; @@ -604,9 +611,7 @@ static int lm90_update_confreg(struct lm90_data *data, u8 config) if (data->config != config) { int err; - err = i2c_smbus_write_byte_data(data->client, - LM90_REG_W_CONFIG1, - config); + err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config); if (err) return err; data->config = config; @@ -649,7 +654,7 @@ static int lm90_write_convrate(struct lm90_data *data, int val) } /* Set conv rate */ - err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val); + err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val); /* Revert change to config */ lm90_update_confreg(data, config); @@ -689,61 +694,61 @@ static int lm90_update_limits(struct device *dev) int val; if (data->flags & LM90_HAVE_CRIT) { - val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT); + val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT); if (val < 0) return val; data->temp8[LOCAL_CRIT] = val; - val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT); + val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); if (val < 0) return val; data->temp8[REMOTE_CRIT] = val; - val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST); + val = lm90_read_reg(client, LM90_REG_TCRIT_HYST); if (val < 0) return val; data->temp_hyst = val; } - val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH); + val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); if (val < 0) return val; data->temp11[REMOTE_LOW] = val << 8; if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { - val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL); + val = lm90_read_reg(client, LM90_REG_REMOTE_LOWL); if (val < 0) return val; data->temp11[REMOTE_LOW] |= val; } - val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH); + val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); if (val < 0) return val; data->temp11[REMOTE_HIGH] = val << 8; if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { - val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL); + val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHL); if (val < 0) return val; data->temp11[REMOTE_HIGH] |= val; } if (data->flags & LM90_HAVE_OFFSET) { - val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH, - LM90_REG_R_REMOTE_OFFSL); + val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, + LM90_REG_REMOTE_OFFSL); if (val < 0) return val; data->temp11[REMOTE_OFFSET] = val; } if (data->flags & LM90_HAVE_EMERGENCY) { - val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG); + val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG); if (val < 0) return val; data->temp8[LOCAL_EMERG] = val; - val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG); + val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); if (val < 0) return val; data->temp8[REMOTE_EMERG] = val; @@ -754,22 +759,22 @@ static int lm90_update_limits(struct device *dev) if (val < 0) return val; - val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT); + val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); if (val < 0) return val; data->temp8[REMOTE2_CRIT] = val; - val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG); + val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); if (val < 0) return val; data->temp8[REMOTE2_EMERG] = val; - val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH); + val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); if (val < 0) return val; data->temp11[REMOTE2_LOW] = val << 8; - val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH); + val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); if (val < 0) return val; data->temp11[REMOTE2_HIGH] = val << 8; @@ -852,13 +857,13 @@ static int lm90_update_alarms_locked(struct lm90_data *data, bool force) data->alarms_valid = false; - val = lm90_read_reg(client, LM90_REG_R_STATUS); + val = lm90_read_reg(client, LM90_REG_STATUS); if (val < 0) return val; alarms = val & ~LM90_STATUS_BUSY; if (data->kind == max6696) { - val = lm90_read_reg(client, MAX6696_REG_R_STATUS2); + val = lm90_read_reg(client, MAX6696_REG_STATUS2); if (val < 0) return val; alarms |= val << 8; @@ -952,30 +957,30 @@ static int lm90_update_device(struct device *dev) data->valid = false; - val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW); + val = lm90_read_reg(client, LM90_REG_LOCAL_LOW); if (val < 0) return val; data->temp8[LOCAL_LOW] = val; - val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH); + val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH); if (val < 0) return val; data->temp8[LOCAL_HIGH] = val; if (data->reg_local_ext) { - val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP, + val = lm90_read16(client, LM90_REG_LOCAL_TEMP, data->reg_local_ext); if (val < 0) return val; data->temp11[LOCAL_TEMP] = val; } else { - val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP); + val = lm90_read_reg(client, LM90_REG_LOCAL_TEMP); if (val < 0) return val; data->temp11[LOCAL_TEMP] = val << 8; } - val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH, - LM90_REG_R_REMOTE_TEMPL); + val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, + LM90_REG_REMOTE_TEMPL); if (val < 0) return val; data->temp11[REMOTE_TEMP] = val; @@ -985,8 +990,8 @@ static int lm90_update_device(struct device *dev) if (val < 0) return val; - val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH, - LM90_REG_R_REMOTE_TEMPL); + val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, + LM90_REG_REMOTE_TEMPL); if (val < 0) { lm90_select_remote_channel(data, 0); return val; @@ -1191,11 +1196,11 @@ static int lm90_set_temp11(struct lm90_data *data, int index, long val) u8 high; u8 low; } reg[] = { - [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL }, - [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }, - [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL }, - [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL }, - [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL } + [REMOTE_LOW] = { LM90_REG_REMOTE_LOWH, LM90_REG_REMOTE_LOWL }, + [REMOTE_HIGH] = { LM90_REG_REMOTE_HIGHH, LM90_REG_REMOTE_HIGHL }, + [REMOTE_OFFSET] = { LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL }, + [REMOTE2_LOW] = { LM90_REG_REMOTE_LOWH, LM90_REG_REMOTE_LOWL }, + [REMOTE2_HIGH] = { LM90_REG_REMOTE_HIGHH, LM90_REG_REMOTE_HIGHL } }; struct i2c_client *client = data->client; struct reg *regp = ®[index]; @@ -1218,13 +1223,12 @@ static int lm90_set_temp11(struct lm90_data *data, int index, long val) data->temp11[index] = temp_to_s8(val) << 8; lm90_select_remote_channel(data, index >= 3); - err = i2c_smbus_write_byte_data(client, regp->high, - data->temp11[index] >> 8); + err = lm90_write_reg(client, regp->high, data->temp11[index] >> 8); if (err < 0) return err; if (data->flags & LM90_HAVE_REM_LIMIT_EXT) - err = i2c_smbus_write_byte_data(client, regp->low, - data->temp11[index] & 0xff); + err = lm90_write_reg(client, regp->low, + data->temp11[index] & 0xff); lm90_select_remote_channel(data, 0); return err; @@ -1252,14 +1256,14 @@ static int lm90_get_temp8(struct lm90_data *data, int index) static int lm90_set_temp8(struct lm90_data *data, int index, long val) { static const u8 reg[TEMP8_REG_NUM] = { - LM90_REG_W_LOCAL_LOW, - LM90_REG_W_LOCAL_HIGH, - LM90_REG_W_LOCAL_CRIT, - LM90_REG_W_REMOTE_CRIT, - MAX6659_REG_W_LOCAL_EMERG, - MAX6659_REG_W_REMOTE_EMERG, - LM90_REG_W_REMOTE_CRIT, - MAX6659_REG_W_REMOTE_EMERG, + LM90_REG_LOCAL_LOW, + LM90_REG_LOCAL_HIGH, + LM90_REG_LOCAL_CRIT, + LM90_REG_REMOTE_CRIT, + MAX6659_REG_LOCAL_EMERG, + MAX6659_REG_REMOTE_EMERG, + LM90_REG_REMOTE_CRIT, + MAX6659_REG_REMOTE_EMERG, }; struct i2c_client *client = data->client; int err; @@ -1279,7 +1283,7 @@ static int lm90_set_temp8(struct lm90_data *data, int index, long val) data->temp8[index] = temp_to_s8(val); lm90_select_remote_channel(data, index >= 6); - err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]); + err = lm90_write_reg(client, reg[index], data->temp8[index]); lm90_select_remote_channel(data, 0); return err; @@ -1307,7 +1311,6 @@ static int lm90_set_temphyst(struct lm90_data *data, long val) { struct i2c_client *client = data->client; int temp; - int err; if (data->flags & LM90_HAVE_EXTENDED_TEMP) temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]); @@ -1320,9 +1323,7 @@ static int lm90_set_temphyst(struct lm90_data *data, long val) val = clamp_val(val, -128000l, 255000l); data->temp_hyst = hyst_to_reg(temp - val); - err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST, - data->temp_hyst); - return err; + return lm90_write_reg(client, LM90_REG_TCRIT_HYST, data->temp_hyst); } static const u8 lm90_temp_index[3] = { @@ -1630,15 +1631,15 @@ static int lm90_detect(struct i2c_client *client, return -ENODEV; /* detection and identification */ - man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID); - chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID); - config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1); - convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE); + man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); + chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); + config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); + convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0) return -ENODEV; if (man_id == 0x01 || man_id == 0x5C || man_id == 0xA1) { - config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2); + config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); if (config2 < 0) return -ENODEV; } @@ -1697,19 +1698,19 @@ static int lm90_detect(struct i2c_client *client, int emerg, emerg2, status2; /* - * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read - * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG + * We read MAX6659_REG_REMOTE_EMERG twice, and re-read + * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG * exists, both readings will reflect the same value. Otherwise, * the readings will be different. */ emerg = i2c_smbus_read_byte_data(client, - MAX6659_REG_R_REMOTE_EMERG); + MAX6659_REG_REMOTE_EMERG); man_id = i2c_smbus_read_byte_data(client, - LM90_REG_R_MAN_ID); + LM90_REG_MAN_ID); emerg2 = i2c_smbus_read_byte_data(client, - MAX6659_REG_R_REMOTE_EMERG); + MAX6659_REG_REMOTE_EMERG); status2 = i2c_smbus_read_byte_data(client, - MAX6696_REG_R_STATUS2); + MAX6696_REG_STATUS2); if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0) return -ENODEV; @@ -1820,7 +1821,7 @@ static int lm90_detect(struct i2c_client *client, int local_ext, conalert, chen, dfc; local_ext = i2c_smbus_read_byte_data(client, - TMP451_REG_R_LOCAL_TEMPL); + TMP451_REG_LOCAL_TEMPL); conalert = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT); chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN); @@ -1858,8 +1859,7 @@ static void lm90_restore_conf(void *_data) /* Restore initial configuration */ lm90_write_convrate(data, data->convrate_orig); - i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, - data->config_orig); + lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig); } static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) @@ -1867,7 +1867,7 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) struct device_node *np = client->dev.of_node; int config, convrate; - convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE); + convrate = lm90_read_reg(client, LM90_REG_CONVRATE); if (convrate < 0) return convrate; data->convrate_orig = convrate; @@ -1875,7 +1875,7 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) /* * Start the conversions. */ - config = lm90_read_reg(client, LM90_REG_R_CONFIG1); + config = lm90_read_reg(client, LM90_REG_CONFIG1); if (config < 0) return config; data->config_orig = config; From patchwork Wed May 25 13:57:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861216 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92409C433EF for ; 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Wed, 25 May 2022 06:58:15 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 08/40] hwmon: (lm90) Improve PEC support Date: Wed, 25 May 2022 06:57:26 -0700 Message-Id: <20220525135758.2944744-9-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org PEC (packet error checking) support for ADM1032 is currently only enabled if the chip was auto-detected, but not if a chip is instantiated explicitly. Always enable PEC support by introducing a chip feature flag indicating partial PEC support. Also, for consistency, disable PEC support by default to match existing functionality if the chip was not auto- detected. At the same time, introduce generic support for PEC with a separate feature flag. This will be used when support for chips with full PEC functionality is added. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 6 ++-- drivers/hwmon/lm90.c | 56 +++++++++++++++++++----------------- 2 files changed, 32 insertions(+), 30 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 05391fb4042d..f107d4a159fa 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -423,6 +423,6 @@ two transactions will typically mean twice as much delay waiting for transaction completion, effectively doubling the register cache refresh time. I guess reliability comes at a price, but it's quite expensive this time. -So, as not everyone might enjoy the slowdown, PEC can be disabled through -sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1 -to that file to enable PEC again. +So, as not everyone might enjoy the slowdown, PEC is disabled by default and +can be enabled through sysfs. Just write 1 to the "pec" file and PEC will be +enabled. Write 0 to that file to disable PEC again. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 995b27a248e6..8ba95ea06f0c 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -179,6 +179,8 @@ enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, #define LM90_PAUSE_FOR_CONFIG BIT(9) /* Pause conversion for config */ #define LM90_HAVE_CRIT BIT(10) /* Chip supports CRIT/OVERT register */ #define LM90_HAVE_CRIT_ALRM_SWP BIT(11) /* critical alarm bits swapped */ +#define LM90_HAVE_PEC BIT(12) /* Chip supports PEC */ +#define LM90_HAVE_PARTIAL_PEC BIT(13) /* Partial PEC support (adm1032)*/ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -346,7 +348,8 @@ struct lm90_params { static const struct lm90_params lm90_params[] = { [adm1032] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT + | LM90_HAVE_PARTIAL_PEC, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -519,10 +522,10 @@ struct lm90_data { */ /* - * The ADM1032 supports PEC but not on write byte transactions, so we need + * If the chip supports PEC but not on write byte transactions, we need * to explicitly ask for a transaction without PEC. */ -static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value) +static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value) { return i2c_smbus_xfer(client->adapter, client->addr, client->flags & ~I2C_CLIENT_PEC, @@ -531,22 +534,24 @@ static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value) /* * It is assumed that client->update_lock is held (unless we are in - * detection or initialization steps). This matters when PEC is enabled, - * because we don't want the address pointer to change between the write - * byte and the read byte transactions. + * detection or initialization steps). This matters when PEC is enabled + * for chips with partial PEC support, because we don't want the address + * pointer to change between the write byte and the read byte transactions. */ static int lm90_read_reg(struct i2c_client *client, u8 reg) { + struct lm90_data *data = i2c_get_clientdata(client); + bool partial_pec = (client->flags & I2C_CLIENT_PEC) && + (data->flags & LM90_HAVE_PARTIAL_PEC); int err; - if (client->flags & I2C_CLIENT_PEC) { - err = adm1032_write_byte(client, reg); - if (err >= 0) - err = i2c_smbus_read_byte(client); - } else - err = i2c_smbus_read_byte_data(client, reg); - - return err; + if (partial_pec) { + err = lm90_write_no_pec(client, reg); + if (err) + return err; + return i2c_smbus_read_byte(client); + } + return i2c_smbus_read_byte_data(client, reg); } /* @@ -1135,7 +1140,7 @@ static u16 temp_to_u16_adt7461(struct lm90_data *data, long val) return (val + 125) / 250 * 64; } -/* pec used for ADM1032 only */ +/* pec used for devices with PEC support */ static ssize_t pec_show(struct device *dev, struct device_attribute *dummy, char *buf) { @@ -1675,13 +1680,6 @@ static int lm90_detect(struct i2c_client *client, && (config1 & 0x3F) == 0x00 && convrate <= 0x0A) { name = "adm1032"; - /* - * The ADM1032 supports PEC, but only if combined - * transactions are not used. - */ - if (i2c_check_functionality(adapter, - I2C_FUNC_SMBUS_BYTE)) - info->flags |= I2C_CLIENT_PEC; } else if (chip_id == 0x51 /* ADT7461 */ && (config1 & 0x1B) == 0x00 @@ -2005,10 +2003,6 @@ static int lm90_probe(struct i2c_client *client) data->kind = (enum chips)of_device_get_match_data(&client->dev); else data->kind = i2c_match_id(lm90_id, client)->driver_data; - if (data->kind == adm1032) { - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) - client->flags &= ~I2C_CLIENT_PEC; - } /* * Different devices have different alarm bits triggering the @@ -2019,6 +2013,14 @@ static int lm90_probe(struct i2c_client *client) /* Set chip capabilities */ data->flags = lm90_params[data->kind].flags; + if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) && + !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC)) + data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC); + + if ((data->flags & LM90_HAVE_PARTIAL_PEC) && + !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE)) + data->flags &= ~LM90_HAVE_PARTIAL_PEC; + data->chip.ops = &lm90_ops; data->chip.info = data->info; @@ -2081,7 +2083,7 @@ static int lm90_probe(struct i2c_client *client) * The 'pec' attribute is attached to the i2c device and thus created * separately. */ - if (client->flags & I2C_CLIENT_PEC) { + if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) { err = device_create_file(dev, &dev_attr_pec); if (err) return err; From patchwork Wed May 25 13:57:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861218 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33688C4332F for ; Wed, 25 May 2022 13:58:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244561AbiEYN6b (ORCPT ); Wed, 25 May 2022 09:58:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51754 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244583AbiEYN6X (ORCPT ); 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Wed, 25 May 2022 06:58:17 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 09/40] hwmon: (lm90) Add partial PEC support for ADT7461 Date: Wed, 25 May 2022 06:57:27 -0700 Message-Id: <20220525135758.2944744-10-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Revision 0 of the ADT7461 datasheet suggests that the chip supports PEC (packet error checking). This information is gone in later versions of the datasheet. Experiments show that PEC support on ADT7461 is similar to PEC support in ADM1032, ie it is only supported for read operations. Add support for it to the driver. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 1 + drivers/hwmon/lm90.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index f107d4a159fa..9886a298797f 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -322,6 +322,7 @@ ADM1032: ADT7461, ADT7461A, NCT1008: * Extended temperature range (breaks compatibility) * Lower resolution for remote temperature + * SMBus PEC support for Write Byte and Receive Byte transactions. MAX6654: * Better local resolution diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 8ba95ea06f0c..6c79422da420 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -356,7 +356,7 @@ static const struct lm90_params lm90_params[] = { [adt7461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP - | LM90_HAVE_CRIT, + | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC, .alert_alarms = 0x7c, .max_convrate = 10, }, From patchwork Wed May 25 13:57:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861220 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1323CC433F5 for ; Wed, 25 May 2022 13:58:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240104AbiEYN6k (ORCPT ); Wed, 25 May 2022 09:58:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244593AbiEYN6Z (ORCPT ); Wed, 25 May 2022 09:58:25 -0400 Received: from mail-oi1-x236.google.com (mail-oi1-x236.google.com [IPv6:2607:f8b0:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1845A5AAA; Wed, 25 May 2022 06:58:20 -0700 (PDT) Received: by mail-oi1-x236.google.com with SMTP id s188so21303700oie.4; Wed, 25 May 2022 06:58:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jigbfHjeWyfJMFDadivDFBM9ghLPytg75FdeUbqDCFM=; b=haPiKRgAPRV2kPqf36uQ41Cf/CSFZgrvVIocRjfnxXFj9i4Ub9ndrmXuxZjKyb6Lsu 1efUQtFDkAXL3n6ExhCeDNqxTwbDZOQz8mJO+gHsVtDudp1TRkmo5cqfcB41Qapyo7SW bn8gC5yZEgX2RaL/SGQ+7O1EYlAFq2Bmzqf8lZI6NDwggTYPzrDjYAk3TyGziEXWppDR NrrlTkBkhSZhiO/vZ5+z3tie6H/QeLNZk2pr5o8uNTeio1reGGP3rB5bl+BgL/TBmkM3 g/47V21840YxNm4wd4ZH6u8H1Qc4qYfu81HHahKyUyjc91IepVQmWnkVYg8r82fiUmOO 4Bdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=jigbfHjeWyfJMFDadivDFBM9ghLPytg75FdeUbqDCFM=; b=WU48DWAMsZ6Y61rgqw2dBTvG9QOzTD+eWtTDQH83RVSZiOVLXnusELjmrryirOtUsG kxbkHSlQ8DlTpmxgRRr8T3TZwBkQNPoOe3PHa6KxXR/9RIXZO31rNvSgjQabQKJ7gCzU Y2K5dNUR8YjCh0PRipqr0h+5oWNvqWbaAJuAarBYq7BmPqEfu7HcpIUQqirGygZxyZZp N9oqXOvPV2wgoqeKX1/LNOvF34sUO6MlV1t6TYhAg9Q2S2IsPvjN4LOJwfeER1omrNCT 5vbGN5FQLz7nD0kWBvo0UoWoe4uKs5aRO1SpRZDA01fM+M9tcKtofV3A1+0VrGYKdM8l sPfw== X-Gm-Message-State: AOAM533u9dMl0T5Wjp4TPeKrx1uwzjxb4KZdsVJ6XzBbYt48Oz22otsn yrSALsXi1lxpCTTPhH/lem2MfAAKQ1Qo6w== X-Google-Smtp-Source: ABdhPJzolhQsMlfgb+N6N2oEz/uyT8sIiBibp/lNR4DcI7IL/glhO6W4c8fk9ddkreOwK0+K0YB5wQ== X-Received: by 2002:a05:6808:1285:b0:32b:91f2:248a with SMTP id a5-20020a056808128500b0032b91f2248amr2961019oiw.155.1653487100187; Wed, 25 May 2022 06:58:20 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id y2-20020a056870e50200b000e686d13890sm5918445oag.42.2022.05.25.06.58.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:19 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 10/40] hwmon: (lm90) Enable full PEC support for ADT7461A Date: Wed, 25 May 2022 06:57:28 -0700 Message-Id: <20220525135758.2944744-11-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Experiments show that ADT7461A and NCT1008 support PEC, even though it is not documented. Enable support for it in the driver. Since ADT7461 only supports partial PEC, this means that the configuration for ADT7461A needs to be separated from ADT7461. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 6c79422da420..42e72702b9a9 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -114,7 +114,7 @@ static const unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, +enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, max6646, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -207,7 +207,7 @@ enum chips { adm1032, adt7461, g781, lm86, lm90, lm99, static const struct i2c_device_id lm90_id[] = { { "adm1032", adm1032 }, { "adt7461", adt7461 }, - { "adt7461a", adt7461 }, + { "adt7461a", adt7461a }, { "g781", g781 }, { "lm90", lm90 }, { "lm86", lm86 }, @@ -224,7 +224,7 @@ static const struct i2c_device_id lm90_id[] = { { "max6681", max6680 }, { "max6695", max6696 }, { "max6696", max6696 }, - { "nct1008", adt7461 }, + { "nct1008", adt7461a }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, { "tmp451", tmp451 }, @@ -244,7 +244,7 @@ static const struct of_device_id __maybe_unused lm90_of_match[] = { }, { .compatible = "adi,adt7461a", - .data = (void *)adt7461 + .data = (void *)adt7461a }, { .compatible = "gmt,g781", @@ -312,7 +312,7 @@ static const struct of_device_id __maybe_unused lm90_of_match[] = { }, { .compatible = "onnn,nct1008", - .data = (void *)adt7461 + .data = (void *)adt7461a }, { .compatible = "winbond,w83l771", @@ -360,6 +360,13 @@ static const struct lm90_params lm90_params[] = { .alert_alarms = 0x7c, .max_convrate = 10, }, + [adt7461a] = { + .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP + | LM90_HAVE_CRIT | LM90_HAVE_PEC, + .alert_alarms = 0x7c, + .max_convrate = 10, + }, [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT, From patchwork Wed May 25 13:57:29 2022 Content-Type: text/plain; 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Wed, 25 May 2022 06:58:23 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id o9-20020a4ad149000000b0035eb4e5a6b2sm6551198oor.8.2022.05.25.06.58.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:22 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 11/40] hwmon: (lm90) Add support for unsigned and signed temperatures Date: Wed, 25 May 2022 06:57:29 -0700 Message-Id: <20220525135758.2944744-12-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org ADT7461 and TMP451 temperature sensors support extended temperature ranges. If standard temperature range is selected, the temperature range is unsigned and limited to 0 .. 127 degrees C. For TMP461, the standard temperature range is -128000 ... 127000 degrees C. Distinguish between the two chips by introducing a feature flag indicating if the standard temperature range is signed or unsigned. Use the same flag for MAX6646/ MAX6647 as well since those chips also support unsigned temperatures. Note that while the datasheet for ADT7461 suggests that the default temperature range is unsigned, tests with a real chip suggest that this is not the case: If the temperature offset is set to a value << 0, the temperature register does report negative values. Tests with real chips show that MAX6680/MAX6681 and SA56004 report temperatures of 128 degrees C and higher as negative temperatures. Add respective comments to the code. Also use clamp_val() and DIV_ROUND_CLOSEST where appropriate in calculations. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 70 ++++++++++++++++++++++++++------------------ 1 file changed, 42 insertions(+), 28 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 42e72702b9a9..acb9ca3b99b0 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -170,6 +170,7 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define LM90_FLAG_ADT7461_EXT BIT(0) /* ADT7461 extended mode */ /* Device features */ #define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ +#define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */ #define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */ #define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */ #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */ @@ -354,6 +355,11 @@ static const struct lm90_params lm90_params[] = { .max_convrate = 10, }, [adt7461] = { + /* + * Standard temperature range is supposed to be unsigned, + * but that does not match reality. Negative temperatures + * are always reported. + */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC, @@ -392,7 +398,8 @@ static const struct lm90_params lm90_params[] = { .max_convrate = 9, }, [max6646] = { - .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT, + .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT + | LM90_HAVE_UNSIGNED_TEMP, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -416,6 +423,11 @@ static const struct lm90_params lm90_params[] = { .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6680] = { + /* + * Apparent temperatures of 128 degrees C or higher are reported + * and treated as negative temperatures (meaning min_alarm will + * be set). + */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT, .alert_alarms = 0x7c, @@ -434,6 +446,11 @@ static const struct lm90_params lm90_params[] = { .max_convrate = 8, }, [sa56004] = { + /* + * Apparent temperatures of 128 degrees C or higher are reported + * and treated as negative temperatures (meaning min_alarm will + * be set). + */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT, .alert_alarms = 0x7b, .max_convrate = 9, @@ -441,7 +458,8 @@ static const struct lm90_params lm90_params[] = { }, [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT + | LM90_HAVE_UNSIGNED_TEMP, .alert_alarms = 0x7c, .max_convrate = 9, .reg_local_ext = TMP451_REG_LOCAL_TEMPL, @@ -1118,33 +1136,27 @@ static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val) static u8 temp_to_u8_adt7461(struct lm90_data *data, long val) { if (data->flags & LM90_FLAG_ADT7461_EXT) { - if (val <= -64000) - return 0; - if (val >= 191000) - return 0xFF; - return (val + 500 + 64000) / 1000; + val = clamp_val(val, -64000, 191000); + val += 64000; + } else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) { + val = clamp_val(val, 0, 127000); + } else { + val = clamp_val(val, -128000, 127000); } - if (val <= 0) - return 0; - if (val >= 127000) - return 127; - return (val + 500) / 1000; + return DIV_ROUND_CLOSEST(val, 1000); } static u16 temp_to_u16_adt7461(struct lm90_data *data, long val) { if (data->flags & LM90_FLAG_ADT7461_EXT) { - if (val <= -64000) - return 0; - if (val >= 191750) - return 0xFFC0; - return (val + 64000 + 125) / 250 * 64; + val = clamp_val(val, -64000, 191000); + val += 64000; + } else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) { + val = clamp_val(val, 0, 127000); + } else { + val = clamp_val(val, -128000, 127000); } - if (val <= 0) - return 0; - if (val >= 127750) - return 0x7FC0; - return (val + 125) / 250 * 64; + return DIV_ROUND_CLOSEST(val, 1000) & 0xfff0; } /* pec used for devices with PEC support */ @@ -1190,7 +1202,7 @@ static int lm90_get_temp11(struct lm90_data *data, int index) if (data->flags & LM90_HAVE_EXTENDED_TEMP) temp = temp_from_u16_adt7461(data, temp11); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) temp = temp_from_u16(temp11); else temp = temp_from_s16(temp11); @@ -1227,7 +1239,7 @@ static int lm90_set_temp11(struct lm90_data *data, int index, long val) if (data->flags & LM90_HAVE_EXTENDED_TEMP) data->temp11[index] = temp_to_u16_adt7461(data, val); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) data->temp11[index] = temp_to_u8(val) << 8; else if (data->flags & LM90_HAVE_REM_LIMIT_EXT) data->temp11[index] = temp_to_s16(val); @@ -1253,7 +1265,7 @@ static int lm90_get_temp8(struct lm90_data *data, int index) if (data->flags & LM90_HAVE_EXTENDED_TEMP) temp = temp_from_u8_adt7461(data, temp8); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) temp = temp_from_u8(temp8); else temp = temp_from_s8(temp8); @@ -1289,7 +1301,7 @@ static int lm90_set_temp8(struct lm90_data *data, int index, long val) if (data->flags & LM90_HAVE_EXTENDED_TEMP) data->temp8[index] = temp_to_u8_adt7461(data, val); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) data->temp8[index] = temp_to_u8(val); else data->temp8[index] = temp_to_s8(val); @@ -1307,7 +1319,7 @@ static int lm90_get_temphyst(struct lm90_data *data, int index) if (data->flags & LM90_HAVE_EXTENDED_TEMP) temp = temp_from_u8_adt7461(data, data->temp8[index]); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) temp = temp_from_u8(data->temp8[index]); else temp = temp_from_s8(data->temp8[index]); @@ -1326,7 +1338,7 @@ static int lm90_set_temphyst(struct lm90_data *data, long val) if (data->flags & LM90_HAVE_EXTENDED_TEMP) temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]); - else if (data->kind == max6646) + else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) temp = temp_from_u8(data->temp8[LOCAL_CRIT]); else temp = temp_from_s8(data->temp8[LOCAL_CRIT]); @@ -1901,6 +1913,8 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) * Put MAX6680/MAX8881 into extended resolution (bit 0x10, * 0.125 degree resolution) and range (0x08, extend range * to -64 degree) mode for the remote temperature sensor. + * Note that expeciments with an actual chip do not show a difference + * if bit 3 is set or not. */ if (data->kind == max6680) config |= 0x18; From patchwork Wed May 25 13:57:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861222 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69CF3C433FE for ; Wed, 25 May 2022 13:58:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244588AbiEYN6n (ORCPT ); Wed, 25 May 2022 09:58:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244579AbiEYN63 (ORCPT ); Wed, 25 May 2022 09:58:29 -0400 Received: from mail-oi1-x231.google.com (mail-oi1-x231.google.com [IPv6:2607:f8b0:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9311AB0D0; Wed, 25 May 2022 06:58:25 -0700 (PDT) Received: by mail-oi1-x231.google.com with SMTP id k186so4103819oia.2; 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Wed, 25 May 2022 06:58:24 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id t17-20020a056870601100b000f2ba94877esm895753oaa.44.2022.05.25.06.58.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:24 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 12/40] hwmon: (lm90) Only re-read registers if volatile Date: Wed, 25 May 2022 06:57:30 -0700 Message-Id: <20220525135758.2944744-13-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org When reading 16-bit volatile registers, the code uses a trick to determine if a temperature is consistent: It reads the high part of the register twice. If the values are the same, the code assumes that the reading is consistent. If the value differs, the code re-reads the second register as well and assumes that it now has correct values. This is only necessary for volatile registers. Add a parameter to lm90_read16() to indicate if the register is volatile to avoid the extra overhead for non-volatile registers. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 41 +++++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index acb9ca3b99b0..b20be0cb28b5 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -602,29 +602,34 @@ static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val) return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val); } -static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl) +static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl, + bool is_volatile) { int oldh, newh, l; - /* - * There is a trick here. We have to read two registers to have the - * sensor temperature, but we have to beware a conversion could occur - * between the readings. The datasheet says we should either use - * the one-shot conversion register, which we don't want to do - * (disables hardware monitoring) or monitor the busy bit, which is - * impossible (we can't read the values and monitor that bit at the - * exact same time). So the solution used here is to read the high - * byte once, then the low byte, then the high byte again. If the new - * high byte matches the old one, then we have a valid reading. Else - * we have to read the low byte again, and now we believe we have a - * correct reading. - */ oldh = lm90_read_reg(client, regh); if (oldh < 0) return oldh; l = lm90_read_reg(client, regl); if (l < 0) return l; + + if (!is_volatile) + return (oldh << 8) | l; + + /* + * For volatile registers we have to use a trick. + * We have to read two registers to have the sensor temperature, + * but we have to beware a conversion could occur between the + * readings. The datasheet says we should either use + * the one-shot conversion register, which we don't want to do + * (disables hardware monitoring) or monitor the busy bit, which is + * impossible (we can't read the values and monitor that bit at the + * exact same time). So the solution used here is to read the high + * the high byte again. If the new high byte matches the old one, + * then we have a valid reading. Otherwise we have to read the low + * byte again, and now we believe we have a correct reading. + */ newh = lm90_read_reg(client, regh); if (newh < 0) return newh; @@ -766,7 +771,7 @@ static int lm90_update_limits(struct device *dev) if (data->flags & LM90_HAVE_OFFSET) { val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, - LM90_REG_REMOTE_OFFSL); + LM90_REG_REMOTE_OFFSL, false); if (val < 0) return val; data->temp11[REMOTE_OFFSET] = val; @@ -999,7 +1004,7 @@ static int lm90_update_device(struct device *dev) if (data->reg_local_ext) { val = lm90_read16(client, LM90_REG_LOCAL_TEMP, - data->reg_local_ext); + data->reg_local_ext, true); if (val < 0) return val; data->temp11[LOCAL_TEMP] = val; @@ -1010,7 +1015,7 @@ static int lm90_update_device(struct device *dev) data->temp11[LOCAL_TEMP] = val << 8; } val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, - LM90_REG_REMOTE_TEMPL); + LM90_REG_REMOTE_TEMPL, true); if (val < 0) return val; data->temp11[REMOTE_TEMP] = val; @@ -1021,7 +1026,7 @@ static int lm90_update_device(struct device *dev) return val; val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, - LM90_REG_REMOTE_TEMPL); + LM90_REG_REMOTE_TEMPL, true); if (val < 0) { lm90_select_remote_channel(data, 0); return val; From patchwork Wed May 25 13:57:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861223 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AC685C433FE for ; Wed, 25 May 2022 13:58:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244627AbiEYN6s (ORCPT ); Wed, 25 May 2022 09:58:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244532AbiEYN6b (ORCPT ); Wed, 25 May 2022 09:58:31 -0400 Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12093AB0E6; Wed, 25 May 2022 06:58:28 -0700 (PDT) Received: by mail-oa1-x36.google.com with SMTP id 586e51a60fabf-f2ccb58ee0so515626fac.1; Wed, 25 May 2022 06:58:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=i5WSZHcHSK9HjSsM6PIOIMSfiTkXVCgmkwZNulqpINw=; b=ISelWC3ACLOjCQ+/qrSbD+jVrXFptyhcF/ZnQExhUiiIE8Fm3KFi/jqAQxM4P8uqPo Yu4Bn8ZC+HWBX+RDTmH1WkC/w8RVZ/cPbllq5tgH4R7VP3fN6enWI2D73bCxugtKnKWb RGuCi/JXC9XYeOccwYklWWwq4PZXtfjY8+JAI4Wfab3ZLi6TsaYHCd7O81veFGNT9sCW Mo1nhRppZ7/BCzXcGb85CbK2YbNXC+TB14N48SyF9FbpGMUEexSNmPjt8qZ/9hYmXDcj Kc/8PLtYRuitP+mVCAKq1Zr56ci6/2Zsqg7gx06UKcJnfcMlGIx3eVN65nQWQZ3WsQqV hMZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=i5WSZHcHSK9HjSsM6PIOIMSfiTkXVCgmkwZNulqpINw=; b=gRAIf/WiBB25+WchHC0nRt0ReF+sqvL2N6p0oMnrnZK+MnyIVOqElTjEYcQdmUL7Di KvD7H1UUfEjpEAeMQMy8rDOgz58I21SZHouWZ/ohgKZ0wEgcdrLiL0jnB6G4U6652WVs d1JiNMrYFOVvUwFra2HK1b5eyM+H2HScurIDdFUOeLbdL1vGhv4sj31E9dIlzy/DVbJl +8TKojQ8AEYeMcH+WEPPLT140t/52z+tpMS2Qe6bh93T8B5DFhOB0iRKGEcxEOWFZMko P03JKMy6I6JLr6PEGlXBfZ+bR3YfrU1THdw+1hMXAkjH563Kk32NYpJc+mS5i7HTYE3u p58w== X-Gm-Message-State: AOAM532UrOwR28Lnzxk2Ulmwm8XTH5RRY0I1CgiPPMOgRn+V4SZt0Vbz 1wijRWVjyTeW+aQJ22RiX7azWeucv41SCw== X-Google-Smtp-Source: ABdhPJxb8AnU9ZPYtYN9XaY5s5fAFQRx3BqPopiTOJRl/b+HKA5awAfRkwuivkr4akpSuB7lAm1HBA== X-Received: by 2002:a05:6870:f683:b0:f2:cc34:452a with SMTP id el3-20020a056870f68300b000f2cc34452amr603777oab.216.1653487106855; Wed, 25 May 2022 06:58:26 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id s22-20020a056870e6d600b000e686d13895sm5979999oak.47.2022.05.25.06.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:26 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 13/40] hwmon: (lm90) Support multiple temperature resolutions Date: Wed, 25 May 2022 06:57:31 -0700 Message-Id: <20220525135758.2944744-14-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org While most LM90 compatible chips support a temperature sensor resolution of 11 bit, this is not the case for all chips. ADT7461 only supports a resolution of 10 bit, and TMP451/TMP461 support a resolution of 12 bit. Add support for various temperature sensor resolutions. To do this, model all temperature sensors as 16 bit sensors, and use unified temperature conversion functions which take the sensor resolution as parameter. While enhancing functionality, this has the positive side effect of reducing code size by about 5%. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 450 +++++++++++++++---------------------------- 1 file changed, 153 insertions(+), 297 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index b20be0cb28b5..8e5f791aca07 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -343,6 +343,7 @@ struct lm90_params { u16 alert_alarms; /* Which alarm bits trigger ALERT# */ /* Upper 8 bits for max6695/96 */ u8 max_convrate; /* Maximum conversion rate register value */ + u8 resolution; /* 16-bit resolution (default 11 bit) */ u8 reg_local_ext; /* Extended local temp register (optional) */ }; @@ -365,6 +366,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC, .alert_alarms = 0x7c, .max_convrate = 10, + .resolution = 10, }, [adt7461a] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT @@ -462,6 +464,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_UNSIGNED_TEMP, .alert_alarms = 0x7c, .max_convrate = 9, + .resolution = 12, .reg_local_ext = TMP451_REG_LOCAL_TEMPL, }, [tmp461] = { @@ -469,14 +472,15 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT, .alert_alarms = 0x7c, .max_convrate = 9, + .resolution = 12, .reg_local_ext = TMP451_REG_LOCAL_TEMPL, }, }; /* - * TEMP8 register index + * temperature register index */ -enum lm90_temp8_reg_index { +enum lm90_temp_reg_index { LOCAL_LOW = 0, LOCAL_HIGH, LOCAL_CRIT, @@ -485,14 +489,8 @@ enum lm90_temp8_reg_index { REMOTE_EMERG, /* max6659 and max6695/96 */ REMOTE2_CRIT, /* max6695/96 only */ REMOTE2_EMERG, /* max6695/96 only */ - TEMP8_REG_NUM -}; -/* - * TEMP11 register index - */ -enum lm90_temp11_reg_index { - REMOTE_TEMP = 0, + REMOTE_TEMP, REMOTE_LOW, REMOTE_HIGH, REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */ @@ -500,7 +498,8 @@ enum lm90_temp11_reg_index { REMOTE2_TEMP, /* max6695/96 only */ REMOTE2_LOW, /* max6695/96 only */ REMOTE2_HIGH, /* max6695/96 only */ - TEMP11_REG_NUM + + TEMP_REG_NUM }; /* @@ -528,14 +527,14 @@ struct lm90_data { u8 config; /* Current configuration register value */ u8 config_orig; /* Original configuration register value */ u8 convrate_orig; /* Original conversion rate register value */ + u8 resolution; /* temperature resolution in bit */ u16 alert_alarms; /* Which alarm bits trigger ALERT# */ /* Upper 8 bits for max6695/96 */ u8 max_convrate; /* Maximum conversion rate */ u8 reg_local_ext; /* local extension register offset */ /* registers values */ - s8 temp8[TEMP8_REG_NUM]; - s16 temp11[TEMP11_REG_NUM]; + u16 temp[TEMP_REG_NUM]; u8 temp_hyst; u16 reported_alarms; /* alarms reported as sysfs/udev events */ u16 current_alarms; /* current alarms, reported by chip */ @@ -732,12 +731,12 @@ static int lm90_update_limits(struct device *dev) val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT); if (val < 0) return val; - data->temp8[LOCAL_CRIT] = val; + data->temp[LOCAL_CRIT] = val << 8; val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); if (val < 0) return val; - data->temp8[REMOTE_CRIT] = val; + data->temp[REMOTE_CRIT] = val << 8; val = lm90_read_reg(client, LM90_REG_TCRIT_HYST); if (val < 0) @@ -748,25 +747,25 @@ static int lm90_update_limits(struct device *dev) val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); if (val < 0) return val; - data->temp11[REMOTE_LOW] = val << 8; + data->temp[REMOTE_LOW] = val << 8; if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { val = lm90_read_reg(client, LM90_REG_REMOTE_LOWL); if (val < 0) return val; - data->temp11[REMOTE_LOW] |= val; + data->temp[REMOTE_LOW] |= val; } val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); if (val < 0) return val; - data->temp11[REMOTE_HIGH] = val << 8; + data->temp[REMOTE_HIGH] = val << 8; if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHL); if (val < 0) return val; - data->temp11[REMOTE_HIGH] |= val; + data->temp[REMOTE_HIGH] |= val; } if (data->flags & LM90_HAVE_OFFSET) { @@ -774,19 +773,19 @@ static int lm90_update_limits(struct device *dev) LM90_REG_REMOTE_OFFSL, false); if (val < 0) return val; - data->temp11[REMOTE_OFFSET] = val; + data->temp[REMOTE_OFFSET] = val; } if (data->flags & LM90_HAVE_EMERGENCY) { val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG); if (val < 0) return val; - data->temp8[LOCAL_EMERG] = val; + data->temp[LOCAL_EMERG] = val << 8; val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); if (val < 0) return val; - data->temp8[REMOTE_EMERG] = val; + data->temp[REMOTE_EMERG] = val << 8; } if (data->kind == max6696) { @@ -797,22 +796,22 @@ static int lm90_update_limits(struct device *dev) val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT); if (val < 0) return val; - data->temp8[REMOTE2_CRIT] = val; + data->temp[REMOTE2_CRIT] = val << 8; val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); if (val < 0) return val; - data->temp8[REMOTE2_EMERG] = val; + data->temp[REMOTE2_EMERG] = val << 8; val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); if (val < 0) return val; - data->temp11[REMOTE2_LOW] = val << 8; + data->temp[REMOTE2_LOW] = val << 8; val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); if (val < 0) return val; - data->temp11[REMOTE2_HIGH] = val << 8; + data->temp[REMOTE2_HIGH] = val << 8; lm90_select_remote_channel(data, 0); } @@ -995,30 +994,30 @@ static int lm90_update_device(struct device *dev) val = lm90_read_reg(client, LM90_REG_LOCAL_LOW); if (val < 0) return val; - data->temp8[LOCAL_LOW] = val; + data->temp[LOCAL_LOW] = val << 8; val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH); if (val < 0) return val; - data->temp8[LOCAL_HIGH] = val; + data->temp[LOCAL_HIGH] = val << 8; if (data->reg_local_ext) { val = lm90_read16(client, LM90_REG_LOCAL_TEMP, data->reg_local_ext, true); if (val < 0) return val; - data->temp11[LOCAL_TEMP] = val; + data->temp[LOCAL_TEMP] = val; } else { val = lm90_read_reg(client, LM90_REG_LOCAL_TEMP); if (val < 0) return val; - data->temp11[LOCAL_TEMP] = val << 8; + data->temp[LOCAL_TEMP] = val << 8; } val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_TEMPL, true); if (val < 0) return val; - data->temp11[REMOTE_TEMP] = val; + data->temp[REMOTE_TEMP] = val; if (data->kind == max6696) { val = lm90_select_remote_channel(data, 1); @@ -1031,7 +1030,7 @@ static int lm90_update_device(struct device *dev) lm90_select_remote_channel(data, 0); return val; } - data->temp11[REMOTE2_TEMP] = val; + data->temp[REMOTE2_TEMP] = val; lm90_select_remote_channel(data, 0); } @@ -1047,123 +1046,6 @@ static int lm90_update_device(struct device *dev) return 0; } -/* - * Conversions - * For local temperatures and limits, critical limits and the hysteresis - * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius. - * For remote temperatures and limits, it uses signed 11-bit values with - * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some - * Maxim chips use unsigned values. - */ - -static inline int temp_from_s8(s8 val) -{ - return val * 1000; -} - -static inline int temp_from_u8(u8 val) -{ - return val * 1000; -} - -static inline int temp_from_s16(s16 val) -{ - return val / 32 * 125; -} - -static inline int temp_from_u16(u16 val) -{ - return val / 32 * 125; -} - -static s8 temp_to_s8(long val) -{ - if (val <= -128000) - return -128; - if (val >= 127000) - return 127; - if (val < 0) - return (val - 500) / 1000; - return (val + 500) / 1000; -} - -static u8 temp_to_u8(long val) -{ - if (val <= 0) - return 0; - if (val >= 255000) - return 255; - return (val + 500) / 1000; -} - -static s16 temp_to_s16(long val) -{ - if (val <= -128000) - return 0x8000; - if (val >= 127875) - return 0x7FE0; - if (val < 0) - return (val - 62) / 125 * 32; - return (val + 62) / 125 * 32; -} - -static u8 hyst_to_reg(long val) -{ - if (val <= 0) - return 0; - if (val >= 30500) - return 31; - return (val + 500) / 1000; -} - -/* - * ADT7461 in compatibility mode is almost identical to LM90 except that - * attempts to write values that are outside the range 0 < temp < 127 are - * treated as the boundary value. - * - * ADT7461 in "extended mode" operation uses unsigned integers offset by - * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC. - */ -static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val) -{ - if (data->flags & LM90_FLAG_ADT7461_EXT) - return (val - 64) * 1000; - return temp_from_s8(val); -} - -static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val) -{ - if (data->flags & LM90_FLAG_ADT7461_EXT) - return (val - 0x4000) / 64 * 250; - return temp_from_s16(val); -} - -static u8 temp_to_u8_adt7461(struct lm90_data *data, long val) -{ - if (data->flags & LM90_FLAG_ADT7461_EXT) { - val = clamp_val(val, -64000, 191000); - val += 64000; - } else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) { - val = clamp_val(val, 0, 127000); - } else { - val = clamp_val(val, -128000, 127000); - } - return DIV_ROUND_CLOSEST(val, 1000); -} - -static u16 temp_to_u16_adt7461(struct lm90_data *data, long val) -{ - if (data->flags & LM90_FLAG_ADT7461_EXT) { - val = clamp_val(val, -64000, 191000); - val += 64000; - } else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) { - val = clamp_val(val, 0, 127000); - } else { - val = clamp_val(val, -128000, 127000); - } - return DIV_ROUND_CLOSEST(val, 1000) & 0xfff0; -} - /* pec used for devices with PEC support */ static ssize_t pec_show(struct device *dev, struct device_attribute *dummy, char *buf) @@ -1200,159 +1082,141 @@ static ssize_t pec_store(struct device *dev, struct device_attribute *dummy, static DEVICE_ATTR_RW(pec); -static int lm90_get_temp11(struct lm90_data *data, int index) +static int lm90_temp_get_resolution(struct lm90_data *data, int index) { - s16 temp11 = data->temp11[index]; - int temp; - - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - temp = temp_from_u16_adt7461(data, temp11); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - temp = temp_from_u16(temp11); - else - temp = temp_from_s16(temp11); - - /* +16 degrees offset for temp2 for the LM99 */ - if (data->kind == lm99 && index <= 2) - temp += 16000; - - return temp; + switch (index) { + case REMOTE_TEMP: + case REMOTE_OFFSET: + case REMOTE2_TEMP: + return data->resolution; + case LOCAL_TEMP: + if (data->reg_local_ext) + return data->resolution; + return 8; + case REMOTE_LOW: + case REMOTE_HIGH: + case REMOTE2_LOW: + case REMOTE2_HIGH: + if (data->flags & LM90_HAVE_REM_LIMIT_EXT) + return data->resolution; + return 8; + default: + return 8; + } } -static int lm90_set_temp11(struct lm90_data *data, int index, long val) +static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution) { - static struct reg { - u8 high; - u8 low; - } reg[] = { - [REMOTE_LOW] = { LM90_REG_REMOTE_LOWH, LM90_REG_REMOTE_LOWL }, - [REMOTE_HIGH] = { LM90_REG_REMOTE_HIGHH, LM90_REG_REMOTE_HIGHL }, - [REMOTE_OFFSET] = { LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL }, - [REMOTE2_LOW] = { LM90_REG_REMOTE_LOWH, LM90_REG_REMOTE_LOWL }, - [REMOTE2_HIGH] = { LM90_REG_REMOTE_HIGHH, LM90_REG_REMOTE_HIGHL } - }; - struct i2c_client *client = data->client; - struct reg *regp = ®[index]; - int err; - - /* +16 degrees offset for temp2 for the LM99 */ - if (data->kind == lm99 && index <= 2) { - /* prevent integer underflow */ - val = max(val, -128000l); - val -= 16000; - } + int val; - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - data->temp11[index] = temp_to_u16_adt7461(data, val); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - data->temp11[index] = temp_to_u8(val) << 8; - else if (data->flags & LM90_HAVE_REM_LIMIT_EXT) - data->temp11[index] = temp_to_s16(val); + if (flags & LM90_FLAG_ADT7461_EXT) + val = regval - 0x4000; + else if (flags & LM90_HAVE_UNSIGNED_TEMP) + val = regval; else - data->temp11[index] = temp_to_s8(val) << 8; - - lm90_select_remote_channel(data, index >= 3); - err = lm90_write_reg(client, regp->high, data->temp11[index] >> 8); - if (err < 0) - return err; - if (data->flags & LM90_HAVE_REM_LIMIT_EXT) - err = lm90_write_reg(client, regp->low, - data->temp11[index] & 0xff); + val = (s16)regval; - lm90_select_remote_channel(data, 0); - return err; + return ((val >> (16 - resolution)) * 1000) >> (resolution - 8); } -static int lm90_get_temp8(struct lm90_data *data, int index) +static int lm90_get_temp(struct lm90_data *data, int index, int channel) { - s8 temp8 = data->temp8[index]; - int temp; - - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - temp = temp_from_u8_adt7461(data, temp8); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - temp = temp_from_u8(temp8); - else - temp = temp_from_s8(temp8); + int temp = lm90_temp_from_reg(data->flags, data->temp[index], + lm90_temp_get_resolution(data, index)); - /* +16 degrees offset for temp2 for the LM99 */ - if (data->kind == lm99 && index == 3) + /* +16 degrees offset for remote temperature on LM99 */ + if (data->kind == lm99 && channel) temp += 16000; return temp; } -static int lm90_set_temp8(struct lm90_data *data, int index, long val) +static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution) { - static const u8 reg[TEMP8_REG_NUM] = { - LM90_REG_LOCAL_LOW, - LM90_REG_LOCAL_HIGH, - LM90_REG_LOCAL_CRIT, - LM90_REG_REMOTE_CRIT, - MAX6659_REG_LOCAL_EMERG, - MAX6659_REG_REMOTE_EMERG, - LM90_REG_REMOTE_CRIT, - MAX6659_REG_REMOTE_EMERG, + int fraction = resolution > 8 ? + 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0; + + if (flags & LM90_FLAG_ADT7461_EXT) { + val = clamp_val(val, -64000, 191000 + fraction); + val += 64000; + } else if (flags & LM90_HAVE_UNSIGNED_TEMP) { + val = clamp_val(val, 0, 127000 + fraction); + } else { + val = clamp_val(val, -128000, 127000 + fraction); + } + + return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution); +} + +static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val) +{ + static const u8 regs[] = { + [LOCAL_LOW] = LM90_REG_LOCAL_LOW, + [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH, + [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT, + [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT, + [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG, + [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG, + [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT, + [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG, + [REMOTE_LOW] = LM90_REG_REMOTE_LOWH, + [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH, + [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH, + [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH, }; struct i2c_client *client = data->client; + u8 regh = regs[index]; + u8 regl = 0; int err; - /* +16 degrees offset for temp2 for the LM99 */ - if (data->kind == lm99 && index == 3) { + if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) { + if (index == REMOTE_LOW || index == REMOTE2_LOW) + regl = LM90_REG_REMOTE_LOWL; + else if (index == REMOTE_HIGH || index == REMOTE2_HIGH) + regl = LM90_REG_REMOTE_HIGHL; + } + + /* +16 degrees offset for remote temperature on LM99 */ + if (data->kind == lm99 && channel) { /* prevent integer underflow */ val = max(val, -128000l); val -= 16000; } - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - data->temp8[index] = temp_to_u8_adt7461(data, val); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - data->temp8[index] = temp_to_u8(val); - else - data->temp8[index] = temp_to_s8(val); + data->temp[index] = lm90_temp_to_reg(data->flags, val, + lm90_temp_get_resolution(data, index)); - lm90_select_remote_channel(data, index >= 6); - err = lm90_write_reg(client, reg[index], data->temp8[index]); - lm90_select_remote_channel(data, 0); + if (channel > 1) + lm90_select_remote_channel(data, 1); + + err = lm90_write_reg(client, regh, data->temp[index] >> 8); + if (err < 0) + goto deselect; + if (regl) + err = lm90_write_reg(client, regl, data->temp[index] & 0xff); +deselect: + if (channel > 1) + lm90_select_remote_channel(data, 0); return err; } -static int lm90_get_temphyst(struct lm90_data *data, int index) +static int lm90_get_temphyst(struct lm90_data *data, int index, int channel) { - int temp; - - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - temp = temp_from_u8_adt7461(data, data->temp8[index]); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - temp = temp_from_u8(data->temp8[index]); - else - temp = temp_from_s8(data->temp8[index]); - - /* +16 degrees offset for temp2 for the LM99 */ - if (data->kind == lm99 && index == 3) - temp += 16000; + int temp = lm90_get_temp(data, index, channel); - return temp - temp_from_s8(data->temp_hyst); + return temp - data->temp_hyst * 1000; } static int lm90_set_temphyst(struct lm90_data *data, long val) { - struct i2c_client *client = data->client; - int temp; - - if (data->flags & LM90_HAVE_EXTENDED_TEMP) - temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]); - else if (data->flags & LM90_HAVE_UNSIGNED_TEMP) - temp = temp_from_u8(data->temp8[LOCAL_CRIT]); - else - temp = temp_from_s8(data->temp8[LOCAL_CRIT]); + int temp = lm90_get_temp(data, LOCAL_CRIT, 0); /* prevent integer overflow/underflow */ val = clamp_val(val, -128000l, 255000l); + data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31); - data->temp_hyst = hyst_to_reg(temp - val); - return lm90_write_reg(client, LM90_REG_TCRIT_HYST, data->temp_hyst); + return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst); } static const u8 lm90_temp_index[3] = { @@ -1396,7 +1260,7 @@ static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) switch (attr) { case hwmon_temp_input: - *val = lm90_get_temp11(data, lm90_temp_index[channel]); + *val = lm90_get_temp(data, lm90_temp_index[channel], channel); break; case hwmon_temp_min_alarm: case hwmon_temp_max_alarm: @@ -1428,35 +1292,26 @@ static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val) data->alarms |= data->current_alarms; break; case hwmon_temp_min: - if (channel == 0) - *val = lm90_get_temp8(data, - lm90_temp_min_index[channel]); - else - *val = lm90_get_temp11(data, - lm90_temp_min_index[channel]); + *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel); break; case hwmon_temp_max: - if (channel == 0) - *val = lm90_get_temp8(data, - lm90_temp_max_index[channel]); - else - *val = lm90_get_temp11(data, - lm90_temp_max_index[channel]); + *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel); break; case hwmon_temp_crit: - *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]); + *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel); break; case hwmon_temp_crit_hyst: - *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]); + *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel); break; case hwmon_temp_emergency: - *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]); + *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel); break; case hwmon_temp_emergency_hyst: - *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]); + *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel); break; case hwmon_temp_offset: - *val = lm90_get_temp11(data, REMOTE_OFFSET); + *val = lm90_temp_from_reg(0, data->temp[REMOTE_OFFSET], + lm90_temp_get_resolution(data, REMOTE_OFFSET)); break; default: return -EOPNOTSUPP; @@ -1477,36 +1332,36 @@ static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val) switch (attr) { case hwmon_temp_min: - if (channel == 0) - err = lm90_set_temp8(data, - lm90_temp_min_index[channel], - val); - else - err = lm90_set_temp11(data, - lm90_temp_min_index[channel], - val); + err = lm90_set_temp(data, lm90_temp_min_index[channel], + channel, val); break; case hwmon_temp_max: - if (channel == 0) - err = lm90_set_temp8(data, - lm90_temp_max_index[channel], - val); - else - err = lm90_set_temp11(data, - lm90_temp_max_index[channel], - val); + err = lm90_set_temp(data, lm90_temp_max_index[channel], + channel, val); break; case hwmon_temp_crit: - err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val); + err = lm90_set_temp(data, lm90_temp_crit_index[channel], + channel, val); break; case hwmon_temp_crit_hyst: err = lm90_set_temphyst(data, val); break; case hwmon_temp_emergency: - err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val); + err = lm90_set_temp(data, lm90_temp_emerg_index[channel], + channel, val); break; case hwmon_temp_offset: - err = lm90_set_temp11(data, REMOTE_OFFSET, val); + val = lm90_temp_to_reg(0, val, + lm90_temp_get_resolution(data, REMOTE_OFFSET)); + data->temp[REMOTE_OFFSET] = val; + err = i2c_smbus_write_byte_data(data->client, + LM90_REG_REMOTE_OFFSH, + val >> 8); + if (err) + break; + err = i2c_smbus_write_byte_data(data->client, + LM90_REG_REMOTE_OFFSL, + val & 0xff); break; default: err = -EOPNOTSUPP; @@ -2035,6 +1890,7 @@ static int lm90_probe(struct i2c_client *client) * ALERT# output */ data->alert_alarms = lm90_params[data->kind].alert_alarms; + data->resolution = lm90_params[data->kind].resolution ? : 11; /* Set chip capabilities */ data->flags = lm90_params[data->kind].flags; From patchwork Wed May 25 13:57:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52629C433F5 for ; Wed, 25 May 2022 13:58:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244543AbiEYN6u (ORCPT ); Wed, 25 May 2022 09:58:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244626AbiEYN6c (ORCPT ); Wed, 25 May 2022 09:58:32 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D74DAB0FC; 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Use a single flag instead to reflect both. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 8e5f791aca07..a0a91aa66177 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -164,11 +164,8 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define TMP461_REG_CHEN 0x16 #define TMP461_REG_DFC 0x24 -/* - * Device flags - */ -#define LM90_FLAG_ADT7461_EXT BIT(0) /* ADT7461 extended mode */ /* Device features */ +#define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */ #define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ #define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */ #define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */ @@ -176,12 +173,11 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */ #define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */ #define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */ -#define LM90_HAVE_EXTENDED_TEMP BIT(8) /* extended temperature support */ -#define LM90_PAUSE_FOR_CONFIG BIT(9) /* Pause conversion for config */ -#define LM90_HAVE_CRIT BIT(10) /* Chip supports CRIT/OVERT register */ -#define LM90_HAVE_CRIT_ALRM_SWP BIT(11) /* critical alarm bits swapped */ -#define LM90_HAVE_PEC BIT(12) /* Chip supports PEC */ -#define LM90_HAVE_PARTIAL_PEC BIT(13) /* Partial PEC support (adm1032)*/ +#define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */ +#define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */ +#define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */ +#define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */ +#define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -1109,7 +1105,7 @@ static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution) { int val; - if (flags & LM90_FLAG_ADT7461_EXT) + if (flags & LM90_HAVE_EXTENDED_TEMP) val = regval - 0x4000; else if (flags & LM90_HAVE_UNSIGNED_TEMP) val = regval; @@ -1136,7 +1132,7 @@ static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution) int fraction = resolution > 8 ? 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0; - if (flags & LM90_FLAG_ADT7461_EXT) { + if (flags & LM90_HAVE_EXTENDED_TEMP) { val = clamp_val(val, -64000, 191000 + fraction); val += 64000; } else if (flags & LM90_HAVE_UNSIGNED_TEMP) { @@ -1764,9 +1760,8 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) if (data->flags & LM90_HAVE_EXTENDED_TEMP) { if (of_property_read_bool(np, "ti,extended-range-enable")) config |= 0x04; - - if (config & 0x04) - data->flags |= LM90_FLAG_ADT7461_EXT; + if (!(config & 0x04)) + data->flags &= ~LM90_HAVE_EXTENDED_TEMP; } /* From patchwork Wed May 25 13:57:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDA89C433EF for ; Wed, 25 May 2022 13:58:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244602AbiEYN6v (ORCPT ); Wed, 25 May 2022 09:58:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244554AbiEYN6e (ORCPT ); Wed, 25 May 2022 09:58:34 -0400 Received: from mail-oi1-x234.google.com (mail-oi1-x234.google.com [IPv6:2607:f8b0:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B2B49D042; Wed, 25 May 2022 06:58:31 -0700 (PDT) Received: by mail-oi1-x234.google.com with SMTP id e189so25098442oia.8; Wed, 25 May 2022 06:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vBDUJhqebQK0EchuMPSwdV2y1qOo7zyWzmIX6kJac8Y=; b=eptICbyyYXguOScjE8EwWPzAFShlsHEfP08jpl9g4zqLSatGXDywl/SyJtEwOFG0v+ Qp9mHNBDO0jHsDFWL0WBl0oSTv+PwiRMaKbGQH/0vU5pWBqgpbn3W0zDEBVBJfUX0PuJ AHrGjVxkdHdF/qE5aq6m6a6ydFqCZ8XDyHyPOVmZLrnQFgEGLYpipifMCn2d6/u56OYY aXfW21MkM+u9f0cVtx96XMUbBWBnWOQ+TNNSkfq234pXK+B8gm/FI4rmXsTSN8OQbyVO pFw8/KZzF7FlJzZUvLWaHsOd5Usw/xTyjKqAU6I4hCdKLjaDECW7hMIE/aR+96kI0y/z LOzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=vBDUJhqebQK0EchuMPSwdV2y1qOo7zyWzmIX6kJac8Y=; b=SZpdb667o5af8clSeJfCL2R8tiM3xI/GQKj9wG5WsTEGXgwnb/0HPoA5UiQWBHeTVa nQPI2lKLabpuyIa8L1l/88+k+eBzEgF1rzEn8xFX5AUYOyOiS8tZrdHbv6UiCnYDizQL RV+3jpIlQqTBNe+f0VDDhRQgJwaYgjH4DN20yKngDc8sYiZD/U2YXS3XVZoh4iB6zzkV GbIH780u3Qu1b949Ym2sYDDrWyiyVUBEhj6fE8qh0qk4RbmNYDkw0iJtHDL16BhQeE9Z 2xavfRAQcKzBN46kLJjXXXxW9IuZCve69Q0dNm+pNY8CyI8q41oAgHOEKqCz5DQNXZQ2 8tSg== X-Gm-Message-State: AOAM5337eefVMOWRPqfXxK1d5p4fSah1kn2uk5SsrwHJgG8APz/rrrsk t0p2l4LZYh8ZLzCy9ZarD3HWzJLWBZlJ7Q== X-Google-Smtp-Source: ABdhPJygAv52/1lhGPe+6Qy1RkcBbElzfsMf6v6VPhLIj3/3oJGZ9/FHK/nu9Vw/mMQdqOhZyZdpHg== X-Received: by 2002:a05:6808:1b29:b0:32b:6a06:8135 with SMTP id bx41-20020a0568081b2900b0032b6a068135mr5273130oib.220.1653487110528; Wed, 25 May 2022 06:58:30 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id b124-20020acab282000000b0032ae369c25esm6409168oif.53.2022.05.25.06.58.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:29 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 15/40] hwmon: (lm90) Rework detect function Date: Wed, 25 May 2022 06:57:33 -0700 Message-Id: <20220525135758.2944744-16-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The detect function is getting larger and larger and difficult to understand or review. Split it into per-manufacturer detect functions to improve readability. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 379 +++++++++++++++++++++++++++---------------- 1 file changed, 236 insertions(+), 143 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index a0a91aa66177..f676b809c470 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1498,78 +1498,88 @@ static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type, } } -/* Return 0 if detection is successful, -ENODEV otherwise */ -static int lm90_detect(struct i2c_client *client, - struct i2c_board_info *info) +/* + * Per-manufacturer chip detect functions. + * Functions are expected to return a pointer to the chip name or NULL + * if detection was not successful. + */ + +static const char *lm90_detect_national(struct i2c_client *client, int chip_id, + int config1, int convrate) { - struct i2c_adapter *adapter = client->adapter; + int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); int address = client->addr; const char *name = NULL; - int man_id, chip_id, config1, config2, convrate; - if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) - return -ENODEV; + if (config2 < 0) + return NULL; - /* detection and identification */ - man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); - chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); - config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); - convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); - if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0) - return -ENODEV; + if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09) + return NULL; - if (man_id == 0x01 || man_id == 0x5C || man_id == 0xA1) { - config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); - if (config2 < 0) - return -ENODEV; + if (address != 0x4c && address != 0x4d) + return NULL; + + switch (chip_id & 0xf0) { + case 0x10: /* LM86 */ + if (address == 0x4c) + name = "lm86"; + break; + case 0x20: /* LM90 */ + if (address == 0x4c) + name = "lm90"; + break; + case 0x30: /* LM89/LM99 */ + name = "lm99"; /* detect LM89 as LM99 */ + break; + default: + break; } - if ((address == 0x4C || address == 0x4D) - && man_id == 0x01) { /* National Semiconductor */ - if ((config1 & 0x2A) == 0x00 - && (config2 & 0xF8) == 0x00 - && convrate <= 0x09) { - if (address == 0x4C - && (chip_id & 0xF0) == 0x20) { /* LM90 */ - name = "lm90"; - } else - if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */ - name = "lm99"; - dev_info(&adapter->dev, - "Assuming LM99 chip at 0x%02x\n", - address); - dev_info(&adapter->dev, - "If it is an LM89, instantiate it " - "with the new_device sysfs " - "interface\n"); - } else - if (address == 0x4C - && (chip_id & 0xF0) == 0x10) { /* LM86 */ - name = "lm86"; - } - } - } else - if ((address == 0x4C || address == 0x4D) - && man_id == 0x41) { /* Analog Devices */ - if ((chip_id & 0xF0) == 0x40 /* ADM1032 */ - && (config1 & 0x3F) == 0x00 - && convrate <= 0x0A) { + return name; +} + +static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int address = client->addr; + const char *name = NULL; + + switch (chip_id) { + case 0x40 ... 0x4f: /* ADM1032 */ + if ((address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && + convrate <= 0x0a) name = "adm1032"; - } else - if (chip_id == 0x51 /* ADT7461 */ - && (config1 & 0x1B) == 0x00 - && convrate <= 0x0A) { + break; + case 0x51: /* ADT7461 */ + if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + convrate <= 0x0a) name = "adt7461"; - } else - if (chip_id == 0x57 /* ADT7461A, NCT1008 */ - && (config1 & 0x1B) == 0x00 - && convrate <= 0x0A) { + break; + case 0x57: /* ADT7461A, NCT1008 */ + if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + convrate <= 0x0a) name = "adt7461a"; - } - } else - if (man_id == 0x4D) { /* Maxim */ - int emerg, emerg2, status2; + break; + default: + break; + } + return name; +} + +static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int man_id, emerg, emerg2, status2; + int address = client->addr; + const char *name = NULL; + + if ((address >= 0x48 && address <= 0x4b) || address == 0x4f) + return NULL; + + switch (chip_id) { + case 0x01: /* * We read MAX6659_REG_REMOTE_EMERG twice, and re-read * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG @@ -1585,30 +1595,8 @@ static int lm90_detect(struct i2c_client *client, status2 = i2c_smbus_read_byte_data(client, MAX6696_REG_STATUS2); if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0) - return -ENODEV; + return NULL; - /* - * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id - * register. Reading from that address will return the last - * read value, which in our case is those of the man_id - * register. Likewise, the config1 register seems to lack a - * low nibble, so the value will be those of the previous - * read, so in our case those of the man_id register. - * MAX6659 has a third set of upper temperature limit registers. - * Those registers also return values on MAX6657 and MAX6658, - * thus the only way to detect MAX6659 is by its address. - * For this reason it will be mis-detected as MAX6657 if its - * address is 0x4C. - */ - if (chip_id == man_id - && (address == 0x4C || address == 0x4D || address == 0x4E) - && (config1 & 0x1F) == (man_id & 0x0F) - && convrate <= 0x09) { - if (address == 0x4C) - name = "max6657"; - else - name = "max6659"; - } else /* * Even though MAX6695 and MAX6696 do not have a chip ID * register, reading it returns 0x01. Bit 4 of the config1 @@ -1620,77 +1608,137 @@ static int lm90_detect(struct i2c_client *client, * limit registers. We can detect those chips by checking if * one of those registers exists. */ - if (chip_id == 0x01 - && (config1 & 0x10) == 0x00 - && (status2 & 0x01) == 0x00 - && emerg == emerg2 - && convrate <= 0x07) { + if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 && + convrate <= 0x07) name = "max6696"; - } else /* * The chip_id register of the MAX6680 and MAX6681 holds the * revision of the chip. The lowest bit of the config1 register * is unused and should return zero when read, so should the * second to last bit of config1 (software reset). */ - if (chip_id == 0x01 - && (config1 & 0x03) == 0x00 - && convrate <= 0x07) { + else if (!(config1 & 0x03) && convrate <= 0x07) name = "max6680"; - } else - /* - * The chip_id register of the MAX6646/6647/6649 holds the - * revision of the chip. The lowest 6 bits of the config1 - * register are unused and should return zero when read. - */ - if (chip_id == 0x59 - && (config1 & 0x3f) == 0x00 - && convrate <= 0x07) { - name = "max6646"; - } else + break; + case 0x08: /* * The chip_id of the MAX6654 holds the revision of the chip. * The lowest 3 bits of the config1 register are unused and * should return zero when read. */ - if (chip_id == 0x08 - && (config1 & 0x07) == 0x00 - && convrate <= 0x07) { + if (!(config1 & 0x07) && convrate <= 0x07) name = "max6654"; + break; + case 0x4d: + /* + * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id + * register. Reading from that address will return the last + * read value, which in our case is those of the man_id + * register, or 0x4d. Likewise, the config1 register seems to + * lack a low nibble, so the value will be those of the previous + * read, so in our case again those of the man_id register. + * MAX6659 has a third set of upper temperature limit registers. + * Those registers also return values on MAX6657 and MAX6658, + * thus the only way to detect MAX6659 is by its address. + * For this reason it will be mis-detected as MAX6657 if its + * address is 0x4c. + */ + if ((address == 0x4c || address == 0x4d || address == 0x4e) && + (config1 & 0x1f) == 0x0d && convrate <= 0x09) { + if (address == 0x4c) + name = "max6657"; + else + name = "max6659"; } - } else - if (address == 0x4C - && man_id == 0x5C) { /* Winbond/Nuvoton */ - if ((config1 & 0x2A) == 0x00 - && (config2 & 0xF8) == 0x00) { - if (chip_id == 0x01 /* W83L771W/G */ - && convrate <= 0x09) { - name = "w83l771"; - } else - if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */ - && convrate <= 0x08) { - name = "w83l771"; + break; + case 0x59: + /* + * The chip_id register of the MAX6646/6647/6649 holds the + * revision of the chip. The lowest 6 bits of the config1 + * register are unused and should return zero when read. + */ + if (!(config1 & 0x3f) && convrate <= 0x07) { + switch (address) { + case 0x4c: + name = "max6649"; + break; + case 0x4d: + name = "max6646"; + break; + case 0x4e: + name = "max6647"; + break; + default: + break; } } - } else - if (address >= 0x48 && address <= 0x4F - && man_id == 0xA1) { /* NXP Semiconductor/Philips */ - if (chip_id == 0x00 - && (config1 & 0x2A) == 0x00 - && (config2 & 0xFE) == 0x00 - && convrate <= 0x09) { - name = "sa56004"; + break; + default: + break; + } + + return name; +} + +static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); + int address = client->addr; + const char *name = NULL; + + if (config2 < 0) + return ERR_PTR(-ENODEV); + + if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) { + if (chip_id == 0x01 && convrate <= 0x09) { + /* W83L771W/G */ + name = "w83l771"; + } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) { + /* W83L771AWG/ASG */ + name = "w83l771"; } - } else - if ((address == 0x4C || address == 0x4D) - && man_id == 0x47) { /* GMT */ - if (chip_id == 0x01 /* G781 */ - && (config1 & 0x3F) == 0x00 - && convrate <= 0x08) - name = "g781"; - } else - if (man_id == 0x55 && chip_id == 0x00 && - (config1 & 0x1B) == 0x00 && convrate <= 0x09) { + } + return name; +} + +static const char *lm90_detect_nxp(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); + int address = client->addr; + const char *name = NULL; + + if (config2 < 0) + return NULL; + + if (address >= 0x48 && address <= 0x4f && chip_id == 0x00 && + !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09) + name = "sa56004"; + + return name; +} + +static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int address = client->addr; + const char *name = NULL; + + if ((address == 0x4c || address == 0x4d) && chip_id == 0x01 && + !(config1 & 0x3f) && convrate <= 0x08) + name = "g781"; + + return name; +} + +static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, + int config1, int convrate) +{ + int address = client->addr; + const char *name = NULL; + + if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) { int local_ext, conalert, chen, dfc; local_ext = i2c_smbus_read_byte_data(client, @@ -1700,10 +1748,8 @@ static int lm90_detect(struct i2c_client *client, chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN); dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC); - if ((local_ext & 0x0F) == 0x00 && - (conalert & 0xf1) == 0x01 && - (chen & 0xfc) == 0x00 && - (dfc & 0xfc) == 0x00) { + if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 && + (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) { if (address == 0x4c && !(chen & 0x03)) name = "tmp451"; else if (address >= 0x48 && address <= 0x4f) @@ -1711,10 +1757,57 @@ static int lm90_detect(struct i2c_client *client, } } - if (!name) { /* identification failed */ + return name; +} + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + int man_id, chip_id, config1, convrate; + const char *name = NULL; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -ENODEV; + + /* detection and identification */ + man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); + chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); + config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); + convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); + if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0) + return -ENODEV; + + switch (man_id) { + case 0x01: /* National Semiconductor */ + name = lm90_detect_national(client, chip_id, config1, convrate); + break; + case 0x41: /* Analog Devices */ + name = lm90_detect_analog(client, chip_id, config1, convrate); + break; + case 0x47: /* GMT */ + name = lm90_detect_gmt(client, chip_id, config1, convrate); + break; + case 0x4d: /* Maxim Integrated */ + name = lm90_detect_maxim(client, chip_id, config1, convrate); + break; + case 0x55: /* TI */ + name = lm90_detect_ti(client, chip_id, config1, convrate); + break; + case 0x5c: /* Winbond/Nuvoton */ + name = lm90_detect_nuvoton(client, chip_id, config1, convrate); + break; + case 0xa1: /* NXP Semiconductor/Philips */ + name = lm90_detect_nxp(client, chip_id, config1, convrate); + break; + default: + break; + } + + if (!name) { /* identification failed */ dev_dbg(&adapter->dev, - "Unsupported chip at 0x%02x (man_id=0x%02X, " - "chip_id=0x%02X)\n", address, man_id, chip_id); + "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n", + client->addr, man_id, chip_id); return -ENODEV; } From patchwork Wed May 25 13:57:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861226 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0346FC433EF for ; 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Wed, 25 May 2022 06:58:31 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 16/40] hwmon: (lm90) Add support for additional chip revision of NCT1008 Date: Wed, 25 May 2022 06:57:34 -0700 Message-Id: <20220525135758.2944744-17-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The NCT1008 datasheet, Revision 3, states that its chip revision is 0x57. This matches the ADT7461A chip revision, and NCT1008 is therefore detected as ADT7461A. In revision 6 of the datasheet, the chip revision register is no longer documented. Multiple samples of NCT1008 were found to report a chip revision of 0x54. As it turns out, one of the patches submitted to add NCT1008 support to the lm90 driver already included a check for chip revision 0x54. Unfortunately, that patch never made it into the kernel. Remedy the situation and explicitly detect chips with revision 0x54 as NCT1008. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index f676b809c470..17312d173b8a 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1556,7 +1556,12 @@ static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, convrate <= 0x0a) name = "adt7461"; break; - case 0x57: /* ADT7461A, NCT1008 */ + case 0x54: /* NCT1008 */ + if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + convrate <= 0x0a) + name = "nct1008"; + break; + case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */ if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && convrate <= 0x0a) name = "adt7461a"; From patchwork Wed May 25 13:57:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 054B9C4332F for ; Wed, 25 May 2022 13:59:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234233AbiEYN7c (ORCPT ); Wed, 25 May 2022 09:59:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52106 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244599AbiEYN6q (ORCPT ); Wed, 25 May 2022 09:58:46 -0400 Received: from mail-oi1-x22e.google.com (mail-oi1-x22e.google.com [IPv6:2607:f8b0:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 19B43A889D; Wed, 25 May 2022 06:58:35 -0700 (PDT) Received: by mail-oi1-x22e.google.com with SMTP id m125so2069831oia.6; Wed, 25 May 2022 06:58:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kBZbief4RK9Ka1jxdWPMvx6QXs+iQ5T6yLeGIM3oN6w=; b=aj3IJLufUSUNh7Gzu5T2GO+JO9HdW6NbcH2WtaK1qyoBiQc8wM8XzSL4rzCxM3sI+O yc232fYkYWyHMMcOzbb2mnOkxSwrn3xCf/8hSmcIcyUJew1tDDe+kO51U6rJyQAd1pux HOC14YTDR6VxEiPC9cPMlI6mN0HF0tCdzLXxyyuSo3xicBq27tpnNV8eru9oni+ClaPC O2H5mxAeOJ2NWubmEOCNevnC7GIMl+0ZLAJapz0psYj86KVqhHqVzursdR3FkCBlYU8V ACsCYmy54wctW1XvMs9S2vbQa7wYwe/1dEUIPRVcB4ZM4ojdo2knw2x5tFrfO3iksi7e earg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kBZbief4RK9Ka1jxdWPMvx6QXs+iQ5T6yLeGIM3oN6w=; b=fbsb1KG+yy6TD9VHwmNfEHrf7qbZpe6pkyNrZf5+ZYALGdWBu18sPbcN6xZG4Wx1CD KspVESpBUsl+/Qeax5j9R4PCdwIIxULjwmULG6mtHjWgbsr//7vh42pT0oZNLq1kjFdx bspSXrR1URfimJqHrhUohsiyUlKreghiJI4t7eFeHpGuF0RoMtgxUY9wJkUlRKN/+0bz 5v9ldFuwU62qpaxiIy8Mfp8M9oWnU1+NUZvi/IesZCdFBA//r+bh0wY2NqCvA7uozEE/ cof3TUzQwMzBMS0Qz5tA8JWyLWFRiZAPElXjnXHFu3rfHg0ueTWF2jFY0S1JFt6Amuc6 4uTg== X-Gm-Message-State: AOAM5317OqqC4zuEIN/rYmbLBovUG+gm0dLUz9yzQZQEb0OA6qNndefN jjC3Xc9UOW4GZx5NEieK4HsfZVl+ANSoYA== X-Google-Smtp-Source: ABdhPJykOIL3+aMb0RJQ8dFYbUm0GY9CvmZH0sw9MPUV0B1VNnyZit6V7b/jHvRpvoiuiveWMV4kKQ== X-Received: by 2002:a05:6808:1a22:b0:32b:60c2:e2bd with SMTP id bk34-20020a0568081a2200b0032b60c2e2bdmr5147815oib.189.1653487114172; Wed, 25 May 2022 06:58:34 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id x2-20020a9d5882000000b0060603221274sm5985139otg.68.2022.05.25.06.58.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:33 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 17/40] hwmon: (lm90) Fix/Add detection of G781-1 Date: Wed, 25 May 2022 06:57:35 -0700 Message-Id: <20220525135758.2944744-18-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org When support for G781 was added, chips with ID 0x01 were found at I2C addresses 0x4c and 0x4d. The G781 datasheet (version 1.3 from October 2003) says that the device ID for G781-1 is 0x03, not 0x01. Also, the datasheet states that the chip at I2C address is G781 and the chip at I2C address 0x4d is G781-1. A G781-1 at I2C address 0x4d was now found to have a chip ID of 0x03 as suggested by the datasheet. Accept both 0x01 and 0x03 chip IDs at both addresses to ensure that all variants of G781 are detected properly. While at it, improve chip detection accuracy by reading two additional registers and ensuring that only expected bits are set in those registers. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 17312d173b8a..b39e31ded2cb 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1728,13 +1728,42 @@ static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id, int config1, int convrate) { int address = client->addr; - const char *name = NULL; - if ((address == 0x4c || address == 0x4d) && chip_id == 0x01 && - !(config1 & 0x3f) && convrate <= 0x08) - name = "g781"; + /* + * According to the datasheet, G781 is supposed to be at I2C Address + * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C + * address 0x4d and have a chip ID of 0x03. However, when support + * for G781 was added, chips at 0x4c and 0x4d were found to have a + * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with + * chip ID 0x03. + * To avoid detection failures, accept chip ID 0x01 and 0x03 at both + * addresses. + * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public + * datasheet is not available. Extensive testing suggests that + * the chip appears to be fully compatible with G781. + * Available register dumps show that G751 also reports manufacturer + * ID 0x47 and chip ID 0x01 even though that chip does not officially + * support those registers. This makes chip detection somewhat + * vulnerable. To improve detection quality, read the offset low byte + * and alert fault queue registers and verify that only expected bits + * are set. + */ + if ((chip_id == 0x01 || chip_id == 0x03) && + (address == 0x4c || address == 0x4d) && + !(config1 & 0x3f) && convrate <= 0x08) { + int reg; - return name; + reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL); + if (reg < 0 || reg & 0x1f) + return NULL; + reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT); + if (reg < 0 || reg & 0xf1) + return NULL; + + return "g781"; + } + + return NULL; } static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, From patchwork Wed May 25 13:57:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16375C433F5 for ; Wed, 25 May 2022 13:59:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244575AbiEYN7R (ORCPT ); Wed, 25 May 2022 09:59:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244572AbiEYN6l (ORCPT ); Wed, 25 May 2022 09:58:41 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5F10AB0E8; Wed, 25 May 2022 06:58:36 -0700 (PDT) Received: by mail-ot1-x331.google.com with SMTP id c15-20020a9d684f000000b0060b097c71ecso7317866oto.10; Wed, 25 May 2022 06:58:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kgX0NZH7fDiJQUhAb8gmt+meldKpgisUE8fSxZ9Voms=; b=SmSGRZLh4nDtJaPUUJNmoIqmiM4VYKKYTebXwj7QKvEBhpj4eJ8NV1csfbh4M5s/D+ IxgEC3x+QMeMi86ZW4R5krrHQy71kG6MkfGvIQGEiKPnCo7paC4twFinaa5zAkIclLoP ymQlJ5CH02BzRy1EZWPH0BfTBmFciI57xqmqTze4JNNjm9hEtpsvV+x5d+HJ+hO/Op39 t6lfhcU8onF216cc12hIChBeVejK9etIT8E9f9U3vftTQLWseXP8n7oc5uMJzwhPQJsN NSbS+socvuHnYYkHzFokJ6p3kfZwK94fdOQUsDeKli8SMK9wMz3+5ruEFkJjhUhon7KL OU7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=kgX0NZH7fDiJQUhAb8gmt+meldKpgisUE8fSxZ9Voms=; b=TXijp0chv9pJilDpQp2cJnkKs2skPLObfrx6tUcNIgr2vCSRoIOjV2Gh5YYGCTZaOU dKbhXW6pOidPcEK1bQbJwJW7+Phex9ar+vnunRkTOQLGoOZVYsOiBhkf077hidzDDi81 DHpySMF76wqKQcr8/6y1faux10AZccPmYh1PfOry17Cl1W7xtdz9w1YUjE/JPlc392NU GY/T36e8pKFhS3fLcbTekJ+t3W3zTnSBWdWfj5dmGReoTwVvf9Myscjh5XU5P/LCGo/D c9gsikdbed081556slJe9iarOCxOGA7WIWkH/E4Of1B/Dm6tMfP4wB//fEqo16G/YGa3 0wQQ== X-Gm-Message-State: AOAM531xsGO+E4V+B48Kwzm2wpTsC7xi+DSxK2e9iRw9fzaOCZw/JdFj 1IUDqND5x4b1gK+aV/aU01waf1IGqvvCkg== X-Google-Smtp-Source: ABdhPJx+H4WTIHKANnxe2J9Y83pEM8P72qvXOuDrSHgjNRis8S2G6ID0thNGOhMngirq4VarMMRTug== X-Received: by 2002:a05:6830:40c5:b0:60b:39c0:750b with SMTP id h5-20020a05683040c500b0060b39c0750bmr246667otu.97.1653487115898; Wed, 25 May 2022 06:58:35 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id y21-20020a4ae715000000b00333220959b9sm6752729oou.1.2022.05.25.06.58.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:35 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 18/40] hwmon: (lm90) Add flag to indicate 'alarms' attribute support Date: Wed, 25 May 2022 06:57:36 -0700 Message-Id: <20220525135758.2944744-19-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org We don't want to support the obsolete 'alarms' attribute for new chips supported by this driver. Add flag to indicate 'alarms' attribute support and use it for existing chips. This flag will not be set for additional chips supported by this driver in the future. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 57 +++++++++++++++++++++++++++++--------------- 1 file changed, 38 insertions(+), 19 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index b39e31ded2cb..e23dcf299b03 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -178,6 +178,7 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */ #define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */ #define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ +#define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -347,7 +348,7 @@ static const struct lm90_params lm90_params[] = { [adm1032] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT - | LM90_HAVE_PARTIAL_PEC, + | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -359,7 +360,8 @@ static const struct lm90_params lm90_params[] = { */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP - | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC, + | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -367,55 +369,58 @@ static const struct lm90_params lm90_params[] = { [adt7461a] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP - | LM90_HAVE_CRIT | LM90_HAVE_PEC, + | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 10, }, [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 7, }, [lm86] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm99] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, .alert_alarms = 0x7b, .max_convrate = 9, }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_UNSIGNED_TEMP, + | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6654] = { - .flags = LM90_HAVE_BROKEN_ALERT, + .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 7, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6657] = { - .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT, + .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6659] = { - .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT, + .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -427,19 +432,22 @@ static const struct lm90_params lm90_params[] = { * be set). */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT - | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT, + | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 7, }, [max6696] = { .flags = LM90_HAVE_EMERGENCY - | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT, + | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x1c7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [w83l771] = { - .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT, + .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 8, }, @@ -449,7 +457,8 @@ static const struct lm90_params lm90_params[] = { * and treated as negative temperatures (meaning min_alarm will * be set). */ - .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT, + .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7b, .max_convrate = 9, .reg_local_ext = SA56004_REG_LOCAL_TEMPL, @@ -457,7 +466,7 @@ static const struct lm90_params lm90_params[] = { [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_UNSIGNED_TEMP, + | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -465,7 +474,8 @@ static const struct lm90_params lm90_params[] = { }, [tmp461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT + | LM90_HAVE_ALARMS, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -505,7 +515,9 @@ enum lm90_temp_reg_index { struct lm90_data { struct i2c_client *client; struct device *hwmon_dev; + u32 chip_config[2]; u32 channel_config[4]; + struct hwmon_channel_info chip_info; struct hwmon_channel_info temp_info; const struct hwmon_channel_info *info[3]; struct hwmon_chip_info chip; @@ -2028,8 +2040,15 @@ static int lm90_probe(struct i2c_client *client) data->chip.ops = &lm90_ops; data->chip.info = data->info; - data->info[0] = HWMON_CHANNEL_INFO(chip, - HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS); + data->info[0] = &data->chip_info; + info = &data->chip_info; + info->type = hwmon_chip; + info->config = data->chip_config; + + data->chip_config[0] = HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL; + if (data->flags & LM90_HAVE_ALARMS) + data->chip_config[0] |= HWMON_C_ALARMS; + data->info[1] = &data->temp_info; info = &data->temp_info; From patchwork Wed May 25 13:57:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1BE9C43217 for ; Wed, 25 May 2022 14:00:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237673AbiEYOAT (ORCPT ); Wed, 25 May 2022 10:00:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244642AbiEYN6r (ORCPT ); Wed, 25 May 2022 09:58:47 -0400 Received: from mail-oa1-x2c.google.com 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smtp.gmail.com with ESMTPSA id q203-20020acac0d4000000b00325cda1ff94sm6215926oif.19.2022.05.25.06.58.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:37 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 19/40] hwmon: (lm90) Add explicit support for MAX6648/MAX6692 Date: Wed, 25 May 2022 06:57:37 -0700 Message-Id: <20220525135758.2944744-20-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Unlike MAX6646/MAX6647/MAX6649, MAX6648 and MAX6692 only support a temperature range of 0..127 degrees C. Separate support for the two sets of chips to be able to support maximum temperature ranges correctly for all chips. Introduce new feature flag to indicate temperature support up to 255 degrees C. Since the chips are almost identical except for the supported temperature range, automatic chip detection is limited. Effectively this means that MAX6648 may be mis-detected as MAX6649 when auto-detected, but there is nothing we can do about that. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 12 +++++++++-- drivers/hwmon/lm90.c | 41 ++++++++++++++++++++++++++++++++---- 2 files changed, 47 insertions(+), 6 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 9886a298797f..e947e609990b 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -105,7 +105,7 @@ Supported chips: * Maxim MAX6648 - Prefix: 'max6646' + Prefix: 'max6648' Addresses scanned: I2C 0x4c @@ -191,7 +191,7 @@ Supported chips: * Maxim MAX6692 - Prefix: 'max6646' + Prefix: 'max6648' Addresses scanned: I2C 0x4c @@ -324,6 +324,14 @@ ADT7461, ADT7461A, NCT1008: * Lower resolution for remote temperature * SMBus PEC support for Write Byte and Receive Byte transactions. +MAX6646, MAX6647, MAX6649: + * Better local resolution + * Extended range unsigned external temperature + +MAX6648, MAX6692: + * Better local resolution + * Unsigned temperature + MAX6654: * Better local resolution * Selectable address diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index e23dcf299b03..df4b861024e3 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -115,7 +115,7 @@ static const unsigned short normal_i2c[] = { 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, - max6646, max6654, max6657, max6659, max6680, max6696, + max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -179,6 +179,7 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */ #define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ #define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ +#define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -213,6 +214,7 @@ static const struct i2c_device_id lm90_id[] = { { "lm99", lm99 }, { "max6646", max6646 }, { "max6647", max6646 }, + { "max6648", max6648 }, { "max6649", max6646 }, { "max6654", max6654 }, { "max6657", max6657 }, @@ -220,6 +222,7 @@ static const struct i2c_device_id lm90_id[] = { { "max6659", max6659 }, { "max6680", max6680 }, { "max6681", max6680 }, + { "max6692", max6648 }, { "max6695", max6696 }, { "max6696", max6696 }, { "nct1008", adt7461a }, @@ -400,7 +403,14 @@ static const struct lm90_params lm90_params[] = { }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS, + | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS, + .alert_alarms = 0x7c, + .max_convrate = 6, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, + }, + [max6648] = { + .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT + | LM90_HAVE_BROKEN_ALERT, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -1119,7 +1129,7 @@ static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution) if (flags & LM90_HAVE_EXTENDED_TEMP) val = regval - 0x4000; - else if (flags & LM90_HAVE_UNSIGNED_TEMP) + else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED)) val = regval; else val = (s16)regval; @@ -1147,6 +1157,8 @@ static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution) if (flags & LM90_HAVE_EXTENDED_TEMP) { val = clamp_val(val, -64000, 191000 + fraction); val += 64000; + } else if (flags & LM90_HAVE_EXT_UNSIGNED) { + val = clamp_val(val, 0, 255000 + fraction); } else if (flags & LM90_HAVE_UNSIGNED_TEMP) { val = clamp_val(val, 0, 127000 + fraction); } else { @@ -1673,11 +1685,32 @@ static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, * The chip_id register of the MAX6646/6647/6649 holds the * revision of the chip. The lowest 6 bits of the config1 * register are unused and should return zero when read. + * The I2C address of MAX6648/6692 is fixed at 0x4c. + * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e, + * and MAX6649 is at address 0x4c. A slight difference between + * the two sets of chips is that the remote temperature register + * reports different values if the DXP pin is open or shorted. + * We can use that information to help distinguish between the + * chips. MAX6648 will be mis-detected as MAX6649 if the remote + * diode is connected, but there isn't really anything we can + * do about that. */ if (!(config1 & 0x3f) && convrate <= 0x07) { + int temp; + switch (address) { case 0x4c: - name = "max6649"; + /* + * MAX6649 reports an external temperature + * value of 0xff if DXP is open or shorted. + * MAX6648 reports 0x80 in that case. + */ + temp = i2c_smbus_read_byte_data(client, + LM90_REG_REMOTE_TEMPH); + if (temp == 0x80) + name = "max6648"; + else + name = "max6649"; break; case 0x4d: name = "max6646"; From patchwork Wed May 25 13:57:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861245 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CC1AC433FE for ; Wed, 25 May 2022 14:00:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232038AbiEYOAc (ORCPT ); Wed, 25 May 2022 10:00:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244655AbiEYN6s (ORCPT ); Wed, 25 May 2022 09:58:48 -0400 Received: from mail-oa1-x2a.google.com (mail-oa1-x2a.google.com [IPv6:2001:4860:4864:20::2a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5A2BAE240; Wed, 25 May 2022 06:58:40 -0700 (PDT) Received: by mail-oa1-x2a.google.com with SMTP id 586e51a60fabf-e5e433d66dso26113066fac.5; Wed, 25 May 2022 06:58:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FOJ7UN0h8fXZtM0hP0PplVDK/svBHNylTVAam7zGQyk=; b=Ri3l3B4zXSWPzOT53K/Jp1ABTn8KRUOKi0QKHNVgGk4v8Zcjkj6rwBF6iyVqDEmJtC e59hVjGwdejlDpJW+AZb3fjSUcxRXHu2wxRYVRtDXinCT3yG89h361R2VMb2ghY5QrG4 PnR2+G68qSUZMU90Hsi9v2k3tZk0UP79GzC59x98Yrqtj7ljtL8or2FA5bRSQhaiqKGl d49CQmjWsUJ5fOMfg+Oe+b6SFZ2PIa9pSG/xeY8Eo+X4OELYsufbTcjbdDjcOY/U9KKU wIls7AVyHfvizXv7Pywx0wQGiWcxoBPc+SI5n4TMkob9bS6OpMTMvLQJHlaJ+jqRcX04 Fn4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=FOJ7UN0h8fXZtM0hP0PplVDK/svBHNylTVAam7zGQyk=; b=QHG9vrPTHfmlaf3rT09+Q3YF/rFNwNPCfxjF2MxHbyXAk3/gOtkzR7iUlv0myxDNyM 3jyEceIDR7vhhffw/XGMCHDklcXp8mT8rLQx96zcd9oYF1MeQ7V0xVj6TBaHLhSsM/GX iUIj8lKpvuyRJYS9Tl/GhDD5kM7UuqD/M0N2yGXWsI8jVjPCe34vFNvm2hBP2Bdb/Kd5 5Abtc0mmG655izEW/3lE6TTxYx7ifSjfhL+2mbSctFj2Um+aAbHdzHSSqhOY91wJ1Umq qKRt9zsb8EQrpKIDzNdtdnsFDGmSJ08lC3o+OE8bSav7fJx4TQu+FCoa3qPsVmhH2wKR RHEA== X-Gm-Message-State: AOAM532rHCsLljScLrk7dAgZh7vr+feZIWb2cWLuJztWc18PGWnRPIn8 A2IsyROjSqXThqK7InFdqqhpW08f5PyDLQ== X-Google-Smtp-Source: ABdhPJxqCx7Hoe3HmlHnCXfWWMHqbBZH8LqkoAMMyiCC4gqQwTeexQIJTF+5NlxKLf0rZjzTfQbbpw== X-Received: by 2002:a05:6870:45a5:b0:e1:f27d:d1c8 with SMTP id y37-20020a05687045a500b000e1f27dd1c8mr5913928oao.60.1653487119580; Wed, 25 May 2022 06:58:39 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id g6-20020aca3906000000b00325cda1ffb5sm6308874oia.52.2022.05.25.06.58.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:39 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 20/40] hwmon: (lm90) Add support for ADT7481, ADT7482, and ADT7483 Date: Wed, 25 May 2022 06:57:38 -0700 Message-Id: <20220525135758.2944744-21-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org ADT7481, ADT7482, and ADT7483 are similar to ADT7461, but support two external temperature sensors, similar to MAX6695/6696. They support an extended temperature range similar to ADT7461. Registers for the second external channel can be accessed directly or by using the same method as used by MAX6695/6696. For simplicity, the access method implemented for MAX6695/6696 is used. The chips support PEC (packet error checking). Set the PEC feature flag and let the user decide if it should be enabled or not (it is by default disabled). Even though it is only documented for ADT7483, all three chips support a secondary manufacturer ID register at 0x3e and a chip ID register at 0x3f. Use the contents of those registers register for improved chip detection accuracy. Add the same check to the ADT7461A detection code since this chip also supports the same (undocumented) registers. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck Reviewed-by: Slawomir Stepien --- Documentation/hwmon/lm90.rst | 38 +++++++++++ drivers/hwmon/Kconfig | 3 +- drivers/hwmon/lm90.c | 119 ++++++++++++++++++++++++++--------- 3 files changed, 129 insertions(+), 31 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index e947e609990b..53429f79b819 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -73,6 +73,36 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A + * Analog Devices ADT7481 + + Prefix: 'adt7481' + + Addresses scanned: I2C 0x4b and 0x4c + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=ADT7481 + + * Analog Devices ADT7482 + + Prefix: 'adt7482' + + Addresses scanned: I2C 0x4c + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=ADT7482 + + * Analog Devices ADT7483A + + Prefix: 'adt7483a' + + Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=ADT7483A + * ON Semiconductor NCT1008 Prefix: 'nct1008' @@ -323,6 +353,14 @@ ADT7461, ADT7461A, NCT1008: * Extended temperature range (breaks compatibility) * Lower resolution for remote temperature * SMBus PEC support for Write Byte and Receive Byte transactions. + * 10 bit temperature resolution + +ADT7481, ADT7482, ADT7483: + * Temperature offset register + * SMBus PEC support + * 10 bit temperature resolution for external sensors + * Two remote sensors + * Selectable address (ADT7483) MAX6646, MAX6647, MAX6649: * Better local resolution diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 590d3d550acb..df54628bd36b 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1358,7 +1358,8 @@ config SENSORS_LM90 depends on I2C help If you say yes here you get support for National Semiconductor LM90, - LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, and ADT7461A, + LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, ADT7461A, + ADT7481, ADT7482, and ADT7483A, Maxim MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, ON Semiconductor NCT1008, Winbond/Nuvoton W83L771W/G/AWG/ASG, diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index df4b861024e3..d2477e0c1e1e 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -64,6 +64,10 @@ * and extended mode. They are mostly compatible with LM90 except for a data * format difference for the temperature value registers. * + * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices + * / ON Semiconductor. The chips are similar to ADT7461 but support two external + * temperature sensors. + * * This driver also supports the SA56004 from Philips. This device is * pin-compatible with the LM86, the ED/EDP parts are also address-compatible. * @@ -114,7 +118,7 @@ static const unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, +enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -164,6 +168,13 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define TMP461_REG_CHEN 0x16 #define TMP461_REG_DFC 0x24 +/* ADT7481 registers */ +#define ADT7481_REG_STATUS2 0x23 +#define ADT7481_REG_CONFIG2 0x24 + +#define ADT7481_REG_MAN_ID 0x3e +#define ADT7481_REG_CHIP_ID 0x3d + /* Device features */ #define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */ #define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */ @@ -191,6 +202,7 @@ enum chips { adm1032, adt7461, adt7461a, g781, lm86, lm90, lm99, #define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */ #define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */ +/* MAX6695/6696 and ADT7481 2nd status register */ #define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */ #define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */ #define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */ @@ -207,6 +219,9 @@ static const struct i2c_device_id lm90_id[] = { { "adm1032", adm1032 }, { "adt7461", adt7461 }, { "adt7461a", adt7461a }, + { "adt7481", adt7481 }, + { "adt7482", adt7481 }, + { "adt7483a", adt7481 }, { "g781", g781 }, { "lm90", lm90 }, { "lm86", lm86 }, @@ -344,6 +359,7 @@ struct lm90_params { /* Upper 8 bits for max6695/96 */ u8 max_convrate; /* Maximum conversion rate register value */ u8 resolution; /* 16-bit resolution (default 11 bit) */ + u8 reg_status2; /* 2nd status register (optional) */ u8 reg_local_ext; /* Extended local temp register (optional) */ }; @@ -376,6 +392,16 @@ static const struct lm90_params lm90_params[] = { .alert_alarms = 0x7c, .max_convrate = 10, }, + [adt7481] = { + .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP + | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC + | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT, + .alert_alarms = 0x1c7c, + .max_convrate = 11, + .resolution = 10, + .reg_status2 = ADT7481_REG_STATUS2, + }, [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT @@ -453,6 +479,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_ALARMS, .alert_alarms = 0x1c7c, .max_convrate = 6, + .reg_status2 = MAX6696_REG_STATUS2, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [w83l771] = { @@ -549,6 +576,7 @@ struct lm90_data { u16 alert_alarms; /* Which alarm bits trigger ALERT# */ /* Upper 8 bits for max6695/96 */ u8 max_convrate; /* Maximum conversion rate */ + u8 reg_status2; /* 2nd status register (optional) */ u8 reg_local_ext; /* local extension register offset */ /* registers values */ @@ -679,18 +707,14 @@ static int lm90_update_confreg(struct lm90_data *data, u8 config) * various registers have different meanings as a result of selecting a * non-default remote channel. */ -static int lm90_select_remote_channel(struct lm90_data *data, int channel) +static int lm90_select_remote_channel(struct lm90_data *data, bool second) { - int err = 0; + u8 config = data->config & ~0x08; - if (data->kind == max6696) { - u8 config = data->config & ~0x08; + if (second) + config |= 0x08; - if (channel) - config |= 0x08; - err = lm90_update_confreg(data, config); - } - return err; + return lm90_update_confreg(data, config); } static int lm90_write_convrate(struct lm90_data *data, int val) @@ -806,8 +830,8 @@ static int lm90_update_limits(struct device *dev) data->temp[REMOTE_EMERG] = val << 8; } - if (data->kind == max6696) { - val = lm90_select_remote_channel(data, 1); + if (data->flags & LM90_HAVE_TEMP3) { + val = lm90_select_remote_channel(data, true); if (val < 0) return val; @@ -816,10 +840,12 @@ static int lm90_update_limits(struct device *dev) return val; data->temp[REMOTE2_CRIT] = val << 8; - val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); - if (val < 0) - return val; - data->temp[REMOTE2_EMERG] = val << 8; + if (data->flags & LM90_HAVE_EMERGENCY) { + val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG); + if (val < 0) + return val; + data->temp[REMOTE2_EMERG] = val << 8; + } val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); if (val < 0) @@ -831,7 +857,7 @@ static int lm90_update_limits(struct device *dev) return val; data->temp[REMOTE2_HIGH] = val << 8; - lm90_select_remote_channel(data, 0); + lm90_select_remote_channel(data, false); } return 0; @@ -914,8 +940,8 @@ static int lm90_update_alarms_locked(struct lm90_data *data, bool force) return val; alarms = val & ~LM90_STATUS_BUSY; - if (data->kind == max6696) { - val = lm90_read_reg(client, MAX6696_REG_STATUS2); + if (data->reg_status2) { + val = lm90_read_reg(client, data->reg_status2); if (val < 0) return val; alarms |= val << 8; @@ -1037,20 +1063,20 @@ static int lm90_update_device(struct device *dev) return val; data->temp[REMOTE_TEMP] = val; - if (data->kind == max6696) { - val = lm90_select_remote_channel(data, 1); + if (data->flags & LM90_HAVE_TEMP3) { + val = lm90_select_remote_channel(data, true); if (val < 0) return val; val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_TEMPL, true); if (val < 0) { - lm90_select_remote_channel(data, 0); + lm90_select_remote_channel(data, false); return val; } data->temp[REMOTE2_TEMP] = val; - lm90_select_remote_channel(data, 0); + lm90_select_remote_channel(data, false); } val = lm90_update_alarms_locked(data, false); @@ -1207,7 +1233,7 @@ static int lm90_set_temp(struct lm90_data *data, int index, int channel, long va lm90_temp_get_resolution(data, index)); if (channel > 1) - lm90_select_remote_channel(data, 1); + lm90_select_remote_channel(data, true); err = lm90_write_reg(client, regh, data->temp[index] >> 8); if (err < 0) @@ -1216,7 +1242,7 @@ static int lm90_set_temp(struct lm90_data *data, int index, int channel, long va err = lm90_write_reg(client, regl, data->temp[index] & 0xff); deselect: if (channel > 1) - lm90_select_remote_channel(data, 0); + lm90_select_remote_channel(data, false); return err; } @@ -1566,9 +1592,15 @@ static const char *lm90_detect_national(struct i2c_client *client, int chip_id, static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, int config1, int convrate) { + int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2); + int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID); + int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID); int address = client->addr; const char *name = NULL; + if (config2 < 0 || man_id2 < 0 || chip_id2 < 0) + return NULL; + switch (chip_id) { case 0x40 ... 0x4f: /* ADM1032 */ if ((address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && @@ -1590,6 +1622,28 @@ static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, convrate <= 0x0a) name = "adt7461a"; break; + case 0x62: /* ADT7481, undocumented */ + if (man_id2 == 0x41 && chip_id2 == 0x81 && + (address == 0x4b || address == 0x4c) && !(config1 & 0x10) && + !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) { + name = "adt7481"; + } + break; + case 0x65: /* ADT7482, datasheet */ + case 0x75: /* ADT7482, real chip */ + if (man_id2 == 0x41 && chip_id2 == 0x82 && + address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) && + convrate <= 0x0a) + name = "adt7482"; + break; + case 0x94: /* ADT7483 */ + if (man_id2 == 0x41 && chip_id2 == 0x83 && + ((address >= 0x18 && address <= 0x1a) || + (address >= 0x29 && address <= 0x2b) || + (address >= 0x4c && address <= 0x4e)) && + !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a) + name = "adt7483a"; + break; default: break; } @@ -1956,9 +2010,9 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) config |= 0x20; /* - * Select external channel 0 for max6695/96 + * Select external channel 0 for devices with three sensors */ - if (data->kind == max6696) + if (data->flags & LM90_HAVE_TEMP3) config &= ~0x08; /* @@ -2117,13 +2171,18 @@ static int lm90_probe(struct i2c_client *client) data->channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_CRIT | HWMON_T_CRIT_HYST | - HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST | HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | - HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM | - HWMON_T_FAULT; + HWMON_T_CRIT_ALARM | HWMON_T_FAULT; + if (data->flags & LM90_HAVE_EMERGENCY) { + data->channel_config[2] |= HWMON_T_EMERGENCY | + HWMON_T_EMERGENCY_HYST; + } + if (data->flags & LM90_HAVE_EMERGENCY_ALARM) + data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM; } data->reg_local_ext = lm90_params[data->kind].reg_local_ext; + data->reg_status2 = lm90_params[data->kind].reg_status2; /* Set maximum conversion rate */ data->max_convrate = lm90_params[data->kind].max_convrate; From patchwork Wed May 25 13:57:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 61CCEC433EF for ; Wed, 25 May 2022 14:00:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240154AbiEYOAU (ORCPT ); Wed, 25 May 2022 10:00:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244666AbiEYN6s (ORCPT ); Wed, 25 May 2022 09:58:48 -0400 Received: from mail-oi1-x22a.google.com (mail-oi1-x22a.google.com [IPv6:2607:f8b0:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62199AE249; 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Wed, 25 May 2022 06:58:41 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id m2-20020a4aab82000000b0035eb4e5a6bbsm6703745oon.17.2022.05.25.06.58.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:40 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 21/40] hwmon: (lm90) Strengthen chip detection for ADM1032, ADT7461(A), and NCT1008 Date: Wed, 25 May 2022 06:57:39 -0700 Message-Id: <20220525135758.2944744-22-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org ADT7461A and NCT1008 support the undocumented manufacturer and chip ID registers at 0x3e and 0x3f, and return 0x61 as chip ID. ADM1032 and ADT7461 do not support those registers but return 0 when reading them. Use this information to improve the accuracy of the chip detection code. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index d2477e0c1e1e..abc64738e892 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1603,22 +1603,26 @@ static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, switch (chip_id) { case 0x40 ... 0x4f: /* ADM1032 */ - if ((address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && + if (man_id2 == 0x00 && chip_id2 == 0x00 && + (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && convrate <= 0x0a) name = "adm1032"; break; case 0x51: /* ADT7461 */ - if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + if (man_id2 == 0x00 && chip_id2 == 0x00 && + (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && convrate <= 0x0a) name = "adt7461"; break; case 0x54: /* NCT1008 */ - if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + if (man_id2 == 0x41 && chip_id2 == 0x61 && + (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && convrate <= 0x0a) name = "nct1008"; break; case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */ - if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + if (man_id2 == 0x41 && chip_id2 == 0x61 && + (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && convrate <= 0x0a) name = "adt7461a"; break; From patchwork Wed May 25 13:57:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26AE4C433F5 for ; Wed, 25 May 2022 14:00:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235155AbiEYOAR (ORCPT ); Wed, 25 May 2022 10:00:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244681AbiEYN6s (ORCPT ); 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Wed, 25 May 2022 06:58:42 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 22/40] hwmon: (lm90) Add support for MAX6690 Date: Wed, 25 May 2022 06:57:40 -0700 Message-Id: <20220525135758.2944744-23-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org MAX6690 is all but identical to MAX6654. Revision 1 of its datasheet lists the same chip ID as MAX6654, and a chip labeled MAX6654 was found to have the chip ID listed as MAX6690 chip ID in Revision 2 of its datasheet. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 2 +- drivers/hwmon/lm90.c | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 53429f79b819..45bc333a1219 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -370,7 +370,7 @@ MAX6648, MAX6692: * Better local resolution * Unsigned temperature -MAX6654: +MAX6654, MAX6690: * Better local resolution * Selectable address * Remote sensor type selection diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index abc64738e892..22ea75535ab4 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -42,7 +42,8 @@ * accordingly, and is done during initialization. Extended precision is only * available at conversion rates of 1 Hz and slower. Note that extended * precision is not enabled by default, as this driver initializes all chips - * to 2 Hz by design. + * to 2 Hz by design. The driver also supports MAX6690, which is practically + * identical to MAX6654. * * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and * MAX6692 chips made by Maxim. These are again similar to the LM86, @@ -237,6 +238,7 @@ static const struct i2c_device_id lm90_id[] = { { "max6659", max6659 }, { "max6680", max6680 }, { "max6681", max6680 }, + { "max6690", max6654 }, { "max6692", max6648 }, { "max6695", max6696 }, { "max6696", max6696 }, @@ -1716,6 +1718,19 @@ static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, if (!(config1 & 0x07) && convrate <= 0x07) name = "max6654"; break; + case 0x09: + /* + * The chip_id of the MAX6690 holds the revision of the chip. + * The lowest 3 bits of the config1 register are unused and + * should return zero when read. + * Note that MAX6654 and MAX6690 are practically the same chips. + * The only diference is the rated accuracy. Rev. 1 of the + * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled + * MAX6654 was observed to have a chip ID of 0x09. + */ + if (!(config1 & 0x07) && convrate <= 0x07) + name = "max6690"; + break; case 0x4d: /* * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id From patchwork Wed May 25 13:57:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0F57AC4332F for ; Wed, 25 May 2022 14:00:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239830AbiEYOAV (ORCPT ); Wed, 25 May 2022 10:00:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244603AbiEYN7C (ORCPT ); Wed, 25 May 2022 09:59:02 -0400 Received: from mail-oo1-xc31.google.com (mail-oo1-xc31.google.com [IPv6:2607:f8b0:4864:20::c31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24B2AAE26E; Wed, 25 May 2022 06:58:46 -0700 (PDT) Received: by mail-oo1-xc31.google.com with SMTP id q7-20020a4adc47000000b0035f4d798376so3805282oov.6; Wed, 25 May 2022 06:58:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b/ZGCgIBEp8AMD68mP9NkD6nfR4ulY45JIBNTsS2fQI=; b=RTcC9btHA5Q7OChjAGQ0KWnGdtZKwq8kJ2taVeIPpe+stiQfQqWDne+0LqBsPIGedO eilTjCNY7kstMkumyTIxkSDwj5BwEWSwU2cQokkV43WZQ1ia3CJThzGuPyantcYXSkvM faDXWDFbQPwtz7j6whxmrvBShmA8aA7rPf9Fty5na4GJ8vx/jK011dl8Qy9emwsqci0Z fEvqgFBTRjDRAhNGwfVDlu6dQNMAwuUHjazmyD5A8EKRfCWWrsYASINxM93kiiz6jQW5 i96a16+y9HBXqTB73gkkYmeT8Nyx5IT4gRQXHhliBqAvoc0aYnfwa98dA0tTYMNstx6w DgmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=b/ZGCgIBEp8AMD68mP9NkD6nfR4ulY45JIBNTsS2fQI=; b=8AT8YMCR2YF/U4dm66tYSg9R094J915w0iDBp2EtzQF/APBXI68dgUArO2AfSMfrHw lvsuJ5ddp1lbIbuDrwrTJkeSfK8nQJh61dd7ejAcBfvQcDcILk9qPHMxbBIJol/E0GEA CGC7x9NNy4EfrJDe8JLuEDA6wBmqvz4n8lyrShrcHUpOTyWqTptorh1Mphy9kgUKVBZa 2NJXItHxHdAVQIYYuiGhrBo3bs4VHVxGKYgi0KJV1cvv8QzPPyGPqtmH9fHXhRnIhjYh yZ3RCSpEN+eZacpPx3DPR0JecZ3RMNF55VHO101/1d+ySSfNv2EYpN3AYZy3BJl1wF70 vhaQ== X-Gm-Message-State: AOAM530PzjjcTbTQzzd3cILCwD42eW5A/Cc/JuwIxcCsfK/D/tgr6Oej cECORuD76uwrMeoM/V/AQz5SX71abkhZDw== X-Google-Smtp-Source: ABdhPJy40x/hvUevpeVAXmRRXh00G0P8KdYomjxZo82BR6ZpfTUjylGWP2A9H9L+YVaDgQkwYfzjsA== X-Received: by 2002:a4a:2819:0:b0:40e:6f37:1ae8 with SMTP id h25-20020a4a2819000000b0040e6f371ae8mr8879821ooa.44.1653487125233; Wed, 25 May 2022 06:58:45 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id w9-20020a9d6389000000b0060ae12c51a5sm6122092otk.59.2022.05.25.06.58.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:44 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 23/40] hwmon: (lm90) Add flag to indicate support for minimum temperature limits Date: Wed, 25 May 2022 06:57:41 -0700 Message-Id: <20220525135758.2944744-24-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org A flag indicating support for minimum temperature limits doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 54 +++++++++++++++++++++++++------------------- 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 22ea75535ab4..abf1451c5652 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -192,6 +192,7 @@ enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, #define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/ #define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ #define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ +#define LM90_HAVE_LOW BIT(15) /* low limits */ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -369,7 +370,8 @@ static const struct lm90_params lm90_params[] = { [adm1032] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT - | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS, + | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS + | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -382,7 +384,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -390,7 +392,8 @@ static const struct lm90_params lm90_params[] = { [adt7461a] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP - | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS, + | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS + | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -398,7 +401,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC - | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT, + | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW, .alert_alarms = 0x1c7c, .max_convrate = 11, .resolution = 10, @@ -407,58 +410,58 @@ static const struct lm90_params lm90_params[] = { [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 7, }, [lm86] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm99] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7b, .max_convrate = 9, }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS, + | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6648] = { .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_BROKEN_ALERT, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6654] = { - .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS, + .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 7, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6657] = { .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6659] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -471,14 +474,14 @@ static const struct lm90_params lm90_params[] = { */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 7, }, [max6696] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x1c7c, .max_convrate = 6, .reg_status2 = MAX6696_REG_STATUS2, @@ -486,7 +489,7 @@ static const struct lm90_params lm90_params[] = { }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 8, }, @@ -497,7 +500,7 @@ static const struct lm90_params lm90_params[] = { * be set). */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7b, .max_convrate = 9, .reg_local_ext = SA56004_REG_LOCAL_TEMPL, @@ -505,7 +508,7 @@ static const struct lm90_params lm90_params[] = { [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS, + | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -514,7 +517,7 @@ static const struct lm90_params lm90_params[] = { [tmp461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -2161,10 +2164,15 @@ static int lm90_probe(struct i2c_client *client) info->type = hwmon_temp; info->config = data->channel_config; - data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | - HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM; - data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | - HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_FAULT; + data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX | + HWMON_T_MAX_ALARM; + data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX | + HWMON_T_MAX_ALARM | HWMON_T_FAULT; + + if (data->flags & LM90_HAVE_LOW) { + data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; + data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM; + } if (data->flags & LM90_HAVE_CRIT) { data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST; From patchwork Wed May 25 13:57:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C12F2C433F5 for ; Wed, 25 May 2022 13:59:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244758AbiEYN7f (ORCPT ); Wed, 25 May 2022 09:59:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232038AbiEYN7K (ORCPT ); Wed, 25 May 2022 09:59:10 -0400 Received: from mail-ot1-x331.google.com (mail-ot1-x331.google.com [IPv6:2607:f8b0:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C358AB0DE; Wed, 25 May 2022 06:58:47 -0700 (PDT) Received: by mail-ot1-x331.google.com with SMTP id l10-20020a9d7a8a000000b0060b151de434so6014149otn.2; Wed, 25 May 2022 06:58:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FB3mQBcVKuAp3ZiZ7Tsm3HzcSHmHse1JzHnZRr198DE=; b=N8Vf5jRnKkGT4g/wmFK8mYredI6JRH3CT2rrkRD/8XFCugj/B3hzfQiqg2umii6KqV l7vt8bwbLgY0qzXqJ1+d9voBvZT+g7QCY4m5EX7i35perO9GGI7AHsS9Deas4B7Qwpwo BGLL1uDABFTWLvb3+z1+GqilmV6Ysd2B5aDIEapRfpGLLBf4oq/X26oCakiTXzLiFFeG jQbo9cEjwplwkqYT12ZZuECTqiKLyulhigxx12nSL+eBzMV/DlYlGgvIyVj2UH6wXF+/ E1CCXInROcl412uKGTzpa5rEzRBzqin2t1GQenZfGIcGtj9o6o8iZg+AvAWTkQ2LHQCq 3CnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=FB3mQBcVKuAp3ZiZ7Tsm3HzcSHmHse1JzHnZRr198DE=; b=g5eNcWa3HazJo/TjscowkVjyzPKbejy40yfep6iNtZ9itBnQG+vEagdhQkUI6SuUOq Z9qucP5NNFO04nqZaBU/u23AmexfyxxCpvHLxwVSOlubOgEeSzcLAs02eTXZoHg+T97k 9O+oo4WoEE5ISwj5owOEEHc4AI5LiHashliPHKuNpCPqIhfAfZGtmPyP3J7J8gHyOtGz oXNXpitak8uAlZQMpC+lf53xqcUWVG5MAaUfnKUNSsjLnEWnz1yhKdcFK6koRT/sk4G3 G6/6MXOpXiFWCW3BKPM4iW/VqwHvz3qF42fOLHBkcvkiwC/YaAbcxYUbK3aw8W6o9Z4A 341g== X-Gm-Message-State: AOAM531FlkUPYD/GHVoQGPYX7LM05G9y5DvARKdNdJL10ZfJbO4leFUO cBaEj4N1AkDGYOuE2gEeMBt5ioZc72xKhA== X-Google-Smtp-Source: ABdhPJzaMBJZ6eHSQkdxc+2STq2Uh/rHr4M15r/ONB6k+XGuphjGC0BQGUhrQAYQ9ovAr18vKHcAFQ== X-Received: by 2002:a9d:69d7:0:b0:60b:cee:4cd0 with SMTP id v23-20020a9d69d7000000b0060b0cee4cd0mr6566309oto.145.1653487126993; Wed, 25 May 2022 06:58:46 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id e18-20020a056830201200b00606a6f74748sm6049977otp.25.2022.05.25.06.58.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:46 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 24/40] hwmon: (lm90) Add flag to indicate conversion rate support Date: Wed, 25 May 2022 06:57:42 -0700 Message-Id: <20220525135758.2944744-25-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org A flag indicating support for setting the conversion rate doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 66 ++++++++++++++++++++++++++------------------ 1 file changed, 39 insertions(+), 27 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index abf1451c5652..90c3a496bb6c 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -193,6 +193,7 @@ enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, #define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */ #define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ #define LM90_HAVE_LOW BIT(15) /* low limits */ +#define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -371,7 +372,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -384,7 +385,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -393,7 +394,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -401,7 +402,8 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC - | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW, + | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE, .alert_alarms = 0x1c7c, .max_convrate = 11, .resolution = 10, @@ -410,58 +412,61 @@ static const struct lm90_params lm90_params[] = { [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 7, }, [lm86] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm99] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7b, .max_convrate = 9, }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6648] = { .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW, + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6654] = { - .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 7, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6657] = { .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6659] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -474,14 +479,14 @@ static const struct lm90_params lm90_params[] = { */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 7, }, [max6696] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x1c7c, .max_convrate = 6, .reg_status2 = MAX6696_REG_STATUS2, @@ -489,7 +494,7 @@ static const struct lm90_params lm90_params[] = { }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 8, }, @@ -500,7 +505,7 @@ static const struct lm90_params lm90_params[] = { * be set). */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7b, .max_convrate = 9, .reg_local_ext = SA56004_REG_LOCAL_TEMPL, @@ -508,7 +513,8 @@ static const struct lm90_params lm90_params[] = { [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -517,7 +523,7 @@ static const struct lm90_params lm90_params[] = { [tmp461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -1979,7 +1985,8 @@ static void lm90_restore_conf(void *_data) cancel_delayed_work_sync(&data->alert_work); /* Restore initial configuration */ - lm90_write_convrate(data, data->convrate_orig); + if (data->flags & LM90_HAVE_CONVRATE) + lm90_write_convrate(data, data->convrate_orig); lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig); } @@ -1988,10 +1995,15 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) struct device_node *np = client->dev.of_node; int config, convrate; - convrate = lm90_read_reg(client, LM90_REG_CONVRATE); - if (convrate < 0) - return convrate; - data->convrate_orig = convrate; + if (data->flags & LM90_HAVE_CONVRATE) { + convrate = lm90_read_reg(client, LM90_REG_CONVRATE); + if (convrate < 0) + return convrate; + data->convrate_orig = convrate; + lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */ + } else { + data->update_interval = 500; + } /* * Start the conversions. @@ -2002,8 +2014,6 @@ static int lm90_init_client(struct i2c_client *client, struct lm90_data *data) data->config_orig = config; data->config = config; - lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */ - /* Check Temperature Range Select */ if (data->flags & LM90_HAVE_EXTENDED_TEMP) { if (of_property_read_bool(np, "ti,extended-range-enable")) @@ -2154,9 +2164,11 @@ static int lm90_probe(struct i2c_client *client) info->type = hwmon_chip; info->config = data->chip_config; - data->chip_config[0] = HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL; + data->chip_config[0] = HWMON_C_REGISTER_TZ; if (data->flags & LM90_HAVE_ALARMS) data->chip_config[0] |= HWMON_C_ALARMS; + if (data->flags & LM90_HAVE_CONVRATE) + data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL; data->info[1] = &data->temp_info; From patchwork Wed May 25 13:57:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861230 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EA21C433FE for ; Wed, 25 May 2022 13:59:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244637AbiEYN7g (ORCPT ); Wed, 25 May 2022 09:59:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244688AbiEYN7a (ORCPT ); Wed, 25 May 2022 09:59:30 -0400 Received: from mail-oi1-x235.google.com (mail-oi1-x235.google.com [IPv6:2607:f8b0:4864:20::235]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A568A5AAA; Wed, 25 May 2022 06:58:50 -0700 (PDT) Received: by mail-oi1-x235.google.com with SMTP id q8so25050356oif.13; Wed, 25 May 2022 06:58:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=o4wMKM4knFAO2Oh+lzwksFLiGAmKikVtsti1xElldMg=; b=dYkuXsRdbpQgIFQpqjZk5b3RWoQYTwKpFs5UavoJXiLDI/egbWMN82sC4Js+tbAhvB Wtegf9R/jNL4ByZ+nYMcKVG/QUb7nHcAZHZtOMlrXZl/XC/DLHHV1w5Ynsva7yfPx2gR jf40mYQ82YU+UOQCRq1tk2aIRq6ijfr+MnfM35FxuXzaZot1ZOOJBHadjB8d+LxSdWvx pk4uk2L85MuALcD78lr0U1kCsd9uEDgUb3TPxe5I+Zo66BJ7ZHUNxTcy3LO3JnG2F8G8 x69nhHB/9tIjDPFerkdQHoCyzz/tEYRMfxIne1+6kYibK3FH3mQP9pF3uJbVivf23bZk e3Ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=o4wMKM4knFAO2Oh+lzwksFLiGAmKikVtsti1xElldMg=; b=mlzBGY9IkDQrk2XhXptKkXBHHmMhCLPRaBOQepODnoxt/+Ti1dY0/gvF1dByvVFrjt POOY0JZWT3YZ9x65pBfpcXlATpnTcikkbOgERRzgXGeMNcrOyd9E0lXIITTop2v6kv62 r95kM9jM8O/1QINGQC2wYhdrvuj9wGu6l7afI4MrVB7sjTTkqw8AIEnm1fs6zY0O8FPv awpcIiQ5wwmRB44N8q/om7gVV6UZogqpWh5Whzu0kiqcb3D1zBo7kdKyatmsvnTzQZbM Bo8BFLOlezhw1Jpw+I8QIXIfFFhYqTdf62n47U+mr6pOya26TC2g56B+Q39sBoCLOZ67 MSZA== X-Gm-Message-State: AOAM531vHZD/3LPvlLciLm5Hy1IWqZgduCZzZO0L8vxW2qi6pgBooptr o46Jnn8eeE0+XvNOyFiGxv7lwwgeXQCq2w== X-Google-Smtp-Source: ABdhPJwBEQhWSOh3n4bKv1uzGP5ApM9YvUOAqI0MT8VjjQWCL5cM0e487kuF9KRmg2sLHwWB2KhMoQ== X-Received: by 2002:a05:6808:1150:b0:328:b7dc:dac5 with SMTP id u16-20020a056808115000b00328b7dcdac5mr5375328oiu.224.1653487128931; Wed, 25 May 2022 06:58:48 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id eo44-20020a056870ecac00b000f2c4ebb832sm442165oab.10.2022.05.25.06.58.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:48 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 25/40] hwmon: (lm90) Add support for MAX6642 Date: Wed, 25 May 2022 06:57:43 -0700 Message-Id: <20220525135758.2944744-26-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org MAX6642 is a reduced version of LM90 with no low limits and no conversion rate register. Its alert functionality is broken, similar to many other chips supported by the lm90 driver. After this change, the stand-alone max6642 driver is only needed if the lm90 driver is disabled. Make it dependent on SENSORS_LM90=n to show that it is not needed if the lm90 driver is enabled. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 16 ++++++++ drivers/hwmon/Kconfig | 5 ++- drivers/hwmon/lm90.c | 78 +++++++++++++++++++++++++++++------- 3 files changed, 83 insertions(+), 16 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 45bc333a1219..313b18f6531d 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -113,6 +113,16 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=NCT1008 + * Maxim MAX6642 + + Prefix: 'max6642' + + Addresses scanned: I2C 0x48-0x4f + + Datasheet: Publicly available at the Maxim website + + http://datasheets.maxim-ic.com/en/ds/MAX6642.pdf + * Maxim MAX6646 Prefix: 'max6646' @@ -362,6 +372,12 @@ ADT7481, ADT7482, ADT7483: * Two remote sensors * Selectable address (ADT7483) +MAX6642: + * No critical limit register + * Conversion rate not configurable + * Better local resolution (10 bit) + * 10 bit external sensor resolution + MAX6646, MAX6647, MAX6649: * Better local resolution * Extended range unsigned external temperature diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index df54628bd36b..39ce1b2ccbb3 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1102,6 +1102,7 @@ config SENSORS_MAX6639 config SENSORS_MAX6642 tristate "Maxim MAX6642 sensor chip" depends on I2C + depends on SENSORS_LM90=n help If you say yes here you get support for MAX6642 sensor chip. MAX6642 is a SMBus-Compatible Remote/Local Temperature Sensor @@ -1360,8 +1361,8 @@ config SENSORS_LM90 If you say yes here you get support for National Semiconductor LM90, LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, ADT7461A, ADT7481, ADT7482, and ADT7483A, - Maxim MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, - MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, + Maxim MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, + MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, ON Semiconductor NCT1008, Winbond/Nuvoton W83L771W/G/AWG/ASG, Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 90c3a496bb6c..78eda648d960 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -120,7 +120,7 @@ static const unsigned short normal_i2c[] = { 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, - max6646, max6648, max6654, max6657, max6659, max6680, max6696, + max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -230,6 +230,7 @@ static const struct i2c_device_id lm90_id[] = { { "lm86", lm86 }, { "lm89", lm86 }, { "lm99", lm99 }, + { "max6642", max6642 }, { "max6646", max6646 }, { "max6647", max6646 }, { "max6648", max6648 }, @@ -434,6 +435,12 @@ static const struct lm90_params lm90_params[] = { .alert_alarms = 0x7b, .max_convrate = 9, }, + [max6642] = { + .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED, + .alert_alarms = 0x50, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, + .resolution = 10, + }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW @@ -1666,18 +1673,18 @@ static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, return name; } -static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, - int config1, int convrate) +static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address, + int chip_id, int config1, int convrate) { int man_id, emerg, emerg2, status2; int address = client->addr; const char *name = NULL; - if ((address >= 0x48 && address <= 0x4b) || address == 0x4f) - return NULL; - switch (chip_id) { case 0x01: + if (!common_address) + break; + /* * We read MAX6659_REG_REMOTE_EMERG twice, and re-read * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG @@ -1724,7 +1731,7 @@ static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, * The lowest 3 bits of the config1 register are unused and * should return zero when read. */ - if (!(config1 & 0x07) && convrate <= 0x07) + if (common_address && !(config1 & 0x07) && convrate <= 0x07) name = "max6654"; break; case 0x09: @@ -1737,16 +1744,21 @@ static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled * MAX6654 was observed to have a chip ID of 0x09. */ - if (!(config1 & 0x07) && convrate <= 0x07) + if (common_address && !(config1 & 0x07) && convrate <= 0x07) name = "max6690"; break; case 0x4d: /* - * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id + * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id * register. Reading from that address will return the last * read value, which in our case is those of the man_id - * register, or 0x4d. Likewise, the config1 register seems to - * lack a low nibble, so the value will be those of the previous + * register, or 0x4d. + * MAX6642 does not have a conversion rate register, nor low + * limit registers. Reading from those registers returns the + * last read value. + * + * For MAX6657, MAX6658 and MAX6659, the config1 register lacks + * a low nibble, so the value will be those of the previous * read, so in our case again those of the man_id register. * MAX6659 has a third set of upper temperature limit registers. * Those registers also return values on MAX6657 and MAX6658, @@ -1754,8 +1766,40 @@ static const char *lm90_detect_maxim(struct i2c_client *client, int chip_id, * For this reason it will be mis-detected as MAX6657 if its * address is 0x4c. */ - if ((address == 0x4c || address == 0x4d || address == 0x4e) && - (config1 & 0x1f) == 0x0d && convrate <= 0x09) { + if (address >= 0x48 && address <= 0x4f && config1 == convrate && + !(config1 & 0x0f)) { + int regval; + + /* + * We know that this is not a MAX6657/58/59 because its + * configuration register has the wrong value and it does + * not appear to have a conversion rate register. + */ + + /* re-read manufacturer ID to have a good baseline */ + if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d) + break; + + /* check various non-existing registers */ + if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d || + i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d || + i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d) + break; + + /* check for unused status register bits */ + regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); + if (regval < 0 || (regval & 0x2b)) + break; + + /* re-check unsupported registers */ + if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval || + i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval || + i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval) + break; + + name = "max6642"; + } else if ((address == 0x4c || address == 0x4d || address == 0x4e) && + (config1 & 0x1f) == 0x0d && convrate <= 0x09) { if (address == 0x4c) name = "max6657"; else @@ -1927,6 +1971,11 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) struct i2c_adapter *adapter = client->adapter; int man_id, chip_id, config1, convrate; const char *name = NULL; + int address = client->addr; + bool common_address = + (address >= 0x18 && address <= 0x1a) || + (address >= 0x29 && address <= 0x2b) || + (address >= 0x4c && address <= 0x4e); if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; @@ -1950,7 +1999,8 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) name = lm90_detect_gmt(client, chip_id, config1, convrate); break; case 0x4d: /* Maxim Integrated */ - name = lm90_detect_maxim(client, chip_id, config1, convrate); + name = lm90_detect_maxim(client, common_address, chip_id, + config1, convrate); break; case 0x55: /* TI */ name = lm90_detect_ti(client, chip_id, config1, convrate); From patchwork Wed May 25 13:57:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6562BC433EF for ; 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Wed, 25 May 2022 06:58:50 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 26/40] hwmon: (lm90) Let lm90_read16() handle 8-bit read operations Date: Wed, 25 May 2022 06:57:44 -0700 Message-Id: <20220525135758.2944744-27-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Simplify the code a bit by handling single-register read operations in lm90_read16(). All we need to do is to skip the low-byte read operation if the register address is 0. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 47 ++++++++++++++++---------------------------- 1 file changed, 17 insertions(+), 30 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 78eda648d960..20208f127508 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -673,6 +673,10 @@ static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl, oldh = lm90_read_reg(client, regh); if (oldh < 0) return oldh; + + if (!regl) + return oldh << 8; + l = lm90_read_reg(client, regl); if (l < 0) return l; @@ -804,29 +808,19 @@ static int lm90_update_limits(struct device *dev) data->temp_hyst = val; } - val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH); + val = lm90_read16(client, LM90_REG_REMOTE_LOWH, + (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0, + false); if (val < 0) return val; - data->temp[REMOTE_LOW] = val << 8; + data->temp[REMOTE_LOW] = val; - if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { - val = lm90_read_reg(client, LM90_REG_REMOTE_LOWL); - if (val < 0) - return val; - data->temp[REMOTE_LOW] |= val; - } - - val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH); + val = lm90_read16(client, LM90_REG_REMOTE_HIGHH, + (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0, + false); if (val < 0) return val; - data->temp[REMOTE_HIGH] = val << 8; - - if (data->flags & LM90_HAVE_REM_LIMIT_EXT) { - val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHL); - if (val < 0) - return val; - data->temp[REMOTE_HIGH] |= val; - } + data->temp[REMOTE_HIGH] = val; if (data->flags & LM90_HAVE_OFFSET) { val = lm90_read16(client, LM90_REG_REMOTE_OFFSH, @@ -1063,18 +1057,11 @@ static int lm90_update_device(struct device *dev) return val; data->temp[LOCAL_HIGH] = val << 8; - if (data->reg_local_ext) { - val = lm90_read16(client, LM90_REG_LOCAL_TEMP, - data->reg_local_ext, true); - if (val < 0) - return val; - data->temp[LOCAL_TEMP] = val; - } else { - val = lm90_read_reg(client, LM90_REG_LOCAL_TEMP); - if (val < 0) - return val; - data->temp[LOCAL_TEMP] = val << 8; - } + val = lm90_read16(client, LM90_REG_LOCAL_TEMP, + data->reg_local_ext, true); + if (val < 0) + return val; + data->temp[LOCAL_TEMP] = val; val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_TEMPL, true); if (val < 0) From patchwork Wed May 25 13:57:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78C3AC433EF for ; Wed, 25 May 2022 14:00:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244626AbiEYN7u (ORCPT ); Wed, 25 May 2022 09:59:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244706AbiEYN7d (ORCPT ); Wed, 25 May 2022 09:59:33 -0400 Received: from mail-oi1-x22e.google.com (mail-oi1-x22e.google.com [IPv6:2607:f8b0:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85941AEE0A; Wed, 25 May 2022 06:58:53 -0700 (PDT) Received: by mail-oi1-x22e.google.com with SMTP id m125so2069831oia.6; Wed, 25 May 2022 06:58:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5hp0dbekvuABHpYBUEs96KVN5ghBlLRpdsHmk4A4gsY=; b=TwKEsWyvpZ5GlzTloFURMTbxmwYufAFPvBfAvNoLWcwZFhoEHowOPFlxE7iFsANSCf P2kkioCKJ6fhEgLydhYgp2Je9alxCdb4kGEREmMhKkPj439cIoyxd+ASO/GwTHYfZHpA KUtnLSPrdk6bpgVm4bM9nUgAfm4DejsOVpibG2Jrt7WPdJIQF5SbsIzy5bSVdWup3gVy jOgVFgcs7IP9qD4qg3BD1f8FdQdbZaMuvRhqr9cF+6H9Z3bRCCHFF3VxAmO/tRj9zQHh Gqej0VZ8qwKXR886642M7jGc4lMbqJVoNA1pnJFQk+eVySCmQiEyhyZXJV9DO0btVecZ NJpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=5hp0dbekvuABHpYBUEs96KVN5ghBlLRpdsHmk4A4gsY=; b=R3d3DZJX8J4t88GVlxJ5t1tZ4roYG2cgjfM+uhqxFK5bS5R4nl0b4j9cMvbPLBp2c2 Ux/TOw5iT3KRrQ239JUpqoweUxurMvkdqE71zR/ONiXme1Q+Dw5XYwnR9TcJvlfiOVUW 6T/sK+74QtM1v+lr2Pm9CRz8tOQTzEfMLsT0Usb19dJXiuBGIYpamNK8W9jYIMy05Bvu +RF2WO4JsjSimC0nyT/JBM/z75YKYwnoFk+ST7DWjq7ZAf8DN8XtL+Z/iLU/4g1WHiEp QCAiNWh9xoXyGb9J+VbrNA+tqNQkpMhtAmafsLMe2tUxCPGFH2+th3X+TVyo7tgJdMkx cyEg== X-Gm-Message-State: AOAM530kBuhHE9UNZ6cWMyhXZeNCgt7EiDRytoPZPjVwHyedd24wYG55 GazBQqK86WLql08oOPcaFao0R40LQTX8qQ== X-Google-Smtp-Source: ABdhPJw8dxE7PUc0uURtb9tDBlDYEPUcWtaiu1AqQJXisaxmHjzkVz/mgRmstw5u4//tZFyGU70xdQ== X-Received: by 2002:aca:f1a:0:b0:32a:e909:a490 with SMTP id 26-20020aca0f1a000000b0032ae909a490mr5629095oip.239.1653487132634; Wed, 25 May 2022 06:58:52 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 126-20020a4a0384000000b0035eb4e5a6cdsm6597357ooi.35.2022.05.25.06.58.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:58:52 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 27/40] hwmon: (lm90) Introduce 16-bit register write function Date: Wed, 25 May 2022 06:57:45 -0700 Message-Id: <20220525135758.2944744-28-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Introduce 16-bit register write function to simplify the code in some places. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 20208f127508..46837f0bf62e 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -665,6 +665,21 @@ static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val) return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val); } +/* + * Write into 16-bit LM90 register. + * Convert register addresses to write address if needed, then execute the + * operation. + */ +static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val) +{ + int ret; + + ret = lm90_write_reg(client, regh, val >> 8); + if (ret < 0 || !regl) + return ret; + return lm90_write_reg(client, regl, val & 0xff); +} + static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl, bool is_volatile) { @@ -1240,12 +1255,8 @@ static int lm90_set_temp(struct lm90_data *data, int index, int channel, long va if (channel > 1) lm90_select_remote_channel(data, true); - err = lm90_write_reg(client, regh, data->temp[index] >> 8); - if (err < 0) - goto deselect; - if (regl) - err = lm90_write_reg(client, regl, data->temp[index] & 0xff); -deselect: + err = lm90_write16(client, regh, regl, data->temp[index]); + if (channel > 1) lm90_select_remote_channel(data, false); @@ -1405,14 +1416,8 @@ static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val) val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, REMOTE_OFFSET)); data->temp[REMOTE_OFFSET] = val; - err = i2c_smbus_write_byte_data(data->client, - LM90_REG_REMOTE_OFFSH, - val >> 8); - if (err) - break; - err = i2c_smbus_write_byte_data(data->client, - LM90_REG_REMOTE_OFFSL, - val & 0xff); + err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, + LM90_REG_REMOTE_OFFSL, val); break; default: err = -EOPNOTSUPP; From patchwork Wed May 25 13:57:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70B43C433F5 for ; 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Wed, 25 May 2022 06:58:53 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 28/40] hwmon: (lm90) Support MAX1617 and LM84 Date: Wed, 25 May 2022 06:57:46 -0700 Message-Id: <20220525135758.2944744-29-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org MAX1617 and LM84 are stripped-down versions of LM90, so they can easily be supported by the LM90 driver. The most difficult part is chip detection, since those old chips do not support manufacturer ID or chip ID registers. The "alarms" attribute is enabled for both chips to match the functionality of the adm1021 driver. Chip detection was improved and is less prone to misdetection than the chip detection in the adm1021 driver. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 45 +++++- drivers/hwmon/Kconfig | 9 +- drivers/hwmon/lm90.c | 264 ++++++++++++++++++++++++++++++----- 3 files changed, 275 insertions(+), 43 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 313b18f6531d..8fe9013b9c39 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -3,6 +3,14 @@ Kernel driver lm90 Supported chips: + * National Semiconductor LM84 + + Prefix: 'lm84' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the National Semiconductor website + * National Semiconductor LM90 Prefix: 'lm90' @@ -113,6 +121,22 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=NCT1008 + * Maxim MAX1617 + + Prefix: 'max1617' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the Maxim website + + * Maxim MAX1617A + + Prefix: 'max1617a' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the Maxim website + * Maxim MAX6642 Prefix: 'max6642' @@ -325,6 +349,12 @@ The LM90 is a digital temperature sensor. It senses its own temperature as well as the temperature of up to one external diode. It is compatible with many other devices, many of which are supported by this driver. +The family of chips supported by this driver is derived from MAX1617. +This chip as well as various compatible chips support a local and a remote +temperature sensor with 8 bit accuracy. Later chips provide improved accuracy +and other additional features such as hysteresis and temperature offset +registers. + Note that there is no easy way to differentiate between the MAX6657, MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only supported by this driver if the chip is located at address 0x4d or 0x4e, @@ -332,15 +362,22 @@ or if the chip type is explicitly selected as max6659. The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously can't (and don't need to) be distinguished. -The specificity of this family of chipsets over the ADM1021/LM84 -family is that it features critical limits with hysteresis, and an -increased resolution of the remote temperature measurement. - The different chipsets of the family are not strictly identical, although very similar. For reference, here comes a non-exhaustive list of specific features: +LM84: + * 8 bit sensor resolution + +MAX1617: + * 8 bit sensor resolution + * Low temperature limits + LM90: + * 11 bit resolution for remote temperature sensor + * Temperature offset register for remote temperature sensor + * Low and critical temperature limits + - Configurable conversion rate * Filter and alert configuration register at 0xBF. * ALERT is triggered by temperatures over critical limits. diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 39ce1b2ccbb3..1dd812cf15bb 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1358,11 +1358,12 @@ config SENSORS_LM90 tristate "National Semiconductor LM90 and compatibles" depends on I2C help - If you say yes here you get support for National Semiconductor LM90, - LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, ADT7461A, + If you say yes here you get support for National Semiconductor LM84, + LM90, LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, ADT7461A, ADT7481, ADT7482, and ADT7483A, - Maxim MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, - MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, + Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, + MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, + MAX6696, ON Semiconductor NCT1008, Winbond/Nuvoton W83L771W/G/AWG/ASG, Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 46837f0bf62e..09c3b9eb2f8b 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -80,6 +80,9 @@ * They are mostly compatible with ADT7461 except for local temperature * low byte register and max conversion rate. * + * This driver also supports MAX1617 and various clones such as G767 + * and NE1617. Such clones will be detected as MAX1617. + * * Since the LM90 was the first chipset supported by this driver, most * comments will refer to this chipset, but are actually general and * concern all supported chipsets, unless mentioned otherwise. @@ -119,8 +122,8 @@ static const unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, - max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, +enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm86, lm90, lm99, + max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -194,6 +197,7 @@ enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm86, lm90, lm99, #define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/ #define LM90_HAVE_LOW BIT(15) /* low limits */ #define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */ +#define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -226,10 +230,12 @@ static const struct i2c_device_id lm90_id[] = { { "adt7482", adt7481 }, { "adt7483a", adt7481 }, { "g781", g781 }, - { "lm90", lm90 }, + { "lm84", lm84 }, { "lm86", lm86 }, { "lm89", lm86 }, + { "lm90", lm90 }, { "lm99", lm99 }, + { "max1617", max1617 }, { "max6642", max6642 }, { "max6646", max6646 }, { "max6647", max6646 }, @@ -373,7 +379,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -386,7 +392,8 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -395,7 +402,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -404,7 +411,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x1c7c, .max_convrate = 11, .resolution = 10, @@ -413,38 +420,54 @@ static const struct lm90_params lm90_params[] = { [g781] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 7, }, + [lm84] = { + .flags = LM90_HAVE_ALARMS, + .resolution = 8, + }, [lm86] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7b, .max_convrate = 9, }, [lm99] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7b, .max_convrate = 9, }, + [max1617] = { + .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT | + LM90_HAVE_LOW | LM90_HAVE_ALARMS, + .alert_alarms = 0x78, + .resolution = 8, + .max_convrate = 7, + }, [max6642] = { - .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED, + .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x50, - .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, .resolution = 10, + .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -452,28 +475,30 @@ static const struct lm90_params lm90_params[] = { [max6648] = { .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 6, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6654] = { .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 7, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6657] = { .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, [max6659] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 8, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, @@ -486,14 +511,16 @@ static const struct lm90_params lm90_params[] = { */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 7, }, [max6696] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x1c7c, .max_convrate = 6, .reg_status2 = MAX6696_REG_STATUS2, @@ -501,7 +528,8 @@ static const struct lm90_params lm90_params[] = { }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 8, }, @@ -512,7 +540,8 @@ static const struct lm90_params lm90_params[] = { * be set). */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7b, .max_convrate = 9, .reg_local_ext = SA56004_REG_LOCAL_TEMPL, @@ -521,7 +550,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -530,7 +559,8 @@ static const struct lm90_params lm90_params[] = { [tmp461] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT - | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE, + | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -596,6 +626,7 @@ struct lm90_data { u8 max_convrate; /* Maximum conversion rate */ u8 reg_status2; /* 2nd status register (optional) */ u8 reg_local_ext; /* local extension register offset */ + u8 reg_remote_ext; /* remote temperature low byte */ /* registers values */ u16 temp[TEMP_REG_NUM]; @@ -1078,7 +1109,7 @@ static int lm90_update_device(struct device *dev) return val; data->temp[LOCAL_TEMP] = val; val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, - LM90_REG_REMOTE_TEMPL, true); + data->reg_remote_ext, true); if (val < 0) return val; data->temp[REMOTE_TEMP] = val; @@ -1089,7 +1120,7 @@ static int lm90_update_device(struct device *dev) return val; val = lm90_read16(client, LM90_REG_REMOTE_TEMPH, - LM90_REG_REMOTE_TEMPL, true); + data->reg_remote_ext, true); if (val < 0) { lm90_select_remote_channel(data, false); return val; @@ -1150,6 +1181,9 @@ static int lm90_temp_get_resolution(struct lm90_data *data, int index) { switch (index) { case REMOTE_TEMP: + if (data->reg_remote_ext) + return data->resolution; + return 8; case REMOTE_OFFSET: case REMOTE2_TEMP: return data->resolution; @@ -1558,11 +1592,118 @@ static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type, } } -/* - * Per-manufacturer chip detect functions. - * Functions are expected to return a pointer to the chip name or NULL - * if detection was not successful. - */ +static const char *lm90_detect_lm84(struct i2c_client *client) +{ + static const u8 regs[] = { + LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH, + LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH + }; + int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); + int reg1, reg2, reg3, reg4; + bool nonzero = false; + u8 ff = 0xff; + int i; + + if (status < 0 || (status & 0xab)) + return NULL; + + /* + * For LM84, undefined registers return the most recent value. + * Repeat several times, each time checking against a different + * (presumably) existing register. + */ + for (i = 0; i < ARRAY_SIZE(regs); i++) { + reg1 = i2c_smbus_read_byte_data(client, regs[i]); + reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL); + reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); + reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); + + if (reg1 < 0) + return NULL; + + /* If any register has a different value, this is not an LM84 */ + if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1) + return NULL; + + nonzero |= reg1 || reg2 || reg3 || reg4; + ff &= reg1; + } + /* + * If all registers always returned 0 or 0xff, all bets are off, + * and we can not make any predictions about the chip type. + */ + return nonzero && ff != 0xff ? "lm84" : NULL; +} + +static const char *lm90_detect_max1617(struct i2c_client *client, int config1) +{ + int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); + int llo, rlo, lhi, rhi; + + if (status < 0 || (status & 0x03)) + return NULL; + + if (config1 & 0x3f) + return NULL; + + /* + * Fail if unsupported registers return anything but 0xff. + * The calling code already checked man_id and chip_id. + * A byte read operation repeats the most recent read operation + * and should also return 0xff. + */ + if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff || + i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff || + i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff || + i2c_smbus_read_byte(client) != 0xff) + return NULL; + + llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW); + rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH); + + lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); + rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH); + + if (llo < 0 || rlo < 0) + return NULL; + + /* + * A byte read operation repeats the most recent read and should + * return the same value. + */ + if (i2c_smbus_read_byte(client) != rhi) + return NULL; + + /* + * The following two checks are marginal since the checked values + * are strictly speaking valid. + */ + + /* fail for negative high limits; this also catches read errors */ + if ((s8)lhi < 0 || (s8)rhi < 0) + return NULL; + + /* fail if low limits are larger than or equal to high limits */ + if ((s8)llo >= lhi || (s8)rlo >= rhi) + return NULL; + + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) { + /* + * Word read operations return 0xff in second byte + */ + if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) != + 0xffff) + return NULL; + if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) != + (config1 | 0xff00)) + return NULL; + if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) != + (lhi | 0xff00)) + return NULL; + } + + return "max1617"; +} static const char *lm90_detect_national(struct i2c_client *client, int chip_id, int config1, int convrate) @@ -1712,10 +1853,29 @@ static const char *lm90_detect_maxim(struct i2c_client *client, bool common_addr * The chip_id register of the MAX6680 and MAX6681 holds the * revision of the chip. The lowest bit of the config1 register * is unused and should return zero when read, so should the - * second to last bit of config1 (software reset). + * second to last bit of config1 (software reset). Register + * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and + * should differ from emerg2, and emerg2 should match man_id + * since it does not exist. */ - else if (!(config1 & 0x03) && convrate <= 0x07) + else if (!(config1 & 0x03) && convrate <= 0x07 && + emerg2 == man_id && emerg2 != status2) name = "max6680"; + /* + * MAX1617A does not have any extended registers (register + * address 0x10 or higher) except for manufacturer and + * device ID registers. Unlike other chips of this series, + * unsupported registers were observed to return a fixed value + * of 0x01. + * Note: Multiple chips with different markings labeled as + * "MAX1617" (no "A") were observed to report manufacturer ID + * 0x4d and device ID 0x01. It is unknown if other variants of + * MAX1617/MAX617A with different behavior exist. The detection + * code below works for those chips. + */ + else if (!(config1 & 0x03f) && convrate <= 0x07 && + emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01) + name = "max1617"; break; case 0x08: /* @@ -1961,7 +2121,7 @@ static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) { struct i2c_adapter *adapter = client->adapter; - int man_id, chip_id, config1, convrate; + int man_id, chip_id, config1, convrate, lhigh; const char *name = NULL; int address = client->addr; bool common_address = @@ -1972,15 +2132,43 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; + /* + * Get well defined register value for chips with neither man_id nor + * chip_id registers. + */ + lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH); + /* detection and identification */ man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1); convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); - if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0) + if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0) return -ENODEV; + /* Bail out immediately if all register report the same value */ + if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate) + return -ENODEV; + + /* + * If reading man_id and chip_id both return the same value as lhigh, + * the chip may not support those registers and return the most recent read + * value. Check again with a different register and handle accordingly. + */ + if (man_id == lhigh && chip_id == lhigh) { + convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE); + man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID); + chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID); + if (convrate < 0 || man_id < 0 || chip_id < 0) + return -ENODEV; + if (man_id == convrate && chip_id == convrate) + man_id = -1; + } switch (man_id) { + case -1: /* Chip does not support man_id / chip_id */ + if (common_address && !convrate && !(config1 & 0x7f)) + name = lm90_detect_lm84(client); + break; case 0x01: /* National Semiconductor */ name = lm90_detect_national(client, chip_id, config1, convrate); break; @@ -2003,6 +2191,10 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) case 0xa1: /* NXP Semiconductor/Philips */ name = lm90_detect_nxp(client, chip_id, config1, convrate); break; + case 0xff: /* MAX1617, G767, NE1617 */ + if (common_address && chip_id == 0xff && convrate < 8) + name = lm90_detect_max1617(client, config1); + break; default: break; } @@ -2263,6 +2455,8 @@ static int lm90_probe(struct i2c_client *client) } data->reg_local_ext = lm90_params[data->kind].reg_local_ext; + if (data->flags & LM90_HAVE_REMOTE_EXT) + data->reg_remote_ext = LM90_REG_REMOTE_TEMPL; data->reg_status2 = lm90_params[data->kind].reg_status2; /* Set maximum conversion rate */ From patchwork Wed May 25 13:57:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861246 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BFF5C433EF for ; Wed, 25 May 2022 14:00:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233535AbiEYOAd (ORCPT ); Wed, 25 May 2022 10:00:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244740AbiEYN7d (ORCPT ); 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Wed, 25 May 2022 06:58:55 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 29/40] hwmon: (lm90) Add support for ADM1021, ADM1021A, and ADM1023 Date: Wed, 25 May 2022 06:57:47 -0700 Message-Id: <20220525135758.2944744-30-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Both chips are quite similar to other chips of this series, so add support for them to the lm90 driver. Also mention ON Semiconductor NCT210, which is pin and register compatible to ADM1021A. None of the chips support the secondary manufacturer and chip ID registers at 0x3e and 0x3f, but return 0 when reading from those registers. Use that information to improve the accuracy of chip detection code. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 23 +++++++++++++++++- drivers/hwmon/Kconfig | 4 +-- drivers/hwmon/lm90.c | 47 ++++++++++++++++++++++++++++++++---- 3 files changed, 66 insertions(+), 8 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 8fe9013b9c39..699ac963722b 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -51,6 +51,22 @@ Supported chips: http://www.national.com/mpf/LM/LM86.html + * Analog Devices ADM1021 + + Prefix: 'adm1021' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the Analog Devices website + + * Analog Devices ADM1021A/ADM1023 + + Prefix: 'adm1023' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the Analog Devices website + * Analog Devices ADM1032 Prefix: 'adm1032' @@ -369,10 +385,15 @@ features: LM84: * 8 bit sensor resolution -MAX1617: +ADM1021, MAX1617: * 8 bit sensor resolution * Low temperature limits +ADM1021A, ADM1023: + * Temperature offset register for remote temperature sensor + * 11 bit resolution for remote temperature sensor + * Low temperature limits + LM90: * 11 bit resolution for remote temperature sensor * Temperature offset register for remote temperature sensor diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 1dd812cf15bb..50fa255b1e3c 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1359,8 +1359,8 @@ config SENSORS_LM90 depends on I2C help If you say yes here you get support for National Semiconductor LM84, - LM90, LM86, LM89 and LM99, Analog Devices ADM1032, ADT7461, ADT7461A, - ADT7481, ADT7482, and ADT7483A, + LM90, LM86, LM89 and LM99, Analog Devices ADM2021, ADM1021A, ADM1023, + ADM1032, ADT7461, ADT7461A, ADT7481, ADT7482, and ADT7483A, Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 09c3b9eb2f8b..40c012bc6ca6 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -122,7 +122,8 @@ static const unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; -enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm86, lm90, lm99, +enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, + g781, lm84, lm86, lm90, lm99, max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -223,6 +224,8 @@ enum chips { adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm86, lm90, lm99, */ static const struct i2c_device_id lm90_id[] = { + { "adm1021", max1617 }, + { "adm1023", adm1023 }, { "adm1032", adm1032 }, { "adt7461", adt7461 }, { "adt7461a", adt7461a }, @@ -375,6 +378,14 @@ struct lm90_params { }; static const struct lm90_params lm90_params[] = { + [adm1023] = { + .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT + | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, + .alert_alarms = 0x7c, + .resolution = 8, + .max_convrate = 7, + }, [adm1032] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT @@ -1740,19 +1751,43 @@ static const char *lm90_detect_national(struct i2c_client *client, int chip_id, return name; } -static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, - int config1, int convrate) +static const char *lm90_detect_analog(struct i2c_client *client, bool common_address, + int chip_id, int config1, int convrate) { + int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS); int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2); int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID); int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID); int address = client->addr; const char *name = NULL; - if (config2 < 0 || man_id2 < 0 || chip_id2 < 0) + if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0) return NULL; switch (chip_id) { + case 0x00 ... 0x0f: /* ADM1021, undocumented */ + if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && + !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "adm1021"; + break; + case 0x30 ... 0x3f: /* ADM1021A, ADM1023 */ + /* + * ADM1021A and compatible chips will be mis-detected as + * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both + * found to have a Chip ID of 0x3c. + * ADM1021A does not officially support low byte registers + * (0x12 .. 0x14), but a chip labeled ADM1021A does support it. + * Official support for the temperature offset high byte + * register (0x11) was added to revision F of the ADM1021A + * datasheet. + * It is currently unknown if there is a means to distinguish + * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist + * which differ in functionality from ADM1023. + */ + if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && + !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "adm1023"; + break; case 0x40 ... 0x4f: /* ADM1032 */ if (man_id2 == 0x00 && chip_id2 == 0x00 && (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && @@ -1793,6 +1828,7 @@ static const char *lm90_detect_analog(struct i2c_client *client, int chip_id, break; case 0x94: /* ADT7483 */ if (man_id2 == 0x41 && chip_id2 == 0x83 && + common_address && ((address >= 0x18 && address <= 0x1a) || (address >= 0x29 && address <= 0x2b) || (address >= 0x4c && address <= 0x4e)) && @@ -2173,7 +2209,8 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) name = lm90_detect_national(client, chip_id, config1, convrate); break; case 0x41: /* Analog Devices */ - name = lm90_detect_analog(client, chip_id, config1, convrate); + name = lm90_detect_analog(client, common_address, chip_id, config1, + convrate); break; case 0x47: /* GMT */ name = lm90_detect_gmt(client, chip_id, config1, convrate); From patchwork Wed May 25 13:57:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861244 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6784EC433F5 for ; Wed, 25 May 2022 14:00:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231764AbiEYOAb (ORCPT ); Wed, 25 May 2022 10:00:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244650AbiEYN7d (ORCPT ); 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Wed, 25 May 2022 06:58:57 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 30/40] hwmon: (lm90) Add remaining chips supported by adm1021 driver Date: Wed, 25 May 2022 06:57:48 -0700 Message-Id: <20220525135758.2944744-31-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org All chips supported by the ADM1021 driver are also supported by the LM90 driver. Make that support official. After this change, the adm1021 driver is only needed if the lm90 driver is disabled. Also, the adm1021 driver misdetects a variety of chips as MAX1617A, which is unwanted if any of those chips is in the system. For this reason. make the adm1021 driver dependent on !SENSORS_LM90 to show that it is not needed if the lm90 driver is enabled, and to avoid misdetection if a chip supported by the lm90 driver is in the system. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 34 +++++++++++++++++++++++++++++++++- drivers/hwmon/Kconfig | 1 + drivers/hwmon/lm90.c | 26 ++++++++++++++++++++++++++ 3 files changed, 60 insertions(+), 1 deletion(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index 699ac963722b..dfbdfe11606e 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -355,6 +355,38 @@ Supported chips: https://www.ti.com/lit/gpn/tmp461 + * Philips NE1617, NE1617A + + Prefix: 'max1617' (probably detected as a max1617) + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheets: Publicly available at the Philips website + + * Genesys Logic GL523SM + + Prefix: 'gl523sm' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: + + * TI THMC10 + + Prefix: 'thmc10' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the TI website + + * Onsemi MC1066 + + Prefix: 'mc1066' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the Onsemi website + Author: Jean Delvare @@ -385,7 +417,7 @@ features: LM84: * 8 bit sensor resolution -ADM1021, MAX1617: +ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10: * 8 bit sensor resolution * Low temperature limits diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 50fa255b1e3c..bb952287fcee 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -100,6 +100,7 @@ config SENSORS_AD7418 config SENSORS_ADM1021 tristate "Analog Devices ADM1021 and compatibles" depends on I2C + depends on SENSORS_LM90=n help If you say yes here you get support for Analog Devices ADM1021 and ADM1023 sensor chips and clones: Maxim MAX1617 and MAX1617A, diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 40c012bc6ca6..97453a7de1fa 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -233,6 +233,7 @@ static const struct i2c_device_id lm90_id[] = { { "adt7482", adt7481 }, { "adt7483a", adt7481 }, { "g781", g781 }, + { "gl523sm", max1617 }, { "lm84", lm84 }, { "lm86", lm86 }, { "lm89", lm86 }, @@ -254,9 +255,11 @@ static const struct i2c_device_id lm90_id[] = { { "max6692", max6648 }, { "max6695", max6696 }, { "max6696", max6696 }, + { "mc1066", max1617 }, { "nct1008", adt7461a }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, + { "thmc10", max1617 }, { "tmp451", tmp451 }, { "tmp461", tmp461 }, { } @@ -2125,6 +2128,18 @@ static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id, return NULL; } +static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address, + int chip_id, int config1, int convrate) +{ + if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) { + /* THMC10: Unsupported registers return 0xff */ + if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff && + i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff) + return "thmc10"; + } + return NULL; +} + static const char *lm90_detect_ti(struct i2c_client *client, int chip_id, int config1, int convrate) { @@ -2208,6 +2223,10 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) case 0x01: /* National Semiconductor */ name = lm90_detect_national(client, chip_id, config1, convrate); break; + case 0x23: /* Genesys Logic */ + if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "gl523sm"; + break; case 0x41: /* Analog Devices */ name = lm90_detect_analog(client, common_address, chip_id, config1, convrate); @@ -2215,10 +2234,17 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) case 0x47: /* GMT */ name = lm90_detect_gmt(client, chip_id, config1, convrate); break; + case 0x49: /* TI */ + name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate); + break; case 0x4d: /* Maxim Integrated */ name = lm90_detect_maxim(client, common_address, chip_id, config1, convrate); break; + case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */ + if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "mc1066"; + break; case 0x55: /* TI */ name = lm90_detect_ti(client, chip_id, config1, convrate); break; From patchwork Wed May 25 13:57:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EDFCC4332F for ; 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Wed, 25 May 2022 06:58:59 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 31/40] hwmon: (lm90) Combine lm86 and lm90 configuration Date: Wed, 25 May 2022 06:57:49 -0700 Message-Id: <20220525135758.2944744-32-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org LM86 and LM90 support exactly the same features, so there is no need to keep their configuration options separate. Combine to reduce data size. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 97453a7de1fa..16481051a530 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -123,7 +123,7 @@ static const unsigned short normal_i2c[] = { 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, - g781, lm84, lm86, lm90, lm99, + g781, lm84, lm90, lm99, max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, sa56004, tmp451, tmp461, w83l771, }; @@ -235,8 +235,8 @@ static const struct i2c_device_id lm90_id[] = { { "g781", g781 }, { "gl523sm", max1617 }, { "lm84", lm84 }, - { "lm86", lm86 }, - { "lm89", lm86 }, + { "lm86", lm90 }, + { "lm89", lm90 }, { "lm90", lm90 }, { "lm99", lm99 }, { "max1617", max1617 }, @@ -289,11 +289,11 @@ static const struct of_device_id __maybe_unused lm90_of_match[] = { }, { .compatible = "national,lm86", - .data = (void *)lm86 + .data = (void *)lm90 }, { .compatible = "national,lm89", - .data = (void *)lm86 + .data = (void *)lm90 }, { .compatible = "national,lm99", @@ -443,13 +443,6 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_ALARMS, .resolution = 8, }, - [lm86] = { - .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT - | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, - .alert_alarms = 0x7b, - .max_convrate = 9, - }, [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW From patchwork Wed May 25 13:57:50 2022 Content-Type: text/plain; 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Wed, 25 May 2022 06:59:01 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id 8-20020a9d0688000000b0060ae5f10973sm6084750otx.15.2022.05.25.06.59.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:01 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 32/40] hwmon: (lm90) Add explicit support for NCT210 Date: Wed, 25 May 2022 06:57:50 -0700 Message-Id: <20220525135758.2944744-33-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Unlike ADM1023 and compatible chips, NCT210 does not support a temperature offset register. A real chip was found to have a chip revision of 0x3f. Use it to detect NCT210 explicitly. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 14 ++++++++++++++ drivers/hwmon/Kconfig | 2 +- drivers/hwmon/lm90.c | 18 ++++++++++++++++-- 3 files changed, 31 insertions(+), 3 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index dfbdfe11606e..e9a8c11eba8b 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -137,6 +137,16 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=NCT1008 + * ON Semiconductor NCT210 + + Prefix: 'adm1021' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=NCT210 + * Maxim MAX1617 Prefix: 'max1617' @@ -421,6 +431,10 @@ ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10: * 8 bit sensor resolution * Low temperature limits +NCT210: + * 11 bit sensor resolution for remote temperature sensor + * Low temperature limits + ADM1021A, ADM1023: * Temperature offset register for remote temperature sensor * 11 bit resolution for remote temperature sensor diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index bb952287fcee..d30ea2fea3e2 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1365,7 +1365,7 @@ config SENSORS_LM90 Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, - ON Semiconductor NCT1008, Winbond/Nuvoton W83L771W/G/AWG/ASG, + ON Semiconductor NCT1008, NCT210, Winbond/Nuvoton W83L771W/G/AWG/ASG, Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 16481051a530..4ae8027722e0 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -125,7 +125,7 @@ static const unsigned short normal_i2c[] = { enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm90, lm99, max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, - sa56004, tmp451, tmp461, w83l771, + nct210, sa56004, tmp451, tmp461, w83l771, }; /* @@ -257,6 +257,7 @@ static const struct i2c_device_id lm90_id[] = { { "max6696", max6696 }, { "mc1066", max1617 }, { "nct1008", adt7461a }, + { "nct210", nct210 }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, { "thmc10", max1617 }, @@ -533,6 +534,14 @@ static const struct lm90_params lm90_params[] = { .reg_status2 = MAX6696_REG_STATUS2, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, + [nct210] = { + .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT + | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE + | LM90_HAVE_REMOTE_EXT, + .alert_alarms = 0x7c, + .resolution = 11, + .max_convrate = 7, + }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE @@ -1766,7 +1775,7 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) name = "adm1021"; break; - case 0x30 ... 0x3f: /* ADM1021A, ADM1023 */ + case 0x30 ... 0x3e: /* ADM1021A, ADM1023 */ /* * ADM1021A and compatible chips will be mis-detected as * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both @@ -1784,6 +1793,11 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) name = "adm1023"; break; + case 0x3f: /* NCT210 */ + if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && + !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "nct210"; + break; case 0x40 ... 0x4f: /* ADM1032 */ if (man_id2 == 0x00 && chip_id2 == 0x00 && (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) && From patchwork Wed May 25 13:57:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5572AC433EF for ; Wed, 25 May 2022 14:00:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244614AbiEYOA3 (ORCPT ); Wed, 25 May 2022 10:00:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244633AbiEYN7g (ORCPT ); Wed, 25 May 2022 09:59:36 -0400 Received: from mail-oi1-x232.google.com (mail-oi1-x232.google.com [IPv6:2607:f8b0:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F970AF1ED; Wed, 25 May 2022 06:59:05 -0700 (PDT) Received: by mail-oi1-x232.google.com with SMTP id i66so25076519oia.11; Wed, 25 May 2022 06:59:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=l4qJbHRCQPSjBqmK7IyBTGSJJ7jfGY+55bbNWV5rLWc=; b=ZDsdXXX1OCZVXzxtOQPrlsLQI+15s+3208Dx84CLJjGn2bbIVFLsmcJX0T9vO3UyVZ HXfyvU3M2KRFg8F6kaR0ZjSNFbdICATrNFyjK2h+7a1ITFMubiljNfzoDPM800mIBaA2 l5aqNG2XklwB4RGnD79FYQUaK5iAKUgtDWUsb8oaZwLhGGTHEeqvdrmRchonTP37FRdy yjXVHEOkHwdpbu4oUqtD05kJozfRm89HgmdV2ZrYafkgN5LcEmFe0UrzMsAOsX9vdpjc beT8pcT+P/0pIQgERXhKjgxLpZlP/tMKKhZM4nqcQSpln7gK1yGI03D9yC7kkI2xbrMu 2H5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=l4qJbHRCQPSjBqmK7IyBTGSJJ7jfGY+55bbNWV5rLWc=; b=2ABwfrwQtzEIyR8B5xEl5k14y0kcVysuwBOJiWd+KcE2Tdv6gIio7lvM8kRhSf2xNZ U+Dnbo5LVU0feglZtsWELHpYK1vFex6V3XxJxoUcVAiQDitv3f3cN4LMpZRntEYsf2U5 /KR+eBIH0Selb7MJYT4wljG/TGor0XO/ROXS865tq1WIrcQyS6kCF7epVvdEACsok2JE pYf29AJpZQQBNXal44cvjNPFBdZRfBtBe4rgWLO+dNIFY7UCgVFGKn4Dk87162bkC4OJ RTVMRSFoFJW3sqivoE8xJH6+41nFg1r2GaoBLNRJxEe8bj0QBKCIIg0tEldRUAUA9K1r iZ9Q== X-Gm-Message-State: AOAM533sNaAuTsPS6SS4h4Vp7/y6nBxZyVvDsMi/ZI0FmlZ1zATfPsDq ka3EGrTQehkGXqWu3Cz4V12KY/ucUihE2g== X-Google-Smtp-Source: ABdhPJwhhtInHOR4Wb6kVkM7Ld7zK9Z6f/SUiZnE94qFodIGHyUylJjh3sfdS8//qImV9/Rp+99S8g== X-Received: by 2002:a05:6808:2388:b0:32b:14cf:ad6c with SMTP id bp8-20020a056808238800b0032b14cfad6cmr5262064oib.100.1653487143840; Wed, 25 May 2022 06:59:03 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id p187-20020acabfc4000000b0032b4ae1fc2csm3147976oif.21.2022.05.25.06.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:03 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 33/40] hwmon: (lm90) Add support for ON Semiconductor NCT214 and NCT72 Date: Wed, 25 May 2022 06:57:51 -0700 Message-Id: <20220525135758.2944744-34-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org NCT214 and NCT72 are compatible to ADT7461/ADT7461A but have full PEC (packet error checking) support. PEC support is undocumented. Both chips support the undocumented secondary chip and manufacturer ID registers at 0x3e and 0x3f, and return 0x61 as chip ID. Use this information to improve the accuracy of chip detection code. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 20 ++++++++++++++++++++ drivers/hwmon/Kconfig | 3 ++- drivers/hwmon/lm90.c | 35 ++++++++++++++++++++++++++++++++++- 3 files changed, 56 insertions(+), 2 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index e9a8c11eba8b..d3836d1f1275 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -147,6 +147,26 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=NCT210 + * ON Semiconductor NCT214 + + Prefix: 'nct214' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=NCT214 + + * ON Semiconductor NCT72 + + Prefix: 'nct72' + + Addresses scanned: I2C 0x4c - 0x4d + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=NCT72 + * Maxim MAX1617 Prefix: 'max1617' diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index d30ea2fea3e2..9353d207f254 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1365,7 +1365,8 @@ config SENSORS_LM90 Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, - ON Semiconductor NCT1008, NCT210, Winbond/Nuvoton W83L771W/G/AWG/ASG, + ON Semiconductor NCT1008, NCT210, NCT72, NCT214, + Winbond/Nuvoton W83L771W/G/AWG/ASG, Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 4ae8027722e0..2a1630b85967 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -69,6 +69,9 @@ * / ON Semiconductor. The chips are similar to ADT7461 but support two external * temperature sensors. * + * This driver also supports NCT72 and NCT214 from ON Semiconductor. The chips + * are similar to ADT7461/ADT7461A but have full PEC support (undocumented). + * * This driver also supports the SA56004 from Philips. This device is * pin-compatible with the LM86, the ED/EDP parts are also address-compatible. * @@ -125,7 +128,7 @@ static const unsigned short normal_i2c[] = { enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm90, lm99, max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, - nct210, sa56004, tmp451, tmp461, w83l771, + nct210, nct72, sa56004, tmp451, tmp461, w83l771, }; /* @@ -258,6 +261,8 @@ static const struct i2c_device_id lm90_id[] = { { "mc1066", max1617 }, { "nct1008", adt7461a }, { "nct210", nct210 }, + { "nct214", nct72 }, + { "nct72", nct72 }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, { "thmc10", max1617 }, @@ -348,6 +353,14 @@ static const struct of_device_id __maybe_unused lm90_of_match[] = { .compatible = "onnn,nct1008", .data = (void *)adt7461a }, + { + .compatible = "onnn,nct214", + .data = (void *)nct72 + }, + { + .compatible = "onnn,nct72", + .data = (void *)nct72 + }, { .compatible = "winbond,w83l771", .data = (void *)w83l771 @@ -534,6 +547,15 @@ static const struct lm90_params lm90_params[] = { .reg_status2 = MAX6696_REG_STATUS2, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, }, + [nct72] = { + .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT + | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP + | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + .alert_alarms = 0x7c, + .max_convrate = 10, + .resolution = 10, + }, [nct210] = { .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE @@ -1816,12 +1838,23 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add convrate <= 0x0a) name = "nct1008"; break; + case 0x55: /* NCT72 */ + if (man_id2 == 0x41 && chip_id2 == 0x61 && + (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + convrate <= 0x0a) + name = "nct72"; + break; case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */ if (man_id2 == 0x41 && chip_id2 == 0x61 && (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && convrate <= 0x0a) name = "adt7461a"; break; + case 0x5a: /* NCT214 */ + if (man_id2 == 0x41 && chip_id2 == 0x61 && + common_address && !(config1 & 0x1b) && convrate <= 0x0a) + name = "nct214"; + break; case 0x62: /* ADT7481, undocumented */ if (man_id2 == 0x41 && chip_id2 == 0x81 && (address == 0x4b || address == 0x4c) && !(config1 & 0x10) && From patchwork Wed May 25 13:57:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D9CDC433EF for ; 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Wed, 25 May 2022 06:59:05 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 34/40] hwmon: (lm90) Add support for ON Semiconductor NCT218 Date: Wed, 25 May 2022 06:57:52 -0700 Message-Id: <20220525135758.2944744-35-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org NCT218 is compatible to NCT72 and NCT214. It also supports PEC (packet error checking). Similar to NCT72 and NCT214, PEC support is undocumented. Unlike NCT214 and NCT72, NCT218 does not support the undocumented secondary chip and manufacturer ID registers at 0x3e and 0x3f and returns 0x00 when reading those registers. The value for the chip revision register is not documented but was observed to be 0xca. Use that information to improve chip detection accuracy. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 10 ++++++++++ drivers/hwmon/Kconfig | 2 +- drivers/hwmon/lm90.c | 31 +++++++++++++++++++++++++++++-- 3 files changed, 40 insertions(+), 3 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index d3836d1f1275..c3ce54f61f44 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -157,6 +157,16 @@ Supported chips: https://www.onsemi.com/PowerSolutions/product.do?id=NCT214 + * ON Semiconductor NCT218 + + Prefix: 'nct218' + + Addresses scanned: I2C 0x4c - 0x4d + + Datasheet: Publicly available at the ON Semiconductor website + + https://www.onsemi.com/PowerSolutions/product.do?id=NCT218 + * ON Semiconductor NCT72 Prefix: 'nct72' diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 9353d207f254..32c605eaec7e 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1365,7 +1365,7 @@ config SENSORS_LM90 Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, - ON Semiconductor NCT1008, NCT210, NCT72, NCT214, + ON Semiconductor NCT1008, NCT210, NCT72, NCT214, NCT218, Winbond/Nuvoton W83L771W/G/AWG/ASG, Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 2a1630b85967..4194b8838f20 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -69,8 +69,9 @@ * / ON Semiconductor. The chips are similar to ADT7461 but support two external * temperature sensors. * - * This driver also supports NCT72 and NCT214 from ON Semiconductor. The chips - * are similar to ADT7461/ADT7461A but have full PEC support (undocumented). + * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor. + * The chips are similar to ADT7461/ADT7461A but have full PEC support + * (undocumented). * * This driver also supports the SA56004 from Philips. This device is * pin-compatible with the LM86, the ED/EDP parts are also address-compatible. @@ -262,6 +263,7 @@ static const struct i2c_device_id lm90_id[] = { { "nct1008", adt7461a }, { "nct210", nct210 }, { "nct214", nct72 }, + { "nct218", nct72 }, { "nct72", nct72 }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, @@ -357,6 +359,10 @@ static const struct of_device_id __maybe_unused lm90_of_match[] = { .compatible = "onnn,nct214", .data = (void *)nct72 }, + { + .compatible = "onnn,nct218", + .data = (void *)nct72 + }, { .compatible = "onnn,nct72", .data = (void *)nct72 @@ -1778,6 +1784,24 @@ static const char *lm90_detect_national(struct i2c_client *client, int chip_id, return name; } +static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1, + int convrate) +{ + int address = client->addr; + const char *name = NULL; + + switch (chip_id) { + case 0xca: /* NCT218 */ + if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) && + convrate <= 0x0a) + name = "nct218"; + break; + default: + break; + } + return name; +} + static const char *lm90_detect_analog(struct i2c_client *client, bool common_address, int chip_id, int config1, int convrate) { @@ -2263,6 +2287,9 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) case 0x01: /* National Semiconductor */ name = lm90_detect_national(client, chip_id, config1, convrate); break; + case 0x1a: /* ON */ + name = lm90_detect_on(client, chip_id, config1, convrate); + break; case 0x23: /* Genesys Logic */ if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8)) name = "gl523sm"; From patchwork Wed May 25 13:57:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF0F4C433FE for ; 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Wed, 25 May 2022 06:59:06 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 35/40] hwmon: (lm90) Add support for ADT7421 Date: Wed, 25 May 2022 06:57:53 -0700 Message-Id: <20220525135758.2944744-36-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org ADT7421 is similar to ADT7461A but supports configurable Beta Compensation. Packet Error Checking (PEC) is supported but undocumented. A devicetree node is not added for the added chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 4194b8838f20..d1435f55e31d 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -231,6 +231,7 @@ static const struct i2c_device_id lm90_id[] = { { "adm1021", max1617 }, { "adm1023", adm1023 }, { "adm1032", adm1032 }, + { "adt7421", adt7461a }, { "adt7461", adt7461 }, { "adt7461a", adt7461a }, { "adt7481", adt7481 }, @@ -1816,11 +1817,18 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add return NULL; switch (chip_id) { - case 0x00 ... 0x0f: /* ADM1021, undocumented */ + case 0x00 ... 0x03: /* ADM1021 */ + case 0x05 ... 0x0f: if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) name = "adm1021"; break; + case 0x04: /* ADT7421 (undocumented) */ + if (man_id2 == 0x41 && chip_id2 == 0x21 && + (address == 0x4c || address == 0x4d) && + (config1 & 0x0b) == 0x08 && convrate <= 0x0a) + name = "adt7421"; + break; case 0x30 ... 0x3e: /* ADM1021A, ADM1023 */ /* * ADM1021A and compatible chips will be mis-detected as From patchwork Wed May 25 13:57:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CBC3C433FE for ; Wed, 25 May 2022 14:00:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244572AbiEYOAW (ORCPT ); Wed, 25 May 2022 10:00:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53140 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244711AbiEYN7s (ORCPT ); Wed, 25 May 2022 09:59:48 -0400 Received: from mail-oa1-x33.google.com (mail-oa1-x33.google.com [IPv6:2001:4860:4864:20::33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43093AEE2A; Wed, 25 May 2022 06:59:10 -0700 (PDT) Received: by mail-oa1-x33.google.com with SMTP id 586e51a60fabf-f2bb84f9edso2959826fac.10; Wed, 25 May 2022 06:59:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uYe0yvkByZQIIt5odyFTdywSrjjAR0396YtmitTljn8=; b=JNawQPe1RB4s/LBXNObS/6el1VRZG2UdZVusm1dtW4Mdf5ALOcxl/Ya3q7IqXDZAuO 0UGo7agS+DqV9QeQpfvD7SeqAib/C1gtFPtK3jkPFRDSv9jaz4heFgOudhMg1AK+8Y0x 33cYzIA+lbFmWcFAwDN3NSSOF+3pT3AliOOq4t6cwnWMA3lVrfkQffscA9AyyZBthTjE da+bcE8seS7ceOBFuc1Ok/oJtkIfeUCxiS47jp3QDrhI7VyI6lM65hAwekCk/aUPcMqT ozPkhM5i6wbkQPGLMWSOmR4j8nK8M1d0/y88c7m2P9wVwvHdBhCSFm5W387gYIhjWCiy a9Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=uYe0yvkByZQIIt5odyFTdywSrjjAR0396YtmitTljn8=; b=8Kub321LL/4Q6aKKHZ9o3RFtU244MTBNNI5Pyiw5k35jb9+jxgHdwpLM040DMmosBL WgsEYHGYXFWEhirhdxI+ZPQrdpN9sSgYV5Ux5pGASk0tRuqVzWLNWoAek8y8GBG1w26W UUKxrBKinOycjbesVI7e4S6IHYMewLdrVvE9cN2CgU+u6nzJXIvQYohQEpudLC+nF2tL lhmN3dkFmTZD/WpqwbVasIZrE2tdDyQEC9EybZ2iJxzG5csTn/vwtiJfnT7cnHnbiYZi tCzLRNJUbMD5MWNcxIpgDU2CCMU1ygZdIJPTJa/mQBlXIUPj49F0qeUeIX/M9YoBaPWe f3Lg== X-Gm-Message-State: AOAM531CEQsBm7Xzd8YG+LQyov4El88Db7wk0ddhmUtXrWfCuG69bDEV CODq+ZhoszvDAjzxP+bEOBgygeJCBbTrJQ== X-Google-Smtp-Source: ABdhPJznc+mDZ4gfyfh1E2k3WontHUJDfZhc1bdosL9V6VV4TUNeCCcMzNRsPufIsJtghmq1JQdRMg== X-Received: by 2002:a05:6870:e307:b0:de:e168:c43f with SMTP id z7-20020a056870e30700b000dee168c43fmr5922298oad.140.1653487149341; Wed, 25 May 2022 06:59:09 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id k17-20020a9d1991000000b0060b0b638583sm4009761otk.13.2022.05.25.06.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:08 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 36/40] hwmon: (lm90) Only disable alerts if not already disabled Date: Wed, 25 May 2022 06:57:54 -0700 Message-Id: <20220525135758.2944744-37-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org It was observed that the alert handler may be called from the i2c core even after alerts have already been disabled. Only disable alerts if they have not already been disabled. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index d1435f55e31d..6d1e7052e3ed 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -2658,8 +2658,10 @@ static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type, if ((data->flags & LM90_HAVE_BROKEN_ALERT) && (data->current_alarms & data->alert_alarms)) { - dev_dbg(&client->dev, "Disabling ALERT#\n"); - lm90_update_confreg(data, data->config | 0x80); + if (!(data->config & 0x80)) { + dev_dbg(&client->dev, "Disabling ALERT#\n"); + lm90_update_confreg(data, data->config | 0x80); + } schedule_delayed_work(&data->alert_work, max_t(int, HZ, msecs_to_jiffies(data->update_interval))); } From patchwork Wed May 25 13:57:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861250 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C39BDC4332F for ; Wed, 25 May 2022 14:02:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234554AbiEYOCM (ORCPT ); Wed, 25 May 2022 10:02:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244846AbiEYOAM (ORCPT ); Wed, 25 May 2022 10:00:12 -0400 Received: from mail-ot1-x334.google.com (mail-ot1-x334.google.com [IPv6:2607:f8b0:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30506AFACA; Wed, 25 May 2022 06:59:14 -0700 (PDT) Received: by mail-ot1-x334.google.com with SMTP id 30-20020a9d0121000000b0060ae97b9967so11329369otu.7; Wed, 25 May 2022 06:59:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vMz1kX25Jfo/Wgl2AsnsPe1M/xiRh78iJYf0iREBtKQ=; b=AXluDQX1JURladUQ5YTDNoDqSbbTrj2ZXKtAHJQQqZm8QYCC8xWPwV8Yjzg/yyuHYD cN8CoTuIgKkOH1zsaSAlZ3Fz4E2E4c4uNNuuZbNoju0EquZYrH3UbL9Zl8me2W+qnPs6 GD5C1wrWuw3MJ1olnPGKQSdgB8/CdnAxc+IWC4r2Fw6o8u9UqvDfJP8YgYzJlRmgLFpz 01b+tjvuvs4sG67ctuf+cnC+ewi6XmruSMNeAd+F4RoIMZ+4oTljLgPfEwQ71be3s77+ gaT3D91BgpF5bO29NnL2v2oVimFP/I+R2Lpbl68Udv/aso56fliGfSsZ4KH+G+OadinI VI8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=vMz1kX25Jfo/Wgl2AsnsPe1M/xiRh78iJYf0iREBtKQ=; b=xNcvG4ks2l+GbVrOUUm5dQYp7uQlSxgK+jUQ43rHFW4zCsafGFGC2GYoIs9qRjQh5Z ZxYTClGwK0Xs41JdgJiLpTseMMJj51i1oibjr+vR65y1yRD5POe4v4e8gSYrePmpEW8J lUiHgdvwFW6qzaG4aAzJvRFYTnmoZG6s1EzOKQn1r33TztwA+IOSOdgCCohxUERgj2lg PUacO/5x83Et2r99NDly04C3kokdnJo44puoSa51VsjX8LgrLhkANdaLuwKo/oc0oZAz LOgK1Vto92Jv0EsbG3NRK/erGOWQK8cIw1TOx8U6xX3hqoO+7mdiuVrxTYIE5icDYutM wALg== X-Gm-Message-State: AOAM5310PUZCik6mv6OGkFO0B2SgondPGrkv0xwl4BW/7J7QmVDFf1F+ hkIUAdSvZfg+p5a4eiMOGUNkLkn3rgv7Kw== X-Google-Smtp-Source: ABdhPJw9heiaMO+NWdE2NiCJyW57unM1eLa2AW4b+mMuv07yqsuoSZ9cLRktcSvyrnSvWOgYmQTToQ== X-Received: by 2002:a05:6830:2b2b:b0:606:56e4:9d5b with SMTP id l43-20020a0568302b2b00b0060656e49d5bmr12782663otv.320.1653487151208; Wed, 25 May 2022 06:59:11 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id o7-20020a4abe87000000b0035eb4e5a6c0sm6516251oop.22.2022.05.25.06.59.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:10 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 37/40] hwmon: (lm90) Add explicit support for ADM1020 Date: Wed, 25 May 2022 06:57:55 -0700 Message-Id: <20220525135758.2944744-38-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org ADM1020 is compatible with ADM1021 but has a separate chip revision and a limited I2C address range. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 10 +++++++++- drivers/hwmon/Kconfig | 4 ++-- drivers/hwmon/lm90.c | 10 +++++++++- 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index c3ce54f61f44..b2ca10f37218 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -51,6 +51,14 @@ Supported chips: http://www.national.com/mpf/LM/LM86.html + * Analog Devices ADM1020 + + Prefix: 'adm1020' + + Addresses scanned: I2C 0x4c - 0x4e + + Datasheet: Publicly available at the Analog Devices website + * Analog Devices ADM1021 Prefix: 'adm1021' @@ -457,7 +465,7 @@ features: LM84: * 8 bit sensor resolution -ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10: +ADM1020, ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10: * 8 bit sensor resolution * Low temperature limits diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 32c605eaec7e..494539e4be3d 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1360,8 +1360,8 @@ config SENSORS_LM90 depends on I2C help If you say yes here you get support for National Semiconductor LM84, - LM90, LM86, LM89 and LM99, Analog Devices ADM2021, ADM1021A, ADM1023, - ADM1032, ADT7461, ADT7461A, ADT7481, ADT7482, and ADT7483A, + LM90, LM86, LM89 and LM99, Analog Devices ADM1020, ADM2021, ADM1021A, + ADM1023, ADM1032, ADT7461, ADT7461A, ADT7481, ADT7482, and ADT7483A, Maxim MAX1617, MAX6642, MAX6646, MAX6647, MAX6648, MAX6649, MAX6654, MAX6657, MAX6658, MAX6659, MAX6680, MAX6681, MAX6692, MAX6695, MAX6696, diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 6d1e7052e3ed..de51d205b63f 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -228,6 +228,7 @@ enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, */ static const struct i2c_device_id lm90_id[] = { + { "adm1020", max1617 }, { "adm1021", max1617 }, { "adm1023", adm1023 }, { "adm1032", adm1032 }, @@ -1829,7 +1830,8 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add (config1 & 0x0b) == 0x08 && convrate <= 0x0a) name = "adt7421"; break; - case 0x30 ... 0x3e: /* ADM1021A, ADM1023 */ + case 0x30 ... 0x38: /* ADM1021A, ADM1023 */ + case 0x3a ... 0x3e: /* * ADM1021A and compatible chips will be mis-detected as * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both @@ -1847,6 +1849,12 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) name = "adm1023"; break; + case 0x39: /* ADM1020 (undocumented) */ + if (man_id2 == 0x00 && chip_id2 == 0x00 && + (address == 0x4c || address == 0x4d || address == 0x4e) && + !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) + name = "adm1020"; + break; case 0x3f: /* NCT210 */ if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address && !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8)) From patchwork Wed May 25 13:57:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861247 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC85DC433EF for ; Wed, 25 May 2022 14:00:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235955AbiEYOAf (ORCPT ); Wed, 25 May 2022 10:00:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244826AbiEYOAL (ORCPT ); Wed, 25 May 2022 10:00:11 -0400 Received: from mail-oi1-x22a.google.com (mail-oi1-x22a.google.com [IPv6:2607:f8b0:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0D6DAFAC2; Wed, 25 May 2022 06:59:13 -0700 (PDT) Received: by mail-oi1-x22a.google.com with SMTP id v9so20438509oie.5; Wed, 25 May 2022 06:59:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GInhXZynQUsIY0Odafh8O/3S5hYlWZEpMmKYkSJtma8=; b=iMXHMLYZT93YStp37lQeB2BI6gaptbbRuMxplyOpcbsFhpRJgY/vEqLVpacYHpedIV XtDUvbwIDXbAcdWJbSAdg0n3s7wSqhBKfUS+RTZXoGq1D7qogrhvRj0gAX6xec78k+38 CGQDQ6VRdHDf8musfDc3TtTuoU4fMilDOl2sulRwqxHZOTR63PrCshVU7sCMhCBbnLDj FCpUFhqlSHiuM6sp9ldvshn/1EhjOWQRdOkq4Grsiy4v0imprxfjeLVTzRJwZ5ceTr1c bC712lGhppkWZd8K4xGcVyJmg/lgY0siFUdyp4uoCc29TfBSpGAzOaxw48CSxoVg/YsW /5MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=GInhXZynQUsIY0Odafh8O/3S5hYlWZEpMmKYkSJtma8=; b=ZsYmVHRiVAC1qT+qQ4jmbIMwtthkPYCn/+zcXeEdZ/v1oAZDaIdAn2Aw5OsbdmK/MK UKNW8EC5pqMi9RDrGBAzQLvlRK+Y3zLCIScoFOJthm+037WpNMgRFvLAoKXcWxYmMgz1 GJpCQSu7ACH+ZupUfJqhpQcceLH52pmMrI2jWp94cmx5cNyWvgjXGT/HXe2r25aWjmH7 qGpBeYUhLo3akxlOiazioGp0VpQGExUICdZV/G4P2J1YDeCukQnyiDRuk1IYVNaHs7/T 4J2WZ6ka6fm1/0eAU4+a+5wnov4NCd/AwcxRluOyV4koJXw+hNAvq2OSaN4F0U/xSEhJ DaoA== X-Gm-Message-State: AOAM531GyKLdIBoP7m90zgouF2RAzdBSJD0+QOXI8ngfr7LOLMmViio0 9WJ0SyNVIehqah0LhgJYz19/yP2tBumhDw== X-Google-Smtp-Source: ABdhPJyECyjV1O0ppTb0PWUeMyqnxG1ZWokzg07mkZO3qYugk2XyNaQqAtUGW6+/Vurfo8ByvJVKcg== X-Received: by 2002:a05:6808:21a5:b0:32b:2791:2cef with SMTP id be37-20020a05680821a500b0032b27912cefmr5313000oib.147.1653487153050; Wed, 25 May 2022 06:59:13 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id p21-20020a4a8e95000000b0040e5ff4a737sm6612535ook.26.2022.05.25.06.59.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:12 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 38/40] hwmon: (lm90) Add support and detection of Philips/NXP NE1618 Date: Wed, 25 May 2022 06:57:56 -0700 Message-Id: <20220525135758.2944744-39-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org NE1618 is similar to NE1617 but supports manufacturer and chip ID registers as well as 11 bit external temperature resolution. Signed-off-by: Guenter Roeck --- Documentation/hwmon/lm90.rst | 10 +++++++- drivers/hwmon/Kconfig | 2 +- drivers/hwmon/lm90.c | 44 ++++++++++++++++++++++++++---------- 3 files changed, 42 insertions(+), 14 deletions(-) diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst index b2ca10f37218..ea1556be645c 100644 --- a/Documentation/hwmon/lm90.rst +++ b/Documentation/hwmon/lm90.rst @@ -411,6 +411,14 @@ Supported chips: Datasheets: Publicly available at the Philips website + * Philips NE1618 + + Prefix: 'ne1618' + + Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e + + Datasheets: Publicly available at the Philips website + * Genesys Logic GL523SM Prefix: 'gl523sm' @@ -469,7 +477,7 @@ ADM1020, ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10: * 8 bit sensor resolution * Low temperature limits -NCT210: +NCT210, NE1618: * 11 bit sensor resolution for remote temperature sensor * Low temperature limits diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 494539e4be3d..981df62bd6ab 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1367,7 +1367,7 @@ config SENSORS_LM90 MAX6696, ON Semiconductor NCT1008, NCT210, NCT72, NCT214, NCT218, Winbond/Nuvoton W83L771W/G/AWG/ASG, - Philips SA56004, GMT G781, Texas Instruments TMP451 and TMP461 + Philips NE1618, SA56004, GMT G781, Texas Instruments TMP451 and TMP461 sensor chips. This driver can also be built as a module. If so, the module diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index de51d205b63f..77102e0a4440 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -87,6 +87,9 @@ * This driver also supports MAX1617 and various clones such as G767 * and NE1617. Such clones will be detected as MAX1617. * + * This driver also supports NE1618 from Philips. It is similar to NE1617 + * but supports 11 bit external temperature values. + * * Since the LM90 was the first chipset supported by this driver, most * comments will refer to this chipset, but are actually general and * concern all supported chipsets, unless mentioned otherwise. @@ -129,7 +132,7 @@ static const unsigned short normal_i2c[] = { enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, g781, lm84, lm90, lm99, max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696, - nct210, nct72, sa56004, tmp451, tmp461, w83l771, + nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771, }; /* @@ -267,6 +270,7 @@ static const struct i2c_device_id lm90_id[] = { { "nct214", nct72 }, { "nct218", nct72 }, { "nct72", nct72 }, + { "ne1618", ne1618 }, { "w83l771", w83l771 }, { "sa56004", sa56004 }, { "thmc10", max1617 }, @@ -572,6 +576,13 @@ static const struct lm90_params lm90_params[] = { .resolution = 11, .max_convrate = 7, }, + [ne1618] = { + .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + .alert_alarms = 0x7c, + .resolution = 11, + .max_convrate = 7, + }, [w83l771] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE @@ -2149,20 +2160,29 @@ static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id, return name; } -static const char *lm90_detect_nxp(struct i2c_client *client, int chip_id, - int config1, int convrate) +static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address, + int chip_id, int config1, int convrate) { - int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); int address = client->addr; const char *name = NULL; + int config2; - if (config2 < 0) - return NULL; - - if (address >= 0x48 && address <= 0x4f && chip_id == 0x00 && - !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09) - name = "sa56004"; - + switch (chip_id) { + case 0x00: + config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2); + if (config2 < 0) + return NULL; + if (address >= 0x48 && address <= 0x4f && + !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09) + name = "sa56004"; + break; + case 0x80: + if (common_address && !(config1 & 0x3f) && convrate <= 0x07) + name = "ne1618"; + break; + default: + break; + } return name; } @@ -2335,7 +2355,7 @@ static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info) name = lm90_detect_nuvoton(client, chip_id, config1, convrate); break; case 0xa1: /* NXP Semiconductor/Philips */ - name = lm90_detect_nxp(client, chip_id, config1, convrate); + name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate); break; case 0xff: /* MAX1617, G767, NE1617 */ if (common_address && chip_id == 0xff && convrate < 8) From patchwork Wed May 25 13:57:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861249 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75774C433F5 for ; Wed, 25 May 2022 14:02:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244740AbiEYOCL (ORCPT ); Wed, 25 May 2022 10:02:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244847AbiEYOAM (ORCPT ); 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Wed, 25 May 2022 06:59:14 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 39/40] hwmon: (lm90) Add table with supported Analog/ONSEMI devices Date: Wed, 25 May 2022 06:57:57 -0700 Message-Id: <20220525135758.2944744-40-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Add table with device names and known register values for supported devices from Analog / ON Semiconductor. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 77102e0a4440..7f8397c362e8 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -1828,6 +1828,42 @@ static const char *lm90_detect_analog(struct i2c_client *client, bool common_add if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0) return NULL; + /* + * The following chips should be detected by this function. Known + * register values are listed. Registers 0x3d .. 0x3e are undocumented + * for most of the chips, yet appear to return a well defined value. + * Register 0xff is undocumented for some of the chips. Register 0x3f + * is undocumented for all chips, but also returns a well defined value. + * Values are as reported from real chips unless mentioned otherwise. + * The code below checks values for registers 0x3d, 0x3e, and 0xff, + * but not for register 0x3f. + * + * Chip Register + * 3d 3e 3f fe ff Notes + * ---------------------------------------------------------- + * adm1020 00 00 00 41 39 + * adm1021 00 00 00 41 03 + * adm1021a 00 00 00 41 3c + * adm1023 00 00 00 41 3c same as adm1021a + * adm1032 00 00 00 41 42 + * + * adt7421 21 41 04 41 04 + * adt7461 00 00 00 41 51 + * adt7461a 61 41 05 41 57 + * adt7481 81 41 02 41 62 + * adt7482 - - - 41 65 datasheet + * 82 41 05 41 75 real chip + * adt7483 83 41 04 41 94 + * + * nct72 61 41 07 41 55 + * nct210 00 00 00 41 3f + * nct214 61 41 08 41 5a + * nct1008 - - - 41 57 datasheet rev. 3 + * 61 41 06 41 54 real chip + * + * nvt210 - - - 41 - datasheet + * nvt211 - - - 41 - datasheet + */ switch (chip_id) { case 0x00 ... 0x03: /* ADM1021 */ case 0x05 ... 0x0f: From patchwork Wed May 25 13:57:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guenter Roeck X-Patchwork-Id: 12861248 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7477EC433EF for ; Wed, 25 May 2022 14:02:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244745AbiEYOCI (ORCPT ); Wed, 25 May 2022 10:02:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244867AbiEYOAO (ORCPT ); Wed, 25 May 2022 10:00:14 -0400 Received: from mail-ot1-x330.google.com (mail-ot1-x330.google.com [IPv6:2607:f8b0:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E46BAFAEC; Wed, 25 May 2022 06:59:18 -0700 (PDT) Received: by mail-ot1-x330.google.com with SMTP id g13-20020a9d6b0d000000b0060b13026e0dso6243419otp.8; Wed, 25 May 2022 06:59:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RHo5aNcjBFOylKfLF/i7SZ5SjyU4FPNuOc7pFz/KTSA=; b=ZIJt16xRlWplJ1vkCiiJasxlOqksgMX3tZLt3PAnxVh1KkokcdDEvKRrGmX84B0SEg eoE8rotlBqGFtMxN+fnvXh+JtxqCQAN0SE9w8Dnx54rIVeHr3Q153suORWP+QPHUuDct nq+JIU5SqeqqOLFyC2eYZ4J43mg3MotFylZ3SNLt16/hfbHqmUpOsF6l9ZHw3low3/4u Hx1/Q5e/71f+AXH+wVdJMI+bTckNnYEGYfRO09YIVElHa0wv9aM35c8aMEh0EI4ptNMA vNj6OtBT1dcA+fWO7RpJgCKfAZWeD8Ag2trzkytC3g+9C5oi+BdlXmmKrEBliZL05YqX F6lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=RHo5aNcjBFOylKfLF/i7SZ5SjyU4FPNuOc7pFz/KTSA=; b=B/VvYdgFNGhumS1E+idrarz0t/cElzSeTfCuFFFcyxnwfIEBt6Lzd07TKdYVuY7Rr8 IVEcnZCLf4EwpAi1q17onds0454u4PFDeGwgJTT622Sp6+3pmlI0N4VQZ5O/HM2EoLmh aIcUa3nq81V0QZZ1QJ90cG1ZQM1NdlFz5xxtswVaV13al3SG0VgWSZNko9UOvup/tkyH 9QNCne2yN2+4c/OPNEN3G+GCVGi9u1dK74GGlt8ZS8Rqy8g9nd4eIMLTGq4jfQ6Pu/PT A/hQN/gyju+bku2U/P4RomGIwuV014wXyR4nfoHMHdo0QASM2DuocCCYObzyC/bzDYiC qJ0g== X-Gm-Message-State: AOAM530eoKtk4YtI6icfdAhlcJ2qoh4uGVCoqXqj+fTzjMjTbKpOlYgx SVAyj54CAav/p7clssDuGoe5LT0P7dMMYg== X-Google-Smtp-Source: ABdhPJwMAikwQMwoxdDhtfzad2odxt1592BuTPWzUDRyQAl8RUdqN3/FYrb+v3KBSiYWdnRScmGaWA== X-Received: by 2002:a9d:7294:0:b0:60a:fff3:77a7 with SMTP id t20-20020a9d7294000000b0060afff377a7mr8202636otj.6.1653487156749; Wed, 25 May 2022 06:59:16 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:329c:23ff:fee3:9d7c]) by smtp.gmail.com with ESMTPSA id n65-20020aca4044000000b0032af3cffac7sm6282245oia.2.2022.05.25.06.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 May 2022 06:59:16 -0700 (PDT) Sender: Guenter Roeck From: Guenter Roeck To: linux-hwmon@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Jean Delvare , Slawomir Stepien , Guenter Roeck Subject: [PATCH 40/40] hwmon: (lm90) Support temp_samples attribute Date: Wed, 25 May 2022 06:57:58 -0700 Message-Id: <20220525135758.2944744-41-linux@roeck-us.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525135758.2944744-1-linux@roeck-us.net> References: <20220525135758.2944744-1-linux@roeck-us.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Several of the chips supported by this driver support configuring the number of samples (or the fault queue depth) necessary before a fault or alarm is reported. This is done either with a bit in the configuration register or with a separate "consecutive alert" register. Support this functionality with the temp_samples attribute. Signed-off-by: Guenter Roeck --- drivers/hwmon/lm90.c | 105 +++++++++++++++++++++++++++++++++++++------ 1 file changed, 91 insertions(+), 14 deletions(-) diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c index 7f8397c362e8..4c25c9ffdfe9 100644 --- a/drivers/hwmon/lm90.c +++ b/drivers/hwmon/lm90.c @@ -206,6 +206,7 @@ enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481, #define LM90_HAVE_LOW BIT(15) /* low limits */ #define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */ #define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */ +#define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */ /* LM90 status */ #define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */ @@ -404,6 +405,8 @@ struct lm90_params { u8 resolution; /* 16-bit resolution (default 11 bit) */ u8 reg_status2; /* 2nd status register (optional) */ u8 reg_local_ext; /* Extended local temp register (optional) */ + u8 faultqueue_mask; /* fault queue bit mask */ + u8 faultqueue_depth; /* fault queue depth if mask is used */ }; static const struct lm90_params lm90_params[] = { @@ -419,7 +422,8 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -433,7 +437,7 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -442,7 +446,8 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS - | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 10, }, @@ -451,7 +456,8 @@ static const struct lm90_params lm90_params[] = { | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x1c7c, .max_convrate = 11, .resolution = 10, @@ -461,7 +467,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 7, }, @@ -472,16 +478,22 @@ static const struct lm90_params lm90_params[] = { [lm90] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7b, .max_convrate = 9, + .faultqueue_mask = BIT(0), + .faultqueue_depth = 3, }, [lm99] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7b, .max_convrate = 9, + .faultqueue_mask = BIT(0), + .faultqueue_depth = 3, }, [max1617] = { .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT | @@ -492,10 +504,12 @@ static const struct lm90_params lm90_params[] = { }, [max6642] = { .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x50, .resolution = 10, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, + .faultqueue_mask = BIT(4), + .faultqueue_depth = 2, }, [max6646] = { .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT @@ -553,17 +567,20 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x1c7c, .max_convrate = 6, .reg_status2 = MAX6696_REG_STATUS2, .reg_local_ext = MAX6657_REG_LOCAL_TEMPL, + .faultqueue_mask = BIT(5), + .faultqueue_depth = 4, }, [nct72] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP - | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT + | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 10, .resolution = 10, @@ -598,16 +615,18 @@ static const struct lm90_params lm90_params[] = { */ .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7b, .max_convrate = 9, .reg_local_ext = SA56004_REG_LOCAL_TEMPL, + .faultqueue_mask = BIT(0), + .faultqueue_depth = 3, }, [tmp451] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW - | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -617,7 +636,7 @@ static const struct lm90_params lm90_params[] = { .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE - | LM90_HAVE_REMOTE_EXT, + | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE, .alert_alarms = 0x7c, .max_convrate = 9, .resolution = 12, @@ -684,10 +703,13 @@ struct lm90_data { u8 reg_status2; /* 2nd status register (optional) */ u8 reg_local_ext; /* local extension register offset */ u8 reg_remote_ext; /* remote temperature low byte */ + u8 faultqueue_mask; /* fault queue mask */ + u8 faultqueue_depth; /* fault queue mask */ /* registers values */ u16 temp[TEMP_REG_NUM]; u8 temp_hyst; + u8 conalert; u16 reported_alarms; /* alarms reported as sysfs/udev events */ u16 current_alarms; /* current alarms, reported by chip */ u16 alarms; /* alarms not yet reported to user */ @@ -888,6 +910,26 @@ static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data, return err; } +static int lm90_set_faultqueue(struct i2c_client *client, + struct lm90_data *data, int val) +{ + int err; + + if (data->faultqueue_mask) { + err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ? + data->config & ~data->faultqueue_mask : + data->config | data->faultqueue_mask); + } else { + static const u8 values[4] = {0, 2, 6, 0x0e}; + + data->conalert = (data->conalert & 0xf1) | values[val - 1]; + err = lm90_write_reg(data->client, TMP451_REG_CONALERT, + data->conalert); + } + + return err; +} + static int lm90_update_limits(struct device *dev) { struct lm90_data *data = dev_get_drvdata(dev); @@ -910,6 +952,12 @@ static int lm90_update_limits(struct device *dev) return val; data->temp_hyst = val; } + if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) { + val = lm90_read_reg(client, TMP451_REG_CONALERT); + if (val < 0) + return val; + data->conalert = val; + } val = lm90_read16(client, LM90_REG_REMOTE_LOWH, (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0, @@ -1564,6 +1612,28 @@ static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val) case hwmon_chip_alarms: *val = data->alarms; break; + case hwmon_chip_temp_samples: + if (data->faultqueue_mask) { + *val = (data->config & data->faultqueue_mask) ? + data->faultqueue_depth : 1; + } else { + switch (data->conalert & 0x0e) { + case 0x0: + default: + *val = 1; + break; + case 0x2: + *val = 2; + break; + case 0x6: + *val = 3; + break; + case 0xe: + *val = 4; + break; + } + } + break; default: return -EOPNOTSUPP; } @@ -1588,6 +1658,9 @@ static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val) err = lm90_set_convrate(client, data, clamp_val(val, 0, 100000)); break; + case hwmon_chip_temp_samples: + err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4)); + break; default: err = -EOPNOTSUPP; break; @@ -1602,6 +1675,7 @@ static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel) { switch (attr) { case hwmon_chip_update_interval: + case hwmon_chip_temp_samples: return 0644; case hwmon_chip_alarms: return 0444; @@ -2605,7 +2679,8 @@ static int lm90_probe(struct i2c_client *client) data->chip_config[0] |= HWMON_C_ALARMS; if (data->flags & LM90_HAVE_CONVRATE) data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL; - + if (data->flags & LM90_HAVE_FAULTQUEUE) + data->chip_config[0] |= HWMON_C_TEMP_SAMPLES; data->info[1] = &data->temp_info; info = &data->temp_info; @@ -2656,6 +2731,8 @@ static int lm90_probe(struct i2c_client *client) data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM; } + data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask; + data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth; data->reg_local_ext = lm90_params[data->kind].reg_local_ext; if (data->flags & LM90_HAVE_REMOTE_EXT) data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;