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Mon, 30 May 2022 06:55:41 -0700 (PDT) Received: from localhost.localdomain ([88.160.162.107]) by smtp.gmail.com with ESMTPSA id w9-20020adfee49000000b0020cfed0bb7fsm9214856wro.53.2022.05.30.06.55.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 06:55:40 -0700 (PDT) From: Fabien Parent To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: Fabien Parent , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings Date: Mon, 30 May 2022 15:55:20 +0200 Message-Id: <20220530135522.762560-1-fparent@baylibre.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220530_065545_306354_379FC001 X-CRM114-Status: GOOD ( 10.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add pwrap binding documentation for Signed-off-by: Fabien Parent Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt index 0581dbda4828..00b94601071e 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt @@ -29,6 +29,7 @@ Required properties in pwrap device node. "mediatek,mt8183-pwrap" for MT8183 SoCs "mediatek,mt8186-pwrap" for MT8186 SoCs "mediatek,mt8195-pwrap" for MT8195 SoCs + "mediatek,mt8365-pwrap" for MT8365 SoCs "mediatek,mt8516-pwrap" for MT8516 SoCs - interrupts: IRQ for pwrap in SOC - reg-names: "pwrap" is required; "pwrap-bridge" is optional. @@ -38,6 +39,8 @@ Required properties in pwrap device node. - clock-names: Must include the following entries: "spi": SPI bus clock "wrap": Main module clock + "sys": System module clock (for MT8365 SoC) + "tmr": Timer module clock (for MT8365 SoC) - clocks: Must contain an entry for each entry in clock-names. Optional properities: From patchwork Mon May 30 13:55:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Parent X-Patchwork-Id: 12864665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54A9CC433EF for ; Mon, 30 May 2022 14:37:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZoS9j7fZe3/INd5WaM5MeTzpadV7OhuhP3hd0r6he+g=; b=oHvSctEcpeF0T9 qFzSJXer9S+eo+XD9arpJCq0wpprFO95btMfUJrqHXs9YbNz9aDmDw86nWDxzqYmrxRQxPzYq96D+ SLRQZlVxCS4f8MVY3PIFjdVgR7E25Xgwn1z6EUOVBVym4j8mSMc+LCLcf9Oqt8kGTOTS5sJNVigA4 V/MGQ6FlIlL7LwtfXDqMAGJYlRqmgp6C2zp30GumETr6s521Hx3HWiiAvbK1B+i7LHzEzHPQL9zvK oI5XE6PGtrH1FrWS26M54Z42jWyo56fy7H/pneV2zxNJPPBIeIRmDB0qL9fV73mXFHewKvCbIXiz0 gFtMkZYs4/b2GnaDM+2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nvgVQ-007Gwf-4K; Mon, 30 May 2022 14:36:29 +0000 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nvfs3-006xDg-0g for linux-arm-kernel@lists.infradead.org; Mon, 30 May 2022 13:55:49 +0000 Received: by mail-wr1-x435.google.com with SMTP id q7so3784157wrg.5 for ; Mon, 30 May 2022 06:55:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Xw66Rm/stx5LdYx2rVfwLOupkCkZYlXybZKzqQavPCw=; b=tcCeuGat82kxq/tRnolJqUxQecH9kOW5WFXPEM5DGqSbcF+ZnIHNmjfaZY7/UJTtoU E+s5JYjoWhMxM7k7Jjip+G26kUqlbZXkZa+XpHn6By8vKcycMQT3nvxt5CeEjyXR59om hXBEkp7JCEAJFfytoYtsnxxEv/J32OEIGXqHy/DYTpxaQnEteeVtOU5zIj0Slu2tWTo3 SZvPX/X5iNoNSoDQVgYCsImovxymg1hBSmTFRfr5g7ZdeIyyun3UEYPuPXuNdiVATbc0 XybcHs5DB/AW8/zTwWYDDe0KijSDUalJqoq4aM06KqKI3JShKSrG5xTDRmDsLr/QbNVg LX3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Xw66Rm/stx5LdYx2rVfwLOupkCkZYlXybZKzqQavPCw=; b=KYT7u/i1mmyvekHsD8bRyeerpkbxloaclqr0w26tC2tuHlalunXtuMZnr3ilxkKFAp oHKqcO7qzgLIFgnCtxyV4xPLNU0rI3OH9svL6ENuSAVL8jSxSoHrwgxfFa9y58sRwaUn rAqDUpwqsR3thxmz+4swsDmAhpMhUuGaAq6LQmuTFeqkelpK8Gr1QdVp1eYA5TG4fBjN xE711bI9fxve2924tXlRUpshHYiaxL0FCWvYo0ljPS3J+sxs5cGUVJo+QRHiXqpOB046 0otAeEhepE/T0lVxV6AmycU78G3BeXw/rvYxSyXJzYjBysIpGsCqryDdhfyFdRHBwSsf vZbw== X-Gm-Message-State: AOAM533u7IRoyz0fXOlmej/0soep4sI0sI9HiMZy/xohxaPiIBrgIwWl dmx4pXjdX8TCy8T40ugXGwXQqA== X-Google-Smtp-Source: ABdhPJyZArKkXHwklacwoXIj8QPwSo171Bv6oYmc4UVF5gdv7tBrH85atnkzcmtB3PGbgTH3iciK+w== X-Received: by 2002:a5d:5743:0:b0:210:dd:98c8 with SMTP id q3-20020a5d5743000000b0021000dd98c8mr20932592wrw.259.1653918943273; Mon, 30 May 2022 06:55:43 -0700 (PDT) Received: from localhost.localdomain ([88.160.162.107]) by smtp.gmail.com with ESMTPSA id w9-20020adfee49000000b0020cfed0bb7fsm9214856wro.53.2022.05.30.06.55.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 May 2022 06:55:42 -0700 (PDT) From: Fabien Parent To: Matthias Brugger Cc: Fabien Parent , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks Date: Mon, 30 May 2022 15:55:21 +0200 Message-Id: <20220530135522.762560-2-fparent@baylibre.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220530135522.762560-1-fparent@baylibre.com> References: <20220530135522.762560-1-fparent@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220530_065547_079313_F25E2F69 X-CRM114-Status: GOOD ( 17.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MT8365 requires an extra 2 clocks to be enabled to behave correctly. Add support these 2 clocks, they are made optional since they seem to be present only on MT8365. Signed-off-by: Fabien Parent --- drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++---- 1 file changed, 32 insertions(+), 4 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index bf39a64f3ecc..8dea5e14d73e 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -1163,6 +1163,8 @@ struct pmic_wrapper { const struct pwrap_slv_type *slave; struct clk *clk_spi; struct clk *clk_wrap; + struct clk *clk_sys; + struct clk *clk_tmr; struct reset_control *rstc; struct reset_control *rstc_bridge; @@ -2250,6 +2252,20 @@ static int pwrap_probe(struct platform_device *pdev) return PTR_ERR(wrp->clk_wrap); } + wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys"); + if (IS_ERR(wrp->clk_sys)) { + return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys), + "failed to get clock: %pe\n", + wrp->clk_sys); + } + + wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr"); + if (IS_ERR(wrp->clk_tmr)) { + return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr), + "failed to get clock: %pe\n", + wrp->clk_tmr); + } + ret = clk_prepare_enable(wrp->clk_spi); if (ret) return ret; @@ -2258,6 +2274,14 @@ static int pwrap_probe(struct platform_device *pdev) if (ret) goto err_out1; + ret = clk_prepare_enable(wrp->clk_sys); + if (ret) + goto err_out2; + + ret = clk_prepare_enable(wrp->clk_tmr); + if (ret) + goto err_out3; + /* Enable internal dynamic clock */ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) { pwrap_writel(wrp, 1, PWRAP_DCM_EN); @@ -2272,7 +2296,7 @@ static int pwrap_probe(struct platform_device *pdev) ret = pwrap_init(wrp); if (ret) { dev_dbg(wrp->dev, "init failed with %d\n", ret); - goto err_out2; + goto err_out4; } } @@ -2286,7 +2310,7 @@ static int pwrap_probe(struct platform_device *pdev) if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) { dev_dbg(wrp->dev, "initialization isn't finished\n"); ret = -ENODEV; - goto err_out2; + goto err_out4; } /* Initialize watchdog, may not be done by the bootloader */ @@ -2319,7 +2343,7 @@ static int pwrap_probe(struct platform_device *pdev) IRQF_TRIGGER_HIGH, "mt-pmic-pwrap", wrp); if (ret) - goto err_out2; + goto err_out4; wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap); if (IS_ERR(wrp->regmap)) { @@ -2331,11 +2355,15 @@ static int pwrap_probe(struct platform_device *pdev) if (ret) { dev_dbg(wrp->dev, "failed to create child devices at %pOF\n", np); - goto err_out2; + goto err_out4; } return 0; +err_out4: + clk_disable_unprepare(wrp->clk_tmr); +err_out3: + clk_disable_unprepare(wrp->clk_sys); err_out2: clk_disable_unprepare(wrp->clk_wrap); err_out1: From patchwork Mon May 30 13:55:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Parent X-Patchwork-Id: 12864666 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFF2FC433EF for ; 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Mon, 30 May 2022 06:55:44 -0700 (PDT) From: Fabien Parent To: Matthias Brugger Cc: Fabien Parent , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] soc: mediatek: pwrap: add mt8365 SoC support Date: Mon, 30 May 2022 15:55:22 +0200 Message-Id: <20220530135522.762560-3-fparent@baylibre.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220530135522.762560-1-fparent@baylibre.com> References: <20220530135522.762560-1-fparent@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220530_065549_421398_D4E001D9 X-CRM114-Status: GOOD ( 13.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PMIC Wrap support for MT8365 SoC. Signed-off-by: Fabien Parent --- drivers/soc/mediatek/mtk-pmic-wrap.c | 80 ++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 8dea5e14d73e..16595c3330ef 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -980,6 +980,68 @@ static int mt8195_regs[] = { [PWRAP_WACS2_RDATA] = 0x8A8, }; +static int mt8365_regs[] = { + [PWRAP_MUX_SEL] = 0x0, + [PWRAP_WRAP_EN] = 0x4, + [PWRAP_DIO_EN] = 0x8, + [PWRAP_CSHEXT_WRITE] = 0x24, + [PWRAP_CSHEXT_READ] = 0x28, + [PWRAP_STAUPD_PRD] = 0x3c, + [PWRAP_STAUPD_GRPEN] = 0x40, + [PWRAP_STAUPD_MAN_TRIG] = 0x58, + [PWRAP_STAUPD_STA] = 0x5c, + [PWRAP_WRAP_STA] = 0x60, + [PWRAP_HARB_INIT] = 0x64, + [PWRAP_HARB_HPRIO] = 0x68, + [PWRAP_HIPRIO_ARB_EN] = 0x6c, + [PWRAP_HARB_STA0] = 0x70, + [PWRAP_HARB_STA1] = 0x74, + [PWRAP_MAN_EN] = 0x7c, + [PWRAP_MAN_CMD] = 0x80, + [PWRAP_MAN_RDATA] = 0x84, + [PWRAP_MAN_VLDCLR] = 0x88, + [PWRAP_WACS0_EN] = 0x8c, + [PWRAP_INIT_DONE0] = 0x90, + [PWRAP_WACS0_CMD] = 0xc00, + [PWRAP_WACS0_RDATA] = 0xc04, + [PWRAP_WACS0_VLDCLR] = 0xc08, + [PWRAP_WACS1_EN] = 0x94, + [PWRAP_INIT_DONE1] = 0x98, + [PWRAP_WACS2_EN] = 0x9c, + [PWRAP_INIT_DONE2] = 0xa0, + [PWRAP_WACS2_CMD] = 0xc20, + [PWRAP_WACS2_RDATA] = 0xc24, + [PWRAP_WACS2_VLDCLR] = 0xc28, + [PWRAP_INT_EN] = 0xb4, + [PWRAP_INT_FLG_RAW] = 0xb8, + [PWRAP_INT_FLG] = 0xbc, + [PWRAP_INT_CLR] = 0xc0, + [PWRAP_SIG_ADR] = 0xd4, + [PWRAP_SIG_MODE] = 0xd8, + [PWRAP_SIG_VALUE] = 0xdc, + [PWRAP_SIG_ERRVAL] = 0xe0, + [PWRAP_CRC_EN] = 0xe4, + [PWRAP_TIMER_EN] = 0xe8, + [PWRAP_TIMER_STA] = 0xec, + [PWRAP_WDT_UNIT] = 0xf0, + [PWRAP_WDT_SRC_EN] = 0xf4, + [PWRAP_WDT_FLG] = 0xfc, + [PWRAP_DEBUG_INT_SEL] = 0x104, + [PWRAP_CIPHER_KEY_SEL] = 0x1c4, + [PWRAP_CIPHER_IV_SEL] = 0x1c8, + [PWRAP_CIPHER_RDY] = 0x1d0, + [PWRAP_CIPHER_MODE] = 0x1d4, + [PWRAP_CIPHER_SWRST] = 0x1d8, + [PWRAP_DCM_EN] = 0x1dc, + [PWRAP_DCM_DBC_PRD] = 0x1e0, + [PWRAP_EINT_STA0_ADR] = 0x44, + [PWRAP_EINT_STA1_ADR] = 0x48, + [PWRAP_INT1_EN] = 0xc4, + [PWRAP_INT1_FLG] = 0xcc, + [PWRAP_INT1_CLR] = 0xd0, + [PWRAP_WDT_SRC_EN_1] = 0xf8, +}; + static int mt8516_regs[] = { [PWRAP_MUX_SEL] = 0x0, [PWRAP_WRAP_EN] = 0x4, @@ -1136,6 +1198,7 @@ enum pwrap_type { PWRAP_MT8183, PWRAP_MT8186, PWRAP_MT8195, + PWRAP_MT8365, PWRAP_MT8516, }; @@ -1590,6 +1653,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp) case PWRAP_MT6797: case PWRAP_MT8173: case PWRAP_MT8186: + case PWRAP_MT8365: case PWRAP_MT8516: pwrap_writel(wrp, 1, PWRAP_CIPHER_EN); break; @@ -2112,6 +2176,19 @@ static struct pmic_wrapper_type pwrap_mt8195 = { .init_soc_specific = NULL, }; +static const struct pmic_wrapper_type pwrap_mt8365 = { + .regs = mt8365_regs, + .type = PWRAP_MT8365, + .arb_en_all = 0x3ffff, + .int_en_all = 0x7f1fffff, + .int1_en_all = 0x0, + .spi_w = PWRAP_MAN_CMD_SPI_WRITE, + .wdt_src = PWRAP_WDT_SRC_MASK_ALL, + .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_WDT_SRC1, + .init_reg_clock = pwrap_common_init_reg_clock, + .init_soc_specific = NULL, +}; + static struct pmic_wrapper_type pwrap_mt8516 = { .regs = mt8516_regs, .type = PWRAP_MT8516, @@ -2171,6 +2248,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = { }, { .compatible = "mediatek,mt8195-pwrap", .data = &pwrap_mt8195, + }, { + .compatible = "mediatek,mt8365-pwrap", + .data = &pwrap_mt8365, }, { .compatible = "mediatek,mt8516-pwrap", .data = &pwrap_mt8516,