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bh=nAt7h+HkxsLi04OrpWsTkEa0YzQ248q+qSEZJ1YtAU0=; b=IRhm6JoOt7bCwiBV090Ou1z10M5P0QwTSaBTl/rgqsdbsfNMfBCjKeza+2z5oMttbX dxvExDT5iilztsG2AKEjjABVp2arvjRJ9maZKVONlAB7xdXippUw9ZSy5ppONRGKR4R7 w9VgPkgCVJAGVbksdYz73UCSeN0BgWJ9aSeCUPknYYSwqfjG3gruVdzSsy4BDS5jLvbe fyzA6FD/UaJ8VsX078k4cuO6gxJnCg+VHwollzSwPESgEjPwoauY9srTYh7qjXH0y1da CV004bBFS3WQ4GgC1aK21LNT5kZWv6MSz5xQjzwrRp8osP4InUnkZa8tpDSYC1xBd0hp KTYg== X-Gm-Message-State: AJcUukccGbeddIViEv6E71xg+tiCr1Xj6+4igrkyi4RgsZbqGFAYT+7j jYRAyEl9WD7e8RLNNOlDo01nlY9uIqM= X-Google-Smtp-Source: ALg8bN4RsOAOy6/qnF0Ca32AuP6rzw8LSa4m5ykErAANCskBm02DWRtut5ULESkBBSYmP0pzJOfG1w== X-Received: by 2002:a63:4c5:: with SMTP id 188mr10125149pge.391.1547138793764; Thu, 10 Jan 2019 08:46:33 -0800 (PST) Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id x2sm107086416pfx.78.2019.01.10.08.46.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 10 Jan 2019 08:46:32 -0800 (PST) Date: Thu, 10 Jan 2019 08:46:32 -0800 (PST) X-Google-Original-Date: Thu, 10 Jan 2019 08:46:30 PST (-0800) Subject: [GIT PULL] RISC-V Updates for 4.21-rc2 v2 From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190110_084635_103192_57823B0C X-CRM114-Status: GOOD ( 18.83 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-riscv@lists.infradead.org MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+patchwork-linux-riscv=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c: Linux 5.0-rc1 (2019-01-06 17:08:20 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux.git tags/riscv-for-linus-4.21-rc2-v2 for you to fetch changes up to 27de1f541f1f911bc2242ae68ef7375247b36c7d: tty/serial: Add RISC-V SBI earlycon support (2019-01-09 14:59:57 -0800) ---------------------------------------------------------------- RISC-V Updates for 4.21-rc2 v2 This tag contains a handful of updates that slipped through the cracks during the merge window due to the holidays. The fixes are mostly independent, with the exception of one larger audit-related branch. There's more information about the audit branch in that merge, the rest are: * The BSS has been moved, which shrinks flat images. * A fix to test-bpf so it compiles on RV64I-based systems. * A fix to respect the kernel commandline when there is no device tree. * A fix to prevent CPUs from trying to put themselves to sleep when bringing down the system. * Support for MODULE_SECTIONS on RV32I-based systems. * [new in v2] The addition of an SBI earlycon driver. This is definately a new feature, but I'd like to include it now because I dropped this patch when submitting the merge window PR that removed our EARLY_PRINTK support. As usual, I've tested this by booting a Fedora-based image on a recent QEMU (this time just whatever I had lying around). --- Just a note: I did find when testing that the generic PCI controller hangs boots on QEMU. Everything is unstable (rc1 kernel, QEMU in merge window, and I've never tried this specific PCI controller before) so it's probably not a regression, but it's definately a bug. ---------------------------------------------------------------- Andreas Schwab (1): riscv: don't stop itself in smp_send_stop Anup Patel (2): RISC-V: Make BSS section as the last section in vmlinux.lds.S tty/serial: Add RISC-V SBI earlycon support Aurelien Jarno (1): tools uapi: fix RISC-V 64-bit support David Abdurachmanov (6): riscv: add audit support riscv: audit: add audit hook in do_syscall_trace_enter/exit() riscv: define NR_syscalls in unistd.h riscv: define CREATE_TRACE_POINTS in ptrace.c riscv: fix trace_sys_exit hook riscv: add HAVE_SYSCALL_TRACEPOINTS to Kconfig Palmer Dabbelt (1): Fix a handful of audit-related issue Paul Walmsley (3): arch: riscv: support kernel command line forcing when no DTB passed MAINTAINERS: SiFive drivers: change the git tree to a SiFive git tree MAINTAINERS: SiFive drivers: add myself as a SiFive driver maintainer Zong Li (1): RISC-V: Support MODULE_SECTIONS mechanism on RV32 MAINTAINERS | 3 +- arch/riscv/Kconfig | 4 ++- arch/riscv/include/asm/module.h | 28 ++++++++-------- arch/riscv/include/asm/ptrace.h | 5 +++ arch/riscv/include/asm/syscall.h | 10 ++++++ arch/riscv/include/asm/thread_info.h | 6 ++++ arch/riscv/include/asm/unistd.h | 2 ++ arch/riscv/kernel/entry.S | 4 +-- arch/riscv/kernel/module-sections.c | 30 +++++++++-------- arch/riscv/kernel/ptrace.c | 9 +++++- arch/riscv/kernel/setup.c | 9 +++++- arch/riscv/kernel/smp.c | 43 +++++++++++++++++++++---- arch/riscv/kernel/vmlinux.lds.S | 8 +++-- drivers/tty/serial/Kconfig | 12 +++++++ drivers/tty/serial/Makefile | 1 + drivers/tty/serial/earlycon-riscv-sbi.c | 28 ++++++++++++++++ include/uapi/linux/audit.h | 2 ++ tools/arch/riscv/include/uapi/asm/bitsperlong.h | 25 ++++++++++++++ tools/include/uapi/asm/bitsperlong.h | 2 ++ 19 files changed, 189 insertions(+), 42 deletions(-) create mode 100644 drivers/tty/serial/earlycon-riscv-sbi.c create mode 100644 tools/arch/riscv/include/uapi/asm/bitsperlong.h