From patchwork Tue Jun 7 11:50:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56FB6C433EF for ; Tue, 7 Jun 2022 11:50:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243171AbiFGLuy (ORCPT ); Tue, 7 Jun 2022 07:50:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243140AbiFGLur (ORCPT ); Tue, 7 Jun 2022 07:50:47 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F5D9814A2; Tue, 7 Jun 2022 04:50:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602646; x=1686138646; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=jDD4lvp4bmVltOZHiPBrQe81UPImEdnKDg0Vz+nZ9ck=; b=uDbSe4nwB4JqOv8bC6qPzNzbJ73jHLQ+ZdX147WdbtR4+5UTC0rpSwMv snWQKtNtYw/SWnpxKQY2Fl3zO+Ed1kKpKTBapPvqjSSNJNHtIUUQgZic0 moGFMz38ZP4WoqKquyK5df+NPoBcEPk6cVerqc1EloPyj0q7JG5QEL6yg g=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 07 Jun 2022 04:50:46 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:50:45 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:45 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:40 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 1/9] dt-bindings: mfd: pm8008: Add reset-gpios Date: Tue, 7 Jun 2022 17:20:07 +0530 Message-ID: <1654602615-28849-2-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add reset-gpios property for pm8008. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd Reviewed-by: Rob Herring --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - None. Changes in V11: - Change the GPIO_ACTIVE_HIGH flag to GPIO_ACTIVE_LOW. Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index ec3138c..a89649c 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -44,6 +44,9 @@ properties: "#size-cells": const: 0 + reset-gpios: + maxItems: 1 + patternProperties: "^gpio@[0-9a-f]+$": type: object @@ -92,6 +95,7 @@ required: - "#address-cells" - "#size-cells" - "#interrupt-cells" + - reset-gpios additionalProperties: false @@ -99,6 +103,7 @@ examples: - | #include #include + #include qupv3_se13_i2c { #address-cells = <1>; #size-cells = <0>; @@ -113,6 +118,8 @@ examples: interrupt-parent = <&tlmm>; interrupts = <32 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_LOW>; + pm8008_gpios: gpio@c000 { compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From patchwork Tue Jun 7 11:50:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE293C43334 for ; Tue, 7 Jun 2022 11:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243152AbiFGLu5 (ORCPT ); Tue, 7 Jun 2022 07:50:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243166AbiFGLuy (ORCPT ); Tue, 7 Jun 2022 07:50:54 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8BC8CB2263; Tue, 7 Jun 2022 04:50:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602650; x=1686138650; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=WpSBUwCrOHkuI0vw9NWC0bFhaX0vfYUnegYN+/OJ2jQ=; b=xdkvKxNYOS9+bJ9Ig6Pk1D0UMNA2RqlhlBlPt3ZS6FAkuKtykrNkLGae iKKX3/S9UpUniVcrLUsQgnBGl25RY1rHwt4i3APR1cdnxBwQBmAakctDE Vm51bYwYsY2J64WUTP/MFEhqAze+0+GyWSXKGSsU0yUTMMkTB3co0SGzF E=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 04:50:50 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:50:49 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:49 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:45 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 2/9] dt-bindings: mfd: pm8008: Change the address cells Date: Tue, 7 Jun 2022 17:20:08 +0530 Message-ID: <1654602615-28849-3-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Change the address cells as '2' so that the first cell describes the i2c address offset of the clients. This helps us to define the child nodes of all clients under the same parent mfd node, instead of adding separate mfd DT nodes. Change the gpios reg value accordingly. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd Reviewed-by: Rob Herring --- Changes in V14: - None. Changes in V13: - Fixed nit. Changes in V12: - None. Changes in V11: - New patch added from V11. Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index a89649c..a54d1ce0 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -39,7 +39,7 @@ properties: interrupt-controller: true "#address-cells": - const: 1 + const: 2 "#size-cells": const: 0 @@ -48,7 +48,7 @@ properties: maxItems: 1 patternProperties: - "^gpio@[0-9a-f]+$": + "^gpio@0,[0-9a-f]+$": type: object description: | @@ -61,7 +61,7 @@ patternProperties: - const: qcom,spmi-gpio reg: - description: Peripheral address of one of the two GPIO peripherals. + description: Peripheral offset and address of one of the two GPIO peripherals. maxItems: 1 gpio-controller: true @@ -110,7 +110,7 @@ examples: pm8008i@8 { compatible = "qcom,pm8008"; reg = <0x8>; - #address-cells = <1>; + #address-cells = <2>; #size-cells = <0>; interrupt-controller; #interrupt-cells = <2>; @@ -120,9 +120,9 @@ examples: reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_LOW>; - pm8008_gpios: gpio@c000 { + pm8008_gpios: gpio@0,c000 { compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; + reg = <0x0 0xc000>; gpio-controller; gpio-ranges = <&pm8008_gpios 0 0 2>; #gpio-cells = <2>; From patchwork Tue Jun 7 11:50:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871819 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BADE6C433EF for ; Tue, 7 Jun 2022 11:51:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243185AbiFGLu6 (ORCPT ); Tue, 7 Jun 2022 07:50:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243194AbiFGLu5 (ORCPT ); Tue, 7 Jun 2022 07:50:57 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5F9EB1C09; Tue, 7 Jun 2022 04:50:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602654; x=1686138654; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=8OpYHXh9PP481W97kSdBUT4TQX0t2a4b/LoQM0Zozqs=; b=xjrhJF3AxFx05Qjj7wpjQzn79vPvzdZHIy3TXLuag26dTFbIE2+6/zNa MepMw7JvKw7u4XCxuvjdp6/xIu8abDL2MjlBqWzMZQ7CODnSCxlqNbTwS r1e0+I/qk+0Q3wjPWCBoaHyNBZp8etY1WGBEKvbRixwAqgrV9585OjSl6 k=; Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 04:50:54 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg02-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:50:54 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:54 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:49 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 3/9] dt-bindings: mfd: pm8008: Add regulators for pm8008 Date: Tue, 7 Jun 2022 17:20:09 +0530 Message-ID: <1654602615-28849-4-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add regulators and their parent supplies along with example. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd Reviewed-by: Rob Herring --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - None. Changes in V11: - Add ldos directly under pm8008@8 node, remove the intermediate "regulators" node. Changes in V10: - Regulators are added as a part of pm8008@8 device. Change bindings doc accordingly. .../devicetree/bindings/mfd/qcom,pm8008.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index a54d1ce0..fd3c51e 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -47,6 +47,21 @@ properties: reset-gpios: maxItems: 1 + vdd_l1_l2-supply: + description: Input supply phandle of ldo1 and ldo2 regulators. + + vdd_l3_l4-supply: + description: Input supply phandle of ldo3 and ldo4 regulators. + + vdd_l5-supply: + description: Input supply phandle of ldo5 regulator. + + vdd_l6-supply: + description: Input supply phandle of ldo6 regulator. + + vdd_l7-supply: + description: Input supply phandle of ldo7 regulator. + patternProperties: "^gpio@0,[0-9a-f]+$": type: object @@ -88,6 +103,27 @@ patternProperties: additionalProperties: false + "^ldo[1-7]@[1],[0-9a-f]+$": + type: object + + $ref: "/schemas/regulator/regulator.yaml#" + + description: PM8008 regulator peripherals of PM8008 regulator device. + + properties: + compatible: + const: qcom,pm8008-regulator + + reg: + description: Peripheral offset and address of the ldo regulator. + maxItems: 1 + + required: + - compatible + - reg + + unevaluatedProperties: false + required: - compatible - reg @@ -120,6 +156,12 @@ examples: reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_LOW>; + vdd_l1_l2-supply = <&vreg_s8b_1p2>; + vdd_l3_l4-supply = <&vreg_s1b_1p8>; + vdd_l5-supply = <&vreg_bob>; + vdd_l6-supply = <&vreg_bob>; + vdd_l7-supply = <&vreg_bob>; + pm8008_gpios: gpio@0,c000 { compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; reg = <0x0 0xc000>; @@ -129,6 +171,14 @@ examples: interrupt-controller; #interrupt-cells = <2>; }; + + ldo1@1,4000 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4000>; + regulator-name = "pm8008_ldo1"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1300000>; + }; }; }; From patchwork Tue Jun 7 11:50:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871820 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A17CC433EF for ; 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07 Jun 2022 04:50:59 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:50:58 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:58 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:53 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 4/9] mfd: pm8008: Add reset-gpios Date: Tue, 7 Jun 2022 17:20:10 +0530 Message-ID: <1654602615-28849-5-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the reset-gpio toggling in the pm8008_probe() to bring pm8008 chip out of reset instead of doing it in DT node using "output-high" property. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - Move reset_gpio acquiring above probe_irq_peripherals in pm8008_probe. Changes in V11: - Use local variable for reset_gpios as it is not used outside of probe. - Use GPIOD_OUT_LOW flag to initialize the gpio and remove below line as it is not required "gpiod_set_value(chip->reset_gpio, 1);". drivers/mfd/qcom-pm8008.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index c472d7f..5a670b0 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -221,6 +222,7 @@ static int pm8008_probe(struct i2c_client *client) { int rc; struct pm8008_data *chip; + struct gpio_desc *reset_gpio; chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) @@ -233,6 +235,10 @@ static int pm8008_probe(struct i2c_client *client) i2c_set_clientdata(client, chip); + reset_gpio = devm_gpiod_get(chip->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset_gpio)) + return PTR_ERR(reset_gpio); + if (of_property_read_bool(chip->dev->of_node, "interrupt-controller")) { rc = pm8008_probe_irq_peripherals(chip, client->irq); if (rc) From patchwork Tue Jun 7 11:50:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3615AC433EF for ; Tue, 7 Jun 2022 11:51:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243164AbiFGLvN (ORCPT ); Tue, 7 Jun 2022 07:51:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234156AbiFGLvF (ORCPT ); Tue, 7 Jun 2022 07:51:05 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27D86B2242; Tue, 7 Jun 2022 04:51:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602664; x=1686138664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=I4jrwumUrij13W+J1MGIZxjSZuLNcXtb4APVTK6Gbwo=; b=TL/Er4BI+w6B89GPKjQ80bFAbfPDBQdvvom3F29SQTuuq17XEz2RQseV j/wBnlfwkZZQVf5lZtgzc7WExBRaqT5Bu0QkTik6tIxdcr589vATlFFSg YWRMiPWu9fOwpyssRl4c8BS0t41zO/wA+hS08T3O5abMf5G5ka9sAeeME w=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 04:51:03 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:51:03 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:02 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:50:58 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 5/9] mfd: pm8008: Remove the regmap member from pm8008_data struct Date: Tue, 7 Jun 2022 17:20:11 +0530 Message-ID: <1654602615-28849-6-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Remove the regmap member from pm8008_data struct as it is not used outside of probe. Add a local variable for regmap and pass it to the pm8008_probe_irq_peripherals() API in pm8008_probe. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - None. Changes in V11: - New patch added from V11. drivers/mfd/qcom-pm8008.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 5a670b0..569ffd50 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -57,7 +57,6 @@ enum { struct pm8008_data { struct device *dev; - struct regmap *regmap; int irq; struct regmap_irq_chip_data *irq_data; }; @@ -151,7 +150,7 @@ static struct regmap_config qcom_mfd_regmap_cfg = { .max_register = 0xFFFF, }; -static int pm8008_init(struct pm8008_data *chip) +static int pm8008_init(struct regmap *regmap) { int rc; @@ -161,32 +160,32 @@ static int pm8008_init(struct pm8008_data *chip) * This is required to enable the writing of TYPE registers in * regmap_irq_sync_unlock(). */ - rc = regmap_write(chip->regmap, + rc = regmap_write(regmap, (PM8008_TEMP_ALARM_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); if (rc) return rc; /* Do the same for GPIO1 and GPIO2 peripherals */ - rc = regmap_write(chip->regmap, + rc = regmap_write(regmap, (PM8008_GPIO1_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); if (rc) return rc; - rc = regmap_write(chip->regmap, + rc = regmap_write(regmap, (PM8008_GPIO2_ADDR | INT_SET_TYPE_OFFSET), BIT(0)); return rc; } static int pm8008_probe_irq_peripherals(struct pm8008_data *chip, - int client_irq) + struct regmap *regmap, int client_irq) { int rc, i; struct regmap_irq_type *type; struct regmap_irq_chip_data *irq_data; - rc = pm8008_init(chip); + rc = pm8008_init(regmap); if (rc) { dev_err(chip->dev, "Init failed: %d\n", rc); return rc; @@ -208,7 +207,7 @@ static int pm8008_probe_irq_peripherals(struct pm8008_data *chip, IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW); } - rc = devm_regmap_add_irq_chip(chip->dev, chip->regmap, client_irq, + rc = devm_regmap_add_irq_chip(chip->dev, regmap, client_irq, IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data); if (rc) { dev_err(chip->dev, "Failed to add IRQ chip: %d\n", rc); @@ -223,14 +222,15 @@ static int pm8008_probe(struct i2c_client *client) int rc; struct pm8008_data *chip; struct gpio_desc *reset_gpio; + struct regmap *regmap; chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; chip->dev = &client->dev; - chip->regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg); - if (!chip->regmap) + regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg); + if (!regmap) return -ENODEV; i2c_set_clientdata(client, chip); @@ -240,7 +240,7 @@ static int pm8008_probe(struct i2c_client *client) return PTR_ERR(reset_gpio); if (of_property_read_bool(chip->dev->of_node, "interrupt-controller")) { - rc = pm8008_probe_irq_peripherals(chip, client->irq); + rc = pm8008_probe_irq_peripherals(chip, regmap, client->irq); if (rc) dev_err(chip->dev, "Failed to probe irq periphs: %d\n", rc); } From patchwork Tue Jun 7 11:50:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 537C0C433EF for ; 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Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 04:51:08 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:51:07 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:07 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:02 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 6/9] mfd: pm8008: Use i2c_new_dummy_device() API Date: Tue, 7 Jun 2022 17:20:12 +0530 Message-ID: <1654602615-28849-7-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use i2c_new_dummy_device() to register pm8008-regulator client present at a different address space, instead of defining a separate DT node. This avoids calling the probe twice for the same chip, once for each client pm8008-infra and pm8008-regulator. As a part of this define pm8008_regmap_init() to do regmap init for both the clients and define pm8008_get_regmap() to pass the regmap to the regulator driver. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - Make chip as const in pm8008_get_regmap() definition. - Use EXPORT_SYMBOL_GPL() for pm8008_get_regmap. - Add linux/mfd/qcom_pm8008.h to avoid error. Changes in V11: - Remove the for loop and register dummy directly as there are only 2 clients. - Define pm8008_regmap_init() API to do the redundant init part. drivers/mfd/qcom-pm8008.c | 34 ++++++++++++++++++++++++++++++++-- include/linux/mfd/qcom_pm8008.h | 9 +++++++++ 2 files changed, 41 insertions(+), 2 deletions(-) create mode 100644 include/linux/mfd/qcom_pm8008.h diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 569ffd50..55e2a8e 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -57,6 +58,7 @@ enum { struct pm8008_data { struct device *dev; + struct regmap *regulators_regmap; int irq; struct regmap_irq_chip_data *irq_data; }; @@ -150,6 +152,12 @@ static struct regmap_config qcom_mfd_regmap_cfg = { .max_register = 0xFFFF, }; +struct regmap *pm8008_get_regmap(const struct pm8008_data *chip) +{ + return chip->regulators_regmap; +} +EXPORT_SYMBOL_GPL(pm8008_get_regmap); + static int pm8008_init(struct regmap *regmap) { int rc; @@ -217,11 +225,25 @@ static int pm8008_probe_irq_peripherals(struct pm8008_data *chip, return 0; } +static struct regmap *pm8008_regmap_init(struct i2c_client *client, + struct pm8008_data *chip) +{ + struct regmap *regmap; + + regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg); + if (!regmap) + return NULL; + + i2c_set_clientdata(client, chip); + return regmap; +} + static int pm8008_probe(struct i2c_client *client) { int rc; struct pm8008_data *chip; struct gpio_desc *reset_gpio; + struct i2c_client *regulators_client; struct regmap *regmap; chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); @@ -229,11 +251,19 @@ static int pm8008_probe(struct i2c_client *client) return -ENOMEM; chip->dev = &client->dev; - regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg); + regmap = pm8008_regmap_init(client, chip); if (!regmap) return -ENODEV; - i2c_set_clientdata(client, chip); + regulators_client = i2c_new_dummy_device(client->adapter, client->addr + 1); + if (IS_ERR(regulators_client)) { + dev_err(&client->dev, "can't attach client\n"); + return PTR_ERR(regulators_client); + } + + chip->regulators_regmap = pm8008_regmap_init(regulators_client, chip); + if (!chip->regulators_regmap) + return -ENODEV; reset_gpio = devm_gpiod_get(chip->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(reset_gpio)) diff --git a/include/linux/mfd/qcom_pm8008.h b/include/linux/mfd/qcom_pm8008.h new file mode 100644 index 0000000..3814bff --- /dev/null +++ b/include/linux/mfd/qcom_pm8008.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +// Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. +#ifndef __QCOM_PM8008_H__ +#define __QCOM_PM8008_H__ + +struct pm8008_data; +struct regmap *pm8008_get_regmap(const struct pm8008_data *chip); + +#endif From patchwork Tue Jun 7 11:50:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA89BCCA47F for ; Tue, 7 Jun 2022 11:51:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243319AbiFGLvs (ORCPT ); Tue, 7 Jun 2022 07:51:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243218AbiFGLvn (ORCPT ); Tue, 7 Jun 2022 07:51:43 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4B82B41D5; Tue, 7 Jun 2022 04:51:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602672; x=1686138672; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=VhnDf/VEDE8FVVZef1HM43VsxTgXg0JA/ytLJ9O1i4U=; b=Vglpx4+sU25G4rIMbp/Un5H+vyKMsicolcEwMhm1ecsYo2+hLZwj2nFI XLLzVRzHiZJ0vbspXuDgVBmSVo6PSr/reGtX7Rtu3uqCyleKf0uj6IVsF K5vvBdEMqQn3pDd12Raj+MfGJgp6J134FpbjNfPVsQM7WYYb9KbQlbzPy 0=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-02.qualcomm.com with ESMTP; 07 Jun 2022 04:51:12 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:51:11 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:11 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:07 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 7/9] regulator: Add a regulator driver for the PM8008 PMIC Date: Tue, 7 Jun 2022 17:20:13 +0530 Message-ID: <1654602615-28849-8-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Qualcomm Technologies, Inc. PM8008 is an I2C controlled PMIC containing 7 LDO regulators. Add a PM8008 regulator driver to support PMIC regulator management via the regulator framework. Signed-off-by: Satya Priya Reported-by: kernel test robot Reported-by: Dan Carpenter Reported-by: kernel test robot --- Changes in V14: - Remove unused headers and debug prints. - Remove min_uv and max_uv from reg_data[] and set the min/max based on the voltage_range pointer. - In get_voltage_sel read voltage from hw and calculate selector instead of using selector from set_voltage. - Add errro check after regulator_list_voltage_linear_range(). - Use static_assert to make sure nldo_ranges & pldo_ranges doesn't become larger and we forget to update the pm8008_reg->rdesc.n_linear_ranges Changes in V13: - Added if check to avoid buffer overflow warnings. for (i = 0; i < ARRAY_SIZE(reg_data); i++) if (strstr(name, reg_data[i].name)) break; if (i == ARRAY_SIZE(reg_data)) { dev_err(dev, "Invalid regulator name %s\n", name); return -EINVAL; } - Removed unused headers. Changes in V12: - Get base from reg property in DT node. Changes in V11: - Added of_device_id table and compatible to register the ldos. drivers/regulator/Kconfig | 9 ++ drivers/regulator/Makefile | 1 + drivers/regulator/qcom-pm8008-regulator.c | 248 ++++++++++++++++++++++++++++++ 3 files changed, 258 insertions(+) create mode 100644 drivers/regulator/qcom-pm8008-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index cbe0f96..2c6d9c2 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -925,6 +925,15 @@ config REGULATOR_PWM This driver supports PWM controlled voltage regulators. PWM duty cycle can increase or decrease the voltage. +config REGULATOR_QCOM_PM8008 + tristate "Qualcomm Technologies, Inc. PM8008 PMIC regulators" + depends on MFD_QCOM_PM8008 + help + Select this option to get support for the voltage regulators + of Qualcomm Technologies, Inc. PM8008 PMIC chip. PM8008 has 7 LDO + regulators. This driver provides support for basic operations like + set/get voltage and enable/disable. + config REGULATOR_QCOM_RPM tristate "Qualcomm RPM regulator driver" depends on MFD_QCOM_RPM diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 8d3ee8b..169e686 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -101,6 +101,7 @@ obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o obj-$(CONFIG_REGULATOR_MTK_DVFSRC) += mtk-dvfsrc-regulator.o obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_PM8008) += qcom-pm8008-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o obj-$(CONFIG_REGULATOR_QCOM_SMD_RPM) += qcom_smd-regulator.o diff --git a/drivers/regulator/qcom-pm8008-regulator.c b/drivers/regulator/qcom-pm8008-regulator.c new file mode 100644 index 0000000..71cb95c --- /dev/null +++ b/drivers/regulator/qcom-pm8008-regulator.c @@ -0,0 +1,248 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define VSET_STEP_MV 8 +#define VSET_STEP_UV (VSET_STEP_MV * 1000) + +#define LDO_ENABLE_REG(base) ((base) + 0x46) +#define ENABLE_BIT BIT(7) + +#define LDO_VSET_LB_REG(base) ((base) + 0x40) + +#define LDO_STEPPER_CTL_REG(base) ((base) + 0x3b) +#define DEFAULT_VOLTAGE_STEPPER_RATE 38400 +#define STEP_RATE_MASK GENMASK(1, 0) + +#define NLDO_MIN_UV 528000 +#define NLDO_MAX_UV 1504000 + +#define PLDO_MIN_UV 1504000 +#define PLDO_MAX_UV 3400000 + +struct pm8008_regulator_data { + const char *name; + const char *supply_name; + int min_dropout_uv; + const struct linear_range *voltage_range; +}; + +struct pm8008_regulator { + struct device *dev; + struct regmap *regmap; + struct regulator_desc rdesc; + u16 base; + int step_rate; + int voltage_selector; +}; + +static const struct linear_range nldo_ranges[] = { + REGULATOR_LINEAR_RANGE(528000, 0, 122, 8000), +}; + +static const struct linear_range pldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1504000, 0, 237, 8000), +}; +static_assert(ARRAY_SIZE(pldo_ranges) == 1 && ARRAY_SIZE(nldo_ranges) == 1); + +static const struct pm8008_regulator_data reg_data[] = { + /* name parent headroom_uv voltage_range */ + { "ldo1", "vdd_l1_l2", 225000, nldo_ranges, }, + { "ldo2", "vdd_l1_l2", 225000, nldo_ranges, }, + { "ldo3", "vdd_l3_l4", 300000, pldo_ranges, }, + { "ldo4", "vdd_l3_l4", 300000, pldo_ranges, }, + { "ldo5", "vdd_l5", 200000, pldo_ranges, }, + { "ldo6", "vdd_l6", 200000, pldo_ranges, }, + { "ldo7", "vdd_l7", 200000, pldo_ranges, }, +}; + +static int pm8008_regulator_get_voltage(struct regulator_dev *rdev) +{ + struct pm8008_regulator *pm8008_reg = rdev_get_drvdata(rdev); + __le16 mV; + int rc, uV; + + regmap_bulk_read(pm8008_reg->regmap, + LDO_VSET_LB_REG(pm8008_reg->base), (void *)&mV, 2); + + uV = le16_to_cpu(mV) * 1000; + return (uV - pm8008_reg->rdesc.min_uV) / pm8008_reg->rdesc.uV_step; +} + +static inline int pm8008_write_voltage(struct pm8008_regulator *pm8008_reg, + int mV) +{ + __le16 vset_raw; + + vset_raw = cpu_to_le16(mV); + + return regmap_bulk_write(pm8008_reg->regmap, + LDO_VSET_LB_REG(pm8008_reg->base), + (const void *)&vset_raw, sizeof(vset_raw)); +} + +static int pm8008_regulator_set_voltage_time(struct regulator_dev *rdev, + int old_uV, int new_uv) +{ + struct pm8008_regulator *pm8008_reg = rdev_get_drvdata(rdev); + + return DIV_ROUND_UP(abs(new_uv - old_uV), pm8008_reg->step_rate); +} + +static int pm8008_regulator_set_voltage(struct regulator_dev *rdev, + unsigned int selector) +{ + struct pm8008_regulator *pm8008_reg = rdev_get_drvdata(rdev); + int rc, mV; + + rc = regulator_list_voltage_linear_range(rdev, selector); + if (rc < 0) + return rc; + + /* voltage control register is set with voltage in millivolts */ + mV = DIV_ROUND_UP(rc, 1000); + + rc = pm8008_write_voltage(pm8008_reg, mV); + if (rc < 0) + return rc; + + pm8008_reg->voltage_selector = selector; + + return 0; +} + +static const struct regulator_ops pm8008_regulator_ops = { + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, + .set_voltage_sel = pm8008_regulator_set_voltage, + .get_voltage_sel = pm8008_regulator_get_voltage, + .list_voltage = regulator_list_voltage_linear, + .set_voltage_time = pm8008_regulator_set_voltage_time, +}; + +static int pm8008_regulator_probe(struct platform_device *pdev) +{ + int rc, i; + u32 base; + unsigned int reg; + const char *name; + struct device *dev = &pdev->dev; + struct regulator_config reg_config = {}; + struct regulator_dev *rdev; + const struct pm8008_data *chip = dev_get_drvdata(pdev->dev.parent); + struct pm8008_regulator *pm8008_reg; + + pm8008_reg = devm_kzalloc(dev, sizeof(*pm8008_reg), GFP_KERNEL); + if (!pm8008_reg) + return -ENOMEM; + + pm8008_reg->regmap = pm8008_get_regmap(chip); + if (!pm8008_reg->regmap) { + dev_err(dev, "parent regmap is missing\n"); + return -EINVAL; + } + + pm8008_reg->dev = dev; + + rc = of_property_read_string(dev->of_node, "regulator-name", &name); + if (rc) + return rc; + + /* get the required regulator data */ + for (i = 0; i < ARRAY_SIZE(reg_data); i++) + if (strstr(name, reg_data[i].name)) + break; + + if (i == ARRAY_SIZE(reg_data)) { + dev_err(dev, "Invalid regulator name %s\n", name); + return -EINVAL; + } + + rc = of_property_read_u32_index(dev->of_node, "reg", 1, &base); + if (rc < 0) { + dev_err(dev, "%s: failed to get regulator base rc=%d\n", name, rc); + return rc; + } + pm8008_reg->base = base; + + /* get slew rate */ + rc = regmap_bulk_read(pm8008_reg->regmap, + LDO_STEPPER_CTL_REG(pm8008_reg->base), ®, 1); + if (rc < 0) { + dev_err(dev, "failed to read step rate configuration rc=%d\n", rc); + return rc; + } + reg &= STEP_RATE_MASK; + pm8008_reg->step_rate = DEFAULT_VOLTAGE_STEPPER_RATE >> reg; + + pm8008_reg->rdesc.type = REGULATOR_VOLTAGE; + pm8008_reg->rdesc.ops = &pm8008_regulator_ops; + pm8008_reg->rdesc.name = reg_data[i].name; + pm8008_reg->rdesc.supply_name = reg_data[i].supply_name; + pm8008_reg->rdesc.of_match = reg_data[i].name; + pm8008_reg->rdesc.uV_step = VSET_STEP_UV; + pm8008_reg->rdesc.linear_ranges = reg_data[i].voltage_range; + pm8008_reg->rdesc.n_linear_ranges = 1; + + if (reg_data[i].voltage_range == nldo_ranges) { + pm8008_reg->rdesc.min_uV = NLDO_MIN_UV; + pm8008_reg->rdesc.n_voltages + = ((NLDO_MAX_UV - NLDO_MIN_UV) + / pm8008_reg->rdesc.uV_step) + 1; + } else { + pm8008_reg->rdesc.min_uV = PLDO_MIN_UV; + pm8008_reg->rdesc.n_voltages + = ((PLDO_MAX_UV - PLDO_MIN_UV) + / pm8008_reg->rdesc.uV_step) + 1; + } + + pm8008_reg->rdesc.enable_reg = LDO_ENABLE_REG(pm8008_reg->base); + pm8008_reg->rdesc.enable_mask = ENABLE_BIT; + pm8008_reg->rdesc.min_dropout_uV = reg_data[i].min_dropout_uv; + pm8008_reg->voltage_selector = -ENOTRECOVERABLE; + + reg_config.dev = dev->parent; + reg_config.driver_data = pm8008_reg; + reg_config.regmap = pm8008_reg->regmap; + + rdev = devm_regulator_register(dev, &pm8008_reg->rdesc, ®_config); + if (IS_ERR(rdev)) { + rc = PTR_ERR(rdev); + dev_err(dev, "%s: failed to register regulator rc=%d\n", + reg_data[i].name, rc); + return rc; + } + + return 0; +} + +static const struct of_device_id pm8008_regulator_match_table[] = { + { .compatible = "qcom,pm8008-regulator", }, + { } +}; +MODULE_DEVICE_TABLE(of, pm8008_regulator_match_table); + +static struct platform_driver pm8008_regulator_driver = { + .driver = { + .name = "qcom-pm8008-regulator", + .of_match_table = pm8008_regulator_match_table, + }, + .probe = pm8008_regulator_probe, +}; + +module_platform_driver(pm8008_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. PM8008 PMIC Regulator Driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Jun 7 11:50:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84CF3CCA47C for ; Tue, 7 Jun 2022 11:51:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243231AbiFGLvy (ORCPT ); Tue, 7 Jun 2022 07:51:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243274AbiFGLvp (ORCPT ); Tue, 7 Jun 2022 07:51:45 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6879B5264; Tue, 7 Jun 2022 04:51:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602676; x=1686138676; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=YIjqd2K/QdFdV9nFvZMlYpZGoOQ9537POYqX0h1sUX8=; b=S9zatf7Zoe9spRlDQI3R9bXDoIgGkJ3Mipw7tAZEzSlkLT4gNXiThuiy CouJ6DJqWRw4TMs3inFtJ5FKphj5wznUtv+FmETAlEZlx5zYxz0qKWQ8r jcYY2q8fZIqdgU3Dpdk5kM+m+LusMapR/VLZRaXX46oTKw7QAyAfzjDVF Y=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-01.qualcomm.com with ESMTP; 07 Jun 2022 04:51:16 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:51:16 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:15 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:11 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 8/9] arm64: dts: qcom: pm8008: Add base dts file Date: Tue, 7 Jun 2022 17:20:14 +0530 Message-ID: <1654602615-28849-9-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add base DTS file for pm8008. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - None. Changes in V11: - Remove intermediate regulators node and add the ldos under pm8008@8 node. - change the address cells as 2 for pm8008 parent mfd node. - add compatible to register the ldos. - add reg with i2c client offset and address. arc arch/arm64/boot/dts/qcom/pm8008.dtsi | 54 ++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pm8008.dtsi diff --git a/arch/arm64/boot/dts/qcom/pm8008.dtsi b/arch/arm64/boot/dts/qcom/pm8008.dtsi new file mode 100644 index 0000000..6f37e4d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pm8008.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + +&pm8008_bus { + pm8008: pmic@8 { + compatible = "qcom,pm8008"; + reg = <0x8>; + #address-cells = <2>; + #size-cells = <0>; + #interrupt-cells = <2>; + + pm8008_l1: ldo1@1,4000 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4000>; + regulator-name = "pm8008_ldo1"; + }; + + pm8008_l2: ldo2@1,4100 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4100>; + regulator-name = "pm8008_ldo2"; + }; + + pm8008_l3: ldo3@1,4200 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4200>; + regulator-name = "pm8008_ldo3"; + }; + + pm8008_l4: ldo4@1,4300 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4300>; + regulator-name = "pm8008_ldo4"; + }; + + pm8008_l5: ldo5@1,4400 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4400>; + regulator-name = "pm8008_ldo5"; + }; + + pm8008_l6: ldo6@1,4500 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4500>; + regulator-name = "pm8008_ldo6"; + }; + + pm8008_l7: ldo7@1,4600 { + compatible = "qcom,pm8008-regulator"; + reg = <0x1 0x4600>; + regulator-name = "pm8008_ldo7"; + }; + }; +}; From patchwork Tue Jun 7 11:50:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli (Temp)" X-Patchwork-Id: 12871825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B1A5C433EF for ; Tue, 7 Jun 2022 11:52:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243282AbiFGLv6 (ORCPT ); Tue, 7 Jun 2022 07:51:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243232AbiFGLvq (ORCPT ); Tue, 7 Jun 2022 07:51:46 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B4C0B5259; Tue, 7 Jun 2022 04:51:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654602681; x=1686138681; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=LH242uOUOVYSvyf632u/YdcynqcsDhqbq4iJHhnzjHY=; b=mYN2Y6lTD1O81RglgIiwGq3g86x3h3tKbuGZ6XFHBys3pircKVMyzBPN 7GVpUVQYLHzbATfvAZE67uPJunlQkGjBHfc4Lb8uEReeiSvVNUvYSFNzj aJ/LQPazwjRXwiCteEbI2EtIkQiBMLtCTvcE2+oxpf2Nbx5bFhgY/2uKi I=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 07 Jun 2022 04:51:20 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2022 04:51:20 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:20 -0700 Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 7 Jun 2022 04:51:15 -0700 From: Satya Priya To: Bjorn Andersson , Rob Herring CC: Lee Jones , Liam Girdwood , Mark Brown , , , , , , , , Satya Priya Subject: [PATCH V14 9/9] arm64: dts: qcom: sc7280: Add pm8008 support for sc7280-idp Date: Tue, 7 Jun 2022 17:20:15 +0530 Message-ID: <1654602615-28849-10-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> References: <1654602615-28849-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pm8008 infra and regulators support for sc7280 idp. Signed-off-by: Satya Priya Reviewed-by: Stephen Boyd --- Changes in V14: - None. Changes in V13: - None. Changes in V12: - None. Changes in V11: - Add ldos and parent supplies directly under pm8008@8 node. arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 66 ++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 5eb6689..166812e 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -271,6 +271,63 @@ }; }; +pm8008_bus: &i2c1 { + status = "okay"; +}; + +#include "pm8008.dtsi" + +&pm8008 { + interrupt-parent = <&tlmm>; + interrupts = <24 IRQ_TYPE_EDGE_RISING>; + + pinctrl-names = "default"; + pinctrl-0 = <&pm8008_active>; + + reset-gpios = <&pm8350c_gpios 4 GPIO_ACTIVE_LOW>; + + vdd_l1_l2-supply = <&vreg_s8b_1p2>; + vdd_l3_l4-supply = <&vreg_s1b_1p8>; + vdd_l5-supply = <&vreg_bob>; + vdd_l6-supply = <&vreg_bob>; + vdd_l7-supply = <&vreg_bob>; +}; + +&pm8008_l1 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1300000>; +}; + +&pm8008_l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1250000>; +}; + +&pm8008_l3 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l4 { + regulator-min-microvolt = <1504000>; + regulator-max-microvolt = <1600000>; +}; + +&pm8008_l5 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l6 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <3000000>; +}; + +&pm8008_l7 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3544000>; +}; + &qfprom { vcc-supply = <&vreg_l1c_1p8>; }; @@ -383,6 +440,15 @@ drive-strength = <2>; }; +&pm8350c_gpios { + pm8008_active: pm8008-active { + pins = "gpio4"; + function = "normal"; + bias-disable; + power-source = <0>; + }; +}; + &qspi_cs0 { bias-disable; };