From patchwork Thu Jun 9 08:39:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12875025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 497B9C43334 for ; Thu, 9 Jun 2022 08:44:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242070AbiFIIoR (ORCPT ); Thu, 9 Jun 2022 04:44:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241923AbiFIIlA (ORCPT ); Thu, 9 Jun 2022 04:41:00 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7CBC11458 for ; Thu, 9 Jun 2022 01:39:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654763999; x=1686299999; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jKHgq0kkMCLkfupw9AvxnnB3qkvxmFYmvXXo2UL+jXc=; b=bvRWRzv6PtxcL/byDRAKlvrXCY8wvXBOb5kTnad39i80sxXno/WFyHQm 2/SfHHrxHZp8j+kmf13v3hEZMy7FCPXCcNq6qAEjXvic9buofyKzpXXRl QFszfsi32JChxoZg8olayzqTqOhUGnbL3FUEK/rC0unnxa/ufnTAcSnu5 ol8NBJnxntSQR6hAfQrGc0kgRmhqJqKFpwuBtKyKZBKcgrp+GopBKQSZ+ cDZZTlrRCrlh2USZgqPrz5KBLIa0ae2J3/3ekXT8X4ul2c/ZUalIuJ8az D33JwQV4L3xp1jYdI2JLJI1KYQVUSrpFtBUgp12OA5Srvr+LtM60yCEIA g==; X-IronPort-AV: E=McAfee;i="6400,9594,10372"; a="278355517" X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="278355517" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:59 -0700 X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="580475514" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:56 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH 1/3] x86: Remove perf enable bit from default config Date: Thu, 9 Jun 2022 04:39:14 -0400 Message-Id: <20220609083916.36658-2-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220609083916.36658-1-weijiang.yang@intel.com> References: <20220609083916.36658-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When pmu is disabled in KVM by enable_pmu=0, bit 7 of guest MSR_IA32_MISC_ENABLE is cleared, but the default value of the MSR assumes pmu is always available, this leads to test failure. Change the logic to make it aligned with KVM config. Signed-off-by: Yang Weijiang --- x86/msr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/x86/msr.c b/x86/msr.c index 44fbb3b..fc05d6c 100644 --- a/x86/msr.c +++ b/x86/msr.c @@ -34,7 +34,7 @@ struct msr_info msr_info[] = MSR_TEST(MSR_IA32_SYSENTER_ESP, addr_ul, false), MSR_TEST(MSR_IA32_SYSENTER_EIP, addr_ul, false), // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63 - MSR_TEST(MSR_IA32_MISC_ENABLE, 0x400c51889, false), + MSR_TEST(MSR_IA32_MISC_ENABLE, 0x400c51809, false), MSR_TEST(MSR_IA32_CR_PAT, 0x07070707, false), MSR_TEST(MSR_FS_BASE, addr_64, true), MSR_TEST(MSR_GS_BASE, addr_64, true), @@ -59,6 +59,8 @@ static void test_msr_rw(struct msr_info *msr, unsigned long long val) */ if (msr->index == MSR_EFER) val |= orig; + if (msr->index == MSR_IA32_MISC_ENABLE) + val |= MSR_IA32_MISC_ENABLE_EMON & orig; wrmsr(msr->index, val); r = rdmsr(msr->index); wrmsr(msr->index, orig); From patchwork Thu Jun 9 08:39:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12875026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA4F2C43334 for ; Thu, 9 Jun 2022 08:44:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242375AbiFIIoU (ORCPT ); Thu, 9 Jun 2022 04:44:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241929AbiFIIk7 (ORCPT ); Thu, 9 Jun 2022 04:40:59 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 659B6F5A5 for ; Thu, 9 Jun 2022 01:39:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654763997; x=1686299997; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=O3rw8dE6tlhL/guKrMkUuSDSNCpnH53kklEO6xcf8wg=; b=LwLuL23siblyPEMqsyaiH7hbgU3dq1haQwSwqhj4n7g9NvriDgFt9mxq f6cHSeUW/8jAUyqsl/CFSAtup6CB1jzTG+KGkGd/ydFF1quQs11NFyPwZ bSSzRywsOwkJN8XWJsYfqR6rGFpMqe3IgrvOC2prEDUAv+rz7MzYaNFFX Vzi4prNtxBaH9ieR0Orz1c783E3pBnLuq3YuHh5seUwLKtvpl2YHzNdGe QNKIv0hQUMB4/JCDCiaoAiwuy+xA7UZxf8Pld5RhMC+TxyNyxXpKNiK5A pWIeaOUjdZENqLE+nHc9aOOCqT0MpfOmWU3UHSpvxVi7rmfOxL9bNybFR g==; X-IronPort-AV: E=McAfee;i="6400,9594,10372"; a="274727182" X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="274727182" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:56 -0700 X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="580475518" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:56 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH 2/3] x86: Skip running test when pmu is disabled Date: Thu, 9 Jun 2022 04:39:15 -0400 Message-Id: <20220609083916.36658-3-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220609083916.36658-1-weijiang.yang@intel.com> References: <20220609083916.36658-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Read MSR_IA32_PERF_CAPABILITIES triggers #GP when pmu is disabled by enable_pmu=0 in KVM. Let's check whether pmu is available before issue msr reading to avoid the #GP. Signed-off-by: Yang Weijiang --- x86/pmu_lbr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/x86/pmu_lbr.c b/x86/pmu_lbr.c index 688634d..835a7bb 100644 --- a/x86/pmu_lbr.c +++ b/x86/pmu_lbr.c @@ -74,13 +74,15 @@ int main(int ac, char **av) return 0; } - perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES); eax.full = id.a; if (!eax.split.version_id) { printf("No pmu is detected!\n"); return report_summary(); } + + perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES); + if (!(perf_cap & PMU_CAP_LBR_FMT)) { printf("No LBR is detected!\n"); return report_summary(); From patchwork Thu Jun 9 08:39:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12875024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C657C43334 for ; Thu, 9 Jun 2022 08:44:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242313AbiFIInZ (ORCPT ); Thu, 9 Jun 2022 04:43:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242305AbiFIIlA (ORCPT ); Thu, 9 Jun 2022 04:41:00 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7E9A10FF2 for ; Thu, 9 Jun 2022 01:39:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654763998; x=1686299998; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OmN8Ws7S3OEuPkjP7bzIf9JYo0r6bM0go8y96r+IWbQ=; b=T2df3RR7F6AIsrLz4mtjLKWelHlxVlXtDn3k9+RckFehwdddUXa/Jokj nj9QdmdZ+ha7NjsBHKr8qds6jiukBSW5sEM+n5KY7wGJmYryCMbt8HRQC uXadiSJSttYKM5fU4EvRSAJuw8YbaQGtO0I5fIvKs1J2JkowWPe6JfCGm R7I6s6EpfIN6NvY9MKonDo+xgFxdY8GKKFNX6FbrTWlbvyomUhEShxuJh fx14Qx/xoGxzY+oIpWg/c2nKaW6z8s5E9y2b9UC7LeSSUPssTOKG/aAVR UEZKRd0T0vOVeB3KOoNb+2SVvD7yE4sSZNeYruZtVwgfNkXTwGPSdGwJ0 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10372"; a="274727185" X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="274727185" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:57 -0700 X-IronPort-AV: E=Sophos;i="5.91,287,1647327600"; d="scan'208";a="580475520" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 01:39:56 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH 3/3] x86: Skip perf related tests when pmu is disabled Date: Thu, 9 Jun 2022 04:39:16 -0400 Message-Id: <20220609083916.36658-4-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220609083916.36658-1-weijiang.yang@intel.com> References: <20220609083916.36658-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When pmu is disabled in KVM, reading MSR_CORE_PERF_GLOBAL_CTRL or executing rdpmc leads to #GP, so skip related tests in this case. Signed-off-by: Yang Weijiang --- x86/vmx_tests.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 4d581e7..dd6fc13 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -944,6 +944,16 @@ static void insn_intercept_main(void) continue; } + if (insn_table[cur_insn].flag == CPU_RDPMC) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + printf("\tFeature required for %s is not supported.\n", + insn_table[cur_insn].name); + continue; + } + } + if (insn_table[cur_insn].disabled) { printf("\tFeature required for %s is not supported.\n", insn_table[cur_insn].name); @@ -7490,6 +7500,13 @@ static void test_perf_global_ctrl(u32 nr, const char *name, u32 ctrl_nr, static void test_load_host_perf_global_ctrl(void) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + report_skip("test_load_host_perf_global_ctrl"); + return; + } + if (!(ctrl_exit_rev.clr & EXI_LOAD_PERF)) { printf("\"load IA32_PERF_GLOBAL_CTRL\" exit control not supported\n"); return; @@ -7502,6 +7519,13 @@ static void test_load_host_perf_global_ctrl(void) static void test_load_guest_perf_global_ctrl(void) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + report_skip("test_load_guest_perf_global_ctrl"); + return; + } + if (!(ctrl_enter_rev.clr & ENT_LOAD_PERF)) { printf("\"load IA32_PERF_GLOBAL_CTRL\" entry control not supported\n"); return;