From patchwork Fri Jun 10 14:45:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 12877679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21766C43334 for ; Fri, 10 Jun 2022 14:46:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349139AbiFJOqj (ORCPT ); Fri, 10 Jun 2022 10:46:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344919AbiFJOqG (ORCPT ); Fri, 10 Jun 2022 10:46:06 -0400 Received: from alexa-out-sd-01.qualcomm.com (alexa-out-sd-01.qualcomm.com [199.106.114.38]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F7E41D5A86; Fri, 10 Jun 2022 07:46:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654872365; x=1686408365; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=ei6cBp0F4ZO6afSIYCSELrPu+lQQK7SftaywsDqNuZM=; b=KQUPhZp4lJDxFoG9rrNP8b7wlKpl9gdRfVYfT8vBKDxagY+s+g6W+477 Jvp0dACQbJwZrQCagjQUz+s5m7ziPRhSpnHYOLwPZ1xX2aXf//se0HyL3 fesaGWo9KDbUxVI55TMdzOcndl367VVKDyRt3ObEMzyBar8aXw83kMc+J I=; Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-01.qualcomm.com with ESMTP; 10 Jun 2022 07:46:05 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg04-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:46:04 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:04 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:45:58 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , CC: Srinivasa Rao Mandadapu Subject: [PATCH v3 1/2] dt-bindings: pinctrl: qcom: sc7280: Add boolean param for ADSP bypass platforms Date: Fri, 10 Jun 2022 20:15:34 +0530 Message-ID: <1654872335-4993-2-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> References: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add boolean param qcom,adsp-bypass-mode to support adsp bypassed sc7280 platforms. Which is required to make clock voting as optional for ADSP bypass platforms. Signed-off-by: Srinivasa Rao Mandadapu --- .../bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml index d32ee32..ea9920c 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml @@ -17,7 +17,14 @@ description: | properties: compatible: - const: qcom,sc7280-lpass-lpi-pinctrl + enum: + - qcom,sc7280-lpass-lpi-pinctrl + + qcom,adsp-bypass-mode: + description: + Tells pin controllers want to make clocks optional for ADSP bypass + targets. + type: boolean reg: minItems: 2 From patchwork Fri Jun 10 14:45:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 12877680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C39BAC43334 for ; Fri, 10 Jun 2022 14:46:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349633AbiFJOqv (ORCPT ); Fri, 10 Jun 2022 10:46:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348809AbiFJOqN (ORCPT ); Fri, 10 Jun 2022 10:46:13 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69F511E0C37; Fri, 10 Jun 2022 07:46:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654872372; x=1686408372; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NUOD0yMrUh2Jr58XdNmiDo2EC4GZIqQc43MOqVvowlw=; b=q8lPUrq1+f8Z42jSH9KYDfaiizFjN+1ep71kaMxYH7JVZm1vGKvsNBok zHHaLueD43ROxwbBKKGwSWvn0AuQjGQ0UeU/AnpftnTCgGFoFqZ/JQAlw C+MGXqN2IBLi0R4dqUrK6HBJeZsXMm/vFQ2FL1OVYfA1ItsbWxhAz/kZC I=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 10 Jun 2022 07:46:11 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:46:10 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:10 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:04 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , CC: Srinivasa Rao Mandadapu Subject: [PATCH v3 2/2] pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets Date: Fri, 10 Jun 2022 20:15:35 +0530 Message-ID: <1654872335-4993-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> References: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Update lpass lpi pin control driver, with clock optional check for ADSP disabled platforms. This check required for distingushing ADSP based platforms and ADSP bypass platforms. In case of ADSP enabled platforms, where audio is routed through ADSP macro and decodec GDSC Switches are triggered as clocks by pinctrl driver and ADSP firmware controls them. So It's mandatory to enable them in ADSP based solutions. In case of ADSP bypass platforms clock voting is optional as these macro and dcodec GDSC switches are maintained as power domains and operated from lpass clock drivers. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 3 +++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index 74810ec..6e03529 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -388,6 +388,9 @@ int lpi_pinctrl_probe(struct platform_device *pdev) pctrl->data = data; pctrl->dev = &pdev->dev; + if (of_property_read_bool(np, "qcom,adsp-bypass-mode")) + data->is_clk_optional = true; + pctrl->clks[0].id = "core"; pctrl->clks[1].id = "audio"; diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c index 2add9a4..3fc7de1 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c @@ -141,7 +141,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { .ngroups = ARRAY_SIZE(sc7280_groups), .functions = sc7280_functions, .nfunctions = ARRAY_SIZE(sc7280_functions), - .is_clk_optional = true, + .is_clk_optional = false, }; static const struct of_device_id lpi_pinctrl_of_match[] = {