From patchwork Wed Jun 15 08:46:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12881950 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F03B1C43334 for ; Wed, 15 Jun 2022 08:47:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346561AbiFOIrT (ORCPT ); Wed, 15 Jun 2022 04:47:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238908AbiFOIrT (ORCPT ); Wed, 15 Jun 2022 04:47:19 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 656624BB83 for ; Wed, 15 Jun 2022 01:47:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655282838; x=1686818838; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jKHgq0kkMCLkfupw9AvxnnB3qkvxmFYmvXXo2UL+jXc=; b=IKvCestjOdVtd8F7Jm094IDuaBKb4eU/CurPWw0fE0G0SSWJls5UKjJP eY1oiOlkJWZbumrCBoa9R9IRjPJcJeYlOJX2krEdrX56Ajf9UgPcwUA+D bBLeabpEVD8pFyJ+cYOhr+U9aDgTQNWdvH1oCiDhtK3yCfNtAwhRVtExa 6LOJdP45xKFRnB0ZPckzg3idr46stj4him8pb/Dy7wPEWcj4mR9aXAIVA r76F7de2xbWpsZp/RYfL27F2yZ69vCeeSGDcnC669+QS7prtS877Zkd01 nvo0at/XJAZqQnU7/95b7T5OnqVF1omX3RcL5mqXIWF5tOBUNCz9hR2kK A==; X-IronPort-AV: E=McAfee;i="6400,9594,10378"; a="342848609" X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="342848609" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="558944459" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: like.xu.linux@gmail.com, jmattson@google.com, kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH v2 1/3] x86: Remove perf enable bit from default config Date: Wed, 15 Jun 2022 04:46:39 -0400 Message-Id: <20220615084641.6977-2-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220615084641.6977-1-weijiang.yang@intel.com> References: <20220615084641.6977-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When pmu is disabled in KVM by enable_pmu=0, bit 7 of guest MSR_IA32_MISC_ENABLE is cleared, but the default value of the MSR assumes pmu is always available, this leads to test failure. Change the logic to make it aligned with KVM config. Signed-off-by: Yang Weijiang --- x86/msr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/x86/msr.c b/x86/msr.c index 44fbb3b..fc05d6c 100644 --- a/x86/msr.c +++ b/x86/msr.c @@ -34,7 +34,7 @@ struct msr_info msr_info[] = MSR_TEST(MSR_IA32_SYSENTER_ESP, addr_ul, false), MSR_TEST(MSR_IA32_SYSENTER_EIP, addr_ul, false), // reserved: 1:2, 4:6, 8:10, 13:15, 17, 19:21, 24:33, 35:63 - MSR_TEST(MSR_IA32_MISC_ENABLE, 0x400c51889, false), + MSR_TEST(MSR_IA32_MISC_ENABLE, 0x400c51809, false), MSR_TEST(MSR_IA32_CR_PAT, 0x07070707, false), MSR_TEST(MSR_FS_BASE, addr_64, true), MSR_TEST(MSR_GS_BASE, addr_64, true), @@ -59,6 +59,8 @@ static void test_msr_rw(struct msr_info *msr, unsigned long long val) */ if (msr->index == MSR_EFER) val |= orig; + if (msr->index == MSR_IA32_MISC_ENABLE) + val |= MSR_IA32_MISC_ENABLE_EMON & orig; wrmsr(msr->index, val); r = rdmsr(msr->index); wrmsr(msr->index, orig); From patchwork Wed Jun 15 08:46:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12881953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21BA7C43334 for ; Wed, 15 Jun 2022 08:47:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346616AbiFOIrW (ORCPT ); Wed, 15 Jun 2022 04:47:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346564AbiFOIrU (ORCPT ); Wed, 15 Jun 2022 04:47:20 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2C6E4B1FE for ; Wed, 15 Jun 2022 01:47:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655282839; x=1686818839; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WlaiicrSb+fipzRN1t4aoedCo2QbYUEsTTeeogoj3sg=; b=oJgLfGE+azoLRwNPQ/ZZ/VrukHfSuHn4+istVZQThYLkbimOhcHFFL27 o8BLPtJNt5Zx2QkKZ5opIsJnrNmaaXfgAS/to9eh6Bz7N56yPHtfjOVUQ 27U1rTgr3UVa783mV9a91Z9G/L+35PNFJJrlx0gjvN0jzL6y9/Ppgr5LI KpfyLp+wXyf9CkvA4hRxszz+BpgfAjJ7+PJqORKkwjXIGZJ+Bd0ozwHwA JvnSsE/Jhx7Udg3eMiD6y5yfGWhb6gYPAC3Nm4WtyS/Xc+V0Tdze5RfE0 6IzdYuctBUg6GE1f4eKn/tyrH08Zf1QDmIiQeramzjWGK4Iei2up6hI52 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10378"; a="342848610" X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="342848610" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="558944462" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: like.xu.linux@gmail.com, jmattson@google.com, kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH v2 2/3] x86: Skip running test when pmu is disabled Date: Wed, 15 Jun 2022 04:46:40 -0400 Message-Id: <20220615084641.6977-3-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220615084641.6977-1-weijiang.yang@intel.com> References: <20220615084641.6977-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Read MSR_IA32_PERF_CAPABILITIES triggers #GP when pmu is disabled by enable_pmu=0 in KVM. Let's check whether pmu is available before issue msr reading to avoid the #GP. Also check PDCM bit before read the MSR. Signed-off-by: Yang Weijiang --- x86/pmu_lbr.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/x86/pmu_lbr.c b/x86/pmu_lbr.c index 688634d..62614a0 100644 --- a/x86/pmu_lbr.c +++ b/x86/pmu_lbr.c @@ -5,6 +5,7 @@ #define N 1000000 #define MAX_NUM_LBR_ENTRY 32 #define DEBUGCTLMSR_LBR (1UL << 0) +#define PDCM_ENABLED (1UL << 15) #define PMU_CAP_LBR_FMT 0x3f #define MSR_LBR_NHM_FROM 0x00000680 @@ -74,13 +75,22 @@ int main(int ac, char **av) return 0; } - perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES); eax.full = id.a; if (!eax.split.version_id) { printf("No pmu is detected!\n"); return report_summary(); } + + id = cpuid(1); + + if (!(id.c & PDCM_ENABLED)) { + printf("No PDCM is detected!\n"); + return report_summary(); + } + + perf_cap = rdmsr(MSR_IA32_PERF_CAPABILITIES); + if (!(perf_cap & PMU_CAP_LBR_FMT)) { printf("No LBR is detected!\n"); return report_summary(); From patchwork Wed Jun 15 08:46:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 12881951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74126CCA473 for ; Wed, 15 Jun 2022 08:47:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346566AbiFOIrV (ORCPT ); Wed, 15 Jun 2022 04:47:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345197AbiFOIrT (ORCPT ); Wed, 15 Jun 2022 04:47:19 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B5FD4B1FE for ; Wed, 15 Jun 2022 01:47:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655282839; x=1686818839; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OmN8Ws7S3OEuPkjP7bzIf9JYo0r6bM0go8y96r+IWbQ=; b=i+ntQodP52ulQ2auD+JdlzfPDSUXXm1O2gDoddEmdzBw1orDlnQuz/5K zHzMZPwDLWQFHzryZcVwHjJbwfy49oUncdDnHTM7scN9vDEb100TEMEB9 eNBwn3guFNBu0XPc+xyZ2rCBLr78b4XzjDvzXHMq8rlm1W6JlguWFoeP8 6QOI2FP5RhqCNRBEyAQbl6aE7lzUGnaRuB7r1+3LVt/9K0jNHIWYeoWDs SXrZlEs8TxWg+D9CxG0h4F9kAIDGh02y1RnGEn7ZaP5Od5LQjQ6LhfM5o t9Gup8jZLf7UPHxMou8Ak6RBZPCVJMHkQZr1/rzMVEfuc3FouBde+VnQf A==; X-IronPort-AV: E=McAfee;i="6400,9594,10378"; a="342848611" X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="342848611" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 X-IronPort-AV: E=Sophos;i="5.91,300,1647327600"; d="scan'208";a="558944466" Received: from embargo.jf.intel.com ([10.165.9.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2022 01:47:17 -0700 From: Yang Weijiang To: pbonzini@redhat.com Cc: like.xu.linux@gmail.com, jmattson@google.com, kvm@vger.kernel.org, Yang Weijiang Subject: [kvm-unit-tests PATCH v2 3/3] x86: Skip perf related tests when pmu is disabled Date: Wed, 15 Jun 2022 04:46:41 -0400 Message-Id: <20220615084641.6977-4-weijiang.yang@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220615084641.6977-1-weijiang.yang@intel.com> References: <20220615084641.6977-1-weijiang.yang@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org When pmu is disabled in KVM, reading MSR_CORE_PERF_GLOBAL_CTRL or executing rdpmc leads to #GP, so skip related tests in this case. Signed-off-by: Yang Weijiang --- x86/vmx_tests.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 4d581e7..dd6fc13 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -944,6 +944,16 @@ static void insn_intercept_main(void) continue; } + if (insn_table[cur_insn].flag == CPU_RDPMC) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + printf("\tFeature required for %s is not supported.\n", + insn_table[cur_insn].name); + continue; + } + } + if (insn_table[cur_insn].disabled) { printf("\tFeature required for %s is not supported.\n", insn_table[cur_insn].name); @@ -7490,6 +7500,13 @@ static void test_perf_global_ctrl(u32 nr, const char *name, u32 ctrl_nr, static void test_load_host_perf_global_ctrl(void) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + report_skip("test_load_host_perf_global_ctrl"); + return; + } + if (!(ctrl_exit_rev.clr & EXI_LOAD_PERF)) { printf("\"load IA32_PERF_GLOBAL_CTRL\" exit control not supported\n"); return; @@ -7502,6 +7519,13 @@ static void test_load_host_perf_global_ctrl(void) static void test_load_guest_perf_global_ctrl(void) { + struct cpuid id = cpuid(10); + + if (!(id.a & 0xff)) { + report_skip("test_load_guest_perf_global_ctrl"); + return; + } + if (!(ctrl_enter_rev.clr & ENT_LOAD_PERF)) { printf("\"load IA32_PERF_GLOBAL_CTRL\" entry control not supported\n"); return;