From patchwork Wed Jun 15 16:34:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12882806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82515CCA480 for ; Wed, 15 Jun 2022 17:28:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349551AbiFOR2P (ORCPT ); Wed, 15 Jun 2022 13:28:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349653AbiFOR2O (ORCPT ); Wed, 15 Jun 2022 13:28:14 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 931C3959D; Wed, 15 Jun 2022 10:28:13 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id a15so16313082wrh.2; Wed, 15 Jun 2022 10:28:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=zPJh0+5QxVl9IcfIvjsxlZmZC8UvoEwLLOJqypTZHXc=; b=Qbx/WYWJfRWvXbO5/QYUstaVAaNakVAkD1orizUvn5sG9T4r/X03Reo8/rpPxcrAyx HAE0zYdcvw/0AliGuzyAUDHkr+MscMeJ0x7oLhQ/IKgbpQbhUDdFeIOSg2BDi8ipMk4k Nxk2lWYs5MkzL8wOKY9tQsCaAz+KvM4sFXXgCkSBo+m/UJWJUZ0DZD9n40tuNB8mbL06 DzNwVGfk0CAytBpJCbf75vndA+8RFz76ekoKAE3r9jBN31I/M04u+ZTdzTHu6Kgpdv0x 7MhmgUdAJcIXDK2/MKjHAEeIKk/to+UZNRZa/Mrcwq+0rkNzhh+xJAL6ns+UWn+HVmHg ZlaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=zPJh0+5QxVl9IcfIvjsxlZmZC8UvoEwLLOJqypTZHXc=; b=1IlB8UJFpyf7eRGoyGUucW8LClCh2hCkgiSNGE4rFX1aI/3YqhhiIZvdo0llo/x/td B7LLLfS8SFIBRxaLOqd+9WxIwj5N8QKA+A/2JiLyjie1BJ/nhc5YsAR65IwBHqJ18EKW kbG6qha1ihdGWVvAHFd0Fdow2nh+04KiLR8aygMvhShgubnp/XTt+lu1NNB9sVHPiRXZ RawFG7Ghrz/mcyHc/DY6LauTSuUnIs5S1/du+FdvUtATOGhufsPqviFHSCp/TwfIF4pG mAv8+IdkBkcvmN/QdJLHFDDvqin+8zCu/9Ajbbtiz5/5AJKyvvjkjUqrV22c2qi/WE0h NGSg== X-Gm-Message-State: AJIora9jxQLZxTYQYvlGbImodMCYtbAvAMgB+6sWdqpuzIZ/zuHtahKV 2ocyT/xECj1WjkCmhJ87vbg= X-Google-Smtp-Source: AGRyM1uiE7j+UMgU29QN0t5gfsp+6EyQLQ4EmGOgoJfFhX57n4p9IxIHkwjyLW2f9A2DvLre7XJmqg== X-Received: by 2002:a05:6000:1c02:b0:218:42ab:281f with SMTP id ba2-20020a0560001c0200b0021842ab281fmr810768wrb.607.1655314091949; Wed, 15 Jun 2022 10:28:11 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id w3-20020a7bc103000000b003976fbfbf00sm3023792wmi.30.2022.06.15.10.28.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jun 2022 10:28:11 -0700 (PDT) From: Christian 'Ansuel' Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian 'Ansuel' Marangi Subject: [PATCH 1/3] dt-bindings: clock: add pcm reset for ipq806x lcc Date: Wed, 15 Jun 2022 18:34:06 +0200 Message-Id: <20220615163408.30154-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pcm reset define for ipq806x lcc. Signed-off-by: Christian 'Ansuel' Marangi --- include/dt-bindings/clock/qcom,lcc-ipq806x.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/include/dt-bindings/clock/qcom,lcc-ipq806x.h index 25b92bbf0ab4..e0fb4acf4ba8 100644 --- a/include/dt-bindings/clock/qcom,lcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h @@ -19,4 +19,6 @@ #define SPDIF_CLK 10 #define AHBIX_CLK 11 +#define LCC_PCM_RESET 0 + #endif From patchwork Wed Jun 15 16:34:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12882807 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B729C433EF for ; Wed, 15 Jun 2022 17:28:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349651AbiFOR2Q (ORCPT ); Wed, 15 Jun 2022 13:28:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349688AbiFOR2P (ORCPT ); Wed, 15 Jun 2022 13:28:15 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A293511170; Wed, 15 Jun 2022 10:28:14 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id o8so16311010wro.3; Wed, 15 Jun 2022 10:28:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5p+/GSuDH7DU+haokwep++BzNF1uaX8KwEE3l/bKixQ=; b=aoeX2dNtldafqudyp1FrCTKKgQbkpuQlpIhYY13LI6ik7SdeEddlaVFDny6FaC+TyH uZhCQVUxV2HSzdWJDGMl5JQhG2vksAl3aBKTPqbYen3Bs6qSA6LkGEhbvuxAHTyT8Drj h674Qf5J/BHZMU/lSlE90CR61vmSBEC988o/Cq0is7coTfhVzJrr1QiOKnzFTdRO64wW 9J8ows5yx0JZJ2JHEXwU1Uu7agBjQ+BS6RORhRgGdHPEWuqgtvkBJNJQmKVzi1ykXxR0 9rW53ODeXV/rRSgFBNMLS+DZWbU9Zgns5L6HjWpVGkyhyddOrb/+OIaGsB+fP4BqTos5 5kOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5p+/GSuDH7DU+haokwep++BzNF1uaX8KwEE3l/bKixQ=; b=YFhI5ulgWJ6RR0eQvN0ylIkowXkqO35K7ViAJSaUwAAlE2JpsE/TfNo04yR9zLQ8VC B038R/VSDzvoBZue8xE5nBg+jwP4jrww7Le9YIqkyXPh+kqODpB1qd1tc9H60KoTVWDm 5p2FmmUj7tY/cuBBzH2UbRErKYwhbNu9popj1IxB7n+xBePccsFMp4nu/XsyPp+YoTQZ nhduNFXYqOM7Q7bplKTTAwr0PdPtXTBE8qcm1clFP1RwXyMl6tXaU93Wa+i3BZjoCKpJ He2nMopm+yTxxp7/sBUe/EVkYJFEy6jUuMiFfexHe4z7mhn/uR6Cg41Ig4B5KRTJ/R2V vcPQ== X-Gm-Message-State: AJIora9uGRJBkI5FDN4PAUYrWC/GcmJYB407Oo+LO6HA9MqGi2tYm+74 txEMqJ5WbdwA+13qv/okb2k= X-Google-Smtp-Source: AGRyM1sZY/XiigSVJpzOXfqHHCYA+5h9Sh028/tS//A8GVFGo2Q+rjcAV9XvIX+FLKzGZ/CGvKsgBw== X-Received: by 2002:a05:6000:1a87:b0:218:52c5:a59a with SMTP id f7-20020a0560001a8700b0021852c5a59amr825550wry.686.1655314093027; Wed, 15 Jun 2022 10:28:13 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id w3-20020a7bc103000000b003976fbfbf00sm3023792wmi.30.2022.06.15.10.28.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jun 2022 10:28:12 -0700 (PDT) From: Christian 'Ansuel' Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian 'Ansuel' Marangi Subject: [PATCH 2/3] clk: qcom: lcc-ipq806x: add reset definition Date: Wed, 15 Jun 2022 18:34:07 +0200 Message-Id: <20220615163408.30154-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220615163408.30154-1-ansuelsmth@gmail.com> References: <20220615163408.30154-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add reset definition for lcc-ipq806x. Signed-off-by: Christian 'Ansuel' Marangi --- drivers/clk/qcom/lcc-ipq806x.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index 1a2be4aeb31d..ba90bebba597 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -22,6 +22,7 @@ #include "clk-branch.h" #include "clk-regmap-divider.h" #include "clk-regmap-mux.h" +#include "reset.h" static struct clk_pll pll4 = { .l_reg = 0x4, @@ -405,6 +406,10 @@ static struct clk_regmap *lcc_ipq806x_clks[] = { [AHBIX_CLK] = &ahbix_clk.clkr, }; +static const struct qcom_reset_map lcc_ipq806x_resets[] = { + [LCC_PCM_RESET] = { 0x54, 13 }, +}; + static const struct regmap_config lcc_ipq806x_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -417,6 +422,8 @@ static const struct qcom_cc_desc lcc_ipq806x_desc = { .config = &lcc_ipq806x_regmap_config, .clks = lcc_ipq806x_clks, .num_clks = ARRAY_SIZE(lcc_ipq806x_clks), + .resets = lcc_ipq806x_resets, + .num_resets = ARRAY_SIZE(lcc_ipq806x_resets), }; static const struct of_device_id lcc_ipq806x_match_table[] = { From patchwork Wed Jun 15 16:34:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12882808 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3154FC433EF for ; Wed, 15 Jun 2022 17:29:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245041AbiFOR3S (ORCPT ); Wed, 15 Jun 2022 13:29:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350965AbiFOR2R (ORCPT ); Wed, 15 Jun 2022 13:28:17 -0400 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F984DF0F; Wed, 15 Jun 2022 10:28:16 -0700 (PDT) Received: by mail-wr1-x42c.google.com with SMTP id w17so8781650wrg.7; Wed, 15 Jun 2022 10:28:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1TZ31csmugUEo+8MzdBW071qYG5n2pSsL9G37UaQECs=; b=B+5/Pezt8eLSv0wjjxExytBprcVBO9M3ZM+p6YScshCE+vP6bMAbtfHO/ZuZBOVuPC rywxag2H23qIn9zVhAhXBcPcqDyfHCCdFrWSblLlUZ8kRXEE+vDKmIzem0LuVsMZsnB9 0M8R9LkJv5Wg7IqBytud4ASU4oq2n1rKTcKs4odfxu4V3+NOIyYWcOMOguqJE63Yim/O 2yAe5D7fjdF2oZmQaHGBRBpvYku0RG5c1CKrTKGFlOD8oh0/zem4XpmXiKTBihsnCjHO OU2loXqBMEFApObadp2t3ZhKrFpPObZkNvrhLcvCnS7q90dKUcgZ5iF+UbiXhHgxGGc2 i2dA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1TZ31csmugUEo+8MzdBW071qYG5n2pSsL9G37UaQECs=; b=lmmmXdGlK7Wf131MpDvMD8x7C64JIibuaF5LY8FLjHhVlXD+y4iuc0IqNmWrBIv9el 51y+WWsppoKwwbTV60Sqk0NqXjSJqmUI45NKxdDPT/T3/S5/GMBAMOOArHAh7pwq2sHa EmTj27GQi/UL/PTrNdzY56PXUXWkNPMkYv9wkJDq5Si84B5YsguUN/vrfP/5NnE4CuX8 7ac1J2j/J8dSb6Hv3sFiI0/EldWqWJEYWmOKJ+MpP1diaTdmvsK1xtYs550Dif9qPfwM HZyXZVBpy+qva15TlC4A4TSTwKRUH2DX/kuvofNzcgSvXQ8D722g1F1xZ0hyaYXw1G6/ zmJg== X-Gm-Message-State: AJIora8AcEmMEfdL5e7qJKuEDTcnh2yvjiZDolKAnd07tEhsnNMzyYRu okDHNh+H8RG40Zwl4m6h0NY= X-Google-Smtp-Source: AGRyM1s0YzUg7ZRzt5khe5CvyMl8gMYVZEMf5KMuoIvul92VVB9vLTphosQ0HwDXvD8gsVix+FxAcg== X-Received: by 2002:adf:fc0c:0:b0:210:2e87:9d3a with SMTP id i12-20020adffc0c000000b002102e879d3amr859955wrr.556.1655314094213; Wed, 15 Jun 2022 10:28:14 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id w3-20020a7bc103000000b003976fbfbf00sm3023792wmi.30.2022.06.15.10.28.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jun 2022 10:28:13 -0700 (PDT) From: Christian 'Ansuel' Marangi To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Christian 'Ansuel' Marangi Subject: [PATCH 3/3] clk: qcom: lcc-ipq806x: convert to parent data Date: Wed, 15 Jun 2022 18:34:08 +0200 Message-Id: <20220615163408.30154-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220615163408.30154-1-ansuelsmth@gmail.com> References: <20220615163408.30154-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Convert lcc-ipq806x driver to parent_data API. Signed-off-by: Christian 'Ansuel' Marangi --- drivers/clk/qcom/lcc-ipq806x.c | 79 +++++++++++++++++++--------------- 1 file changed, 44 insertions(+), 35 deletions(-) diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c index ba90bebba597..c07ca8dc6e3a 100644 --- a/drivers/clk/qcom/lcc-ipq806x.c +++ b/drivers/clk/qcom/lcc-ipq806x.c @@ -24,6 +24,10 @@ #include "clk-regmap-mux.h" #include "reset.h" +static const struct clk_parent_data gcc_pxo[] = { + { .fw_name = "pxo", .name = "pxo" }, +}; + static struct clk_pll pll4 = { .l_reg = 0x4, .m_reg = 0x8, @@ -34,7 +38,7 @@ static struct clk_pll pll4 = { .status_bit = 16, .clkr.hw.init = &(struct clk_init_data){ .name = "pll4", - .parent_names = (const char *[]){ "pxo" }, + .parent_data = gcc_pxo, .num_parents = 1, .ops = &clk_pll_ops, }, @@ -64,9 +68,9 @@ static const struct parent_map lcc_pxo_pll4_map[] = { { P_PLL4, 2 } }; -static const char * const lcc_pxo_pll4[] = { - "pxo", - "pll4_vote", +static const struct clk_parent_data lcc_pxo_pll4[] = { + { .fw_name = "pxo", .name = "pxo" }, + { .fw_name = "pll4_vote", .name = "pll4_vote" }, }; static struct freq_tbl clk_tbl_aif_mi2s[] = { @@ -131,18 +135,14 @@ static struct clk_rcg mi2s_osr_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "mi2s_osr_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, }, }; -static const char * const lcc_mi2s_parents[] = { - "mi2s_osr_src", -}; - static struct clk_branch mi2s_osr_clk = { .halt_reg = 0x50, .halt_bit = 1, @@ -152,7 +152,9 @@ static struct clk_branch mi2s_osr_clk = { .enable_mask = BIT(17), .hw.init = &(struct clk_init_data){ .name = "mi2s_osr_clk", - .parent_names = lcc_mi2s_parents, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_osr_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -167,7 +169,9 @@ static struct clk_regmap_div mi2s_div_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "mi2s_div_clk", - .parent_names = lcc_mi2s_parents, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_osr_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_regmap_div_ops, }, @@ -183,7 +187,9 @@ static struct clk_branch mi2s_bit_div_clk = { .enable_mask = BIT(15), .hw.init = &(struct clk_init_data){ .name = "mi2s_bit_div_clk", - .parent_names = (const char *[]){ "mi2s_div_clk" }, + .parent_hws = (const struct clk_hw*[]){ + &mi2s_div_clk.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -191,6 +197,10 @@ static struct clk_branch mi2s_bit_div_clk = { }, }; +static const struct clk_parent_data lcc_mi2s_bit_div_codec_clk[] = { + { .hw = &mi2s_bit_div_clk.clkr.hw, }, + { .fw_name = "mi2s_codec_clk", .name = "mi2s_codec_clk" }, +}; static struct clk_regmap_mux mi2s_bit_clk = { .reg = 0x48, @@ -199,11 +209,8 @@ static struct clk_regmap_mux mi2s_bit_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "mi2s_bit_clk", - .parent_names = (const char *[]){ - "mi2s_bit_div_clk", - "mi2s_codec_clk", - }, - .num_parents = 2, + .parent_data = lcc_mi2s_bit_div_codec_clk, + .num_parents = ARRAY_SIZE(lcc_mi2s_bit_div_codec_clk), .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, @@ -245,8 +252,8 @@ static struct clk_rcg pcm_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "pcm_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, @@ -262,7 +269,9 @@ static struct clk_branch pcm_clk_out = { .enable_mask = BIT(11), .hw.init = &(struct clk_init_data){ .name = "pcm_clk_out", - .parent_names = (const char *[]){ "pcm_src" }, + .parent_hws = (const struct clk_hw*[]){ + &pcm_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -270,6 +279,11 @@ static struct clk_branch pcm_clk_out = { }, }; +static const struct clk_parent_data lcc_pcm_clk_out_codec_clk[] = { + { .hw = &pcm_clk_out.clkr.hw, }, + { .fw_name = "pcm_codec_clk", .name = "pcm_codec_clk" }, +}; + static struct clk_regmap_mux pcm_clk = { .reg = 0x54, .shift = 10, @@ -277,11 +291,8 @@ static struct clk_regmap_mux pcm_clk = { .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcm_clk", - .parent_names = (const char *[]){ - "pcm_clk_out", - "pcm_codec_clk", - }, - .num_parents = 2, + .parent_data = lcc_pcm_clk_out_codec_clk, + .num_parents = ARRAY_SIZE(lcc_pcm_clk_out_codec_clk), .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, @@ -325,18 +336,14 @@ static struct clk_rcg spdif_src = { .enable_mask = BIT(9), .hw.init = &(struct clk_init_data){ .name = "spdif_src", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_ops, .flags = CLK_SET_RATE_GATE, }, }, }; -static const char * const lcc_spdif_parents[] = { - "spdif_src", -}; - static struct clk_branch spdif_clk = { .halt_reg = 0xd4, .halt_bit = 1, @@ -346,7 +353,9 @@ static struct clk_branch spdif_clk = { .enable_mask = BIT(12), .hw.init = &(struct clk_init_data){ .name = "spdif_clk", - .parent_names = lcc_spdif_parents, + .parent_hws = (const struct clk_hw*[]){ + &spdif_src.clkr.hw, + }, .num_parents = 1, .ops = &clk_branch_ops, .flags = CLK_SET_RATE_PARENT, @@ -384,8 +393,8 @@ static struct clk_rcg ahbix_clk = { .enable_mask = BIT(11), .hw.init = &(struct clk_init_data){ .name = "ahbix", - .parent_names = lcc_pxo_pll4, - .num_parents = 2, + .parent_data = lcc_pxo_pll4, + .num_parents = ARRAY_SIZE(lcc_pxo_pll4), .ops = &clk_rcg_lcc_ops, }, },