From patchwork Wed Jun 15 23:15:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883018 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6756C43334 for ; Wed, 15 Jun 2022 23:16:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346656AbiFOXQK (ORCPT ); Wed, 15 Jun 2022 19:16:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233984AbiFOXQJ (ORCPT ); Wed, 15 Jun 2022 19:16:09 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C5122E9D2; Wed, 15 Jun 2022 16:16:08 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id EB567B81FE1; Wed, 15 Jun 2022 23:16:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5244CC3411A; Wed, 15 Jun 2022 23:16:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334965; bh=8Nk1lM8ejhDBpfSrhxbf7ohET2bkSRBFmOkP/OAeT3s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NYScISFZqXBv4Gx8Zaxkg6Stj9YYzNwF1LAsGhDYzm/uUV9ECE9U9DMelj+b5ArVp /AEB/eKnBBHFpG0sCejGKyRaLcDEQfyqtRfJPp7O7XMNZNI7Wi9gTP6mi7DKOppuyK Jybza/eV8rmhocAqIQqyru1zwUYiOGGexyVHEoTuuNCz6uCkaGcJd5F4aSRTEW135t SKfaBvtIEKAd2cFpyqRCz7/c+oerq8ctyQm2dSI+mLLTBszkal5+tHgFIPmjDOQzht V5o9YkzSWiEFSX118VIftxDCqBsshuFpwQTcEhILL4OCBp0GVNdXjK+fG37E/e9YYj RpEc6D5nxkYGg== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 01/13] PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlier Date: Wed, 15 Jun 2022 18:15:39 -0500 Message-Id: <20220615231551.1054753-2-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Move imx6_pcie_grp_offset() and imx6_pcie_configure_type() earlier in the file since they depend on nothing and are used by several other functions that will be moved earlier. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 50 +++++++++++++-------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 7a285fb0f619..8653ca8cbfb9 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -146,6 +146,31 @@ struct imx6_pcie { #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3) +static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) +{ + WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && + imx6_pcie->drvdata->variant != IMX8MM); + return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; +} + +static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) +{ + unsigned int mask, val; + + if (imx6_pcie->drvdata->variant == IMX8MQ && + imx6_pcie->controller_id == 1) { + mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; + val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, + PCI_EXP_TYPE_ROOT_PORT); + } else { + mask = IMX6Q_GPR12_DEVICE_TYPE; + val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, + PCI_EXP_TYPE_ROOT_PORT); + } + + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); +} + static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) { struct dw_pcie *pci = imx6_pcie->pci; @@ -415,13 +440,6 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) imx6_pcie->gpio_active_high); } -static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) -{ - WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && - imx6_pcie->drvdata->variant != IMX8MM); - return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; -} - static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; @@ -617,24 +635,6 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } } -static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie) -{ - unsigned int mask, val; - - if (imx6_pcie->drvdata->variant == IMX8MQ && - imx6_pcie->controller_id == 1) { - mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE; - val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); - } else { - mask = IMX6Q_GPR12_DEVICE_TYPE; - val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, - PCI_EXP_TYPE_ROOT_PORT); - } - - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val); -} - static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { From patchwork Wed Jun 15 23:15:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883020 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7620CCA47D for ; Wed, 15 Jun 2022 23:16:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233984AbiFOXQS (ORCPT ); Wed, 15 Jun 2022 19:16:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349502AbiFOXQQ (ORCPT ); Wed, 15 Jun 2022 19:16:16 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81D3031227; Wed, 15 Jun 2022 16:16:10 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0EEEAB821FB; Wed, 15 Jun 2022 23:16:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 399CDC3411B; Wed, 15 Jun 2022 23:16:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334967; bh=iQSoYl8q4FhnbKwTEHq557y3eO3rlEfgfrGzacEwQu8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XDMXZcrucvgmBooip37O64WSgqQ2mcgeawoWUk9Wn1mtcmgyQw6XrrzVJE/bU8/+r P3l7kLQ2o9W3rqo5S9TH/4JolP795ZpDVyKhU1WeA2g65TGGZ+D15xAjxQTaK1L9xx kJigRPvhjaHhfzKMn00bQbaSF/T7aejvh+6//1bB8OBgDuYr68z4K/TMZF4orN2oY5 ZKAREf9qPO9lBXTcJ92TEhU6oyqX0LOD3ZJaNPtequ0lUgzh1PxBMRgG6xTfymoQKO /cwGmu7wpIb19q6GPVbGvweLFELhZN886bF8S0SYOaT9CzN+OBeyIULkoc4nz7/M3p K9x9Vag7pzLiA== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 02/13] PCI: imx6: Move PHY management functions together Date: Wed, 15 Jun 2022 18:15:40 -0500 Message-Id: <20220615231551.1054753-3-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Collect imx6_pcie_init_phy(), imx7d_pcie_wait_for_phy_pll_lock(), and imx6_setup_phy_mpll() earlier with other PHY-related code. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 256 +++++++++++++------------- 1 file changed, 128 insertions(+), 128 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 8653ca8cbfb9..e63eb6380020 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -296,6 +296,134 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data) return 0; } +static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) +{ + switch (imx6_pcie->drvdata->variant) { + case IMX8MM: + /* + * The PHY initialization had been done in the PHY + * driver, break here directly. + */ + break; + case IMX8MQ: + /* + * TODO: Currently this code assumes external + * oscillator is being used + */ + regmap_update_bits(imx6_pcie->iomuxc_gpr, + imx6_pcie_grp_offset(imx6_pcie), + IMX8MQ_GPR_PCIE_REF_USE_PAD, + IMX8MQ_GPR_PCIE_REF_USE_PAD); + /* + * Regarding the datasheet, the PCIE_VPH is suggested + * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the + * VREG_BYPASS should be cleared to zero. + */ + if (imx6_pcie->vph && + regulator_get_voltage(imx6_pcie->vph) > 3000000) + regmap_update_bits(imx6_pcie->iomuxc_gpr, + imx6_pcie_grp_offset(imx6_pcie), + IMX8MQ_GPR_PCIE_VREG_BYPASS, + 0); + break; + case IMX7D: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); + break; + case IMX6SX: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6SX_GPR12_PCIE_RX_EQ_MASK, + IMX6SX_GPR12_PCIE_RX_EQ_2); + fallthrough; + default: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); + + /* configure constant input signal to the pcie ctrl and phy */ + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6Q_GPR12_LOS_LEVEL, 9 << 4); + + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, + IMX6Q_GPR8_TX_DEEMPH_GEN1, + imx6_pcie->tx_deemph_gen1 << 0); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, + IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB, + imx6_pcie->tx_deemph_gen2_3p5db << 6); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, + IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB, + imx6_pcie->tx_deemph_gen2_6db << 12); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, + IMX6Q_GPR8_TX_SWING_FULL, + imx6_pcie->tx_swing_full << 18); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, + IMX6Q_GPR8_TX_SWING_LOW, + imx6_pcie->tx_swing_low << 25); + break; + } + + imx6_pcie_configure_type(imx6_pcie); +} + +static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) +{ + u32 val; + struct device *dev = imx6_pcie->pci->dev; + + if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, + IOMUXC_GPR22, val, + val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED, + PHY_PLL_LOCK_WAIT_USLEEP_MAX, + PHY_PLL_LOCK_WAIT_TIMEOUT)) + dev_err(dev, "PCIe PLL lock timeout\n"); +} + +static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) +{ + unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy); + int mult, div; + u16 val; + + if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) + return 0; + + switch (phy_rate) { + case 125000000: + /* + * The default settings of the MPLL are for a 125MHz input + * clock, so no need to reconfigure anything in that case. + */ + return 0; + case 100000000: + mult = 25; + div = 0; + break; + case 200000000: + mult = 25; + div = 1; + break; + default: + dev_err(imx6_pcie->pci->dev, + "Unsupported PHY reference clock rate %lu\n", phy_rate); + return -EINVAL; + } + + pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val); + val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK << + PCIE_PHY_MPLL_MULTIPLIER_SHIFT); + val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT; + val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD; + pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val); + + pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val); + val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK << + PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT); + val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT; + val |= PCIE_PHY_ATEOVRD_EN; + pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val); + + return 0; +} + static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie) { u16 tmp; @@ -500,19 +628,6 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) return ret; } -static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie) -{ - u32 val; - struct device *dev = imx6_pcie->pci->dev; - - if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr, - IOMUXC_GPR22, val, - val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED, - PHY_PLL_LOCK_WAIT_USLEEP_MAX, - PHY_PLL_LOCK_WAIT_TIMEOUT)) - dev_err(dev, "PCIe PLL lock timeout\n"); -} - static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; @@ -635,121 +750,6 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } } -static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) -{ - switch (imx6_pcie->drvdata->variant) { - case IMX8MM: - /* - * The PHY initialization had been done in the PHY - * driver, break here directly. - */ - break; - case IMX8MQ: - /* - * TODO: Currently this code assumes external - * oscillator is being used - */ - regmap_update_bits(imx6_pcie->iomuxc_gpr, - imx6_pcie_grp_offset(imx6_pcie), - IMX8MQ_GPR_PCIE_REF_USE_PAD, - IMX8MQ_GPR_PCIE_REF_USE_PAD); - /* - * Regarding the datasheet, the PCIE_VPH is suggested - * to be 1.8V. If the PCIE_VPH is supplied by 3.3V, the - * VREG_BYPASS should be cleared to zero. - */ - if (imx6_pcie->vph && - regulator_get_voltage(imx6_pcie->vph) > 3000000) - regmap_update_bits(imx6_pcie->iomuxc_gpr, - imx6_pcie_grp_offset(imx6_pcie), - IMX8MQ_GPR_PCIE_VREG_BYPASS, - 0); - break; - case IMX7D: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, 0); - break; - case IMX6SX: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_RX_EQ_MASK, - IMX6SX_GPR12_PCIE_RX_EQ_2); - fallthrough; - default: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); - - /* configure constant input signal to the pcie ctrl and phy */ - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6Q_GPR12_LOS_LEVEL, 9 << 4); - - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, - IMX6Q_GPR8_TX_DEEMPH_GEN1, - imx6_pcie->tx_deemph_gen1 << 0); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, - IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB, - imx6_pcie->tx_deemph_gen2_3p5db << 6); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, - IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB, - imx6_pcie->tx_deemph_gen2_6db << 12); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, - IMX6Q_GPR8_TX_SWING_FULL, - imx6_pcie->tx_swing_full << 18); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, - IMX6Q_GPR8_TX_SWING_LOW, - imx6_pcie->tx_swing_low << 25); - break; - } - - imx6_pcie_configure_type(imx6_pcie); -} - -static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) -{ - unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy); - int mult, div; - u16 val; - - if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY)) - return 0; - - switch (phy_rate) { - case 125000000: - /* - * The default settings of the MPLL are for a 125MHz input - * clock, so no need to reconfigure anything in that case. - */ - return 0; - case 100000000: - mult = 25; - div = 0; - break; - case 200000000: - mult = 25; - div = 1; - break; - default: - dev_err(imx6_pcie->pci->dev, - "Unsupported PHY reference clock rate %lu\n", phy_rate); - return -EINVAL; - } - - pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val); - val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK << - PCIE_PHY_MPLL_MULTIPLIER_SHIFT); - val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT; - val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD; - pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val); - - pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val); - val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK << - PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT); - val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT; - val |= PCIE_PHY_ATEOVRD_EN; - pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val); - - return 0; -} - static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; From patchwork Wed Jun 15 23:15:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883019 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE012C43334 for ; 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d=kernel.org; s=k20201202; t=1655334969; bh=QSnSKTKUmF2B69IgvFcJoWsIu/H9OSZZxzlv5+9t/Ac=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mFvW9oy5uGDTNxc8Mxa69AjgF2aWqTk4HwGP0VCaXl2y4M5c0GrRC9JNn4AwckaV5 +gu5JHmto/XruJWv7Xw+H2dN7Civ3L4yNEbx7gVqg9DohhBDdJuu9xTRE8ZFzwE69T lSNKgZtqOjs/L5Le1xPr9t3vxgJ/3DfJwWZSpKXRw2hrYylXSvpcmZSJCb3ykaj6AK nvVBGhSUjhvfK9Y+KvkRYcLN2RoJB8U1fNY38ESLVOPCmf6ANwY59eOOQ41YKV3N3P 2S7Bc5co+nXLRzCL8H4B/1Zv2yqmc9jdLDmBdQxOw6FOfenDL9mkjFNWVctIdvTMJ4 OAk2OOV7wei2A== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 03/13] PCI: imx6: Move imx6_pcie_enable_ref_clk() earlier Date: Wed, 15 Jun 2022 18:15:41 -0500 Message-Id: <20220615231551.1054753-4-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Move imx6_pcie_enable_ref_clk() earlier so it's not in the middle between imx6_pcie_assert_core_reset() and imx6_pcie_deassert_core_reset(). No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 96 +++++++++++++-------------- 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index e63eb6380020..a6d2b907d42b 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -520,54 +520,6 @@ static int imx6_pcie_attach_pd(struct device *dev) return 0; } -static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) -{ - struct device *dev = imx6_pcie->pci->dev; - - switch (imx6_pcie->drvdata->variant) { - case IMX7D: - case IMX8MQ: - reset_control_assert(imx6_pcie->pciephy_reset); - fallthrough; - case IMX8MM: - reset_control_assert(imx6_pcie->apps_reset); - break; - case IMX6SX: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX6SX_GPR12_PCIE_TEST_POWERDOWN, - IMX6SX_GPR12_PCIE_TEST_POWERDOWN); - /* Force PCIe PHY reset */ - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, - IMX6SX_GPR5_PCIE_BTNRST_RESET, - IMX6SX_GPR5_PCIE_BTNRST_RESET); - break; - case IMX6QP: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, - IMX6Q_GPR1_PCIE_SW_RST, - IMX6Q_GPR1_PCIE_SW_RST); - break; - case IMX6Q: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, - IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, - IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); - break; - } - - if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { - int ret = regulator_disable(imx6_pcie->vpcie); - - if (ret) - dev_err(dev, "failed to disable vpcie regulator: %d\n", - ret); - } - - /* Some boards don't have PCIe reset GPIO. */ - if (gpio_is_valid(imx6_pcie->reset_gpio)) - gpio_set_value_cansleep(imx6_pcie->reset_gpio, - imx6_pcie->gpio_active_high); -} - static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; @@ -628,6 +580,54 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) return ret; } +static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) +{ + struct device *dev = imx6_pcie->pci->dev; + + switch (imx6_pcie->drvdata->variant) { + case IMX7D: + case IMX8MQ: + reset_control_assert(imx6_pcie->pciephy_reset); + fallthrough; + case IMX8MM: + reset_control_assert(imx6_pcie->apps_reset); + break; + case IMX6SX: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX6SX_GPR12_PCIE_TEST_POWERDOWN, + IMX6SX_GPR12_PCIE_TEST_POWERDOWN); + /* Force PCIe PHY reset */ + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR5, + IMX6SX_GPR5_PCIE_BTNRST_RESET, + IMX6SX_GPR5_PCIE_BTNRST_RESET); + break; + case IMX6QP: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_SW_RST, + IMX6Q_GPR1_PCIE_SW_RST); + break; + case IMX6Q: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); + break; + } + + if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { + int ret = regulator_disable(imx6_pcie->vpcie); + + if (ret) + dev_err(dev, "failed to disable vpcie regulator: %d\n", + ret); + } + + /* Some boards don't have PCIe reset GPIO. */ + if (gpio_is_valid(imx6_pcie->reset_gpio)) + gpio_set_value_cansleep(imx6_pcie->reset_gpio, + imx6_pcie->gpio_active_high); +} + static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; From patchwork Wed Jun 15 23:15:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E737C433EF for ; Wed, 15 Jun 2022 23:16:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347635AbiFOXQT (ORCPT ); Wed, 15 Jun 2022 19:16:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349654AbiFOXQR (ORCPT ); Wed, 15 Jun 2022 19:16:17 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB97A3136C; Wed, 15 Jun 2022 16:16:12 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 760246190B; Wed, 15 Jun 2022 23:16:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 98E0AC3411A; Wed, 15 Jun 2022 23:16:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334971; bh=eFQjAab+ad8vZ+YVNE/szknbioi8lzh0HBYCCA+n+MQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DiYi/LaHDcGi7iKc941YCZijL3AJfjUWjuqfGTIOi6S0pKzWdZAiXhIaTcM/4XuBw +68hcUMQd+l8ctW4zMr9Jl65WpaxmPg/zKz94zfkjb0nvI2NlB0oCPENZMkCBQIiY+ HU4j0e+Z28flV1s3Flb2v8ZrynYGz8grY0Qj1VC3kAC4nNc/wIIzSeccJSdJ2dWsA2 /NickpoVO9ccttLYAMrYxFvs5UiTb3ZiTunEGrgqxeHYqm05GOU/kNYDSYoCeABnM3 xz2qeSXFC3kUVQ0M9d4yB4L3BIwSs5LCgNNG7DP8bcV9vUEbbVj8j1UcWC4zD+d0K+ 9NEBgxB7AL22A== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 04/13] PCI: imx6: Move imx6_pcie_clk_disable() earlier Date: Wed, 15 Jun 2022 18:15:42 -0500 Message-Id: <20220615231551.1054753-5-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Move imx6_pcie_clk_disable() earlier to be near other clock-related functions. No functional change intended. [bhelgaas: reorder patch so pure moves are earlier] Link: https://lore.kernel.org/r/1655189942-12678-4-git-send-email-hongxing.z hu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 48 +++++++++++++-------------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index a6d2b907d42b..38f208eea2d7 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -580,6 +580,30 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) return ret; } +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) +{ + clk_disable_unprepare(imx6_pcie->pcie); + clk_disable_unprepare(imx6_pcie->pcie_phy); + clk_disable_unprepare(imx6_pcie->pcie_bus); + + switch (imx6_pcie->drvdata->variant) { + case IMX6SX: + clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); + break; + case IMX7D: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, + IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); + break; + case IMX8MQ: + case IMX8MM: + clk_disable_unprepare(imx6_pcie->pcie_aux); + break; + default: + break; + } +} + static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; @@ -941,30 +965,6 @@ static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie) usleep_range(1000, 10000); } -static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) -{ - clk_disable_unprepare(imx6_pcie->pcie); - clk_disable_unprepare(imx6_pcie->pcie_phy); - clk_disable_unprepare(imx6_pcie->pcie_bus); - - switch (imx6_pcie->drvdata->variant) { - case IMX6SX: - clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); - break; - case IMX7D: - regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, - IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); - break; - case IMX8MQ: - case IMX8MM: - clk_disable_unprepare(imx6_pcie->pcie_aux); - break; - default: - break; - } -} - static int imx6_pcie_suspend_noirq(struct device *dev) { struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); From patchwork Wed Jun 15 23:15:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BE0DCCA47F for ; Wed, 15 Jun 2022 23:16:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346333AbiFOXQU (ORCPT ); Wed, 15 Jun 2022 19:16:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348831AbiFOXQR (ORCPT ); Wed, 15 Jun 2022 19:16:17 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D649B3153D; Wed, 15 Jun 2022 16:16:14 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 736786190B; Wed, 15 Jun 2022 23:16:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A37C5C3411A; Wed, 15 Jun 2022 23:16:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334973; bh=6n0tIEHZZvt8rxIbib1rB35al+cRkpgFY2U5/42NqDY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lLicyyvw9fcDSit3P0wBpq8LeyLA15p1xaJp8YkJsbYlLTeED/wsSPUqx2JNRDw3A z5ywyl9o5NxMys+hUrZ5EdUfArCtnB3AKoXTR+3Y19T5SjZ4BtQH0quUk5azKOz849 aWpGyo3qfq5q8iTfjV3wlc92lHmGjmCsd+4grA7ucrJF0HnsfQ7oQoi9jnUFawmWAk vGY6jpaukbk6wM/FUtmsEcQtara02WQU8LXOl7S7rb7Pob+FxmAVe5SuRWQ77Ko1G9 ga9ihGL6YiNEhnCiK1O2/yNiq1FKycaXynhSlpppjj8i7TZgKEbqC8ylBKDN4IRzr7 atZKOZhqW2rTQ== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 05/13] PCI: imx6: Factor out ref clock disable to match enable Date: Wed, 15 Jun 2022 18:15:43 -0500 Message-Id: <20220615231551.1054753-6-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas The PCIe ref clocks are specific to different variants. The enables are already split out into imx6_pcie_enable_ref_clk(), but the disables were combined with the more generic bus/phy/pcie clock disables in imx6_pcie_clk_disable(). Split out the variant-specific disables into imx6_pcie_disable_ref_clk() to match imx6_pcie_enable_ref_clk(). No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 38f208eea2d7..f458461880dc 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -580,12 +580,8 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) return ret; } -static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) +static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) { - clk_disable_unprepare(imx6_pcie->pcie); - clk_disable_unprepare(imx6_pcie->pcie_phy); - clk_disable_unprepare(imx6_pcie->pcie_bus); - switch (imx6_pcie->drvdata->variant) { case IMX6SX: clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); @@ -595,8 +591,8 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; - case IMX8MQ: case IMX8MM: + case IMX8MQ: clk_disable_unprepare(imx6_pcie->pcie_aux); break; default: @@ -604,6 +600,14 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) } } +static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) +{ + clk_disable_unprepare(imx6_pcie->pcie); + clk_disable_unprepare(imx6_pcie->pcie_phy); + clk_disable_unprepare(imx6_pcie->pcie_bus); + imx6_pcie_disable_ref_clk(imx6_pcie); +} + static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { struct device *dev = imx6_pcie->pci->dev; From patchwork Wed Jun 15 23:15:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C942C43334 for ; Wed, 15 Jun 2022 23:16:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350352AbiFOXQZ (ORCPT ); Wed, 15 Jun 2022 19:16:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58574 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350355AbiFOXQS (ORCPT ); Wed, 15 Jun 2022 19:16:18 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 305D83054F; Wed, 15 Jun 2022 16:16:17 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B2AAF6190B; Wed, 15 Jun 2022 23:16:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C38F8C3411A; Wed, 15 Jun 2022 23:16:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334976; bh=cAJc7R7bE7xqXWor8RIIlSkD8G16T7DVc9c6nA3MW70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hmOWlUMWLuGk93fTZdM2ZA5EUc664xLxgGIuWkZjzVD8k+UAoGCr9oqUMl1F7LLAg i3HapcV1AhKAkGci/Z6vAgi8VTP4f+dh5yNi54R7m/OwImR8UO/C7UrmzOHeEqb2xw DhIZ203TbCbvM4wb3q7187HU6gaAqur25XrZRjRqI8UOPrSO8SDe0kM9KHN0WBKZkI q6QQktpxs4xJp8PPor3mq7uocXF+Ocmjj4Q1l/Wuc0QNRAgIHCLvU+kQUenJJCBHtx w7X54W+JsYCDdgCb2KDU58M6EWLmb2RRY7+YbEhYdMYTX6+JhsV9/qcPpJUr4iGIIG 8Tx63dmqF/FOw== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 06/13] PCI: imx6: Collect clock enables in imx6_pcie_clk_enable() Date: Wed, 15 Jun 2022 18:15:44 -0500 Message-Id: <20220615231551.1054753-7-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Encapsulate the i.MX PCIe clock enable operations into one standalone function, imx6_pcie_clk_enable(). No functional change intended. [bhelgaas: split pure code moves into separate patches] Link: https://lore.kernel.org/r/1655189942-12678-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 98 ++++++++++++++++----------- 1 file changed, 58 insertions(+), 40 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index f458461880dc..e36ca08a7c51 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -600,6 +600,58 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) } } +static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) +{ + struct dw_pcie *pci = imx6_pcie->pci; + struct device *dev = pci->dev; + int ret; + + ret = clk_prepare_enable(imx6_pcie->pcie_phy); + if (ret) { + dev_err(dev, "unable to enable pcie_phy clock\n"); + return ret; + } + + ret = clk_prepare_enable(imx6_pcie->pcie_bus); + if (ret) { + dev_err(dev, "unable to enable pcie_bus clock\n"); + goto err_pcie_bus; + } + + ret = clk_prepare_enable(imx6_pcie->pcie); + if (ret) { + dev_err(dev, "unable to enable pcie clock\n"); + goto err_pcie; + } + + ret = imx6_pcie_enable_ref_clk(imx6_pcie); + if (ret) { + dev_err(dev, "unable to enable pcie ref clock\n"); + goto err_ref_clk; + } + + switch (imx6_pcie->drvdata->variant) { + case IMX8MM: + if (phy_power_on(imx6_pcie->phy)) + dev_err(dev, "unable to power on PHY\n"); + break; + default: + break; + } + /* allow the clocks to stabilize */ + usleep_range(200, 500); + return 0; + +err_ref_clk: + clk_disable_unprepare(imx6_pcie->pcie); +err_pcie: + clk_disable_unprepare(imx6_pcie->pcie_bus); +err_pcie_bus: + clk_disable_unprepare(imx6_pcie->pcie_phy); + + return ret; +} + static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) { clk_disable_unprepare(imx6_pcie->pcie); @@ -660,7 +712,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; - int ret; + int ret, err; if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { ret = regulator_enable(imx6_pcie->vpcie); @@ -671,40 +723,12 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) } } - ret = clk_prepare_enable(imx6_pcie->pcie_phy); - if (ret) { - dev_err(dev, "unable to enable pcie_phy clock\n"); - goto err_pcie_phy; + err = imx6_pcie_clk_enable(imx6_pcie); + if (err) { + dev_err(dev, "unable to enable pcie clocks: %d\n", err); + goto err_clks; } - ret = clk_prepare_enable(imx6_pcie->pcie_bus); - if (ret) { - dev_err(dev, "unable to enable pcie_bus clock\n"); - goto err_pcie_bus; - } - - ret = clk_prepare_enable(imx6_pcie->pcie); - if (ret) { - dev_err(dev, "unable to enable pcie clock\n"); - goto err_pcie; - } - - ret = imx6_pcie_enable_ref_clk(imx6_pcie); - if (ret) { - dev_err(dev, "unable to enable pcie ref clock\n"); - goto err_ref_clk; - } - - switch (imx6_pcie->drvdata->variant) { - case IMX8MM: - if (phy_power_on(imx6_pcie->phy)) - dev_err(dev, "unable to power on PHY\n"); - break; - default: - break; - } - /* allow the clocks to stabilize */ - usleep_range(200, 500); switch (imx6_pcie->drvdata->variant) { case IMX8MQ: @@ -763,13 +787,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) return; -err_ref_clk: - clk_disable_unprepare(imx6_pcie->pcie); -err_pcie: - clk_disable_unprepare(imx6_pcie->pcie_bus); -err_pcie_bus: - clk_disable_unprepare(imx6_pcie->pcie_phy); -err_pcie_phy: +err_clks: if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { ret = regulator_disable(imx6_pcie->vpcie); if (ret) From patchwork Wed Jun 15 23:15:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70BAFC433EF for ; Wed, 15 Jun 2022 23:16:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354540AbiFOXQh (ORCPT ); Wed, 15 Jun 2022 19:16:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351538AbiFOXQX (ORCPT ); Wed, 15 Jun 2022 19:16:23 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69F5C3153D; Wed, 15 Jun 2022 16:16:19 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B4D5D619A2; Wed, 15 Jun 2022 23:16:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2D0EC3411A; Wed, 15 Jun 2022 23:16:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334978; bh=V4zjeqs/MW9qGeVecOnDdm0aX5MRgdE+/XPrfaRGJOo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RQ/DVBgE0biMDbO51l/bj0ujSHagDKrGVelfZfyLYW39UloPhtmDo3umogTTy4Pc6 ZxDPLafKqipRV8v//O13deY5q53bxFc7BEanZlqgUZaH6w1HWixrpfG2h71Q58l6Ka dhtAhKU2tUDu1HiO9lA0lxlEgPyrnpM7hB73AGWlf4StaeLGWcaAAlVXX8UsyvGB6P ATwye+6PyGbczlmNjOMD72sVqKlMin+w5am0ch/4Ymst7GvyNW0zspLe92eG4+/6hd kjadA+mcKYhXDIWqgIqWmYT9Wu57vbLlf3/izosfvjfWK1UqKNYbq6748HZdkrRF8x Dqlz2IrlPPzag== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 07/13] PCI: imx6: Propagate .host_init() errors to caller Date: Wed, 15 Jun 2022 18:15:45 -0500 Message-Id: <20220615231551.1054753-8-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Since dw_pcie_host_init() checks for errors from ops->host_init(), check for errors when enabling power regulators and clocks and return them. [bhelgaas: commit log] Link: https://lore.kernel.org/r/1655189942-12678-3-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index e36ca08a7c51..90ab9397a935 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -708,7 +708,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) imx6_pcie->gpio_active_high); } -static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) +static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) { struct dw_pcie *pci = imx6_pcie->pci; struct device *dev = pci->dev; @@ -719,7 +719,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) if (ret) { dev_err(dev, "failed to enable vpcie regulator: %d\n", ret); - return; + return ret; } } @@ -785,7 +785,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) msleep(100); } - return; + return 0; err_clks: if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { @@ -794,6 +794,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) dev_err(dev, "failed to disable vpcie regulator: %d\n", ret); } + return err; } static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie) @@ -912,11 +913,18 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) static int imx6_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); + struct device *dev = pci->dev; struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); + int ret; imx6_pcie_assert_core_reset(imx6_pcie); imx6_pcie_init_phy(imx6_pcie); - imx6_pcie_deassert_core_reset(imx6_pcie); + ret = imx6_pcie_deassert_core_reset(imx6_pcie); + if (ret < 0) { + dev_err(dev, "pcie host init failed: %d\n", ret); + return ret; + } + imx6_setup_phy_mpll(imx6_pcie); return 0; From patchwork Wed Jun 15 23:15:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 716AEC433EF for ; Wed, 15 Jun 2022 23:16:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355709AbiFOXQn (ORCPT ); Wed, 15 Jun 2022 19:16:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352209AbiFOXQY (ORCPT ); Wed, 15 Jun 2022 19:16:24 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48E36326D8; Wed, 15 Jun 2022 16:16:21 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9C117619A2; Wed, 15 Jun 2022 23:16:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CD2A2C3411E; Wed, 15 Jun 2022 23:16:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334980; bh=3cLKaeAlo+Sy59tfNtk5xZLRjzRekSFYTs9v6gKNT0M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SXqrIsZbTzwVX9omCBijrvdwVv+sidwhOqu9nrSWnDvrBGSJCsPU9U5fRmiASUvbC 2rjGpSrMekg2FAsVU/Ocfe5VuTuqczVL3g0VTbxQVyG0hAT31IryBdqnXIol36fvU7 F3qYxauFNVQZg4wXBEkBMMvoJ8NzNqztJZq/JDJqjvk+e8RgA/ZFsVjYleYHVmzYn7 naYr41KowLJzU0LJjJ56lvuIRnyr+R3MnkOszBuJnNFp8PMbxXUqrcFz5rEXArpI0P 6PBArsBDXEiKQVYY2wuXu+/ZImONal62PJT4XII3XW4HNyBJC6QzzQcEGNaI9Boqca 8cCkhX2cormrw== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 08/13] PCI: imx6: Disable i.MX6QDL clock when disabling ref clocks Date: Wed, 15 Jun 2022 18:15:46 -0500 Message-Id: <20220615231551.1054753-9-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu When disabling PCIe clocks, disable i.MX6QDL ref clock too. Link: https://lore.kernel.org/r/1655189942-12678-5-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 90ab9397a935..6eddd0b5f628 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -586,6 +586,14 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX6SX: clk_disable_unprepare(imx6_pcie->pcie_inbound_axi); break; + case IMX6QP: + case IMX6Q: + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_REF_CLK_EN, 0); + regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, + IMX6Q_GPR1_PCIE_TEST_PD, + IMX6Q_GPR1_PCIE_TEST_PD); + break; case IMX7D: regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, From patchwork Wed Jun 15 23:15:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0111C43334 for ; Wed, 15 Jun 2022 23:16:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355999AbiFOXQn (ORCPT ); Wed, 15 Jun 2022 19:16:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352759AbiFOXQY (ORCPT ); Wed, 15 Jun 2022 19:16:24 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C20DB3135B; Wed, 15 Jun 2022 16:16:22 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5D3096199D; Wed, 15 Jun 2022 23:16:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 92B32C3411A; Wed, 15 Jun 2022 23:16:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334981; bh=mrxLuwW6VYNrbcjHq58c7unp1aMAICbpn9ly/gV4ASg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FM5K2aJkpFeURvD/3/dy2vhcGN/VarB0IaQE3Vq93OGfrK8xPLEVBfA4UtVIoh82+ 51oyRBKJnkdrhaxaJq6hzcfHqOzUdWhPR6LVAVFY281iLTIFTMOJsrqxgQmoamFPZK DkD3PC75Vr4iuidfAUxT924WHbpVp03ZvgWvXAtZwE/697yR8UAb49/ybR8YxefThh aRxaN4ulx6mJiv19xe1KxdDkSldawgOqWgpRskRvY+W3FVfe0yJqYY3uL/74MkYAYe fhORMhTEU4nQtYzvnOCmteoi94ODJLKoiInYTbKAJ6EJa/+bhhptM/p88LmoMPduXc Mh7X1va7mk+Gg== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 09/13] PCI: imx6: Turn off regulator when system is in suspend mode Date: Wed, 15 Jun 2022 18:15:47 -0500 Message-Id: <20220615231551.1054753-10-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu The driver should undo any enables it did itself. The regulator disable shouldn't be basing decisions on regulator_is_enabled(). Move the regulator_disable to the suspend function, turn off regulator when the system is in suspend mode. To keep the balance of the regulator usage counter, disable the regulator in shutdown. Link: https://lore.kernel.org/r/1655189942-12678-6-git-send-email-hongxing.z hu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/dwc/pci-imx6.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 6eddd0b5f628..537b8a2e0e3b 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -670,8 +670,6 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) { - struct device *dev = imx6_pcie->pci->dev; - switch (imx6_pcie->drvdata->variant) { case IMX7D: case IMX8MQ: @@ -702,14 +700,6 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) break; } - if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { - int ret = regulator_disable(imx6_pcie->vpcie); - - if (ret) - dev_err(dev, "failed to disable vpcie regulator: %d\n", - ret); - } - /* Some boards don't have PCIe reset GPIO. */ if (gpio_is_valid(imx6_pcie->reset_gpio)) gpio_set_value_cansleep(imx6_pcie->reset_gpio, @@ -722,7 +712,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) struct device *dev = pci->dev; int ret, err; - if (imx6_pcie->vpcie && !regulator_is_enabled(imx6_pcie->vpcie)) { + if (imx6_pcie->vpcie) { ret = regulator_enable(imx6_pcie->vpcie); if (ret) { dev_err(dev, "failed to enable vpcie regulator: %d\n", @@ -796,7 +786,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) return 0; err_clks: - if (imx6_pcie->vpcie && regulator_is_enabled(imx6_pcie->vpcie) > 0) { + if (imx6_pcie->vpcie) { ret = regulator_disable(imx6_pcie->vpcie); if (ret) dev_err(dev, "failed to disable vpcie regulator: %d\n", @@ -1023,6 +1013,9 @@ static int imx6_pcie_suspend_noirq(struct device *dev) break; } + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); + return 0; } @@ -1269,6 +1262,8 @@ static void imx6_pcie_shutdown(struct platform_device *pdev) /* bring down link, so bootloader gets clean state in case of reboot */ imx6_pcie_assert_core_reset(imx6_pcie); + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); } static const struct imx6_pcie_drvdata drvdata[] = { From patchwork Wed Jun 15 23:15:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883028 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47285CCA473 for ; Wed, 15 Jun 2022 23:16:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356444AbiFOXQ4 (ORCPT ); Wed, 15 Jun 2022 19:16:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350792AbiFOXQg (ORCPT ); Wed, 15 Jun 2022 19:16:36 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD8363464E; Wed, 15 Jun 2022 16:16:26 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 63959B81FE1; Wed, 15 Jun 2022 23:16:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B3152C3411A; Wed, 15 Jun 2022 23:16:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334984; bh=dW1LoSHvZjh0g3Ks+7fF1K2Mo4Xweob8fflXZGetkLo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GqU7Vu6k49begI+Z+OJvWmWLw2PHtnTl0CwR5k5b5RyrEDDj9qe+/30iOALkMfbNK 0AjvUG9RIqKUg/ghFaWYmzlA6lNFSxgkcCsANC4WfkTKHRys+BETY1E8NgmN0wVRdD wVpP7nmdgK5UBopiBj5GZR59xGcA03wwMfrbq6BhxlMLKS5/zhii3nhoOSuyniCScm 73EnSvH3H634MNjo2VD9CO/+L1YxAWWUzAJ7pFbIrzJQftdrB4spFT6YcDMiXufwS1 jVO9bY78jaRyprycy6w+0Ra+7l7Euz2PFq8N8clOZObIBvk5pQ/UAd0i1j7Ge4gT1k 6pW/TGRBjyKag== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 10/13] PCI: imx6: Mark the link down as non-fatal error Date: Wed, 15 Jun 2022 18:15:48 -0500 Message-Id: <20220615231551.1054753-11-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Let the driver probe successfully, return zero in imx6_pcie_start_link() when PCIe link is down. Link: https://lore.kernel.org/r/1655189942-12678-7-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/dwc/pci-imx6.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 537b8a2e0e3b..7d3592540b8a 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -855,7 +855,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) /* Start LTSSM. */ imx6_pcie_ltssm_enable(dev); - dw_pcie_wait_for_link(pci); + ret = dw_pcie_wait_for_link(pci); + if (ret) + goto err_reset_phy; if (pci->link_gen == 2) { /* Allow Gen2 mode after the link is up. */ @@ -891,7 +893,9 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) } /* Make sure link training is finished as well! */ - dw_pcie_wait_for_link(pci); + ret = dw_pcie_wait_for_link(pci); + if (ret) + goto err_reset_phy; } else { dev_info(dev, "Link: Gen2 disabled\n"); } @@ -905,7 +909,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0), dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1)); imx6_pcie_reset_phy(imx6_pcie); - return ret; + return 0; } static int imx6_pcie_host_init(struct pcie_port *pp) From patchwork Wed Jun 15 23:15:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4129C433EF for ; Wed, 15 Jun 2022 23:16:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355146AbiFOXQz (ORCPT ); Wed, 15 Jun 2022 19:16:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351170AbiFOXQg (ORCPT ); Wed, 15 Jun 2022 19:16:36 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4012034B81; Wed, 15 Jun 2022 16:16:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 92257619B2; Wed, 15 Jun 2022 23:16:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AD4E6C3411A; Wed, 15 Jun 2022 23:16:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334986; bh=OTHz77xYfOj2BzCwLPsZG6pEu0uiIDa86IetAa2AHUU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dAEULewB8TnpBmlPG1L2uOVIFqh6+hTW0iz4k3KEE5icPkIshC7xvUAWUeA7tbBvN PM6xf/+jRMcxz+4eYtEfFtExQTMz6PXbGUWG2pJfoZMwuaKiRUl55Iylk7LzdIJkP1 6R07fm4CwpXDb3GQjeRj4hrKl8DxQgYDS5Q7bdKD+28ImkZsoadPY+o/IbYHB0fTpR +1FLQXpSUy5BRrzqN+XAHW81GsDL+DJK63p8W3Qypoy+D0VzE4oo37HN/uV3bI9b+c Lm71TwwwqGblLM9eg4EgMhsBGkFN7OGikMPt1+TAN8skxjjLSkNaxflKaTE5/LqCmK 5vMIgj2rmdNmg== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 11/13] PCI: imx6: Reduce resume time by only starting link if it was up before suspend Date: Wed, 15 Jun 2022 18:15:49 -0500 Message-Id: <20220615231551.1054753-12-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Because i.MX PCIe doesn't support hot-plug feature. In the link down scenario, only start the PCIe link training in resume when the link is up before system suspend to avoid the long latency in the link training period. [bhelgaas: drop now-unused "ret"] Link: https://lore.kernel.org/r/1655189942-12678-8-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/dwc/pci-imx6.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 7d3592540b8a..b6e5420d67b6 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -67,6 +67,7 @@ struct imx6_pcie { struct dw_pcie *pci; int reset_gpio; bool gpio_active_high; + bool link_is_up; struct clk *pcie_bus; struct clk *pcie_phy; struct clk *pcie_inbound_axi; @@ -900,6 +901,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) dev_info(dev, "Link: Gen2 disabled\n"); } + imx6_pcie->link_is_up = true; tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS); return 0; @@ -1025,7 +1027,6 @@ static int imx6_pcie_suspend_noirq(struct device *dev) static int imx6_pcie_resume_noirq(struct device *dev) { - int ret; struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); struct pcie_port *pp = &imx6_pcie->pci->pp; @@ -1036,10 +1037,8 @@ static int imx6_pcie_resume_noirq(struct device *dev) imx6_pcie_init_phy(imx6_pcie); imx6_pcie_deassert_core_reset(imx6_pcie); dw_pcie_setup_rc(pp); - - ret = imx6_pcie_start_link(imx6_pcie->pci); - if (ret < 0) - dev_info(dev, "pcie link is down after resume.\n"); + if (imx6_pcie->link_is_up) + imx6_pcie_start_link(imx6_pcie->pci); return 0; } From patchwork Wed Jun 15 23:15:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883029 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F18DDCCA473 for ; Wed, 15 Jun 2022 23:17:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355385AbiFOXRI (ORCPT ); Wed, 15 Jun 2022 19:17:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59278 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355290AbiFOXQm (ORCPT ); Wed, 15 Jun 2022 19:16:42 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E626130F63; Wed, 15 Jun 2022 16:16:30 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 9D2CDB821F7; Wed, 15 Jun 2022 23:16:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EFE03C3411A; Wed, 15 Jun 2022 23:16:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334988; bh=8xHGKslATn5SqjbLCJ4pv8WkiU2h9ra44UFSzepa0O4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LptAqZnuuxzXUum9OA3hLJVkODGls+p+ImCwu4SD+XKPZerUrxIvbCX29Deq36orQ JNPb7X3PI9WLkkHNq+ssl6laBiHAU6ed8rSVkMJkqaJ8/ZXEgd8SRKrZ0k5UEeVUz4 TQ3l55j/bAx1TZ4kVsT6t/NAlzUJzWjy8anzwMTG09rjxq0njJzeRTHYUka06+z6/v FuF+grwf4xqPejHWzde3Nzl8E9jcwN5hNpgoA28faQfjLGdIrk8k4wcZqljge7JJq+ Om6n12GLcwA+UA3FXDfzhcTafaGtuDYIgHg87lDMF+RX0aVLxjvuhYYlQdv463zLWw Ol2+YaGd7S9qg== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 12/13] PCI: imx6: Do not hide phy driver callbacks and refine the error handling Date: Wed, 15 Jun 2022 18:15:50 -0500 Message-Id: <20220615231551.1054753-13-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu - Move the phy_power_on() to host_init and resume functions from imx6_pcie_clk_enable(). - Move the phy_init() to host_init and resume functions from imx6_pcie_deassert_core_reset(). Refine the error handling in imx6_pcie_host_init() and imx6_pcie_resume_noirq() functions accordingly. [bhelgaas: add "ret" back since it's used again] Link: https://lore.kernel.org/r/1655189942-12678-9-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/dwc/pci-imx6.c | 70 +++++++++++++++++++++------ 1 file changed, 56 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index b6e5420d67b6..bd736aff94a3 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -639,14 +639,6 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) goto err_ref_clk; } - switch (imx6_pcie->drvdata->variant) { - case IMX8MM: - if (phy_power_on(imx6_pcie->phy)) - dev_err(dev, "unable to power on PHY\n"); - break; - default: - break; - } /* allow the clocks to stabilize */ usleep_range(200, 500); return 0; @@ -733,10 +725,6 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) case IMX8MQ: reset_control_deassert(imx6_pcie->pciephy_reset); break; - case IMX8MM: - if (phy_init(imx6_pcie->phy)) - dev_err(dev, "waiting for phy ready timeout!\n"); - break; case IMX7D: reset_control_deassert(imx6_pcie->pciephy_reset); @@ -772,6 +760,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) usleep_range(200, 500); break; case IMX6Q: /* Nothing to do */ + case IMX8MM: break; } @@ -923,15 +912,39 @@ static int imx6_pcie_host_init(struct pcie_port *pp) imx6_pcie_assert_core_reset(imx6_pcie); imx6_pcie_init_phy(imx6_pcie); + if (imx6_pcie->phy) { + ret = phy_power_on(imx6_pcie->phy); + if (ret) { + dev_err(dev, "pcie phy power up failed.\n"); + return ret; + } + } + ret = imx6_pcie_deassert_core_reset(imx6_pcie); if (ret < 0) { dev_err(dev, "pcie host init failed: %d\n", ret); - return ret; + goto err_phy_off; + } + if (imx6_pcie->phy) { + ret = phy_init(imx6_pcie->phy); + if (ret) { + dev_err(dev, "waiting for phy ready timeout!\n"); + goto err_phy_init; + } } imx6_setup_phy_mpll(imx6_pcie); return 0; + +err_phy_init: + imx6_pcie_clk_disable(imx6_pcie); + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); +err_phy_off: + if (imx6_pcie->phy) + phy_power_off(imx6_pcie->phy); + return ret; } static const struct dw_pcie_host_ops imx6_pcie_host_ops = { @@ -1029,18 +1042,47 @@ static int imx6_pcie_resume_noirq(struct device *dev) { struct imx6_pcie *imx6_pcie = dev_get_drvdata(dev); struct pcie_port *pp = &imx6_pcie->pci->pp; + int ret; if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_SUSPEND)) return 0; imx6_pcie_assert_core_reset(imx6_pcie); imx6_pcie_init_phy(imx6_pcie); - imx6_pcie_deassert_core_reset(imx6_pcie); + if (imx6_pcie->phy) { + ret = phy_power_on(imx6_pcie->phy); + if (ret) { + dev_err(dev, "pcie phy power up failed.\n"); + return ret; + } + } + + ret = imx6_pcie_deassert_core_reset(imx6_pcie); + if (ret < 0) { + dev_err(dev, "pcie deassert core reset failed: %d.\n", ret); + goto err_phy_off; + } else if (imx6_pcie->phy) { + ret = phy_init(imx6_pcie->phy); + if (ret) { + dev_err(dev, "pcie phy init failed.\n"); + goto err_phy_init; + } + } + dw_pcie_setup_rc(pp); if (imx6_pcie->link_is_up) imx6_pcie_start_link(imx6_pcie->pci); return 0; + +err_phy_init: + imx6_pcie_clk_disable(imx6_pcie); + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); +err_phy_off: + if (imx6_pcie->phy) + phy_power_off(imx6_pcie->phy); + return ret; } #endif From patchwork Wed Jun 15 23:15:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 12883030 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D024C433EF for ; Wed, 15 Jun 2022 23:17:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357201AbiFOXRR (ORCPT ); Wed, 15 Jun 2022 19:17:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59308 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355677AbiFOXQn (ORCPT ); Wed, 15 Jun 2022 19:16:43 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D93F8393F4; Wed, 15 Jun 2022 16:16:32 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 85D61B81C66; Wed, 15 Jun 2022 23:16:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE6C6C3411A; Wed, 15 Jun 2022 23:16:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655334990; bh=qmixXl4n20cUaihLKiCP4FjnpbNs9/9/CtTDaEdLVsQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EGQkDnwdDQtDH1N6PcBLB4fpHzPR2/On8gbcPj2NhcvTGk+ef/F9pu/sUp/FmBaIN 6JOYX0TnW14heXNYxsnxUbmMbSB07x2LMIcPUtQACz3zQG+vnL72am625fsmkI1nJK k3xG0FOPPnm6DoqRceTUK83ALsh8hw82dq83rULL7apz5nYhH+pmUmWT1gNrDfXytC eH8Cuxo3ktaZHAVGD8kdoBwJYZH7UHDeTPVwzJN4O0zGXvka53eaB2VfoxJ/pABe3+ N0TVMmVW+wdGn53tM4TDOr/b35DvTho8V4z144qEy6Fu5+t4dgAC8fX6EXn3Usnfb/ /sE7hD+f3iEsA== From: Bjorn Helgaas To: Richard Zhu , Lucas Stach , Rob Herring , Mark Brown , Lorenzo Pieralisi , Fabio Estevam , Francesco Dolcini Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Bjorn Helgaas Subject: [PATCH v12 13/13] PCI: imx6: Disable clocks in reverse order of enable Date: Wed, 15 Jun 2022 18:15:51 -0500 Message-Id: <20220615231551.1054753-14-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220615231551.1054753-1-helgaas@kernel.org> References: <20220615231551.1054753-1-helgaas@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas imx6_pcie_clk_enable() enables clocks in the order: pcie_phy pcie_bus pcie imx6_pcie_enable_ref_clk Change imx6_pcie_clk_disable() to disable them in the reverse order. Signed-off-by: Bjorn Helgaas Acked-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index bd736aff94a3..738b5a732cef 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -655,10 +655,10 @@ static int imx6_pcie_clk_enable(struct imx6_pcie *imx6_pcie) static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) { - clk_disable_unprepare(imx6_pcie->pcie); - clk_disable_unprepare(imx6_pcie->pcie_phy); - clk_disable_unprepare(imx6_pcie->pcie_bus); imx6_pcie_disable_ref_clk(imx6_pcie); + clk_disable_unprepare(imx6_pcie->pcie); + clk_disable_unprepare(imx6_pcie->pcie_bus); + clk_disable_unprepare(imx6_pcie->pcie_phy); } static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)