From patchwork Sat Jun 18 20:14:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12886453 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBFABC43334 for ; Sat, 18 Jun 2022 20:18:09 +0000 (UTC) Received: from localhost ([::1]:51200 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o2etU-0005jx-1P for qemu-devel@archiver.kernel.org; Sat, 18 Jun 2022 16:18:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36698) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqF-0002z7-QM; Sat, 18 Jun 2022 16:14:47 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122]:41238 helo=luna) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqC-00051M-UO; Sat, 18 Jun 2022 16:14:47 -0400 Received: from ben by luna with local (Exim 4.95) (envelope-from ) id 1o2eq2-0010hf-B2; Sat, 18 Jun 2022 21:14:34 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, Ben Dooks Subject: [PATCH 1/4] device_tree: add qemu_fdt_setprop_reg64_map helper Date: Sat, 18 Jun 2022 21:14:30 +0100 Message-Id: <20220618201433.240973-2-qemu@ben.fluff.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220618201433.240973-1-qemu@ben.fluff.org> References: <20220618201433.240973-1-qemu@ben.fluff.org> MIME-Version: 1.0 Received-SPF: none client-ip=86.15.83.122; envelope-from=ben@luna.fluff.org; helo=luna X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, FSL_HELO_NON_FQDN_1=0.001, HELO_NO_DOMAIN=0.001, KHOP_HELO_FCRDNS=0.187, PDS_RDNS_DYNAMIC_FP=0.001, RCVD_IN_SORBS_DUL=0.001, RDNS_DYNAMIC=0.982, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add a macro qemu_fdt_setprop_reg64_map() to set the given node's reg property directly from the memory map entry to avoid open coding of the following: qemu_fdt_setprop_cells(fdt, nodename, "reg", 0x0, memmap[SIFIVE_U_DEV_OTP].base, 0x0, memmap[SIFIVE_U_DEV_OTP].size); Signed-off-by: Ben Dooks Reviewed-by: Alistair Francis --- v2: - changed qemu_fdt_setprop_reg64 to qemu_fdt_setprop_reg64_map --- include/sysemu/device_tree.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index ef060a9759..79ce009a22 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -135,6 +135,21 @@ int qemu_fdt_add_path(void *fdt, const char *path); sizeof(qdt_tmp)); \ } while (0) +/** + * qemu_fdt_setprop_reg64_map: + * @fdt: the device tree path + * @node_path: node to set property on + * @map: the map entry to set the reg from + * + * A helper tp set the 'reg' node on the specified node from the given map + * entry. + */ +#define qemu_fdt_setprop_reg64_map(fdt, path, map) \ + qemu_fdt_setprop_cells(fdt, path, "reg", \ + (map)->base >> 32, (map)->base, \ + (map)->size >> 32, (map)->size) + + void qemu_fdt_dumpdtb(void *fdt, int size); /** From patchwork Sat Jun 18 20:14:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12886452 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50A34C43334 for ; Sat, 18 Jun 2022 20:17:20 +0000 (UTC) Received: from localhost ([::1]:50286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o2esh-00056l-7p for qemu-devel@archiver.kernel.org; Sat, 18 Jun 2022 16:17:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36672) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqE-0002yg-OJ; Sat, 18 Jun 2022 16:14:46 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122]:41232 helo=luna) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqC-00051I-TI; Sat, 18 Jun 2022 16:14:46 -0400 Received: from ben by luna with local (Exim 4.95) (envelope-from ) id 1o2eq2-0010hi-CE; Sat, 18 Jun 2022 21:14:34 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, Ben Dooks Subject: [PATCH 2/4] hw/riscv: use qemu_fdt_setprop_reg64_map() in sifive_u.c Date: Sat, 18 Jun 2022 21:14:31 +0100 Message-Id: <20220618201433.240973-3-qemu@ben.fluff.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220618201433.240973-1-qemu@ben.fluff.org> References: <20220618201433.240973-1-qemu@ben.fluff.org> MIME-Version: 1.0 Received-SPF: none client-ip=86.15.83.122; envelope-from=ben@luna.fluff.org; helo=luna X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, FSL_HELO_NON_FQDN_1=0.001, HELO_NO_DOMAIN=0.001, KHOP_HELO_FCRDNS=0.187, PDS_RDNS_DYNAMIC_FP=0.001, RCVD_IN_SORBS_DUL=0.001, RDNS_DYNAMIC=0.982, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the qemu_fdt_setprop_reg64_map() to replace the code that sets the property manually. Signed-off-by: Ben Dooks Reviewed-by: Alistair Francis --- v2: - changed to qemu_fdt_setprop_reg64_map() from previous --- hw/riscv/sifive_u.c | 41 +++++++++++------------------------------ 1 file changed, 11 insertions(+), 30 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index e4c814a3ea..89d7aa2a52 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -223,9 +223,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_string_array(fdt, nodename, "compatible", (char **)&clint_compat, ARRAY_SIZE(clint_compat)); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_CLINT].base, - 0x0, memmap[SIFIVE_U_DEV_CLINT].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_CLINT]); qemu_fdt_setprop(fdt, nodename, "interrupts-extended", cells, ms->smp.cpus * sizeof(uint32_t) * 4); g_free(cells); @@ -235,9 +233,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, (long)memmap[SIFIVE_U_DEV_OTP].base); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_cell(fdt, nodename, "fuse-count", SIFIVE_U_OTP_REG_SIZE); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_OTP].base, - 0x0, memmap[SIFIVE_U_DEV_OTP].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_OTP]); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,fu540-c000-otp"); g_free(nodename); @@ -250,9 +246,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x1); qemu_fdt_setprop_cells(fdt, nodename, "clocks", hfclk_phandle, rtcclk_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_PRCI].base, - 0x0, memmap[SIFIVE_U_DEV_PRCI].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_PRCI]); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,fu540-c000-prci"); g_free(nodename); @@ -284,9 +278,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, nodename, "interrupts-extended", cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t)); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_PLIC].base, - 0x0, memmap[SIFIVE_U_DEV_PLIC].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_PLIC]); qemu_fdt_setprop_cell(fdt, nodename, "riscv,ndev", 0x35); qemu_fdt_setprop_cell(fdt, nodename, "phandle", plic_phandle); plic_phandle = qemu_fdt_get_phandle(fdt, nodename); @@ -304,9 +296,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); qemu_fdt_setprop_cell(fdt, nodename, "#gpio-cells", 2); qemu_fdt_setprop(fdt, nodename, "gpio-controller", NULL, 0); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_GPIO].base, - 0x0, memmap[SIFIVE_U_DEV_GPIO].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_GPIO]); qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GPIO_IRQ0, SIFIVE_U_GPIO_IRQ1, SIFIVE_U_GPIO_IRQ2, SIFIVE_U_GPIO_IRQ3, SIFIVE_U_GPIO_IRQ4, SIFIVE_U_GPIO_IRQ5, SIFIVE_U_GPIO_IRQ6, @@ -342,9 +332,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, nodename = g_strdup_printf("/soc/cache-controller@%lx", (long)memmap[SIFIVE_U_DEV_L2CC].base); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_L2CC].base, - 0x0, memmap[SIFIVE_U_DEV_L2CC].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_L2CC]); qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_L2CC_IRQ0, SIFIVE_U_L2CC_IRQ1, SIFIVE_U_L2CC_IRQ2); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); @@ -366,9 +354,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, prci_phandle, PRCI_CLK_TLCLK); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_QSPI2_IRQ); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_QSPI2].base, - 0x0, memmap[SIFIVE_U_DEV_QSPI2].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_QSPI2]); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,spi0"); g_free(nodename); @@ -391,9 +377,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, prci_phandle, PRCI_CLK_TLCLK); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_QSPI0_IRQ); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_QSPI0].base, - 0x0, memmap[SIFIVE_U_DEV_QSPI0].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_QSPI0]); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,spi0"); g_free(nodename); @@ -449,9 +433,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, (long)memmap[SIFIVE_U_DEV_PWM0].base); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,pwm0"); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_PWM0].base, - 0x0, memmap[SIFIVE_U_DEV_PWM0].size); +qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_PWM0]); + qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_PWM0_IRQ0, SIFIVE_U_PWM0_IRQ1, @@ -496,9 +479,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, (long)memmap[SIFIVE_U_DEV_UART0].base); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,uart0"); - qemu_fdt_setprop_cells(fdt, nodename, "reg", - 0x0, memmap[SIFIVE_U_DEV_UART0].base, - 0x0, memmap[SIFIVE_U_DEV_UART0].size); + qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_UART0]); qemu_fdt_setprop_cells(fdt, nodename, "clocks", prci_phandle, PRCI_CLK_TLCLK); qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); From patchwork Sat Jun 18 20:14:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12886454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46195C433EF for ; Sat, 18 Jun 2022 20:20:40 +0000 (UTC) Received: from localhost ([::1]:56760 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o2evv-00018o-BH for qemu-devel@archiver.kernel.org; Sat, 18 Jun 2022 16:20:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36700) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqF-0002zF-UJ; Sat, 18 Jun 2022 16:14:47 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122]:41234 helo=luna) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqC-00051K-Vs; Sat, 18 Jun 2022 16:14:47 -0400 Received: from ben by luna with local (Exim 4.95) (envelope-from ) id 1o2eq2-0010hl-DL; Sat, 18 Jun 2022 21:14:34 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, Ben Dooks Subject: [PATCH 3/4] device_tree: add qemu_fdt_setprop_strings() helper Date: Sat, 18 Jun 2022 21:14:32 +0100 Message-Id: <20220618201433.240973-4-qemu@ben.fluff.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220618201433.240973-1-qemu@ben.fluff.org> References: <20220618201433.240973-1-qemu@ben.fluff.org> MIME-Version: 1.0 Received-SPF: none client-ip=86.15.83.122; envelope-from=ben@luna.fluff.org; helo=luna X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, FSL_HELO_NON_FQDN_1=0.001, HELO_NO_DOMAIN=0.001, KHOP_HELO_FCRDNS=0.187, PDS_RDNS_DYNAMIC_FP=0.001, RCVD_IN_SORBS_DUL=0.001, RDNS_DYNAMIC=0.982, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add a helper to set a property from a set of strings to reduce the following code: static const char * const clint_compat[2] = { "sifive,clint0", "riscv,clint0" }; qemu_fdt_setprop_string_array(fdt, nodename, "compatible", (char **)&clint_compat, ARRAY_SIZE(clint_compat)); Signed-off-by: Ben Dooks Reviewed-by: Alistair Francis --- v2: - fix node/path in comment --- include/sysemu/device_tree.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/include/sysemu/device_tree.h b/include/sysemu/device_tree.h index 79ce009a22..28b68bacaf 100644 --- a/include/sysemu/device_tree.h +++ b/include/sysemu/device_tree.h @@ -87,6 +87,21 @@ int qemu_fdt_setprop_string(void *fdt, const char *node_path, int qemu_fdt_setprop_string_array(void *fdt, const char *node_path, const char *prop, char **array, int len); +/** + * qemu_fdt_setprop_strings: set a property from a set of strings + * + * @fdt: pointer to the dt blob + * @path: node name + * @prop: property array + */ +#define qemu_fdt_setprop_strings(fdt, path, prop, ...) \ + do { \ + static const char * const __strs[] = { __VA_ARGS__ }; \ + qemu_fdt_setprop_string_array(fdt, path, prop, \ + (char **)&__strs, ARRAY_SIZE(__strs)); \ + } while(0) + + int qemu_fdt_setprop_phandle(void *fdt, const char *node_path, const char *property, const char *target_node_path); From patchwork Sat Jun 18 20:14:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Dooks X-Patchwork-Id: 12886451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E67C7C433EF for ; Sat, 18 Jun 2022 20:17:14 +0000 (UTC) Received: from localhost ([::1]:50208 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o2esb-00053J-CH for qemu-devel@archiver.kernel.org; Sat, 18 Jun 2022 16:17:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36670) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqE-0002yf-Mp; Sat, 18 Jun 2022 16:14:46 -0400 Received: from cpc152649-stkp13-2-0-cust121.10-2.cable.virginm.net ([86.15.83.122]:41240 helo=luna) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o2eqC-00051Y-SC; Sat, 18 Jun 2022 16:14:46 -0400 Received: from ben by luna with local (Exim 4.95) (envelope-from ) id 1o2eq2-0010ho-Ee; Sat, 18 Jun 2022 21:14:34 +0100 From: Ben Dooks To: qemu-devel@nongnu.org Cc: palmer@dabbelt.com, Alistair.Francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, Ben Dooks Subject: [PATCH 4/4] hw/riscv: use qemu_fdt_setprop_strings() in sifive_u.c Date: Sat, 18 Jun 2022 21:14:33 +0100 Message-Id: <20220618201433.240973-5-qemu@ben.fluff.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220618201433.240973-1-qemu@ben.fluff.org> References: <20220618201433.240973-1-qemu@ben.fluff.org> MIME-Version: 1.0 Received-SPF: none client-ip=86.15.83.122; envelope-from=ben@luna.fluff.org; helo=luna X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, FSL_HELO_NON_FQDN_1=0.001, HELO_NO_DOMAIN=0.001, KHOP_HELO_FCRDNS=0.187, PDS_RDNS_DYNAMIC_FP=0.001, RCVD_IN_SORBS_DUL=0.001, RDNS_DYNAMIC=0.982, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use the qemu_fdt_setprop_strings() in sifve_u.c to simplify the code. Signed-off-by: Ben Dooks Reviewed-by: Alistair Francis --- hw/riscv/sifive_u.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 89d7aa2a52..16b18d90bd 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -103,13 +103,6 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, char *nodename; uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle = 1; uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle; - static const char * const ethclk_names[2] = { "pclk", "hclk" }; - static const char * const clint_compat[2] = { - "sifive,clint0", "riscv,clint0" - }; - static const char * const plic_compat[2] = { - "sifive,plic-1.0.0", "riscv,plic0" - }; if (ms->dtb) { fdt = s->fdt = load_device_tree(ms->dtb, &s->fdt_size); @@ -221,8 +214,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, nodename = g_strdup_printf("/soc/clint@%lx", (long)memmap[SIFIVE_U_DEV_CLINT].base); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_string_array(fdt, nodename, "compatible", - (char **)&clint_compat, ARRAY_SIZE(clint_compat)); + qemu_fdt_setprop_strings(fdt, nodename, "compatible", + "sifive,clint0", "riscv,clint0"); qemu_fdt_setprop_reg64_map(fdt, nodename, &memmap[SIFIVE_U_DEV_CLINT]); qemu_fdt_setprop(fdt, nodename, "interrupts-extended", cells, ms->smp.cpus * sizeof(uint32_t) * 4); @@ -273,8 +266,8 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, (long)memmap[SIFIVE_U_DEV_PLIC].base); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); - qemu_fdt_setprop_string_array(fdt, nodename, "compatible", - (char **)&plic_compat, ARRAY_SIZE(plic_compat)); + qemu_fdt_setprop_strings(fdt, nodename, "compatbile", + "sifive,plic-1.0.0", "riscv,plic0"); qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); qemu_fdt_setprop(fdt, nodename, "interrupts-extended", cells, (ms->smp.cpus * 4 - 2) * sizeof(uint32_t)); @@ -410,8 +403,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ); qemu_fdt_setprop_cells(fdt, nodename, "clocks", prci_phandle, PRCI_CLK_GEMGXLPLL, prci_phandle, PRCI_CLK_GEMGXLPLL); - qemu_fdt_setprop_string_array(fdt, nodename, "clock-names", - (char **)ðclk_names, ARRAY_SIZE(ethclk_names)); + qemu_fdt_setprop_strings(fdt, nodename, "clock-names", "pclk", "hclk"); qemu_fdt_setprop(fdt, nodename, "local-mac-address", s->soc.gem.conf.macaddr.a, ETH_ALEN); qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 1);