From patchwork Wed Jun 22 19:37:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AF1DC43334 for ; Wed, 22 Jun 2022 19:38:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358172AbiFVTiT (ORCPT ); Wed, 22 Jun 2022 15:38:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230075AbiFVTiS (ORCPT ); Wed, 22 Jun 2022 15:38:18 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B22BC13FAD; Wed, 22 Jun 2022 12:38:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926697; x=1687462697; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P3iUa2XT/oNSfJJ/tR2VBOAYNb3cfyuFHSgoct+V9vU=; b=iYpWY5gmcjdC2wYZpXapk+75ZhNPyBeB4hHeTwLSm/IBg4xooVH+Oria h3mTLXJrNn3ly6QPcZuvFtuK6wzMxEz9g4V6Gprxab72zUyzehIcSG3bJ BwtpvUxxMfo/DI/pizEx4v9kIGHUsI7fQdGKNkvqxnHzsv79spNSfr/YO ewErk7MKhypqo3m/yduHcXXCpspSGkv7Ojd4jQPp0Tsp9M71y8BEPx0hx cwXRIR+RLJbT/12l1YLQHw/uLTmRjUOqF7ErxhAA2+Hwm4MDM0hUUsmef QL5wraBwWhvtCBqRVc13bKynDB36jv62KhcO4IB/N7+LMki8WqtsMps3o A==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983053" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983053" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542069" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:17 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 01/15] dmaengine: Remove dma_async_is_complete from client API Date: Wed, 22 Jun 2022 12:37:39 -0700 Message-Id: <20220622193753.3044206-2-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is never actually used by any existing DMA clients. It is only used, via dma_cookie_status, by providers. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 5 ++-- drivers/dma/amba-pl08x.c | 1 - drivers/dma/at_hdmac.c | 3 +- drivers/dma/dmaengine.h | 10 ++++++- include/linux/dmaengine.h | 28 ++----------------- 5 files changed, 15 insertions(+), 32 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index bfd057b21a000..85ecec2c40005 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -346,9 +346,8 @@ Further APIs the documentation in include/linux/dmaengine.h for a more complete description of this API. - This can be used in conjunction with dma_async_is_complete() and - the cookie returned from dmaengine_submit() to check for - completion of a specific DMA transaction. + This can be used with the cookie returned from dmaengine_submit() + to check for completion of a specific DMA transaction. .. note:: diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index a4a794e62ac26..bd361aee07db8 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1536,7 +1536,6 @@ static void pl08x_free_chan_resources(struct dma_chan *chan) } /* - * Code accessing dma_async_is_complete() in a tight loop may give problems. * If slaves are relying on interrupts to signal completion this function * must not be called with interrupts disabled. */ diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 5a50423b7378e..5ec9a36074771 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -1491,8 +1491,7 @@ static int atc_terminate_all(struct dma_chan *chan) * @txstate: if not %NULL updated with transaction state * * If @txstate is passed in, upon return it reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. + * internal state. */ static enum dma_status atc_tx_status(struct dma_chan *chan, diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index 53f16d3f00294..a2ce377e9ed0f 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -79,7 +79,15 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, state->residue = 0; state->in_flight_bytes = 0; } - return dma_async_is_complete(cookie, complete, used); + + if (complete <= used) { + if ((cookie <= complete) || (cookie > used)) + return DMA_COMPLETE; + } else { + if ((cookie <= complete) && (cookie > used)) + return DMA_COMPLETE; + } + return DMA_IN_PROGRESS; } static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index b46b88e6aa0d1..ea6ec2666eb15 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1446,9 +1446,9 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * - * If @last and @used are passed in, upon return they reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. + * If @last and @used are passed in, upon return they reflect the most + * recently submitted (used) cookie and the most recently completed + * cookie. */ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) @@ -1464,28 +1464,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -/** - * dma_async_is_complete - test a cookie against chan state - * @cookie: transaction identifier to test status of - * @last_complete: last know completed transaction - * @last_used: last cookie value handed out - * - * dma_async_is_complete() is used in dma_async_is_tx_complete() - * the test logic is separated for lightweight testing of multiple cookies - */ -static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, - dma_cookie_t last_complete, dma_cookie_t last_used) -{ - if (last_complete <= last_used) { - if ((cookie <= last_complete) || (cookie > last_used)) - return DMA_COMPLETE; - } else { - if ((cookie <= last_complete) && (cookie > last_used)) - return DMA_COMPLETE; - } - return DMA_IN_PROGRESS; -} - static inline void dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) { From patchwork Wed Jun 22 19:37:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BAD4C43334 for ; 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X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983061" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983061" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542073" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:19 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 02/15] dmaengine: Move dma_set_tx_state to the provider API header Date: Wed, 22 Jun 2022 12:37:40 -0700 Message-Id: <20220622193753.3044206-3-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is only used by DMA providers, not DMA clients. Move it next to the other cookie utility functions. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 11 +++++++++++ include/linux/dmaengine.h | 11 ----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index a2ce377e9ed0f..e72876a512a39 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -90,6 +90,17 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, return DMA_IN_PROGRESS; } +static inline void dma_set_tx_state(struct dma_tx_state *st, + dma_cookie_t last, dma_cookie_t used, u32 residue) +{ + if (!st) + return; + + st->last = last; + st->used = used; + st->residue = residue; +} + static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) { if (state) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index ea6ec2666eb15..f968f7671e22c 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1464,17 +1464,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -static inline void -dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->last = last; - st->used = used; - st->residue = residue; -} - #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Wed Jun 22 19:37:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3C95C43334 for ; Wed, 22 Jun 2022 19:38:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358273AbiFVTiX (ORCPT ); Wed, 22 Jun 2022 15:38:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358570AbiFVTiW (ORCPT ); Wed, 22 Jun 2022 15:38:22 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A840167FD; Wed, 22 Jun 2022 12:38:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926701; x=1687462701; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4QSuaH5P1V9uS0dSZnBNZ39kjP3dH2P2AHz6kFEzfGs=; b=bUN2qYUmg4fm+obhzfm8gC5R5Z8LJDuWu+sObidG+l9J8GVxNN1h51GK ihpnNewWe/W97vdhpZQVP3UsegUy2TpvRsDJAN97+juxxGHf5f18oc1ZF H50BMz8csG7K6XeaxvnFHEdbGSigcsG9JqhgV5eSO8imxdcN/rUQQR+BH OInYb9qCpyDJiUPwYPo7T7T9V+iBqHPMKW/IvrZ3nhSAzIpY3TsPo3ity dwnBSQgev1ncHgHwcr1OpysaO2B/XuuGQjMfDeVGo4+Uru1OVye8F+w9C qHPFMITG3mOXioZf1blHG0rRq0XKlnlssRVi26Mx8VbeHt0+YvngWg9cR w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983063" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983063" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542075" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:20 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 03/15] dmaengine: Add dmaengine_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:41 -0700 Message-Id: <20220622193753.3044206-4-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is the replacement for dma_async_is_tx_complete with two changes: 1) The name prefix is 'dmaengine' as per convention 2) It no longer reports the 'last' or 'used' cookie Drivers should convert to using dmaengine_async_is_tx_complete. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 19 ++++--------------- .../driver-api/dmaengine/provider.rst | 6 +++--- drivers/dma/dmaengine.c | 2 +- drivers/dma/dmatest.c | 3 +-- include/linux/dmaengine.h | 16 ++++++++++++++++ 5 files changed, 25 insertions(+), 21 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index 85ecec2c40005..9ae489a4ca97f 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -259,8 +259,8 @@ The details of these operations are: dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) - This returns a cookie can be used to check the progress of DMA engine - activity via other DMA engine calls not covered in this document. + This returns a cookie that can be used to check the progress of a transaction + via dmaengine_async_is_tx_complete(). dmaengine_submit() will not start the DMA operation, it merely adds it to the pending queue. For this, see step 5, dma_async_issue_pending. @@ -339,23 +339,12 @@ Further APIs .. code-block:: c - enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) - - This can be used to check the status of the channel. Please see - the documentation in include/linux/dmaengine.h for a more complete - description of this API. + enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) This can be used with the cookie returned from dmaengine_submit() to check for completion of a specific DMA transaction. - .. note:: - - Not all DMA engine drivers can return reliable information for - a running DMA channel. It is recommended that DMA engine users - pause or stop (via dmaengine_terminate_all()) the channel before - using this API. - 5. Synchronize termination API .. code-block:: c diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 1e0f1f85d10e5..610309276bc9c 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -549,10 +549,10 @@ where to put them) dma_cookie_t -- it's a DMA transaction ID that will increment over time. +- it's a DMA transaction ID. -- Not really relevant any more since the introduction of ``virt-dma`` - that abstracts it away. +- The value can be chosen by the provider, or use the helper APIs + such as dma_cookie_assign() and dma_cookie_complete(). DMA_CTRL_ACK diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index e80feeea0e018..f67a13c29d3f9 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -523,7 +523,7 @@ enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) dma_async_issue_pending(chan); do { - status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); if (time_after_eq(jiffies, dma_sync_wait_timeout)) { dev_err(chan->device->dev, "%s: timeout!\n", __func__); return DMA_ERROR; diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index 0a2168a4ccb0c..3ee47a72bf9d7 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -838,8 +838,7 @@ static int dmatest_func(void *data) done->done, msecs_to_jiffies(params->timeout)); - status = dma_async_is_tx_complete(chan, cookie, NULL, - NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); } if (!done->done) { diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index f968f7671e22c..44eb1df433e61 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1446,6 +1446,8 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * + * Note: This is deprecated. Use dmaengine_async_is_tx_complete instead. + * * If @last and @used are passed in, upon return they reflect the most * recently submitted (used) cookie and the most recently completed * cookie. @@ -1464,6 +1466,20 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } +/** + * dmaengine_async_is_tx_complete - poll for transaction completion + * @chan: DMA channel + * @cookie: transaction identifier to check status of + * + */ +static inline enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) +{ + struct dma_tx_state state; + + return chan->device->device_tx_status(chan, cookie, &state); +} + #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Wed Jun 22 19:37:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 920B8C43334 for ; Wed, 22 Jun 2022 19:39:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358818AbiFVTi6 (ORCPT ); Wed, 22 Jun 2022 15:38:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359141AbiFVTi0 (ORCPT ); Wed, 22 Jun 2022 15:38:26 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E44DD3DDCF; Wed, 22 Jun 2022 12:38:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926705; x=1687462705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SrqNYLhrIYTbLf+pLr5lA6vQS1PpkyYUL/1WuAbc1Ag=; b=MWs9LiOujiOhIkjSbaPy0AgY2djnX7OKK8nIHXn3OJNlTePcNtF6SrZF aPXp4JJvGES4MhmS7yHnHb8nXUIQqIPRPcrWKTaaYIGJza7+D3ASkzN0g 9SOnvIOxzpuTtAfH3XS17EollcgsYkCWzYDNNPBD6n4SqyMMeH1Y5zwB6 oyhPmoB1BCtUMRie5FkgQkNrYKQ9s652wfapJ5zHSc2DOzlt1il+maInm 4Zy2tCmOahIqLrOFO6w+4x4KYOts/QRZXIJyshQ1rkVnvolRkHSSdZx6N ymeCtjN/dTN7XPU9wo14/d9w4EsW0303h1B2c+teSSUs2QXvnCmPtR9SA w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983072" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983072" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542081" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:23 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v4 04/15] crypto: stm32/hash: Use dmaengine_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:42 -0700 Message-Id: <20220622193753.3044206-5-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Cc: linux-crypto@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Ben Walker --- drivers/crypto/stm32/stm32-hash.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c index d33006d43f761..aef447847c499 100644 --- a/drivers/crypto/stm32/stm32-hash.c +++ b/drivers/crypto/stm32/stm32-hash.c @@ -453,8 +453,7 @@ static int stm32_hash_xmit_dma(struct stm32_hash_dev *hdev, msecs_to_jiffies(100))) err = -ETIMEDOUT; - if (dma_async_is_tx_complete(hdev->dma_lch, cookie, - NULL, NULL) != DMA_COMPLETE) + if (dmaengine_async_is_tx_complete(hdev->dma_lch, cookie) != DMA_COMPLETE) err = -ETIMEDOUT; if (err) { From patchwork Wed Jun 22 19:37:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7210BC433EF for ; Wed, 22 Jun 2022 19:38:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230075AbiFVTi6 (ORCPT ); Wed, 22 Jun 2022 15:38:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359276AbiFVTid (ORCPT ); Wed, 22 Jun 2022 15:38:33 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAE1C1E3DF; Wed, 22 Jun 2022 12:38:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926705; x=1687462705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gbvWe3wuebpXvIG3UZFFzQ35e3K5lS8i3GMHJ5GABAs=; b=GbL3x+4mUkmP8wU9N1DeXcOo18uu6Sp+I8+RXC0SOyf7MUY1e4gd9c7Q 3FLDEjf/3afHJzdQQDrm5bu0WA4eDZj25yLlI422pfozCkr9X2HddmTPY kJfk6iqovFon69W55Nfotsj/5fd3WCO1sJmGIygsMl2LdAb4u+IuSxpx/ Xzf3a1qa9IFHOV/SiNwYcWgNLNNF3oDGMNG7Jv9KT9wVqpcf6JQpf4iG7 fw4Bjxj/5jrbBvIbnmlaVP3LlwAuhPr/lfrS48iv4xmk8SWruSAVxVH6Y 8LWm+0zsDzZvyr1bkaaGohA7jIllm+a3lscPAaI6GPO9y7rMRMS/KpKYK g==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983081" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983081" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542085" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:25 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v4 05/15] media: omap_vout: Use dmaengine_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:43 -0700 Message-Id: <20220622193753.3044206-6-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Cc: linux-media@vger.kernel.org Signed-off-by: Ben Walker --- drivers/media/platform/ti/omap/omap_vout_vrfb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/ti/omap/omap_vout_vrfb.c b/drivers/media/platform/ti/omap/omap_vout_vrfb.c index 0cfa0169875f0..b9d252d5ced7a 100644 --- a/drivers/media/platform/ti/omap/omap_vout_vrfb.c +++ b/drivers/media/platform/ti/omap/omap_vout_vrfb.c @@ -289,7 +289,7 @@ int omap_vout_prepare_vrfb(struct omap_vout_device *vout, vout->vrfb_dma_tx.tx_status == 1, VRFB_TX_TIMEOUT); - status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); if (vout->vrfb_dma_tx.tx_status == 0) { pr_err("%s: Timeout while waiting for DMA\n", __func__); From patchwork Wed Jun 22 19:37:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37F77CCA479 for ; Wed, 22 Jun 2022 19:39:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359030AbiFVTi7 (ORCPT ); Wed, 22 Jun 2022 15:38:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359422AbiFVTie (ORCPT ); Wed, 22 Jun 2022 15:38:34 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A5333FBDC; Wed, 22 Jun 2022 12:38:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926707; x=1687462707; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rxtiNyNtO5EyD9cgkO5xlvGIWGQfoth0aAfPim6bRtk=; b=Zz/xgudcs9GuUm5GHzhGvnww0QTGSv4PeIQOBuRggsKN2zwzAAxmtOYO 0ZjoyvREB5uVHEugoVpAt2oozlou0eYeH4Lai20vJtKjkdjCvNUhRPD9f ghep/E3sYffz8QAZ4whKhTBMPMJD/nbh5/n5iX+M+C98JeCSBFCfDC3Sf Hlc+UTz4wh8hF7zRc4gPdam0moUaQ/spTSOGiwad/+JhqsX7LwTWS5hCs nH+P9YU86sBfk/e53WOpc1ssHB0NV6ayf+xrNFAfC8xsu8sPjVI1tpS3W sAAPb0TVXQV2nxH0soH0yIwblmwU+sx6RnZ6YuzZmmMDUGB0tEQYLhil9 A==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983085" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983085" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542088" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:26 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, mporter@kernel.crashing.org Subject: [PATCH v4 06/15] rapidio: Use dmaengine_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:44 -0700 Message-Id: <20220622193753.3044206-7-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous API will be removed in favor of the new one. Cc: mporter@kernel.crashing.org Signed-off-by: Ben Walker --- drivers/rapidio/devices/rio_mport_cdev.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/rapidio/devices/rio_mport_cdev.c b/drivers/rapidio/devices/rio_mport_cdev.c index 2cdc054e53a53..d4108ff2bb74c 100644 --- a/drivers/rapidio/devices/rio_mport_cdev.c +++ b/drivers/rapidio/devices/rio_mport_cdev.c @@ -597,8 +597,7 @@ static void dma_xfer_callback(void *param) struct mport_dma_req *req = (struct mport_dma_req *)param; struct mport_cdev_priv *priv = req->priv; - req->status = dma_async_is_tx_complete(priv->dmach, req->cookie, - NULL, NULL); + req->status = dmaengine_async_is_tx_complete(priv->dmach, req->cookie); complete(&req->req_comp); kref_put(&req->refcount, dma_req_free); } From patchwork Wed Jun 22 19:37:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 229AAC43334 for ; Wed, 22 Jun 2022 19:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359261AbiFVTjB (ORCPT ); Wed, 22 Jun 2022 15:39:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359510AbiFVTie (ORCPT ); Wed, 22 Jun 2022 15:38:34 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 559503FBF2; Wed, 22 Jun 2022 12:38:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926708; x=1687462708; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z4XHvCp2tz/HRUiqGeVSctq6Lz1nKjefH4McWG6X49M=; b=fz/j4/JnaOve+KD0Of3TAwoyO/U1onwrg7Qirut7x6ybfQDDpR4NSlln /qz6sOWbNn3NHSHLb2sSUkJexLlQfhxGFXuJbPMICBQxH87eSogGZMlHv hEnoiMzrPan+/KkMmhDZljBj51QArquVvHshsUc1UXlRq/VMuowYC7XT8 wDAaFx4c/7srcBoRHbr8DwAf4A9EMaUXmEOmqF6Us0VAxl4H9KQ38htoN CiXBwdpg7FJp6Ezu1VYsxO3rabM8ac0CIWXqTTpSmyyMTyLUsXyYPOtcq b/VeO0GkTUQK99ZpK9nAfHv7hQm5a/atMLqtpYgUdI/CZnogqfyZM/fST w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983091" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983091" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542092" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:27 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Subject: [PATCH v4 07/15] media: pxa_camera: Use dmaengine_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:45 -0700 Message-Id: <20220622193753.3044206-8-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Replace dma_async_is_tx_complete with dmaengine_async_is_tx_complete. The previous PAI will be removed in favor of the new one. Cc: linux-media@vger.kernel.org Signed-off-by: Ben Walker --- drivers/media/platform/intel/pxa_camera.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/intel/pxa_camera.c b/drivers/media/platform/intel/pxa_camera.c index 35145e3348f0e..0880bf2baa339 100644 --- a/drivers/media/platform/intel/pxa_camera.c +++ b/drivers/media/platform/intel/pxa_camera.c @@ -1048,9 +1048,18 @@ static void pxa_camera_dma_irq(struct pxa_camera_dev *pcdev, } last_buf = list_entry(pcdev->capture.prev, struct pxa_buffer, queue); - last_status = dma_async_is_tx_complete(pcdev->dma_chans[chan], - last_buf->cookie[chan], - NULL, &last_issued); + last_status = dmaengine_async_is_tx_complete(pcdev->dma_chans[chan], + last_buf->cookie[chan]); + /* + * Peek into the channel and read the last cookie that was issued. + * This is a layering violation - the dmaengine API does not officially + * provide this information. Since this camera driver is tightly coupled + * with a specific DMA device we know exactly how this cookie value will + * behave. Otherwise, this wouldn't be safe. + */ + last_issued = pcdev->dma_chans[chan]->cookie; + barrier(); + if (camera_status & overrun && last_status != DMA_COMPLETE) { dev_dbg(pcdev_to_dev(pcdev), "FIFO overrun! CISR: %x\n", From patchwork Wed Jun 22 19:37:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF718C3F2D4 for ; Wed, 22 Jun 2022 19:39:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359105AbiFVTjA (ORCPT ); Wed, 22 Jun 2022 15:39:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359565AbiFVTie (ORCPT ); Wed, 22 Jun 2022 15:38:34 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D7733FBF9; Wed, 22 Jun 2022 12:38:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926708; x=1687462708; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=22nHq2RPTYBl+xCBcNB+uv2lzSC2PKfcu0Pva/vEmZc=; b=GQSw9aP6MDjJXW5KxwpLTNo/p1lL6J3To/XcPL3RNHjhLmnKKnXP3U2u gcFmPSnBW5vUvInDo6XwETgeqQIqUeJGADJlmqvyocjRSiauYH2qxv94H BwGiQ7YIvx3HNnaJvCw1V8eOzPSfxEV44OF8Y2PvwMxFl/esMfyMdfuzL wrTTxIdy0P5TbjPzD03BBfH8lxZNbfSsjJYLUmLlCCKgONoZV976L/mBJ PWwrr+qLXNHKt9wmzEfvtpAfwkIA8V7fpzlFu4ReAdeosh0iYzmXsfEhr 940SWRkBDM3NYDERjQ8vwBtty+E7TRWiL9AVL7R2LPBZ0YxQMtXGJ5905 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983099" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983099" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542095" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:28 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 08/15] dmaengine: Remove dma_async_is_tx_complete Date: Wed, 22 Jun 2022 12:37:46 -0700 Message-Id: <20220622193753.3044206-9-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Everything has now been converted over to dmaengine_async_is_tx_complete, so this can be removed. Signed-off-by: Ben Walker --- include/linux/dmaengine.h | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 44eb1df433e61..c34f21d19c423 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1439,33 +1439,6 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) chan->device->device_issue_pending(chan); } -/** - * dma_async_is_tx_complete - poll for transaction completion - * @chan: DMA channel - * @cookie: transaction identifier to check status of - * @last: returns last completed cookie, can be NULL - * @used: returns last issued cookie, can be NULL - * - * Note: This is deprecated. Use dmaengine_async_is_tx_complete instead. - * - * If @last and @used are passed in, upon return they reflect the most - * recently submitted (used) cookie and the most recently completed - * cookie. - */ -static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) -{ - struct dma_tx_state state; - enum dma_status status; - - status = chan->device->device_tx_status(chan, cookie, &state); - if (last) - *last = state.last; - if (used) - *used = state.used; - return status; -} - /** * dmaengine_async_is_tx_complete - poll for transaction completion * @chan: DMA channel From patchwork Wed Jun 22 19:37:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4ABDC43334 for ; Wed, 22 Jun 2022 20:05:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234514AbiFVUFR (ORCPT ); Wed, 22 Jun 2022 16:05:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359595AbiFVTif (ORCPT ); Wed, 22 Jun 2022 15:38:35 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1F4C3FD88; Wed, 22 Jun 2022 12:38:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926709; x=1687462709; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IWEAw0BMzgbgDY1rwfN7uYNpUJiLcW/iUQ1Hnk7la2k=; b=HrQ7LWP/OX/1yIB0icKU98J+jztuKO32SLlqIngKMr91OnyuIO7brStr t5PEvUBBXm4cAnRT5EbTCGimXrZ4IvlWreOZsGQ22ml5x3cqkeMCEPUj0 //9Y2YrkJh3jZX1ip6R2dktVpdnry5E14SD2xosws+KGSclPBlBkWcoFD pMT/i6qx7zGuUpkR16FMVB1SkVkHj8lpEuINKJf+XOYnymn+OuAT8LY4q nVReOEMpckzfsdSHdMEzYTzGlu9MVkHEDU4d7Wwnu+0HbaXp+R4oNgzYk gPhh+qQM+OMEqvH97LYLQQ40waaDsETrgJItgaolxuVAwiBT6tD4Fy92W A==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983101" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983101" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542100" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:29 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 09/15] dmaengine: Remove last, used from dma_tx_state Date: Wed, 22 Jun 2022 12:37:47 -0700 Message-Id: <20220622193753.3044206-10-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Nothing uses these and they don't convey usable information. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 4 ---- include/linux/dmaengine.h | 4 ---- 2 files changed, 8 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index e72876a512a39..08c7bd7cfc229 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -74,8 +74,6 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, complete = chan->completed_cookie; barrier(); if (state) { - state->last = complete; - state->used = used; state->residue = 0; state->in_flight_bytes = 0; } @@ -96,8 +94,6 @@ static inline void dma_set_tx_state(struct dma_tx_state *st, if (!st) return; - st->last = last; - st->used = used; st->residue = residue; } diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index c34f21d19c423..e3e5311b6bb64 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -716,16 +716,12 @@ static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descr /** * struct dma_tx_state - filled in to report the status of * a transfer. - * @last: last completed DMA cookie - * @used: last issued DMA cookie (i.e. the one in progress) * @residue: the remaining number of bytes left to transmit * on the selected transfer for states DMA_IN_PROGRESS and * DMA_PAUSED if this is implemented in the driver, else 0 * @in_flight_bytes: amount of data in bytes cached by the DMA. */ struct dma_tx_state { - dma_cookie_t last; - dma_cookie_t used; u32 residue; u32 in_flight_bytes; }; From patchwork Wed Jun 22 19:37:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79BA1CCA479 for ; Wed, 22 Jun 2022 19:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358574AbiFVTjG (ORCPT ); Wed, 22 Jun 2022 15:39:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359790AbiFVTig (ORCPT ); Wed, 22 Jun 2022 15:38:36 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 06A3D3FD96; Wed, 22 Jun 2022 12:38:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926711; x=1687462711; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=x05dcZfiGIHrcQ8Qy7jUQiCF+0Y+ROMG13iEPHFLY5o=; b=H58pvu2Pi62gDKtyr17Heh/ntRROsFbfiu4Uk7SF2+J3k6M3dhzkOujQ sKpDYwSxL7aKqEH3bHctV62MzFrIffOsKLGDb201oXN3A94lwA076ie04 cFVjGxnME5RjLodKVbJB9IZ1bqCw6EtixupFvAYMXpFiYtkIRPL19xILl dv+bBPEiJrm0VCq5SLY8g/wLdrBqf4bv643ZI6SFaYvwch6fcm7evQqHL UqIYpxZsgzamO31mz6UjghRkH5LTFBtc0R4T7ZG83uJuBAN6YDn2zlpOl 1CN71aSdAMJLBNKMRYHp81nnTVVJ2eh6CXyWP/zQe1oN7PPsCzwT4RWDT g==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983105" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983105" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542101" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:30 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/15] dmaengine: Providers should prefer dma_set_residue over dma_set_tx_state Date: Wed, 22 Jun 2022 12:37:48 -0700 Message-Id: <20220622193753.3044206-11-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The dma_set_tx_state function will go away shortly. The two functions are functionally equivalent. Signed-off-by: Ben Walker --- drivers/dma/imx-sdma.c | 3 +-- drivers/dma/mmp_tdma.c | 3 +-- drivers/dma/mxs-dma.c | 3 +-- 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 8535018ee7a2e..f2de1836dbd34 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -1816,8 +1816,7 @@ static enum dma_status sdma_tx_status(struct dma_chan *chan, spin_unlock_irqrestore(&sdmac->vc.lock, flags); - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - residue); + dma_set_residue(txstate, residue); return sdmac->status; } diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c index a262e0eb4cc94..753b431ca206b 100644 --- a/drivers/dma/mmp_tdma.c +++ b/drivers/dma/mmp_tdma.c @@ -539,8 +539,7 @@ static enum dma_status mmp_tdma_tx_status(struct dma_chan *chan, struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); tdmac->pos = mmp_tdma_get_pos(tdmac); - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - tdmac->buf_len - tdmac->pos); + dma_set_residue(txstate, tdmac->buf_len - tdmac->pos); return tdmac->status; } diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c index 994fc4d2aca42..ab9eca6d682dc 100644 --- a/drivers/dma/mxs-dma.c +++ b/drivers/dma/mxs-dma.c @@ -664,8 +664,7 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan, residue -= bar; } - dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, - residue); + dma_set_residue(txstate, residue); return mxs_chan->status; } From patchwork Wed Jun 22 19:37:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43DC4C433EF for ; Wed, 22 Jun 2022 19:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359139AbiFVTjF (ORCPT ); Wed, 22 Jun 2022 15:39:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359791AbiFVTig (ORCPT ); Wed, 22 Jun 2022 15:38:36 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B4863FD9C; Wed, 22 Jun 2022 12:38:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926712; x=1687462712; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EnJ5Su7RR3jjj7To4p4p1aGGCrzCsNhKtD7qZhiBzvo=; b=Sjze+mQBQsh2D+dsaQwdj8Ddsp+xiVrKOrGsEY49cxito6hnpeHb4R/u cnAZdByUX6o0oJmgeCEoqKKKuwwOilNrmNDT3TAQNc5wSqrrpq1xYRkE7 PBgdwuvTkxJDOjIyjw6UeQjTACMu9JkVTVvc1FJLAzOAiIpfIJrjDVZP0 FcdeqedqrzgsDFVuVlne/Lpcw5xLt9YJzjvwJMdt4KU17ldsQplPHWO5q kiM+O9vUmj6As/1HC8iCcUk19QwqbUEtGkjKs8pykMc1cFO2Ej+1UT3o9 QKt7MWAWgCN++HPS2pCBZ2Dkyag+qedAN7LWaE3r6d0Zunp9xfBZk60de w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983108" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983108" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542102" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:31 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 11/15] dmaengine: Remove dma_set_tx_state Date: Wed, 22 Jun 2022 12:37:49 -0700 Message-Id: <20220622193753.3044206-12-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Nothing calls this anymore. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index 08c7bd7cfc229..7a5203175e6a8 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -88,15 +88,6 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, return DMA_IN_PROGRESS; } -static inline void dma_set_tx_state(struct dma_tx_state *st, - dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->residue = residue; -} - static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) { if (state) From patchwork Wed Jun 22 19:37:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 987D4C43334 for ; Wed, 22 Jun 2022 19:39:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357100AbiFVTjE (ORCPT ); Wed, 22 Jun 2022 15:39:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359813AbiFVTih (ORCPT ); Wed, 22 Jun 2022 15:38:37 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F2493FD9D; Wed, 22 Jun 2022 12:38:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926713; x=1687462713; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0WsFvoGYgiGnVS8P+Hg1gGwngMRIqqhXjP5myyi7RDo=; b=ftZWgoS3TnS5AtX6idgjnuPakl6v6SuMcTou5qvAXirkFgcb3DtYuXVl 88yPU2vquPEXgJrE8EAkkyyZSVJ2rS3WM9xPnntgAKixENG53s7zptuR4 TMc83iLAsi5Ka0Fk3H9oGy6uPctV8tMo26qpkeuxjsMW89Z5O0tcGMcqh DDwLfGdcpzpzG/4ZIwpaFF8dSko9VUiRbYfyZ36wQWzR1RdNB3OG2gAuv W5wjHaRqrghZn0zrT+fcEGVFcFuwnThipqgZXeMK/YT5ZzYvqzIiVGUAt XKprBYz6Z/eoQfip5dDtuEyMefQB5nNXtYt3nX5FsJeeRejWJihHFy/i6 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983110" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983110" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542103" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:32 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 12/15] dmaengine: Add provider documentation on cookie assignment Date: Wed, 22 Jun 2022 12:37:50 -0700 Message-Id: <20220622193753.3044206-13-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Clarify the rules on assigning cookies to DMA transactions. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 45 +++++++++++++++---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 610309276bc9c..db019ec492b58 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -427,7 +427,9 @@ supported. - tx_submit: A pointer to a function you have to implement, that is supposed to push the current transaction descriptor to a - pending queue, waiting for issue_pending to be called. + pending queue, waiting for issue_pending to be called. Each + descriptor is given a cookie to identify it. See the section + "Cookie Management" below. - In this structure the function pointer callback_result can be initialized in order for the submitter to be notified that a @@ -532,6 +534,40 @@ supported. - May sleep. +Cookie Management +------------------ + +When a transaction is queued for submission via tx_submit(), the provider +must assign that transaction a cookie (dma_cookie_t) to uniquely identify it. +The provider is allowed to perform this assignment however it wants, but for +convenience the following utility functions are available to create +monotonically increasing cookies + + .. code-block:: c + + void dma_cookie_init(struct dma_chan *chan); + + Called once at channel creation + + .. code-block:: c + + dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx); + + Assign a cookie to the given descriptor + + .. code-block:: c + + void dma_cookie_complete(struct dma_async_tx_descriptor *tx); + + Mark the descriptor as complete and invalidate the cookie + + .. code-block:: c + + enum dma_status dma_cookie_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *state); + + Report the status of the cookie and filling in state, if not NULL. + Misc notes ========== @@ -547,13 +583,6 @@ where to put them) - Makes sure that dependent operations are run before marking it as complete. -dma_cookie_t - -- it's a DMA transaction ID. - -- The value can be chosen by the provider, or use the helper APIs - such as dma_cookie_assign() and dma_cookie_complete(). - DMA_CTRL_ACK - If clear, the descriptor cannot be reused by provider until the From patchwork Wed Jun 22 19:37:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E875ACCA47E for ; Wed, 22 Jun 2022 19:39:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359490AbiFVTjG (ORCPT ); Wed, 22 Jun 2022 15:39:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359854AbiFVTih (ORCPT ); Wed, 22 Jun 2022 15:38:37 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4CD4517E0E; Wed, 22 Jun 2022 12:38:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926714; x=1687462714; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b2jYdUokYSrhLLJ65hnYCKypoanrr8xEmX1WraLh+kI=; b=XhWTImSyKzEAZGaufTfISFbQHCzPjilYzwtGxHs900QtUjUVMODUUHeG 1PUiqDCtUIy24S4z57oVkFEIoqrRRLKUjmXaEAGgf4m7X92VRLvGXXfAF Tztqkdd4usw9EBtqTULzA9SECMux5CzDoKZYQFkkr3rXNDm2ra1cLcGOb vTBG5/gqpeXV9iVzobqAPjeS2bNIwBFI9+frz/YH/l3fuNzcxEHvQ+68U zhB8+xDXVFuMcgSEELWEEb8wmCJtItXCiazFU//eLywKbHUCS9xTM/+kp jQPtG8nbIkUZ7EFt7HOcJnyyyfp9wlznBm1+qdh+LPYVXmZHG4gw5ZBef g==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983112" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983112" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542104" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:33 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 13/15] dmaengine: idxd: idxd_desc.id is now a u16 Date: Wed, 22 Jun 2022 12:37:51 -0700 Message-Id: <20220622193753.3044206-14-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is going to be packed into the cookie. It does not need to be negative or larger than u16. Signed-off-by: Ben Walker --- drivers/dma/idxd/idxd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index fed0dfc1eaa83..bd93ada32c89d 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -325,7 +325,7 @@ struct idxd_desc { struct dma_async_tx_descriptor txd; struct llist_node llnode; struct list_head list; - int id; + u16 id; int cpu; struct idxd_wq *wq; }; From patchwork Wed Jun 22 19:37:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAC09CCA47F for ; Wed, 22 Jun 2022 19:39:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358570AbiFVTjD (ORCPT ); Wed, 22 Jun 2022 15:39:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359840AbiFVTih (ORCPT ); Wed, 22 Jun 2022 15:38:37 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 400421570D; Wed, 22 Jun 2022 12:38:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926715; x=1687462715; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=heNZ3ldVGFsCnCJbujwBHGTHwI0k3/obOMtrSos/hpM=; b=IdWdCkP4XUt25Crh42uq8oAvU0fCiCy6gAZqdBzhupLOnrntGbOp1eD9 j/hLM+yKYmp9yAjdsCuL4dBdyFJ38WkOPGyShZYPY9iAx/1L78hxoqkYu zinoQY+JFcqM2oUKDxvLrriQyeCXYOxM6UfGBib4NcPR3sIT97fTcO6PB U3Rot9i3suY3c498JHBN9EeZwm5qHMsNvA0gpNmbGp5ULfTfv3/1Olzd4 s6RM0F9W3ZbdqnPP1tvwQi/YpQ+ppw6zUrpHtXgP2dinq+YRBELDBW4hI rNQ6FvlcxxM4kbVAhJNc8gFO6YcNzmQC+YbPJyXuxvrPvfxeR2EA16TwI w==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983114" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983114" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542106" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:34 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 14/15] dmaengine: idxd: Support device_tx_status Date: Wed, 22 Jun 2022 12:37:52 -0700 Message-Id: <20220622193753.3044206-15-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This can now be supported even for devices that complete operations out of order. Add support for directly polling transactions. Signed-off-by: Ben Walker --- drivers/dma/idxd/device.c | 1 + drivers/dma/idxd/dma.c | 85 ++++++++++++++++++++++++++++++++++++++- drivers/dma/idxd/idxd.h | 1 + 3 files changed, 85 insertions(+), 2 deletions(-) diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c index ff0ea60051f0c..3c61eac0b05c7 100644 --- a/drivers/dma/idxd/device.c +++ b/drivers/dma/idxd/device.c @@ -148,6 +148,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq) desc->iax_completion = &wq->iax_compls[i]; desc->compl_dma = wq->compls_addr + idxd->data->compl_size * i; desc->id = i; + desc->gen = 1; desc->wq = wq; desc->cpu = -1; } diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index e0874cb4721c8..dda5342d273f4 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -12,6 +12,23 @@ #include "registers.h" #include "idxd.h" + +#define DMA_COOKIE_BITS (sizeof(dma_cookie_t) * 8) +/* + * The descriptor id takes the lower 16 bits of the cookie. + */ +#define DESC_ID_BITS 16 +#define DESC_ID_MASK ((1 << DESC_ID_BITS) - 1) +/* + * The 'generation' is in the upper half of the cookie. But dma_cookie_t + * is signed, so we leave the upper-most bit for the sign. Further, we + * need to flag whether a cookie corresponds to an operation that is + * being completed via interrupt to avoid polling it, which takes + * the second most upper bit. So we subtract two bits from the upper half. + */ +#define DESC_GEN_MAX ((1 << (DMA_COOKIE_BITS - DESC_ID_BITS - 2)) - 1) +#define DESC_INTERRUPT_FLAG (1 << (DMA_COOKIE_BITS - 2)) + static inline struct idxd_wq *to_idxd_wq(struct dma_chan *c) { struct idxd_dma_chan *idxd_chan; @@ -158,13 +175,67 @@ static void idxd_dma_free_chan_resources(struct dma_chan *chan) idxd_wq_refcount(wq)); } + static enum dma_status idxd_dma_tx_status(struct dma_chan *dma_chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { - return DMA_OUT_OF_ORDER; + u8 status; + struct idxd_wq *wq; + struct idxd_desc *desc; + u32 idx; + + memset(txstate, 0, sizeof(*txstate)); + + if (dma_submit_error(cookie)) + return DMA_ERROR; + + wq = to_idxd_wq(dma_chan); + + idx = cookie & DESC_ID_MASK; + if (idx >= wq->num_descs) + return DMA_ERROR; + + desc = wq->descs[idx]; + + if (desc->txd.cookie != cookie) { + /* + * The user asked about an old transaction + */ + return DMA_COMPLETE; + } + + /* + * For descriptors completed via interrupt, we can't go + * look at the completion status directly because it races + * with the IRQ handler recyling the descriptor. However, + * since in this case we can rely on the interrupt handler + * to invalidate the cookie when the command completes we + * know that if we get here, the command is still in + * progress. + */ + if ((cookie & DESC_INTERRUPT_FLAG) != 0) + return DMA_IN_PROGRESS; + + status = desc->completion->status & DSA_COMP_STATUS_MASK; + + if (status) { + /* + * Check against the original status as ABORT is software defined + * and 0xff, which DSA_COMP_STATUS_MASK can mask out. + */ + if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) + idxd_dma_complete_txd(desc, IDXD_COMPLETE_ABORT, true); + else + idxd_dma_complete_txd(desc, IDXD_COMPLETE_NORMAL, true); + + return DMA_COMPLETE; + } + + return DMA_IN_PROGRESS; } + /* * issue_pending() does not need to do anything since tx_submit() does the job * already. @@ -181,7 +252,17 @@ static dma_cookie_t idxd_dma_tx_submit(struct dma_async_tx_descriptor *tx) int rc; struct idxd_desc *desc = container_of(tx, struct idxd_desc, txd); - cookie = dma_cookie_assign(tx); + cookie = (desc->gen << DESC_ID_BITS) | (desc->id & DESC_ID_MASK); + + if ((desc->hw->flags & IDXD_OP_FLAG_RCI) != 0) + cookie |= DESC_INTERRUPT_FLAG; + + if (desc->gen == DESC_GEN_MAX) + desc->gen = 1; + else + desc->gen++; + + tx->cookie = cookie; rc = idxd_submit_desc(wq, desc); if (rc < 0) { diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index bd93ada32c89d..d4f0227895075 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -326,6 +326,7 @@ struct idxd_desc { struct llist_node llnode; struct list_head list; u16 id; + u16 gen; int cpu; struct idxd_wq *wq; }; From patchwork Wed Jun 22 19:37:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12891432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B98CCCA483 for ; Wed, 22 Jun 2022 19:39:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359299AbiFVTjC (ORCPT ); Wed, 22 Jun 2022 15:39:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1359864AbiFVTih (ORCPT ); Wed, 22 Jun 2022 15:38:37 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53EE1167EC; Wed, 22 Jun 2022 12:38:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655926716; x=1687462716; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OOQALfgmATaUv4VRkx7rlx6lJnuZeTGNaW9g/kaaH/U=; b=iQrtXZ7h37RVelukEcW2Jk+pi8XeT/NeO6lF31rsH3WRAa5qiNrYY1Zg 5iCuL9lW8+OBMYiZW+e0ldCZzJFtKaLsSEDhZ0m5x57O4Tla4FnYlFy9o xOFmK606yMTe+U0McLBeWTSEGrTIu7rLbQ293oKU4GcrtFg5A7Z0dj+TI MwmqKJzajiDSBcv12ZpYVGPl/SVoJW058E+zWq0SlX1dT0Eeo7G1sMVyN 4Ds+GVr5ubAK04iBUNt7yP+VmWhC9R30DK20nxLGsV44W9i+4yq9Fj1gu mAeRMPEXhuBDqz4Y1YRs7kyAsPsvryWan7wcWcHrdD+BK0glB+bfr4sLy A==; X-IronPort-AV: E=McAfee;i="6400,9594,10386"; a="305983117" X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="305983117" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jun 2022 12:38:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,212,1650956400"; d="scan'208";a="715542107" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by orsmga004.jf.intel.com with ESMTP; 22 Jun 2022 12:38:35 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 15/15] dmaengine: Revert "cookie bypass for out of order completion" Date: Wed, 22 Jun 2022 12:37:53 -0700 Message-Id: <20220622193753.3044206-16-benjamin.walker@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220622193753.3044206-1-benjamin.walker@intel.com> References: <20220503200728.2321188-1-benjamin.walker@intel.com> <20220622193753.3044206-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This reverts commit 47ec7f09bc107720905c96bc37771e4ed1ff0aed. This is no longer necessary now that all assumptions about the order of completions have been removed from the dmaengine client API. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 19 ------------------- drivers/dma/dmatest.c | 11 +---------- drivers/dma/idxd/dma.c | 1 - include/linux/dmaengine.h | 2 -- 4 files changed, 1 insertion(+), 32 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index db019ec492b58..8565241270a62 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -268,22 +268,6 @@ Currently, the types available are: want to transfer a portion of uncompressed data directly to the display to print it -- DMA_COMPLETION_NO_ORDER - - - The device does not support in order completion. - - - The driver should return DMA_OUT_OF_ORDER for device_tx_status if - the device is setting this capability. - - - All cookie tracking and checking API should be treated as invalid if - the device exports this capability. - - - At this point, this is incompatible with polling option for dmatest. - - - If this cap is set, the user is recommended to provide an unique - identifier for each descriptor sent to the DMA device in order to - properly track the completion. - - DMA_REPEAT - The device supports repeated transfers. A repeated transfer, indicated by @@ -467,9 +451,6 @@ supported. - In the case of a cyclic transfer, it should only take into account the total size of the cyclic buffer. - - Should return DMA_OUT_OF_ORDER if the device does not support in order - completion and is completing the operation out of order. - - This function can be called in an interrupt context. - device_config diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index 3ee47a72bf9d7..d34e7a9b63d89 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -845,10 +845,7 @@ static int dmatest_func(void *data) result("test timed out", total_tests, src->off, dst->off, len, 0); goto error_unmap_continue; - } else if (status != DMA_COMPLETE && - !(dma_has_cap(DMA_COMPLETION_NO_ORDER, - dev->cap_mask) && - status == DMA_OUT_OF_ORDER)) { + } else if (status != DMA_COMPLETE) { result(status == DMA_ERROR ? "completion error status" : "completion busy status", total_tests, src->off, @@ -1027,12 +1024,6 @@ static int dmatest_add_channel(struct dmatest_info *info, dtc->chan = chan; INIT_LIST_HEAD(&dtc->threads); - if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) && - info->params.polled) { - info->params.polled = false; - pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n"); - } - if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { if (dmatest == 0) { cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index dda5342d273f4..49e863abd50cd 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -297,7 +297,6 @@ int idxd_register_dma_device(struct idxd_device *idxd) dma_cap_set(DMA_INTERRUPT, dma->cap_mask); dma_cap_set(DMA_PRIVATE, dma->cap_mask); - dma_cap_set(DMA_COMPLETION_NO_ORDER, dma->cap_mask); dma->device_release = idxd_dma_release; dma->device_prep_dma_interrupt = idxd_dma_prep_interrupt; diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index e3e5311b6bb64..136c7afbcc385 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -39,7 +39,6 @@ enum dma_status { DMA_IN_PROGRESS, DMA_PAUSED, DMA_ERROR, - DMA_OUT_OF_ORDER, }; /** @@ -63,7 +62,6 @@ enum dma_transaction_type { DMA_SLAVE, DMA_CYCLIC, DMA_INTERLEAVE, - DMA_COMPLETION_NO_ORDER, DMA_REPEAT, DMA_LOAD_EOT, /* last transaction type for creation of the capabilities mask */