From patchwork Tue Jul 24 02:47:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10541317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7C20F13BB for ; Tue, 24 Jul 2018 02:48:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 649AA28676 for ; Tue, 24 Jul 2018 02:48:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 57CF028680; Tue, 24 Jul 2018 02:48:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3433B28676 for ; Tue, 24 Jul 2018 02:48:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388367AbeGXDwo (ORCPT ); Mon, 23 Jul 2018 23:52:44 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:41778 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388366AbeGXDwo (ORCPT ); Mon, 23 Jul 2018 23:52:44 -0400 Received: by mail-pg1-f196.google.com with SMTP id z8-v6so1752510pgu.8 for ; Mon, 23 Jul 2018 19:48:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6DV7W+akCn1JXYX6cY44SjkWu2aP6JR6coSCc77p/6o=; b=TbtQrpn+LgjRf/TuRvt4dBxGop97AHuQroyZdrBFltWxxr6cK/nly01S9TEkc+0+zu XCZi5CC3dTZBNrjIyV3BVEOBWBN7Qj0m4qrWxfzVLNyBqob9S5+0+dXQt36KVZOJW9MJ R4fYmP/hny1RRfe59R8HOhOuaRmBuHKrxLYgA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6DV7W+akCn1JXYX6cY44SjkWu2aP6JR6coSCc77p/6o=; b=rLJFlDQxpRtt2Igv05+NBqoXhH3dNI2EAkkZwch8bYuqEYTN0ONKwxXRabdHRjSciO uV80nUHKXiNIoS5+E2P0ZwYFusJhokXBttwHr0om4btAM7kjCmPuATqoAMOrn9KyznRL UBUxQ2lbPO9pgUzfB7eIcANaK/xT5uKP6Kjn7k67CbmLAdUEoFrEgwwU01TF5Ge1oeuQ nh2+sj2ia1CP3gpF0pYmCNehN4Ke+heADrsTN2OvfD7kejMkCQTOmx2VXZT9fchewqYh /br519IE55ANjlY43nlqU1Dm9V1dBBxqAW/rV6wpNMWZXfSEhdQ+C+7wKDJHr7lQMot3 VODg== X-Gm-Message-State: AOUpUlHouGt8ulp+Vos/Q//m1rxjA7Roxx6WNDGswIECjvYMCPlvGxJS gBB1+57cC49TDdHfdExVs9R1eA== X-Google-Smtp-Source: AAOMgpekA8s3ip9Yy9D9QFa/ObrwxZ0pSrLXsPLifMsIx59qu7feJEBqIP6ogfqa6xsWUS8F5KImCQ== X-Received: by 2002:aa7:8713:: with SMTP id b19-v6mr15686241pfo.151.1532400512758; Mon, 23 Jul 2018 19:48:32 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id k12-v6sm16540836pfj.30.2018.07.23.19.48.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 19:48:31 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 2/7] mmc: sdhci: Change SDMA address register for v4 mode Date: Tue, 24 Jul 2018 10:47:59 +0800 Message-Id: <1532400479-23216-1-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-3-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-3-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to the SD host controller specification version 4.10, when Host Version 4 is enabled, SDMA uses ADMA System Address register (05Fh-058h) instead of using SDMA System Address register to support both 32-bit and 64-bit addressing. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index cab5350..b7ad8e5 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -729,7 +729,7 @@ static void sdhci_adma_table_post(struct sdhci_host *host, } } -static u32 sdhci_sdma_address(struct sdhci_host *host) +static dma_addr_t sdhci_sdma_address(struct sdhci_host *host) { if (host->bounce_buffer) return host->bounce_addr; @@ -737,6 +737,18 @@ static u32 sdhci_sdma_address(struct sdhci_host *host) return sg_dma_address(host->data->sg); } +static void sdhci_set_sdma_addr(struct sdhci_host *host, dma_addr_t addr) +{ + if (host->v4_mode) { + sdhci_writel(host, addr, SDHCI_ADMA_ADDRESS); + if (host->flags & SDHCI_USE_64_BIT_DMA) + sdhci_writel(host, (u64)addr >> 32, SDHCI_ADMA_ADDRESS_HI); + } else { + sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); + } + +} + static unsigned int sdhci_target_timeout(struct sdhci_host *host, struct mmc_command *cmd, struct mmc_data *data) @@ -996,8 +1008,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) SDHCI_ADMA_ADDRESS_HI); } else { WARN_ON(sg_cnt != 1); - sdhci_writel(host, sdhci_sdma_address(host), - SDHCI_DMA_ADDRESS); + sdhci_set_sdma_addr(host, sdhci_sdma_address(host)); } } @@ -2824,7 +2835,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) * some controllers are faulty, don't trust them. */ if (intmask & SDHCI_INT_DMA_END) { - u32 dmastart, dmanow; + dma_addr_t dmastart, dmanow; dmastart = sdhci_sdma_address(host); dmanow = dmastart + host->data->bytes_xfered; @@ -2832,12 +2843,12 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) * Force update to the next DMA block boundary. */ dmanow = (dmanow & - ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + + ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + SDHCI_DEFAULT_BOUNDARY_SIZE; host->data->bytes_xfered = dmanow - dmastart; - DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n", - dmastart, host->data->bytes_xfered, dmanow); - sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); + DBG("DMA base %pad, transferred 0x%06x bytes, next %pad\n", + &dmastart, host->data->bytes_xfered, &dmanow); + sdhci_set_sdma_addr(host, dmanow); } if (intmask & SDHCI_INT_DATA_END) { @@ -3581,8 +3592,8 @@ int sdhci_setup_host(struct sdhci_host *host) } } - /* SDMA does not support 64-bit DMA */ - if (host->flags & SDHCI_USE_64_BIT_DMA) + /* SDMA does not support 64-bit DMA if v4 mode not set */ + if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) host->flags &= ~SDHCI_USE_SDMA; if (host->flags & SDHCI_USE_ADMA) { From patchwork Tue Jul 24 02:51:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10541321 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 470BA112E for ; Tue, 24 Jul 2018 02:51:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3770E2873E for ; Tue, 24 Jul 2018 02:51:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2BD0B28714; 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Mon, 23 Jul 2018 19:51:28 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id y132-v6sm14770373pfb.91.2018.07.23.19.51.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 19:51:27 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 4/7] mmc: sdhci: add 32-bit block count support for v4 mode Date: Tue, 24 Jul 2018 10:51:11 +0800 Message-Id: <1532400671-23429-1-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-5-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-5-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Host Controller Version 4.10 re-defines SDMA System Address register as 32-bit Block Count for v4 mode, and SDMA uses ADMA System Address register (05Fh-058h) instead if v4 mode is enabled. Also when using 32-bit block count, 16-bit block count register need to be set to zero. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 14 +++++++++++++- drivers/mmc/host/sdhci.h | 1 + 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 920d8ec..c272a2b 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1070,7 +1070,19 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) /* Set the DMA boundary value and block size */ sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), SDHCI_BLOCK_SIZE); - sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + + /* + * For Version 4.10 onwards, if v4 mode is enabled, 16-bit Block Count + * register need to be set to zero, 32-bit Block Count register would + * be selected. + */ + if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { + if (sdhci_readw(host, SDHCI_BLOCK_COUNT)) + sdhci_writew(host, 0, SDHCI_BLOCK_COUNT); + sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); + } else { + sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); + } } static inline bool sdhci_auto_cmd12(struct sdhci_host *host, diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 23318ff..81aae07 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -28,6 +28,7 @@ #define SDHCI_DMA_ADDRESS 0x00 #define SDHCI_ARGUMENT2 SDHCI_DMA_ADDRESS +#define SDHCI_32BIT_BLK_CNT SDHCI_DMA_ADDRESS #define SDHCI_BLOCK_SIZE 0x04 #define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))