From patchwork Wed Jun 29 12:51:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900009 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE336C433EF for ; Wed, 29 Jun 2022 12:51:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233295AbiF2Mvk (ORCPT ); Wed, 29 Jun 2022 08:51:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230412AbiF2Mvi (ORCPT ); Wed, 29 Jun 2022 08:51:38 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63E3C32EC9 for ; Wed, 29 Jun 2022 05:51:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=rbz1iHEBy1nQ2MpJL88y0TKKnXZhRnkuJV4SL0d6G0c=; b=YWmLQPLZbN+kIMPvX7BAx+MNJq mxJ7ySprlRI+AZ9mJ69yElHb/MrLQOWygaMZPyUqUYedXGr8HKX1e/UGhgAHOk4RWmZi42ofmmP/l 7QLaf+n3h+snfvg2uj2pCsB7RBkJ7idhzT8qUOpIsHAc/SMqdyE5vrhWQysklXeWnG44K+funyIiI s7M0hWqUe9SC5fuFCFzEVH8c7ucqBI38XyQpVz4/IkzPzIs8786mrHuJxf3eUqG8NoZXcCVzK6DT7 31lJZnjQV7oV3LbcpNO1/7yU/VohkTjYtPAAUXNHRVSVsGcwYTaBVSZQ5nNvmac48JvhYvnISUSB9 bFEt4rzw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35710 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAB-00036S-F0; Wed, 29 Jun 2022 13:51:23 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAA-004pVc-Pd; Wed, 29 Jun 2022 13:51:22 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 1/6] net: dsa: add support for retrieving the interface mode MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:22 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC DSA port bindings allow for an optional phy interface mode. When an interface mode is not specified, DSA uses the NA interface mode type. However, phylink needs to know the parameters of the link, and this will become especially important when using phylink for ports that are devoid of all properties except the required "reg" property, so that phylink can select the maximum supported link settings. Without knowing the interface mode, phylink can't truely know the maximum link speed. Update the prototype for the phylink_get_caps method to allow drivers to report this information back to DSA, and update all DSA implementations function declarations to cater for this change. No code is added to the implementations. Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/dsa/b53/b53_common.c | 3 ++- drivers/net/dsa/bcm_sf2.c | 3 ++- drivers/net/dsa/hirschmann/hellcreek.c | 3 ++- drivers/net/dsa/lantiq_gswip.c | 6 ++++-- drivers/net/dsa/microchip/ksz_common.c | 3 ++- drivers/net/dsa/mt7530.c | 3 ++- drivers/net/dsa/mv88e6xxx/chip.c | 3 ++- drivers/net/dsa/ocelot/felix.c | 3 ++- drivers/net/dsa/qca/ar9331.c | 3 ++- drivers/net/dsa/qca8k.c | 3 ++- drivers/net/dsa/realtek/rtl8365mb.c | 3 ++- drivers/net/dsa/sja1105/sja1105_main.c | 3 ++- drivers/net/dsa/xrs700x/xrs700x.c | 3 ++- include/net/dsa.h | 3 ++- net/dsa/port.c | 23 +++++++++++++++++------ 15 files changed, 47 insertions(+), 21 deletions(-) diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c index 48cf344750ff..fe75b84ab791 100644 --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c @@ -1310,7 +1310,8 @@ void b53_port_event(struct dsa_switch *ds, int port) EXPORT_SYMBOL(b53_port_event); static void b53_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct b53_device *dev = ds->priv; diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c index 87e81c636339..da90e182ae0e 100644 --- a/drivers/net/dsa/bcm_sf2.c +++ b/drivers/net/dsa/bcm_sf2.c @@ -713,7 +713,8 @@ static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port) } static void bcm_sf2_sw_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *interfaces = config->supported_interfaces; struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); diff --git a/drivers/net/dsa/hirschmann/hellcreek.c b/drivers/net/dsa/hirschmann/hellcreek.c index ac1f3b3a7040..ff78f580bb14 100644 --- a/drivers/net/dsa/hirschmann/hellcreek.c +++ b/drivers/net/dsa/hirschmann/hellcreek.c @@ -1462,7 +1462,8 @@ static void hellcreek_teardown(struct dsa_switch *ds) } static void hellcreek_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct hellcreek *hellcreek = ds->priv; diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c index e531b93f3cb2..a43dabfa5453 100644 --- a/drivers/net/dsa/lantiq_gswip.c +++ b/drivers/net/dsa/lantiq_gswip.c @@ -1492,7 +1492,8 @@ static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) } static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: @@ -1525,7 +1526,8 @@ static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, } static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 59582eb3bcaf..4313be859b0a 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -560,7 +560,8 @@ static int ksz_check_device_id(struct ksz_device *dev) } static void ksz_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct ksz_device *dev = ds->priv; diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 835807911be0..dab308e454e3 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2914,7 +2914,8 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port) } static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct mt7530_priv *priv = ds->priv; diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 37b649501500..f98be98551ef 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -819,7 +819,8 @@ static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, } static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct mv88e6xxx_chip *chip = ds->priv; diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 3e07dc39007a..fd8a3840b2f7 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -937,7 +937,8 @@ static int felix_vlan_del(struct dsa_switch *ds, int port, } static void felix_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct ocelot *ocelot = ds->priv; diff --git a/drivers/net/dsa/qca/ar9331.c b/drivers/net/dsa/qca/ar9331.c index f23ce56fa591..1706c7976c38 100644 --- a/drivers/net/dsa/qca/ar9331.c +++ b/drivers/net/dsa/qca/ar9331.c @@ -500,7 +500,8 @@ static enum dsa_tag_protocol ar9331_sw_get_tag_protocol(struct dsa_switch *ds, } static void ar9331_sw_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100; diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 1cbb05b0323f..beccd8338c81 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1749,7 +1749,8 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, } static void qca8k_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: /* 1st CPU port */ diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index da31d8b839ac..7bf420c2b083 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -1024,7 +1024,8 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port, } static void rtl8365mb_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { const struct rtl8365mb_extint *extint = rtl8365mb_get_port_extint(ds->priv, port); diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c index b253e27bcfb4..e15033177643 100644 --- a/drivers/net/dsa/sja1105/sja1105_main.c +++ b/drivers/net/dsa/sja1105/sja1105_main.c @@ -1390,7 +1390,8 @@ static void sja1105_mac_link_up(struct dsa_switch *ds, int port, } static void sja1105_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct sja1105_private *priv = ds->priv; struct sja1105_xmii_params_entry *mii; diff --git a/drivers/net/dsa/xrs700x/xrs700x.c b/drivers/net/dsa/xrs700x/xrs700x.c index 3887ed33c5fe..214a1dd670c2 100644 --- a/drivers/net/dsa/xrs700x/xrs700x.c +++ b/drivers/net/dsa/xrs700x/xrs700x.c @@ -443,7 +443,8 @@ static void xrs700x_teardown(struct dsa_switch *ds) } static void xrs700x_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: diff --git a/include/net/dsa.h b/include/net/dsa.h index 33283eeda697..25748d81eaf1 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -850,7 +850,8 @@ struct dsa_switch_ops { * PHYLINK integration */ void (*phylink_get_caps)(struct dsa_switch *ds, int port, - struct phylink_config *config); + struct phylink_config *config, + phy_interface_t *default_interface); void (*phylink_validate)(struct dsa_switch *ds, int port, unsigned long *supported, struct phylink_link_state *state); diff --git a/net/dsa/port.c b/net/dsa/port.c index 3738f2d40a0b..35b4e1f8dc05 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1524,13 +1524,9 @@ static const struct phylink_mac_ops dsa_port_phylink_mac_ops = { int dsa_port_phylink_create(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; - phy_interface_t mode; + phy_interface_t mode, def_mode; int err; - err = of_get_phy_mode(dp->dn, &mode); - if (err) - mode = PHY_INTERFACE_MODE_NA; - /* Presence of phylink_mac_link_state or phylink_mac_an_restart is * an indicator of a legacy phylink driver. */ @@ -1538,8 +1534,23 @@ int dsa_port_phylink_create(struct dsa_port *dp) ds->ops->phylink_mac_an_restart) dp->pl_config.legacy_pre_march2020 = true; + def_mode = PHY_INTERFACE_MODE_NA; if (ds->ops->phylink_get_caps) - ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config); + ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config, + &def_mode); + + err = of_get_phy_mode(dp->dn, &mode); + if (err) { + /* We must not set the default mode for user ports as a PHY + * overrides the NA mode in phylink. Setting it here would + * prevent the interface mode being updated. + */ + if (dp->type == DSA_PORT_TYPE_CPU || + dp->type == DSA_PORT_TYPE_DSA) + mode = def_mode; + else + mode = PHY_INTERFACE_MODE_NA; + } dp->pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn), mode, &dsa_port_phylink_mac_ops); From patchwork Wed Jun 29 12:51:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900010 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF83CC43334 for ; Wed, 29 Jun 2022 12:51:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233427AbiF2Mvl (ORCPT ); Wed, 29 Jun 2022 08:51:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231690AbiF2Mvj (ORCPT ); Wed, 29 Jun 2022 08:51:39 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6DD933344 for ; Wed, 29 Jun 2022 05:51:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=KWK8sKKLFR+68SMkB5FGReiHrYFC6ByuHPtr0wPhHIU=; b=tN6QLzrLD0PGySaj1xXFrRUHrE S5luWpg906s9a6dxoMT6V/eTdga40ErgDq+GWMpJq1u7ZXDimDavWTEp15UDL0rVkSlIfjUYP4Tnw 1o5qYRq4n6QXy9XAxCS1GLv5TcC1M2EI1yTG5bEFlGscZh/klMHDCBFcw5DybKc9sfwPBtSJbCDkL xT/dpF0jpSASeA7D5Yj+DF3pKXVAZi7h4AlJ8+pFG/N0h1ASIwSdMuogin6MNip+XnJsXH+3nagd0 e+L2/FUyN/GkZeMseoUKJJDZZWR0Dk+7nwGHqdnc1srM2rajZjYWmRxfm9uepg7pqGYbwCrOwLp8b DphyPHGw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35712 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAG-00036d-LJ; Wed, 29 Jun 2022 13:51:28 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAF-004pVi-Ue; Wed, 29 Jun 2022 13:51:27 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 2/6] net: dsa: mv88e6xxx: report the default interface mode for the port MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:27 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Report the maximum speed interface mode for the port, or if we don't have that information, the hardware configured interface mode for the port. This allows phylink to know which interface mode CPU and DSA ports are operating, which will be necessary when we want to select the maximum speed for the port (required for such ports without a PHY or fixed-link specified in firmware.) Signed-off-by: Russell King (Oracle) --- drivers/net/dsa/mv88e6xxx/chip.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index f98be98551ef..1c6b4b00d58d 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -823,6 +823,7 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, phy_interface_t *default_interface) { struct mv88e6xxx_chip *chip = ds->priv; + u8 cmode = chip->ports[port].cmode; chip->info->ops->phylink_get_caps(chip, port, config); @@ -830,6 +831,14 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, if (mv88e6xxx_phy_is_internal(ds, port)) __set_bit(PHY_INTERFACE_MODE_GMII, config->supported_interfaces); + + if (chip->info->ops->port_max_speed_mode) + *default_interface = chip->info->ops->port_max_speed_mode(port); + else if (cmode < ARRAY_SIZE(mv88e6xxx_phy_interface_modes) && + mv88e6xxx_phy_interface_modes[cmode]) + *default_interface = mv88e6xxx_phy_interface_modes[cmode]; + else if (cmode == MV88E6XXX_PORT_STS_CMODE_RGMII) + *default_interface = PHY_INTERFACE_MODE_RGMII; } static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, From patchwork Wed Jun 29 12:51:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900011 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0DC4C43334 for ; Wed, 29 Jun 2022 12:51:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233463AbiF2Mvs (ORCPT ); Wed, 29 Jun 2022 08:51:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233465AbiF2Mvp (ORCPT ); Wed, 29 Jun 2022 08:51:45 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B002733350 for ; Wed, 29 Jun 2022 05:51:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Z/gSxSOzHHBxlOqahtkOa3/YcUPccov7AoowZlalpRg=; b=d3vrouUEHl9aodzh9XPhR/1BWO 4VwtputgpgOrKrdOZI2s6QmKt21G/s81WhQNHWUeU4aQSUia6c+C+ybv2fewT/hiS6Yy3L6CwGY8e muPsOA2yF7gvp0Q7yBqS7YbcZSoQwwsfeZb/kFggHQt9bIfF7Y/hvwtBajiZa/zQhFAEpMk7uI93z 3wOSSM/lyuffJI3GVM86aHFxG3kCO8xEULA9FXHcs9tiErCT1PoRc/3VStrvvXpyTdfv6wue25Ctb zGI27tko7sSwk+5cM4oD1cGUgQbqwsPrXvqkAm2krH3zMY6WZW6jAxyLwjW3/KMHe9q+ERAxM1/2f CyWhdxhw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35714 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAL-00036w-Pu; Wed, 29 Jun 2022 13:51:33 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAL-004pVp-36; Wed, 29 Jun 2022 13:51:33 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 3/6] net: phylink: split out interface to caps translation MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:33 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC phylink_get_linkmodes() translates the interface mode into a set of speed and duplex capabilities which are masked with the MAC modes to then derive the link modes that are available. Split out the initial transformation into a new function phylink_interface_to_caps(), which will be useful when setting the maximum fixed link speed. Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/phy/phylink.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 1a7550f5fdf5..4645ac6e553d 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -296,18 +296,7 @@ static void phylink_caps_to_linkmodes(unsigned long *linkmodes, } } -/** - * phylink_get_linkmodes() - get acceptable link modes - * @linkmodes: ethtool linkmode mask (must be already initialised) - * @interface: phy interface mode defined by &typedef phy_interface_t - * @mac_capabilities: bitmask of MAC capabilities - * - * Set all possible pause, speed and duplex linkmodes in @linkmodes that - * are supported by the @interface mode and @mac_capabilities. @linkmodes - * must have been initialised previously. - */ -void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, - unsigned long mac_capabilities) +static unsigned long phylink_interface_to_caps(phy_interface_t interface) { unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; @@ -381,6 +370,24 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, break; } + return caps; +} + +/** + * phylink_get_linkmodes() - get acceptable link modes + * @linkmodes: ethtool linkmode mask (must be already initialised) + * @interface: phy interface mode defined by &typedef phy_interface_t + * @mac_capabilities: bitmask of MAC capabilities + * + * Set all possible pause, speed and duplex linkmodes in @linkmodes that + * are supported by the @interface mode and @mac_capabilities. @linkmodes + * must have been initialised previously. + */ +void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, + unsigned long mac_capabilities) +{ + unsigned long caps = phylink_interface_to_caps(interface); + phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); } EXPORT_SYMBOL_GPL(phylink_get_linkmodes); From patchwork Wed Jun 29 12:51:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900012 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96CCCC433EF for ; Wed, 29 Jun 2022 12:51:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233486AbiF2Mvz (ORCPT ); Wed, 29 Jun 2022 08:51:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233465AbiF2Mvx (ORCPT ); Wed, 29 Jun 2022 08:51:53 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 685053615F for ; Wed, 29 Jun 2022 05:51:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=COtSMS1/jgOQId0wNJWuS9lCVZlVYXaj70Wqb6aMgkQ=; b=jgV1nvGqD5c3BjilnaoN2aUVVK swFvnCfiFAFjlYKqOuRzcT3wRDxSZJu7CG84rbvFu3BHrKqtPnhgxLSi438Or+lWEcYCHsPSQZhT8 L97Z6kktZ3TntRB8/E72Nx0uQys8ckv3/X3dohbg8AnopMIEJNmcB+69NUkebSffzDIj5+9gDRPN2 nmWZmiKeeTXFRqsLuHLM80tmL1G99+/Gw3wGnVfE7gXqiVlzIx5zFj9fqRdRF+KUfi02YdUhn+5jQ +evfgNSsWy/Ug9fGRxSlwaeHhFEfr84ynJHQWntvzjyczRM2F4lThn8HVvrppeiWBQbeMTTmfSWg2 gr0zbk4g==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35716 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAQ-00037F-V2; Wed, 29 Jun 2022 13:51:38 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAQ-004pVw-7o; Wed, 29 Jun 2022 13:51:38 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 4/6] net: phylink: add phylink_set_max_fixed_link() MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:38 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add a function for DSA to use to configure phylink, in the absence of any other configuration, to a fixed link operating at the maximum supported link speed. This is needed so we can support phylink usage on CPU and DSA ports. Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/phy/phylink.c | 110 ++++++++++++++++++++++++++++++++++++++ include/linux/phylink.h | 5 ++ 2 files changed, 115 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 4645ac6e553d..23be3f041705 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1333,6 +1333,116 @@ void phylink_destroy(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_destroy); +static struct { + unsigned long fd_mask; + unsigned long hd_mask; + int speed; +} phylink_caps_speeds[] = { + { MAC_400000FD, 0, SPEED_400000 }, + { MAC_200000FD, 0, SPEED_200000 }, + { MAC_100000FD, 0, SPEED_100000 }, + { MAC_56000FD, 0, SPEED_56000 }, + { MAC_50000FD, 0, SPEED_50000 }, + { MAC_40000FD, 0, SPEED_40000 }, + { MAC_25000FD, 0, SPEED_40000 }, + { MAC_20000FD, 0, SPEED_20000 }, + { MAC_10000FD, 0, SPEED_10000 }, + { MAC_5000FD, 0, SPEED_5000 }, + { MAC_2500FD, 0, SPEED_2500 }, + { MAC_1000FD, MAC_1000HD, SPEED_1000 }, + { MAC_100FD, MAC_100HD, SPEED_100 }, + { MAC_10FD, MAC_10HD, SPEED_10 }, +}; + +/** + * phylink_set_max_fixed_link() - set a fixed link configuration for phylink + * @pl: a pointer to a &struct phylink returned from phylink_create() + * + * Set a maximum speed fixed-link configuration for the chosen interface + * mode and MAC capabilities for the phylink instance. Only valid for use + * immediately after creation. Must not be used at any other time. + * + * The user must have initialised mac_capabilities and set a valid interface. + */ +int phylink_set_max_fixed_link(struct phylink *pl) +{ + phy_interface_t intf, interface; + unsigned long caps, max_caps; + unsigned long *interfaces; + int speed, duplex; + int i; + + /* If we are not in PHY mode, or have a PHY, or have a SFP bus, + * then we must not default to a fixed link. + */ + if (pl->cfg_link_an_mode != MLO_AN_PHY || pl->phydev || pl->sfp_bus) + return -EBUSY; + + interface = pl->link_interface; + if (interface != PHY_INTERFACE_MODE_NA) { + /* Get the speed/duplex capabilities and reduce according to the + * specified interface mode. + */ + caps = pl->config->mac_capabilities; + caps &= phylink_interface_to_caps(interface); + } else { + interfaces = pl->config->supported_interfaces; + max_caps = 0; + + /* Find the supported interface mode which gives the maximum + * speed. + */ + for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { + if (test_bit(intf, interfaces)) { + caps = pl->config->mac_capabilities; + caps &= phylink_interface_to_caps(intf); + if (caps > max_caps) { + max_caps = caps; + interface = intf; + } + } + } + + caps = max_caps; + } + + caps &= ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); + + /* If there are no capabilities, then we are not using this default. */ + if (!caps) + return -EINVAL; + + /* Decode to fastest speed and duplex */ + duplex = DUPLEX_UNKNOWN; + speed = SPEED_UNKNOWN; + for (i = 0; i < ARRAY_SIZE(phylink_caps_speeds); i++) { + if (caps & phylink_caps_speeds[i].fd_mask) { + duplex = DUPLEX_FULL; + speed = phylink_caps_speeds[i].speed; + break; + } else if (caps & phylink_caps_speeds[i].hd_mask) { + duplex = DUPLEX_HALF; + speed = phylink_caps_speeds[i].speed; + break; + } + } + + /* If we didn't find anything, bail. */ + if (speed == SPEED_UNKNOWN) + return -EINVAL; + + pl->link_interface = interface; + pl->link_config.interface = interface; + pl->link_config.speed = speed; + pl->link_config.duplex = duplex; + pl->link_config.link = 1; + pl->cfg_link_an_mode = MLO_AN_FIXED; + pl->cur_link_an_mode = MLO_AN_FIXED; + + return 0; +} +EXPORT_SYMBOL_GPL(phylink_set_max_fixed_link); + static void phylink_phy_change(struct phy_device *phydev, bool up) { struct phylink *pl = phydev->phylink; diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 6d06896fc20d..9e2fb476d19c 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -23,6 +23,9 @@ enum { MAC_SYM_PAUSE = BIT(0), MAC_ASYM_PAUSE = BIT(1), + /* These speed bits must be sorted according to speed for + * phylink_set_max_fixed_link() + */ MAC_10HD = BIT(2), MAC_10FD = BIT(3), MAC_10 = MAC_10HD | MAC_10FD, @@ -529,6 +532,8 @@ struct phylink *phylink_create(struct phylink_config *, struct fwnode_handle *, const struct phylink_mac_ops *mac_ops); void phylink_destroy(struct phylink *); +int phylink_set_max_fixed_link(struct phylink *pl); + int phylink_connect_phy(struct phylink *, struct phy_device *); int phylink_of_phy_connect(struct phylink *, struct device_node *, u32 flags); int phylink_fwnode_phy_connect(struct phylink *pl, From patchwork Wed Jun 29 12:51:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900013 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B843CCA47C for ; Wed, 29 Jun 2022 12:51:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233498AbiF2Mv4 (ORCPT ); Wed, 29 Jun 2022 08:51:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233491AbiF2Mvz (ORCPT ); Wed, 29 Jun 2022 08:51:55 -0400 Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [IPv6:2001:4d48:ad52:32c8:5054:ff:fe00:142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBADA344DD for ; Wed, 29 Jun 2022 05:51:54 -0700 (PDT) DKIM-Signature: v=1; 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Wed, 29 Jun 2022 13:51:44 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAV-004pW2-Ct; Wed, 29 Jun 2022 13:51:43 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 5/6] net: dsa: always use phylink for CPU and DSA ports MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:43 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Currently, we only use phylink for CPU and DSA ports if there is a fixed-link specification, or a PHY specified. The reason for this behaviour is that when neither is specified, there was no way for phylink to know the link parameters. Now that we have phylink_set_max_link_speed() (which has become possible through the addition of mac_capabilities) we now have the ability to know the maximum link speed for a specific link, and can now use phylink for this case as well. However, we need DSA drivers to report the interface mode being used on these ports so that we can select a maximum speed appropriate for the interface mode that hardware may have configured for the port. This is especially important with the conversion of DSA drivers to phylink_pcs, as the PCS code only gets called if we are using phylink for the port. Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/dsa/mv88e6xxx/chip.c | 41 ++++---------------------------- net/dsa/port.c | 24 ++++++++++--------- 2 files changed, 18 insertions(+), 47 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 1c6b4b00d58d..e19732782742 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3287,9 +3287,8 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) { struct device_node *phy_handle = NULL; struct dsa_switch *ds = chip->ds; - phy_interface_t mode; struct dsa_port *dp; - int tx_amp, speed; + int tx_amp; int err; u16 reg; @@ -3298,40 +3297,10 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) dp = dsa_to_port(ds, port); - /* MAC Forcing register: don't force link, speed, duplex or flow control - * state to any particular values on physical ports, but force the CPU - * port and all DSA ports to their maximum bandwidth and full duplex. - */ - if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) { - unsigned long caps = dp->pl_config.mac_capabilities; - - if (chip->info->ops->port_max_speed_mode) - mode = chip->info->ops->port_max_speed_mode(port); - else - mode = PHY_INTERFACE_MODE_NA; - - if (caps & MAC_10000FD) - speed = SPEED_10000; - else if (caps & MAC_5000FD) - speed = SPEED_5000; - else if (caps & MAC_2500FD) - speed = SPEED_2500; - else if (caps & MAC_1000) - speed = SPEED_1000; - else if (caps & MAC_100) - speed = SPEED_100; - else - speed = SPEED_10; - - err = mv88e6xxx_port_setup_mac(chip, port, LINK_FORCED_UP, - speed, DUPLEX_FULL, - PAUSE_OFF, mode); - } else { - err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED, - SPEED_UNFORCED, DUPLEX_UNFORCED, - PAUSE_ON, - PHY_INTERFACE_MODE_NA); - } + err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED, + SPEED_UNFORCED, DUPLEX_UNFORCED, + PAUSE_ON, + PHY_INTERFACE_MODE_NA); if (err) return err; diff --git a/net/dsa/port.c b/net/dsa/port.c index 35b4e1f8dc05..34487e62eb03 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1525,6 +1525,7 @@ int dsa_port_phylink_create(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; phy_interface_t mode, def_mode; + struct device_node *phy_np; int err; /* Presence of phylink_mac_link_state or phylink_mac_an_restart is @@ -1559,6 +1560,13 @@ int dsa_port_phylink_create(struct dsa_port *dp) return PTR_ERR(dp->pl); } + if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) { + phy_np = of_parse_phandle(dp->dn, "phy-handle", 0); + of_node_put(phy_np); + if (!phy_np) + err = phylink_set_max_fixed_link(dp->pl); + } + return 0; } @@ -1663,20 +1671,14 @@ static int dsa_port_phylink_register(struct dsa_port *dp) int dsa_port_link_register_of(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; - struct device_node *phy_np; int port = dp->index; if (!ds->ops->adjust_link) { - phy_np = of_parse_phandle(dp->dn, "phy-handle", 0); - if (of_phy_is_fixed_link(dp->dn) || phy_np) { - if (ds->ops->phylink_mac_link_down) - ds->ops->phylink_mac_link_down(ds, port, - MLO_AN_FIXED, PHY_INTERFACE_MODE_NA); - of_node_put(phy_np); - return dsa_port_phylink_register(dp); - } - of_node_put(phy_np); - return 0; + if (ds->ops->phylink_mac_link_down) + ds->ops->phylink_mac_link_down(ds, port, + MLO_AN_FIXED, PHY_INTERFACE_MODE_NA); + + return dsa_port_phylink_register(dp); } dev_warn(ds->dev, From patchwork Wed Jun 29 12:51:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12900014 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B0EEAC433EF for ; Wed, 29 Jun 2022 12:52:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233491AbiF2MwB (ORCPT ); Wed, 29 Jun 2022 08:52:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50540 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230523AbiF2Mv7 (ORCPT ); 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Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:35720 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o6XAb-000386-AQ; Wed, 29 Jun 2022 13:51:49 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o6XAa-004pW8-IP; Wed, 29 Jun 2022 13:51:48 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 6/6] net: phylink: debug print MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 29 Jun 2022 13:51:48 +0100 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC --- drivers/net/phy/phylink.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 23be3f041705..bd493280c8af 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1378,6 +1378,13 @@ int phylink_set_max_fixed_link(struct phylink *pl) if (pl->cfg_link_an_mode != MLO_AN_PHY || pl->phydev || pl->sfp_bus) return -EBUSY; + phylink_info(pl, "sif=%*pbl if=%d(%s) cap=%lx\n", + (int)PHY_INTERFACE_MODE_MAX, + pl->config->supported_interfaces, + pl->link_interface, + phy_modes(pl->link_interface), + pl->config->mac_capabilities); + interface = pl->link_interface; if (interface != PHY_INTERFACE_MODE_NA) { /* Get the speed/duplex capabilities and reduce according to the