From patchwork Wed Aug 8 12:15:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559883 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E657390E3 for ; Wed, 8 Aug 2018 12:26:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2EE72AAA7 for ; Wed, 8 Aug 2018 12:26:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C68572AADA; Wed, 8 Aug 2018 12:26:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4146C2AABD for ; Wed, 8 Aug 2018 12:26:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 627EC6E535; Wed, 8 Aug 2018 12:25:59 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7DAA66E535 for ; Wed, 8 Aug 2018 12:25:58 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:25:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520692" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:25:54 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:48 +0530 Message-Id: <1533730559-461-2-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 01/12] drm/i915/icl: Define utility pin ctrl register bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch defines utility pin control register bitfields for ICL platform and also re-arrange existing definition to align with guideline. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_reg.h | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 77b38fe..6c863d8 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4910,14 +4910,20 @@ enum { #define BLM_PCH_POLARITY (1 << 29) #define BLC_PWM_PCH_CTL2 _MMIO(0xc8254) -#define UTIL_PIN_CTL _MMIO(0x48400) -#define UTIL_PIN_ENABLE (1 << 31) - -#define UTIL_PIN_PIPE(x) ((x) << 29) -#define UTIL_PIN_PIPE_MASK (3 << 29) -#define UTIL_PIN_MODE_PWM (1 << 24) -#define UTIL_PIN_MODE_MASK (0xf << 24) -#define UTIL_PIN_POLARITY (1 << 22) +#define UTIL_PIN_CTL _MMIO(0x48400) +#define UTIL_PIN_ENABLE (1 << 31) +#define UTIL_PIN_PIPE_MASK (3 << 29) +#define UTIL_PIN_PIPE(x) ((x) << 29) +#define UTIL_PIN_MODE_MASK (0xf << 24) +#define UTIL_PIN_MODE_DATA (0 << 24) +#define UTIL_PIN_MODE_PWM (1 << 24) +#define UTIL_PIN_MODE_VBLANK (4 << 24) +#define UTIL_PIN_MODE_VSYNC (5 << 24) +#define UTIL_PIN_MODE_EYE_LEVEL (8 << 24) +#define UTIL_PIN_OP_DATA (1 << 23) +#define UTIL_PIN_POLARITY (1 << 22) +#define ICL_UTIL_PIN_DIRECTION (1 << 19) +#define ICL_UTIL_PIN_IP_DATA (1 << 16) /* BXT backlight register definition. */ #define _BXT_BLC_PWM_CTL1 0xC8250 From patchwork Wed Aug 8 12:15:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559885 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AAE4413AC for ; Wed, 8 Aug 2018 12:26:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A9D72AA9A for ; Wed, 8 Aug 2018 12:26:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E3162AAAD; Wed, 8 Aug 2018 12:26:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4EC082AA9A for ; Wed, 8 Aug 2018 12:26:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8063C6E53E; Wed, 8 Aug 2018 12:26:01 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 851F26E53E for ; Wed, 8 Aug 2018 12:26:00 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520698" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:25:58 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:49 +0530 Message-Id: <1533730559-461-3-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 02/12] drm/i915/icl: Config utility pin for DSI X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch configures utility pin for DSI command mode operation as per BSPEC DSI trancoder enable sequence. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/icl_dsi.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 19a3815..a175349 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -874,6 +874,21 @@ static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder) } } +static void gen11_dsi_config_utility_pin(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + + if (intel_dsi->operation_mode != INTEL_DSI_COMMAND_MODE) + return; + + tmp = I915_READ(UTIL_PIN_CTL); + tmp |= ICL_UTIL_PIN_DIRECTION; + tmp |= UTIL_PIN_ENABLE; + I915_WRITE(UTIL_PIN_CTL, tmp); +} + static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, const struct intel_crtc_state *pipe_config) { @@ -892,6 +907,9 @@ static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder, /* step 4e: setup D-PHY timings */ gen11_dsi_setup_dphy_timings(encoder); + /* step 4f: config utility pin */ + gen11_dsi_config_utility_pin(encoder); + /* step 4g: setup DSI protocol timeouts */ gen11_dsi_setup_timeouts(encoder); From patchwork Wed Aug 8 12:15:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559889 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 57ED413AC for ; Wed, 8 Aug 2018 12:26:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 42DD72AAB3 for ; Wed, 8 Aug 2018 12:26:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35E522AAB7; Wed, 8 Aug 2018 12:26:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E14D12AAA7 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 795986E54D; Wed, 8 Aug 2018 12:26:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id B34F66E544 for ; Wed, 8 Aug 2018 12:26:21 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520723" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:00 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:50 +0530 Message-Id: <1533730559-461-4-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 03/12] drm/i915/icl: Define DSI cmd mode registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds definition of registers required for DSI command mode operation. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_reg.h | 51 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6c863d8..81dc656 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10535,6 +10535,57 @@ enum skl_power_gate { #define LINK_ULPS_TYPE_LP11 (1 << 8) #define LINK_ENTER_ULPS (1 << 0) +#define _DSI_INTR_MASK_REG_0 0x6b070 +#define _DSI_INTR_MASK_REG_1 0x6b870 +#define DSI_INTR_MASK_REG(tc) _MMIO_DSI(tc, \ + _DSI_INTR_MASK_REG_0,\ + _DSI_INTR_MASK_REG_1) + +#define _DSI_INTR_IDENT_REG_0 0x6b074 +#define _DSI_INTR_IDENT_REG_1 0x6b874 +#define DSI_INTR_IDENT_REG(tc) _MMIO_DSI(tc, \ + _DSI_INTR_IDENT_REG_0,\ + _DSI_INTR_IDENT_REG_1) +#define TE_EVENT (1 << 31) +#define RX_DATA_OR_BTA_TERMINATED (1 << 30) +#define TX_DATA (1 << 29) +#define ULPS_ENTRY_DONE (1 << 28) +#define NON_TE_TRIGGER_RECEIVED (1 << 27) +#define HOST_CHKSUM_ERROR (1 << 26) +#define HOST_MULTI_ECC_ERROR (1 << 25) +#define HOST_SINGL_ECC_ERROR (1 << 24) +#define HOST_CONTENTION_DETECTED (1 << 23) +#define HOST_FALSE_CONTROL_ERROR (1 << 22) +#define HOST_TIMEOUT_ERROR (1 << 21) +#define HOST_LOW_POWER_TX_SYNC_ERROR (1 << 20) +#define HOST_ESCAPE_MODE_ENTRY_ERROR (1 << 19) +#define FRAME_UPDATE_DONE (1 << 16) +#define PROTOCOL_VIOLATION_REPORTED (1 << 15) +#define INVALID_TX_LENGTH (1 << 13) +#define INVALID_VC (1 << 12) +#define INVALID_DATA_TYPE (1 << 11) +#define PERIPHERAL_CHKSUM_ERROR (1 << 10) +#define PERIPHERAL_MULTI_ECC_ERROR (1 << 9) +#define PERIPHERAL_SINGLE_ECC_ERROR (1 << 8) +#define PERIPHERAL_CONTENTION_DETECTED (1 << 7) +#define PERIPHERAL_FALSE_CTRL_ERROR (1 << 6) +#define PERIPHERAL_TIMEOUT_ERROR (1 << 5) +#define PERIPHERAL_LP_TX_SYNC_ERROR (1 << 4) +#define PERIPHERAL_ESC_MODE_ENTRY_CMD_ERROR (1 << 3) +#define EOT_SYNC_ERROR (1 << 2) +#define SOT_SYNC_ERROR (1 << 1) +#define SOT_ERROR (1 << 0) + +#define _DSI_CMD_FRMCTL_0 0x6b034 +#define _DSI_CMD_FRMCTL_1 0x6b834 +#define DSI_CMD_FRMCTL(tc) _MMIO_DSI(tc, \ + _DSI_CMD_FRMCTL_0,\ + _DSI_CMD_FRMCTL_1) +#define FRAME_UPDATE_REQ_PRESENT (1 << 31) +#define PERIODIC_FRAME_UPDATE_ENABLE (1 << 29) +#define NULL_PACKET_ENABLE (1 << 28) +#define FRAME_IN_PROGRESS (1 << 0) + /* DSI timeout registers */ #define _DSI_HSTX_TO_0 0x6b044 #define _DSI_HSTX_TO_1 0x6b844 From patchwork Wed Aug 8 12:15:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559891 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 68BC190E3 for ; Wed, 8 Aug 2018 12:26:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 589662AABC for ; Wed, 8 Aug 2018 12:26:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4AE1A2AAB3; Wed, 8 Aug 2018 12:26:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 113502AAB3 for ; Wed, 8 Aug 2018 12:26:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8214D6E54F; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id D009E6E54C for ; Wed, 8 Aug 2018 12:26:21 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520842" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:02 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:51 +0530 Message-Id: <1533730559-461-5-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 04/12] drm/i915/icl: DSI transcoder config for command mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch configures DSI transcoder behavior when operating in command mode. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/icl_dsi.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 81dc656..de671f2 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10447,6 +10447,7 @@ enum skl_power_gate { #define CMD_MODE_TE_GATE 0x1 #define VIDEO_MODE_SYNC_EVENT 0x2 #define VIDEO_MODE_SYNC_PULSE 0x3 +#define TE_SOURCE_GPIO (1 << 27) #define LINK_READY (1 << 20) #define PIX_FMT(x) (x << 16) #define PIX_FMT_MASK (0x3 << 16) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index a175349..b189398 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -625,6 +625,10 @@ static void gen11_dsi_configure_transcoder(struct intel_encoder *encoder, } else { DRM_ERROR("DSI Video Mode unsupported\n"); } + } else { /* command mode */ + tmp &= ~OP_MODE_MASK; + tmp |= OP_MODE(CMD_MODE_TE_GATE); + tmp |= TE_SOURCE_GPIO; } I915_WRITE(DSI_TRANS_FUNC_CONF(dsi_trans), tmp); From patchwork Wed Aug 8 12:15:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559893 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 68C4213AC for ; Wed, 8 Aug 2018 12:26:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 576D22AAA7 for ; Wed, 8 Aug 2018 12:26:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4BC3A2AAB7; Wed, 8 Aug 2018 12:26:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 12B0D2AAA7 for ; Wed, 8 Aug 2018 12:26:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EAF846E54E; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F8246E54C for ; Wed, 8 Aug 2018 12:26:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520848" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:04 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:52 +0530 Message-Id: <1533730559-461-6-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 05/12] drm/i915/icl: Define TE interrupt related bits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch defines bitfields required for handling TE interrupts when DSI is operating in command mode. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_reg.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index de671f2..a8e5faa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7267,11 +7267,15 @@ enum { #define GEN8_DE_PORT_IMR _MMIO(0x44444) #define GEN8_DE_PORT_IIR _MMIO(0x44448) #define GEN8_DE_PORT_IER _MMIO(0x4444c) +#define ICL_DSI_1 (1 << 31) +#define ICL_DSI_0 (1 << 30) #define ICL_AUX_CHANNEL_E (1 << 29) #define CNL_AUX_CHANNEL_F (1 << 28) #define GEN9_AUX_CHANNEL_D (1 << 27) #define GEN9_AUX_CHANNEL_C (1 << 26) #define GEN9_AUX_CHANNEL_B (1 << 25) +#define ICL_DSI1_TE (1 << 24) +#define ICL_DSI0_TE (1 << 23) #define BXT_DE_PORT_HP_DDIC (1 << 5) #define BXT_DE_PORT_HP_DDIB (1 << 4) #define BXT_DE_PORT_HP_DDIA (1 << 3) From patchwork Wed Aug 8 12:15:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559895 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BE77E90E3 for ; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACE222AAA7 for ; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A16332AAB7; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 604442AAA7 for ; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B7686E552; Wed, 8 Aug 2018 12:26:26 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 858236E54E for ; Wed, 8 Aug 2018 12:26:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520850" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:06 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:53 +0530 Message-Id: <1533730559-461-7-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 06/12] drm/i915/icl: Find encoder for DSI command mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a helper function to find encoder if DSI is operating in command mode. This function will be used while enabling/disabling TE interrupts for DSI. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/icl_dsi.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 1 + 2 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index b189398..bf7ad5e 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -29,6 +29,23 @@ #include #include "intel_dsi.h" +struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc) +{ + struct drm_device *dev = crtc->base.dev; + struct intel_encoder *encoder; + struct intel_dsi *intel_dsi; + + for_each_encoder_on_crtc(dev, &crtc->base, encoder) { + if (encoder->type != INTEL_OUTPUT_DSI) + continue; + intel_dsi = enc_to_intel_dsi(&encoder->base); + if (intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE) + return encoder; + } + + return NULL; +} + static void wait_for_dsi_hdr_credit_release(struct intel_dsi *intel_dsi, enum transcoder dsi_trans) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1b12d53..7dadfc1 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1756,6 +1756,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv); /* icl_dsi.c */ void intel_gen11_dsi_init(struct drm_i915_private *dev_priv); +struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc); /* intel_dsi_dcs_backlight.c */ int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector); From patchwork Wed Aug 8 12:15:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EA71C13AC for ; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D987E2AAA7 for ; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CDE1F2AAB7; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8D7E22AAA7 for ; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 509A76E555; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id C74456E543 for ; Wed, 8 Aug 2018 12:26:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520854" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:08 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:54 +0530 Message-Id: <1533730559-461-8-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 07/12] drm/i915/icl: Configure TE interrupts for DSI X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch implements a helper function for enabling or disabling TE interrupts. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/icl_dsi.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ 2 files changed, 22 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index bf7ad5e..0ae62a1 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -46,6 +46,26 @@ struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc) return NULL; } +void gen11_dsi_configure_te_interrupt(struct intel_encoder *encoder, + bool enable) +{ + struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + enum port port; + + for_each_dsi_port(port, intel_dsi->ports) { + tmp = I915_READ(GEN8_DE_PORT_IMR); + if (enable) + tmp |= (port == PORT_A ? ICL_DSI0_TE : ICL_DSI1_TE); + else + tmp &= (port == PORT_A ? ~ICL_DSI0_TE : ~ICL_DSI1_TE); + + I915_WRITE(GEN8_DE_PORT_IMR, tmp); + POSTING_READ(GEN8_DE_PORT_IMR); + } +} + static void wait_for_dsi_hdr_credit_release(struct intel_dsi *intel_dsi, enum transcoder dsi_trans) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 7dadfc1..e39f812 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1757,6 +1757,8 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv); /* icl_dsi.c */ void intel_gen11_dsi_init(struct drm_i915_private *dev_priv); struct intel_encoder *gen11_dsi_find_cmd_mode_encoder(struct intel_crtc *crtc); +void gen11_dsi_configure_te_interrupt(struct intel_encoder *encoder, + bool enable); /* intel_dsi_dcs_backlight.c */ int intel_dsi_dcs_init_backlight_funcs(struct intel_connector *intel_connector); From patchwork Wed Aug 8 12:15:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559897 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1145290E3 for ; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F17BD2AAA7 for ; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5BBA2AAB7; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A4FA62AAA7 for ; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 05DB06E554; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2E6656E543 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520858" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:10 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:55 +0530 Message-Id: <1533730559-461-9-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 08/12] drm/i915/icl: Enable/disable TE interrupts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP If DSI is operating in command mode, then display engine won't be receiving VBLANK interrupt instead of that Tearing Event(TE) interrupt will be received. So in this scenario, we need to enable/disable TE interrupt rather than VBLANK interrupts. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_irq.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5dadefc..a24c670 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3398,10 +3398,18 @@ static int ironlake_enable_vblank(struct drm_device *dev, unsigned int pipe) static int gen8_enable_vblank(struct drm_device *dev, unsigned int pipe) { struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_encoder *encoder; unsigned long irqflags; spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + encoder = gen11_dsi_find_cmd_mode_encoder(crtc); + + if (IS_ICELAKE(dev_priv) && encoder) + gen11_dsi_configure_te_interrupt(encoder, true); + else + bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); /* Even if there is no DMC, frame counter can get stuck when @@ -3452,10 +3460,18 @@ static void ironlake_disable_vblank(struct drm_device *dev, unsigned int pipe) static void gen8_disable_vblank(struct drm_device *dev, unsigned int pipe) { struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_encoder *encoder; unsigned long irqflags; spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + encoder = gen11_dsi_find_cmd_mode_encoder(crtc); + + if (IS_ICELAKE(dev_priv) && encoder) + gen11_dsi_configure_te_interrupt(encoder, false); + else + bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); } From patchwork Wed Aug 8 12:15:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559901 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C211E13AC for ; Wed, 8 Aug 2018 12:26:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B00D12AAA7 for ; Wed, 8 Aug 2018 12:26:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A46492AAB7; Wed, 8 Aug 2018 12:26:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5E0782AAA7 for ; Wed, 8 Aug 2018 12:26:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BB3346E557; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 556036E54E for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520860" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:12 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:56 +0530 Message-Id: <1533730559-461-10-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 09/12] drm/i915/icl: DSI TE interrupt handler X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP When DSI is operating in command mode, timing information is given by the panel using TE signal. TE signals are received as an interrupt. This patch adds the handler for TE interrupts. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_irq.c | 43 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index a24c670..8ca2396 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1861,6 +1861,45 @@ static void gen9_guc_irq_handler(struct drm_i915_private *dev_priv, u32 gt_iir) intel_guc_to_host_event_handler(&dev_priv->guc); } +void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv, + u32 iir_value) +{ + enum pipe pipe = INVALID_PIPE; + enum port port; + enum transcoder tc; + u32 val; + + port = (iir_value & ICL_DSI0_TE) ? PORT_A : PORT_B; + tc = (port == PORT_A) ? TRANSCODER_DSI_0 : TRANSCODER_DSI_1; + + /* Check if DSI configured in command mode */ + val = I915_READ(DSI_TRANS_FUNC_CONF(tc)); + val = (val & OP_MODE_MASK) >> 28; + + if (val != CMD_MODE_TE_GATE) { + DRM_ERROR("DSI trancoder not configured in command mode\n"); + return; + } + + /* Get PIPE for handling VBLANK event */ + val = I915_READ(TRANS_DDI_FUNC_CTL(tc)); + switch (val & TRANS_DDI_EDP_INPUT_MASK) { + case TRANS_DDI_EDP_INPUT_A_ON: + pipe = PIPE_A; + break; + case TRANS_DDI_EDP_INPUT_B_ONOFF: + pipe = PIPE_B; + break; + case TRANS_DDI_EDP_INPUT_C_ONOFF: + pipe = PIPE_C; + break; + default: + DRM_ERROR("Invalid PIPE\n"); + } + + drm_handle_vblank(&dev_priv->drm, pipe); +} + static void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv) { enum pipe pipe; @@ -2815,6 +2854,10 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl) found = true; } + if (IS_ICELAKE(dev_priv) && + (iir & (ICL_DSI0_TE | ICL_DSI1_TE))) + gen11_dsi_te_interrupt_handler(dev_priv, iir); + if (!found) DRM_ERROR("Unexpected DE Port interrupt\n"); } From patchwork Wed Aug 8 12:15:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16B4A90E3 for ; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0655C2AAA7 for ; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EF3962AABC; Wed, 8 Aug 2018 12:26:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A1E292AAA7 for ; Wed, 8 Aug 2018 12:26:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED9F66E55D; Wed, 8 Aug 2018 12:26:31 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B3806E543 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520862" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:14 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:57 +0530 Message-Id: <1533730559-461-11-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 10/12] drm/i915/icl: Unmask/Clear DSI TE interrupts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP While enabling DSI transcoder, TE interrupts need to be unmasked also they need to be cleared when TE interrupts are received. This patch does same by programming DSI interrupt specific registers. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_irq.c | 2 ++ drivers/gpu/drm/i915/icl_dsi.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8ca2396..b1e836a 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1897,6 +1897,8 @@ void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv, DRM_ERROR("Invalid PIPE\n"); } + //TODO: Clear DSI interrupt here + drm_handle_vblank(&dev_priv->drm, pipe); } diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 0ae62a1..bd3cdde 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -66,6 +66,7 @@ void gen11_dsi_configure_te_interrupt(struct intel_encoder *encoder, } } + static void wait_for_dsi_hdr_credit_release(struct intel_dsi *intel_dsi, enum transcoder dsi_trans) { @@ -96,6 +97,26 @@ static enum transcoder dsi_port_to_transcoder(enum port port) return TRANSCODER_DSI_1; } +static void gen11_dsi_clear_te_interrupt(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + enum port port; + enum transcoder dsi_trans; + + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + tmp = I915_READ(DSI_INTR_IDENT_REG(dsi_trans)); + if (tmp & TE_EVENT) { + /* TE event received, clear it */ + tmp |= TE_EVENT; + I915_WRITE(DSI_INTR_IDENT_REG(dsi_trans), tmp); + } + } + +} + static void wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -666,11 +687,24 @@ static void gen11_dsi_configure_transcoder(struct intel_encoder *encoder, tmp &= ~OP_MODE_MASK; tmp |= OP_MODE(CMD_MODE_TE_GATE); tmp |= TE_SOURCE_GPIO; + } I915_WRITE(DSI_TRANS_FUNC_CONF(dsi_trans), tmp); } + if (intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE) { + + /* unmask and clear DSI TE interrupt */ + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + tmp = I915_READ(DSI_INTR_MASK_REG(dsi_trans)); + tmp &= ~TE_EVENT; + I915_WRITE(DSI_INTR_MASK_REG(dsi_trans), tmp); + } + gen11_dsi_clear_te_interrupt(encoder); + } + /* enable port sync mode if dual link */ if (intel_dsi->dual_link) { for_each_dsi_port(port, intel_dsi->ports) { From patchwork Wed Aug 8 12:15:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559905 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCF9B96FA for ; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC9E82AAA7 for ; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A102D2AABC; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 653A92AAA7 for ; Wed, 8 Aug 2018 12:26:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 47E016E55E; Wed, 8 Aug 2018 12:26:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8AB916E551 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520864" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:16 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:58 +0530 Message-Id: <1533730559-461-12-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 11/12] drm/i915/icl: Send frame to DSI panel X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP In DSI command mode, for sending the frame to panel DSI controller need to issue the command unlike in DSI video mode. This patch does the same. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/icl_dsi.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index bd3cdde..af72b57 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -117,6 +117,23 @@ static void gen11_dsi_clear_te_interrupt(struct intel_encoder *encoder) } +static void gen11_dsi_initiate_frame_req(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + u32 tmp; + enum port port; + enum transcoder dsi_trans; + + for_each_dsi_port(port, intel_dsi->ports) { + dsi_trans = dsi_port_to_transcoder(port); + tmp = I915_READ(DSI_CMD_FRMCTL(dsi_trans)); + tmp |= PERIODIC_FRAME_UPDATE_ENABLE; + I915_WRITE(DSI_CMD_FRMCTL(dsi_trans), tmp); + } + +} + static void wait_for_cmds_dispatched_to_panel(struct intel_encoder *encoder) { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); @@ -900,6 +917,9 @@ static void gen11_dsi_enable_transcoder(struct intel_encoder *encoder) I965_PIPECONF_ACTIVE, 10)) DRM_ERROR("DSI transcoder not enabled\n"); } + + /* For command mode, send a frame to panel */ + gen11_dsi_initiate_frame_req(encoder); } static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder) From patchwork Wed Aug 8 12:15:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559907 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 52E3C13AC for ; Wed, 8 Aug 2018 12:26:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3FEA12AAA7 for ; Wed, 8 Aug 2018 12:26:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3266E2AAC0; Wed, 8 Aug 2018 12:26:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C71F32AAA7 for ; Wed, 8 Aug 2018 12:26:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7AC326E560; Wed, 8 Aug 2018 12:26:32 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id F2D1D6E552 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520866" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:18 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:59 +0530 Message-Id: <1533730559-461-13-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 12/12] drm/i915/icl: Transcoder timings for command mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP This patch calculate HOTAL and VTOTAL value to be programmed when DSI is operating in command mode as per BSPEC. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/icl_dsi.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index af72b57..c93d02c 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -811,6 +811,12 @@ static void gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder, htotal /= 2; } + if (intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE) { + htotal = hactive + 160; + //TODO: Calculate VTOTAL = ceiling( 400us / Line Time) + //Info missing from BSPEC + } + /* minimum hactive as per bspec: 256 pixels */ if (adjusted_mode->crtc_hdisplay < 256) DRM_ERROR("hactive is less then 256 pixels\n");