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Note the default destination mode is still Logical (Cluster) mode. Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich --- Changes since v1: - Use a boolean rather than a choice. - Expand to X2APIC_PHYSICAL. --- TBH I wasn't sure whether to keep X2APIC_PHYSICAL or X2APIC_LOGICAL as the Kconfig option, went with X2APIC_PHYSICAL because that's the define the code was already using. --- xen/arch/x86/Kconfig | 18 ++++++++++++++++++ xen/arch/x86/genapic/x2apic.c | 6 ++++-- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 1e31edc99f..6bed72b791 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -226,6 +226,24 @@ config XEN_ALIGN_2M endchoice +config X2APIC_PHYSICAL + bool "x2APIC Physical Destination mode" + help + Use x2APIC Physical Destination mode by default when available. + + When using this mode APICs are addressed using the Physical + Destination mode, which allows using all dynamic vectors on each + CPU independently. + + Physical Destination has the benefit of having more vectors available + for external interrupts, but it also makes the delivery of multi + destination inter processor interrupts (IPIs) slightly slower than + Logical Destination mode. + + The mode when this option is not selected is Logical Destination. + + If unsure, say N. + config GUEST bool diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index de5032f202..7dfc793514 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -228,7 +228,7 @@ static struct notifier_block x2apic_cpu_nfb = { .notifier_call = update_clusterinfo }; -static s8 __initdata x2apic_phys = -1; /* By default we use logical cluster mode. */ +static int8_t __initdata x2apic_phys = -1; boolean_param("x2apic_phys", x2apic_phys); const struct genapic *__init apic_x2apic_probe(void) @@ -241,7 +241,9 @@ const struct genapic *__init apic_x2apic_probe(void) * the usage of the high 16 bits to hold the cluster ID. */ x2apic_phys = !iommu_intremap || - (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL); + (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) || + (IS_ENABLED(CONFIG_X2APIC_PHYSICAL) && + !(acpi_gbl_FADT.flags & ACPI_FADT_APIC_CLUSTER)); } else if ( !x2apic_phys ) switch ( iommu_intremap ) From patchwork Thu Jun 30 08:54:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 12901439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1098C43334 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?XIwu6GgC2e5Jw07qlHpGsmsKcUQ4?= =?utf-8?q?Gv3gQ5De5mwV0z47yTI/KXIlobbbVJbk3Eh+mqIoVgInxg2vnU+zOUJJZSpjyATYJ?= =?utf-8?q?qHYiYGpz/ff1P20dqXmP3v70YxhDhsGxlk7d2nutUEeeUhuryyEzfsffiafl4HI0z?= =?utf-8?q?0LbcX6v1kQXCYESDzBXGc5dWJE2D9jzulI0epKDnLreaMgkoOmp/o9YuZTNg7GFQi?= =?utf-8?q?8qk3+LInDwO2M68YPf8NKvp1AqieBp4TlondsUq74fAgTTvUgHuZlUqUDUIRIppI5?= =?utf-8?q?OiDf8zUim8k0W8/KIriDJTfRV+bzdrjYx/ZeQjKbVTfJKJ0YwJlcBW5gQFVv2cVvG?= =?utf-8?q?FCOAMSFfmTjcIgxnCtlS5iKAcDH65ytDTK24O4pCh0bC95hKLRo2ThAeBZhWTqoid?= =?utf-8?q?yiQPGWdRPZcozHEE0+YRtsb06Zix+ujzf8HMgp2lxmQrTyUtWR5jHGN7TyVfzIT/t?= =?utf-8?q?HW190J0BXdh0xVIiz1bUJXY1W51LcPva+p7ojuEOpP8X2s1VLurutFeFtdaB2txW1?= =?utf-8?q?9sIamwShPOfAMxfdw9a3BUaRxgfUiJKHUrHLI2snz3VGmFd8GgxFS7DyvD0Ag+8s5?= =?utf-8?q?zKp8P9Vv8nK6oSCvz1FdFpUIsQ692r85hcMIBXPC4tvBChkbSkNp54lRyIzDq50cw?= =?utf-8?q?UF2VdoqEbZjctjsfKsF/NOspZWZ6TrBS1SAOVxfEMxhHh3DzoXmAAzipjK9OyOXKM?= =?utf-8?q?20vygeYRq3IaFF+agqA4aYXk/7SjLDiJ5zxr+I26zbuhpucRbX3Ugq83eZfuxXA1v?= =?utf-8?q?DNIbAUVkF7g0KaJ2SiLQc3JGsRV+OcObXSi2+AHZPWRt8IaNL+hfImyequuPt5e0r?= =?utf-8?q?jGsQ3hDxgADg7AaIg4UpDQnNEbCaJhn01QNcdfiDUWrSOks5oplrN7N2GkSs79PY1?= =?utf-8?q?bMkQwSfSK0ZzFmgZ0pdTVrp3yASlTZEy9/r4FLCoMLm4o9ntSTJKX0Mx2P09H34SF?= =?utf-8?q?NSp/WkS0PUcf13/BfV3JGmDTuqh9cfNWgpD+3ogE/+eh1b+CoVIzGAW8P8npnJ2Kg?= =?utf-8?q?GjPorOL9FTdR889LK9dw7iSRDgTalQ5hSka3yuwE2Bkw7X+OrA8XMnzAxZn8O5bOS?= =?utf-8?q?rTsXg66uPXgMq+i3Xd9GpTDPm0ms5c/cBBT/VlFmGTScSqReGsTyDwKovH8UpuhiW?= =?utf-8?q?UIp3TAFUl+mcmR1grwTUUIQBwUolWXjFOw6pXq+8lD5yEARZ22NkOPHHjRcQyUxtI?= =?utf-8?q?87Qml/p1RaZckiXvnF2J0NR+DlIF3U6r7Og0TcIeuaG8RCFVtaJ8p0QdxVf+PEb9P?= =?utf-8?q?l3yLxCF0I3v0v2Z+IDLRDbl+BYFpBsru9NIYaQh9gcSsPe/BLi0oyCMwfYy6Mgu0T?= =?utf-8?q?sK5R49aIkSD43qxcRgqCWrMzCrueTcSYF3XK/gdNihQcA8pdgvlwA3ontAwnXt4f9?= =?utf-8?q?SLH5IrKlW+oly4YhyqTTQZH66Hx+ut7kX71tMsbLjeVxzqmBGi372OzWcFMZggD/c?= =?utf-8?q?x7W8xr1EjRkgyKdJTf+371AtbYmSTOrF5zZO2lm6YmzWAS8b6v5Y5/4FuJTivKINw?= =?utf-8?q?U15KDjPWOiNE9ZuUOocgN3PYo+sDwNRQ1Q=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: e3e8a997-0a74-4b5b-91d8-08da5a76659b X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jun 2022 08:56:18.5087 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IdD5NV2ZuhSqfwae47NhMSyNCZd/w/vIqLr/Ns4BDhzEEtMmL+IZHKmEJJcGoM0JhGGZiY9MBdihmQ/bMKx4Gg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR03MB6977 Using cluster mode by default greatly limits the amount of vectors available, as then vector space is shared amongst all the CPUs in the logical cluster. This can lead to vector shortage issues on boxes with not a huge amount of CPUs but with a non-trivial amount of devices. There are reports of boxes with 32 CPUs (2 logical clusters, and thus only 414 dynamic vectors) that run out of vectors and fail to setup interrupts for dom0. This could be considered a regression when switching from xAPIC, as when using xAPIC physical mode is the default when the system has more than 8 CPUs. Note that using Physical Destination mode is less efficient than Logical mode when sending IPIs to multiple CPUs, as in Logical mode IPIs to CPUs on the same Cluster can be batched together. Switch default Kconfig selection to use x2APIC physical destination mode. Signed-off-by: Roger Pau Monné --- Changes since v1: - Expand commit message. --- docs/misc/xen-command-line.pandoc | 5 ++--- xen/arch/x86/Kconfig | 3 ++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index a92b7d228c..952874c4f4 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2646,11 +2646,10 @@ Permit use of x2apic setup for SMP environments. ### x2apic_phys (x86) > `= ` -> Default: `true` if **FADT** mandates physical mode or if interrupt remapping -> is not available, `false` otherwise. +> Default: `false` if **FADT** mandates cluster mode, `true` otherwise. In the case that x2apic is in use, this option switches between physical and -clustered mode. The default, given no hint from the **FADT**, is cluster +clustered mode. The default, given no hint from the **FADT**, is physical mode. ### xenheap_megabytes (arm32) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 6bed72b791..09441761d1 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -228,6 +228,7 @@ endchoice config X2APIC_PHYSICAL bool "x2APIC Physical Destination mode" + default y help Use x2APIC Physical Destination mode by default when available. @@ -242,7 +243,7 @@ config X2APIC_PHYSICAL The mode when this option is not selected is Logical Destination. - If unsure, say N. + If unsure, say Y. config GUEST bool From patchwork Thu Jun 30 08:54:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 12901440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39E15C433EF for ; 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As such move the call after x2APIC BSP setup. Do it as part of init_irq_data(), which is called just after x2APIC BSP init and also makes use of nr_irqs itself. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/io_apic.c | 10 ---------- xen/arch/x86/irq.c | 10 ++++++++++ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index c086f40f63..8d4923ba9a 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2653,16 +2653,6 @@ void __init ioapic_init(void) max_gsi_irqs, nr_irqs_gsi); nr_irqs_gsi = max_gsi_irqs; } - - if ( nr_irqs == 0 ) - nr_irqs = cpu_has_apic ? - max(0U + num_present_cpus() * NR_DYNAMIC_VECTORS, - 8 * nr_irqs_gsi) : - nr_irqs_gsi; - else if ( nr_irqs < 16 ) - nr_irqs = 16; - printk(XENLOG_INFO "IRQ limits: %u GSI, %u MSI/MSI-X\n", - nr_irqs_gsi, nr_irqs - nr_irqs_gsi); } unsigned int arch_hwdom_irqs(domid_t domid) diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index de30ee7779..b51e25f696 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -420,6 +420,16 @@ int __init init_irq_data(void) struct irq_desc *desc; int irq, vector; + if ( nr_irqs == 0 ) + nr_irqs = cpu_has_apic ? max(0U + num_present_cpus() * + NR_DYNAMIC_VECTORS, 8 * nr_irqs_gsi) + : nr_irqs_gsi; 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This is not true when using Logical (Cluster) destination mode, where CPUs in the same cluster share the vector space. Fix by calculating the maximum Cluster ID and use it to derive the number of clusters in the system. Note the code assumes Cluster IDs to be contiguous, or else we will set nr_irqs to a number higher than the real amount of vectors (still not fatal). The number of clusters is then used instead of the number of present CPUs when calculating the value of nr_irqs. Signed-off-by: Roger Pau Monné --- xen/arch/x86/genapic/x2apic.c | 2 +- xen/arch/x86/include/asm/apic.h | 2 ++ xen/arch/x86/irq.c | 10 ++++++++-- xen/arch/x86/mpparse.c | 5 +++++ 4 files changed, 16 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index 7dfc793514..ad95564e90 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -228,7 +228,7 @@ static struct notifier_block x2apic_cpu_nfb = { .notifier_call = update_clusterinfo }; -static int8_t __initdata x2apic_phys = -1; +int8_t __initdata x2apic_phys = -1; boolean_param("x2apic_phys", x2apic_phys); const struct genapic *__init apic_x2apic_probe(void) diff --git a/xen/arch/x86/include/asm/apic.h b/xen/arch/x86/include/asm/apic.h index 7625c0ecd6..6060628836 100644 --- a/xen/arch/x86/include/asm/apic.h +++ b/xen/arch/x86/include/asm/apic.h @@ -27,6 +27,8 @@ enum apic_mode { extern bool iommu_x2apic_enabled; extern u8 apic_verbosity; extern bool directed_eoi_enabled; +extern uint16_t x2apic_max_cluster_id; +extern int8_t x2apic_phys; void check_x2apic_preenabled(void); void x2apic_bsp_setup(void); diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index b51e25f696..b64d18c450 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -421,9 +421,15 @@ int __init init_irq_data(void) int irq, vector; if ( nr_irqs == 0 ) - nr_irqs = cpu_has_apic ? max(0U + num_present_cpus() * - NR_DYNAMIC_VECTORS, 8 * nr_irqs_gsi) + { + unsigned int vec_spaces = + (x2apic_enabled && !x2apic_phys) ? x2apic_max_cluster_id + 1 + : num_present_cpus(); + + nr_irqs = cpu_has_apic ? max(vec_spaces * NR_DYNAMIC_VECTORS, + 8 * nr_irqs_gsi) : nr_irqs_gsi; + } else if ( nr_irqs < 16 ) nr_irqs = 16; diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index d8ccab2449..dc112bffc7 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -131,6 +131,8 @@ static int __init mpf_checksum(unsigned char *mp, int len) return sum & 0xFF; } +uint16_t __initdata x2apic_max_cluster_id; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?1Z7pgiAzG4bbBRMPXw9ZPCbwy1WN?= =?utf-8?q?+UH3LqgCxAckw7jEOubbXg3FcOgY/J3Kj+XHycNSOhbuWhaPbM8Kgqy8wjPgY6Irs?= =?utf-8?q?vdhOxDTFhelu7fqvEg4gSIXMPHxsjJp2jciTHsvrGLup7oZONnLq/fjSq8z/Zh+BI?= =?utf-8?q?ayh+NJryr3OBHBlzyw21YAUMUyX2Yy9hVXzAABERsHRYyAXebU4lag7Cf+/O+3lI7?= =?utf-8?q?vGE453+IVo4GkzRNyK7pB86oCIB5UVpzwRxKWmMIGeAFNgfhze8+/mgjmd5fAj4t8?= =?utf-8?q?w41ffyjGjnOw4lJOdKcJDhJeFIAoQkxvjTL8/kdD9krLBt5npCDQl0DIr0bN4xV4D?= =?utf-8?q?txdofqhmaX1KnUB9WkNIh1eaGXrducUkghHY5nAZ5ulPni4x3V1i4slmKmUdcgXKr?= =?utf-8?q?sueoGWFFpivIW9XhrPAryNQUjiwiE/o7HNNKoUHfvwsF7FXN4NcHhqmb/anSNap+v?= =?utf-8?q?LLp71c918uh5G9sxJfrR4ktp2CSiUgFLd9xOHL6uw77wnYlUo5ZoNCg5phnUbhlf/?= =?utf-8?q?Qe6Y4xLDpGxeYRcHO7qaEEhlBgUqgu+0Fk1W/Cp1iFI2FHyJCjWaK8MCk041YKXo4?= =?utf-8?q?xK6jjBVpmcJnDBbhQd+meL1wP+6qu+r5eRT4rbtCvYKjt6XBUqut851D8s3ZaQLHa?= =?utf-8?q?OyAymrh/IRYBSapUsuC1Pwc9T1AY9Hw0ovpKG3nzNMvEEnrE83lS5z4W0l27k6UfU?= =?utf-8?q?nXgMaGOcCuxwJ2Gbsn06ZPbsbZODhcAX9JvWa28PFOuSk9RGCahzLFgEmZp/2op+Y?= =?utf-8?q?lcHevvdVTb75yBYBB8EakY1K0EEGmbPnMLLw2QlUgvNi060dnDfhgO0dqFWUZEoIs?= =?utf-8?q?WuU1rD7rE4v+HWW8Jg674gO+a1KYZ2cux8O8mEazg/29K8z/zKxg5v/hKZk+khVoR?= =?utf-8?q?fCyiPj9thXZYqZR6xy7VComXUfuZvAOlqyh16W0iILYB8BhmL0uK6pMsitYhouW3Q?= =?utf-8?q?kfLcrJIC0Eyf/pYPwGY+6XWkFYorhgFpyfJX6ATUWqCRKumGKVbcOacO7JqSk1YCC?= =?utf-8?q?cOWZsAmh+doWYTK5A0UdMaCyftC8fdh1iZfdO37fkAqpUEV6P608JiOaf3xRvvhVJ?= =?utf-8?q?qjfkLOFq2XOK35bUVC9FgVc4tPUporqE39Ti3hkiRu2/DzJnPMHZBgq6WKHgEdkL3?= =?utf-8?q?w7VJKihnY3XsJNc6LAx/2Le90nWSJZBcr4Vl6m51aEYzDar5eDfT+mX61uQjhkg8k?= =?utf-8?q?4fHXb2yj1sp/xYE6t3RGWDBLGW4LP+5vMbLlfxhYeD7NQYFcmU3xaV/apVd4eS1Jh?= =?utf-8?q?IlJtpf8Q6ls+ijY+94pwUkRpKOoMcUJNR0VvsjIgDTNcItKj/ewNmQhtjtIw1ShiS?= =?utf-8?q?dGLnwieQoqjxnmCtiO+vZPEmf7G+cIjPgPXCnzrviNlrC2YPRA4Ny5VbkTaaRw3us?= =?utf-8?q?w+gtcRvG6D50UviGk5vVlIgWiehb/sYy5aSRi/s37i3B/nYE0TgUoQEeOardBXaU5?= =?utf-8?q?1qer5qLsur2t1yiDcrNFibsS0W1RqUE3g66ArSPMfIxsZh9UlveqhTu/yfed6Si+8?= =?utf-8?q?wv64xxN6xThOq2LDJZCErSHBCN5yHP849Q=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8f1c599f-42a5-4511-8392-08da5a766f40 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jun 2022 08:56:34.6736 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 4xFg4qZKlk1Tg4Theh8+zFCFjQ+N+X5oPIzhPVweVNfWwtNUulhtg6/QQCzA8U9tf77MFDapCoZvujjnd5sBNw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB6699 Using nr_irqs minus nr_irqs_gsi is misleading, as GSI interrupts are not allocated unless requested by the hardware domain, so a hardware domain could not use any GSI (or just one for the ACPI SCI), and hence (almost) all nr_irqs will be available for MSI(-X) usage. No functional difference, just affects the printed message. Signed-off-by: Roger Pau Monné --- xen/arch/x86/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index b64d18c450..7f75ec8bcc 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -434,7 +434,7 @@ int __init init_irq_data(void) nr_irqs = 16; printk(XENLOG_INFO "IRQ limits: %u GSI, %u MSI/MSI-X\n", - nr_irqs_gsi, nr_irqs - nr_irqs_gsi); + nr_irqs_gsi, nr_irqs); for ( vector = 0; vector < X86_NR_VECTORS; ++vector ) this_cpu(vector_irq)[vector] = INT_MIN; From patchwork Thu Jun 30 08:54:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Roger_Pau_Monn=C3=A9?= X-Patchwork-Id: 12901443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 54B81C43334 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?RaY7d1REn6D7ybaMqiz6RoKB3G6u?= =?utf-8?q?AJcepefrm1OdwA6wej78Q04+pH/YqjWLtNVvLDu7yQcgolh76NpUM08s27aQDwQCH?= =?utf-8?q?8mxMJ7im4J+wNc1349J8bC5BJaDvwmsItgzrmkhwROQdU/3H0hA3d34ikK/sxKuuX?= =?utf-8?q?lH+USrlVl1A58fWpYjLia0BbrB2xeikmtMQGBa+uuya7yrAcND+SOLI8r0thjg6gV?= =?utf-8?q?AHLIibQLDWhiV3NGndhjDc4oiST+9KBmXi8Cy1GLxVysOwDWh+BIYNWnmkZvBoI0w?= =?utf-8?q?b4XNIl/E115cUE1hghKOlzwFrhaXZowqyKt6Lp92yNIeVyMbsPTFvwd41K5IuBXyA?= =?utf-8?q?ppHXlqK6bdWDaJAL9fGNXxcS3QV5GmC6CMk1FJ6De/TQ9z6YLsWMqLcYj7S8XKHfj?= =?utf-8?q?vbADpyzD3ef99MHF5LElqy2zo9qrbr43g9AW9FYFMAac2pkCRCusySjzkNIk3vaNH?= =?utf-8?q?MwnP2RdJN5pj/NisRUp7+8Fqgr9sYlEFWCIqzEhXrKkfmenHOg7i7k4vPDxNYjuNm?= =?utf-8?q?Y6CcLkJ9Izrrg405waCnDj4+SirEP5TIMqBfl/iKDhF99dVAuo4Sx6EJnUFJi7aAg?= =?utf-8?q?6mHK6Pe2XRNCvAP4Ew/xEt04SLd7xnjCpKsnzWRxR4Tfgvqmf8oM12vRRr0qY8Usl?= =?utf-8?q?QzpnUNN6x1jeTCfFO6FkWBGWqbmc/bwzNZYm7DbXOVXbeyrzjhD5EgD9e3aXEU1zW?= =?utf-8?q?LYJGIMTo6QVz9Od71X3Dq3U2UM8VpX4J+WutFH143CwMSkOBdzojlkk5wxd6rAOk8?= =?utf-8?q?yqoVorRC0BNxicxQpxQMYGRCRi+P4Kz5HI7gXzfMb53fhFSSJJGHX3AyQSJR40POt?= =?utf-8?q?dcXwcf7LV8SHjV6aXjsVPqzPmM/ppDXRYk6Le7gru4Zd9MV0Bru/mA6Zryh9wkOsi?= =?utf-8?q?UKbp/qle10tcIH+4lwqnlTt0pFzHKMgLcqIp/PEJZ3ijRgSgki34sLYq1+lAXaLjr?= =?utf-8?q?xtxcda13BXrp6cFQHz8glttpJu2QEutEaBYWTMQ6DrNz7T99NF6xGVXkgw6NbLUZP?= =?utf-8?q?H+8QBJzgzTxmHhXMMvSo1Akhu2HK7gD+S9f+xepw26PTUo2IyQEh2wmg8RJ2hLRGh?= =?utf-8?q?D6eiOiDfCxRNX8qSj39V7efCS7KMChX7wBXt3NaEwOMr/3IeezAyywB6GNAe8U15W?= =?utf-8?q?pfmVdxPUno9aKu9xEuoE6qIPdNE3rdeHz0DXqGI/eOYILBhFnGBb1J7iOyjIXao8K?= =?utf-8?q?ul7ZGVFwhv/Ep5tf61zHt5N/N02oLu1REsOJcRZScI+BMZk9syNJ8yLia+OzGcpG2?= =?utf-8?q?LHPNYDxX38Sbm+Sm7uJQbYUaxoyHFJhTWbufiIDFC5CnL7jI3exJek+G3tNhhVQSm?= =?utf-8?q?GeOxGvVe2R86jGON5BXA7oEhHa8GdZ0W/9qlsjuqaA+VnCPovn81oDmDeSuyQK8gm?= =?utf-8?q?mR9GNQO1LH6W9KoO1AAIjjqf0sMSelDdZASQ5ePM6WC1TGPqxVR9lG27nHk4C51iN?= =?utf-8?q?CtVydES/5N7G9P7ibgJmYR6uTwqyX3ey7RieVfr9TBpYF7PR1jOZosk72I86E7KDm?= =?utf-8?q?1aAKvaaAkjK7U21pZH9isKinzV5Q1KecEQ=3D=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 895b7875-2d61-4f85-5a55-08da5a7671e8 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jun 2022 08:56:39.2071 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jGEhCFpryh4CfPmJ8Kiiii/VdSf6JS0dnhrhwdQUMUuV5lTluoLh62viBUNY+WVwk0ta306MdAMgytpgBhMuPg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB6699 When using an APIC do not set nr_irqs based on a factor of nr_irqs_gsi (currently x8), and instead do so exclusively based on the amount of available vectors on the system. There's no point in setting nr_irqs to a value higher than the available set of vectors, as vector allocation will fail anyway. Fixes: e99d45da8a ('x86/x2apic: properly implement cluster mode') Signed-off-by: Roger Pau Monné --- xen/arch/x86/irq.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 7f75ec8bcc..e3b0bee527 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -426,8 +426,7 @@ int __init init_irq_data(void) (x2apic_enabled && !x2apic_phys) ? x2apic_max_cluster_id + 1 : num_present_cpus(); - nr_irqs = cpu_has_apic ? max(vec_spaces * NR_DYNAMIC_VECTORS, - 8 * nr_irqs_gsi) + nr_irqs = cpu_has_apic ? vec_spaces * NR_DYNAMIC_VECTORS : nr_irqs_gsi; } else if ( nr_irqs < 16 )