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Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 1/6] vfio/pci: Mask INTx during runtime suspend Date: Fri, 1 Jul 2022 16:38:09 +0530 Message-ID: <20220701110814.7310-2-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7f52d75d-a1e5-434a-dff9-08da5b5207d4 X-MS-TrafficTypeDiagnostic: DM5PR12MB1401:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: J8FbxU+SOc9yH+1O+LufotCHNx0XAihAMUdae0yXh4U36cSND0C5zV64n74JYgbm5PlntoRLPkc9LicXv8AVJ8vBksWmC/bCA42Htx1nuIpI6sTmly4R1FzK/TCikoAJVl88HyBgJizWNVqRpusfmPlbki8bC6h9cgqrrHIrDvKrXvO5or3obpd/zD3Xish+swG6Pb/USqAYKG0oOfgAsriXxFxwqxHMR1kiXZ7/B93yYn9FSVoSYlLtv0bOhmk2NR486pl7ETHTopSCGrb5vl8if0A6yVmDLGBo2Msngzpi5lC+q0eG8cKCEQcs/nFfRzMnGEkhRZ4ovvzj2h5NSORr0EoVZIXX1nyKY4Ne3iAt8wf3ckagBKXhR1G6ugSUNX9ojx+hiRIZlCY6rs83/j4GLZBQtbtDT7dRaSbW6AUsvMoLZ9QPfJEmIbw2h2pq/pPV1WfapuBApjY9FuVoFvPK/NI4rIgb+0xvniAuoLtE2cBWCNsXpluEFgbkH6TLmuduTZTVGvoF0gU1ANqwkbQBRcsC6l74mmJJP5LsaAZ2vH8NGhkBFWmqNFwuIckwneGO8+9r5IpqCrmM9svJge9qkCdgxKjJ972/cyaDctu+xSsY3CWiahAXCwHbTVtRiTAX9JxIxPh9FpZgKEK0vqsmSM6esJQt9iGr0OYqWquo4zTKeTfAkazX1j9TCtZGTLqFC1rmnOIBHMNYCIi/nwWA9XmFV6OvXiiSU0KdcawCnCpOVNEfA5Cmeo2yvPkX/IT4wqt4Uj4JuY8M44DxXyjnYiWOpCPp0JMeH2dmVW8AbcsiYYGjJ+MiC4sXYl7zzDxUmnsN59SS2CYG5UKAUUN+0KBpWJoQZe1xfeR6ZMs= X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(396003)(346002)(136003)(376002)(39860400002)(46966006)(40470700004)(36840700001)(26005)(7696005)(6666004)(478600001)(82740400003)(15650500001)(110136005)(40460700003)(54906003)(70586007)(36756003)(40480700001)(82310400005)(70206006)(316002)(36860700001)(2906002)(107886003)(186003)(1076003)(86362001)(83380400001)(2616005)(8936002)(7416002)(336012)(426003)(81166007)(4326008)(5660300002)(47076005)(8676002)(356005)(41300700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:30.1933 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7f52d75d-a1e5-434a-dff9-08da5b5207d4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1401 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch adds INTx handling during runtime suspend/resume. All the suspend/resume related code for the user to put the device into the low power state will be added in subsequent patches. The INTx are shared among devices. Whenever any INTx interrupt comes for the VFIO devices, then vfio_intx_handler() will be called for each device. Inside vfio_intx_handler(), it calls pci_check_and_mask_intx() and checks if the interrupt has been generated for the current device. Now, if the device is already in the D3cold state, then the config space can not be read. Attempt to read config space in D3cold state can cause system unresponsiveness in a few systems. To prevent this, mask INTx in runtime suspend callback and unmask the same in runtime resume callback. If INTx has been already masked, then no handling is needed in runtime suspend/resume callbacks. 'pm_intx_masked' tracks this, and vfio_pci_intx_mask() has been updated to return true if INTx has been masked inside this function. For the runtime suspend which is triggered for the no user of VFIO device, the is_intx() will return false and these callbacks won't do anything. The MSI/MSI-X are not shared so similar handling should not be needed for MSI/MSI-X. vfio_msihandler() triggers eventfd_signal() without doing any device-specific config access. When the user performs any config access or IOCTL after receiving the eventfd notification, then the device will be moved to the D0 state first before servicing any request. Signed-off-by: Abhishek Sahu --- drivers/vfio/pci/vfio_pci_core.c | 37 +++++++++++++++++++++++++++---- drivers/vfio/pci/vfio_pci_intrs.c | 6 ++++- include/linux/vfio_pci_core.h | 3 ++- 3 files changed, 40 insertions(+), 6 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index a0d69ddaf90d..5948d930449b 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -259,16 +259,45 @@ int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t stat return ret; } +#ifdef CONFIG_PM +static int vfio_pci_core_runtime_suspend(struct device *dev) +{ + struct vfio_pci_core_device *vdev = dev_get_drvdata(dev); + + /* + * If INTx is enabled, then mask INTx before going into the runtime + * suspended state and unmask the same in the runtime resume. + * If INTx has already been masked by the user, then + * vfio_pci_intx_mask() will return false and in that case, INTx + * should not be unmasked in the runtime resume. + */ + vdev->pm_intx_masked = (is_intx(vdev) && vfio_pci_intx_mask(vdev)); + + return 0; +} + +static int vfio_pci_core_runtime_resume(struct device *dev) +{ + struct vfio_pci_core_device *vdev = dev_get_drvdata(dev); + + if (vdev->pm_intx_masked) + vfio_pci_intx_unmask(vdev); + + return 0; +} +#endif /* CONFIG_PM */ + /* - * The dev_pm_ops needs to be provided to make pci-driver runtime PM working, - * so use structure without any callbacks. - * * The pci-driver core runtime PM routines always save the device state * before going into suspended state. If the device is going into low power * state with only with runtime PM ops, then no explicit handling is needed * for the devices which have NoSoftRst-. */ -static const struct dev_pm_ops vfio_pci_core_pm_ops = { }; +static const struct dev_pm_ops vfio_pci_core_pm_ops = { + SET_RUNTIME_PM_OPS(vfio_pci_core_runtime_suspend, + vfio_pci_core_runtime_resume, + NULL) +}; int vfio_pci_core_enable(struct vfio_pci_core_device *vdev) { diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 6069a11fb51a..1a37db99df48 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -33,10 +33,12 @@ static void vfio_send_intx_eventfd(void *opaque, void *unused) eventfd_signal(vdev->ctx[0].trigger, 1); } -void vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) +/* Returns true if INTx has been masked by this function. */ +bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) { struct pci_dev *pdev = vdev->pdev; unsigned long flags; + bool intx_masked = false; spin_lock_irqsave(&vdev->irqlock, flags); @@ -60,9 +62,11 @@ void vfio_pci_intx_mask(struct vfio_pci_core_device *vdev) disable_irq_nosync(pdev->irq); vdev->ctx[0].masked = true; + intx_masked = true; } spin_unlock_irqrestore(&vdev->irqlock, flags); + return intx_masked; } /* diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 23c176d4b073..cdfd328ba6b1 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -124,6 +124,7 @@ struct vfio_pci_core_device { bool needs_reset; bool nointx; bool needs_pm_restore; + bool pm_intx_masked; struct pci_saved_state *pci_saved_state; struct pci_saved_state *pm_save; int ioeventfds_nr; @@ -147,7 +148,7 @@ struct vfio_pci_core_device { #define is_irq_none(vdev) (!(is_intx(vdev) || is_msi(vdev) || is_msix(vdev))) #define irq_is(vdev, type) (vdev->irq_type == type) -extern void vfio_pci_intx_mask(struct vfio_pci_core_device *vdev); +extern bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev); extern void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev); extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, From patchwork Fri Jul 1 11:08:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 12903174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2B91C43334 for ; Fri, 1 Jul 2022 11:09:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236987AbiGALJA (ORCPT ); Fri, 1 Jul 2022 07:09:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237042AbiGALI5 (ORCPT ); Fri, 1 Jul 2022 07:08:57 -0400 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2048.outbound.protection.outlook.com [40.107.243.48]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA51113DEA; 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Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 2/6] vfio: Add a new device feature for the power management Date: Fri, 1 Jul 2022 16:38:10 +0530 Message-ID: <20220701110814.7310-3-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef5353e0-0330-4d04-87b1-08da5b5212d8 X-MS-TrafficTypeDiagnostic: BYAPR12MB2632:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 05+ghnD6cpU5ybByA7kxBnDsiD9RYaPUzhFPmmEiiwtyyRSsPF3X6cwfU316AObSdvblUV6JMYUG3x1FyxyyleGCodlfGD16Uhu71yqbTUf2+dgpLycNnniuifTNgN1BThxo6S33i1/wMpRzUKZvxevWbrY6o3zPhSXVRnPK57SlQsQn4SGo3Smj0bRjO1kD/7mJP30NjFDSDdbkGJ8oMGgZpFVv21B9DvKSQGnNAiv6Z7XUptR1hOQUPNSEpjeIfdFwZM0k0OMBJJVjm0W9F1bX7ORO6Li8Ie/bjWW9VGiSC+dF7EgSwALn9MJC1leFEr7YR1MiR7F9Z94Idap32MDoUBa1R7xx53UGTrvcnjmy2NGGl/IpqnNbmBu4y4GKhEUrf8VYzo6KhHudFvqNmzln2zROTlpmjzXsHM+mxeAaxPXK0d4AqzfRDmu6PmvaVAPpPFaVjAnndrLY9G+CPzM3019Gf/QpgxtknfE/5p+yDzb+cK7ww+mHai1VrqtwxA7dXRKT7D+875LGjxlLvtFW/u640b3biQigqOm+ad/3ADbZjTh3eXVrVADONpW6NtzVrBC55t1eD4go/kdvjUII8IzmvZYBUouU3ZctHv4cD1Dc8gIPgzCeOCttiPM80eRvewt8pwVr+y9fcKKY6C/sOTYJWNrIjaZ5lqENEGAm1HgGBMgzcu4Eo/Z1faxri8ooj5XzCxZyiKLpfUo2wPhI8QQKNUdmYh5mbCo2LRd4TmOG9FbNCWqK45ky94OkmirFK2OgPMwBf9yoMQitK7OjJro1aroJEdMKEpfUzH+jAHlsuALtNkxCtTOeJ6/s/Q1h7u/ppcnwbqORA9ZdWwBVt6Hqkc+Tdfa0ql3EKSU= X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(376002)(396003)(39860400002)(346002)(136003)(40470700004)(36840700001)(46966006)(70206006)(426003)(83380400001)(41300700001)(36860700001)(54906003)(81166007)(186003)(110136005)(107886003)(2616005)(82310400005)(336012)(356005)(1076003)(82740400003)(40460700003)(70586007)(86362001)(7696005)(8936002)(478600001)(4326008)(47076005)(7416002)(316002)(8676002)(2906002)(36756003)(26005)(5660300002)(40480700001)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:48.6722 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef5353e0-0330-4d04-87b1-08da5b5212d8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT014.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2632 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch adds the new feature VFIO_DEVICE_FEATURE_POWER_MANAGEMENT for the power management in the header file. The implementation for the same will be added in the subsequent patches. With the standard registers, all power states cannot be achieved. The platform-based power management needs to be involved to go into the lowest power state. For all the platform-based power management, this device feature can be used. This device feature uses flags to specify the different operations. In the future, if any more power management functionality is needed then a new flag can be added to it. It supports both GET and SET operations. Signed-off-by: Abhishek Sahu --- include/uapi/linux/vfio.h | 55 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 733a1cddde30..7e00de5c21ea 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -986,6 +986,61 @@ enum vfio_device_mig_state { VFIO_DEVICE_STATE_RUNNING_P2P = 5, }; +/* + * Perform power management-related operations for the VFIO device. + * + * The low power feature uses platform-based power management to move the + * device into the low power state. This low power state is device-specific. + * + * This device feature uses flags to specify the different operations. + * It supports both the GET and SET operations. + * + * - VFIO_PM_LOW_POWER_ENTER flag moves the VFIO device into the low power + * state with platform-based power management. This low power state will be + * internal to the VFIO driver and the user will not come to know which power + * state is chosen. Once the user has moved the VFIO device into the low + * power state, then the user should not do any device access without moving + * the device out of the low power state. + * + * - VFIO_PM_LOW_POWER_EXIT flag moves the VFIO device out of the low power + * state. This flag should only be set if the user has previously put the + * device into low power state with the VFIO_PM_LOW_POWER_ENTER flag. + * + * - VFIO_PM_LOW_POWER_ENTER and VFIO_PM_LOW_POWER_EXIT are mutually exclusive. + * + * - VFIO_PM_LOW_POWER_REENTERY_DISABLE flag is only valid with + * VFIO_PM_LOW_POWER_ENTER. If there is any access for the VFIO device on + * the host side, then the device will be moved out of the low power state + * without the user's guest driver involvement. Some devices require the + * user's guest driver involvement for each low-power entry. If this flag is + * set, then the re-entry to the low power state will be disabled, and the + * host kernel will not move the device again into the low power state. + * The VFIO driver internally maintains a list of devices for which low + * power re-entry is disabled by default and for those devices, the + * re-entry will be disabled even if the user has not set this flag + * explicitly. + * + * For the IOCTL call with VFIO_DEVICE_FEATURE_GET: + * + * - VFIO_PM_LOW_POWER_ENTER will be set if the user has put the device into + * the low power state, otherwise, VFIO_PM_LOW_POWER_EXIT will be set. + * + * - If the device is in a normal power state currently, then + * VFIO_PM_LOW_POWER_REENTERY_DISABLE will be set for the devices where low + * power re-entry is disabled by default. If the device is in the low power + * state currently, then VFIO_PM_LOW_POWER_REENTERY_DISABLE will be set + * according to the current transition. + */ +struct vfio_device_feature_power_management { + __u32 flags; +#define VFIO_PM_LOW_POWER_ENTER (1 << 0) +#define VFIO_PM_LOW_POWER_EXIT (1 << 1) +#define VFIO_PM_LOW_POWER_REENTERY_DISABLE (1 << 2) + __u32 reserved; +}; + +#define VFIO_DEVICE_FEATURE_POWER_MANAGEMENT 3 + /* -------- API for Type1 VFIO IOMMU -------- */ /** From patchwork Fri Jul 1 11:08:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 12903172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E57A6C43334 for ; Fri, 1 Jul 2022 11:08:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236664AbiGALIr (ORCPT ); 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Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 3/6] vfio: Increment the runtime PM usage count during IOCTL call Date: Fri, 1 Jul 2022 16:38:11 +0530 Message-ID: <20220701110814.7310-4-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e9d343ed-8593-489d-b16e-08da5b520e1e X-MS-TrafficTypeDiagnostic: MWHPR12MB1824:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: W0TMRd/RSF/wyqGloh/OpMKKy/SAeHXFWTyUtfy0Ajk6Jkrq45gcka8/h08Tmg8wW8BqP/Htig8C92d83VK2pkC0X+aA9Q0612rKP5DPQXeBZaB7o3RxBFO3TQpcEx1ex7tRNVHV1qWDXeOEn89K0eu0lETeXCcaNwG9an/QhWZsxrUScXBz7CRfxbLWpVS2n3GPaM5OzMoW7kEAFgUI1uWDcwxJTjJfQFDEvEq239b3S0+2YMtGfT5PQ89zuTeWucQmNCOrVTKc5hLzvNWu0pfsPUEoZv50sSVO7xurWsKDIcwZlWczfW6+Jrz8xMVzgBfjjapTm4SnyC0WExuD9Bq+KeqKVkT/egUze60BPj5UTW+6i0PV0aX9F43CGu3rTpOsGVq1ms8R5BqEJmWaPwad6v1rJ8TsPmJ9QiS2QON3uUbLW93p/nSXj/GfWLttYLGKz6X3qs50H7uvXm1gZTvXlmvhLii/PoImsrgocfl6uogbNXDRZPjpid8/RG/QO+Rm/JKHB6M04naa9g4QPz7qG4lpw7Kv9i0vhTV1zXfXVq785Lv6sAOYp/q85SgG0x6wvKadctlG+ekBYjlovI30rra4MblG06ll29a19U+KTRpogsVDZj81knMeyh7+1srEIuxPeHZcZ881UNt9kWoSVv1fwOgEAkliV+sBd6vs6OIWklgQLONnQdMj30s1N+fIA/YdJng7FKKXK2hnNFTCEHgA8jvHsuJSl59hOXEJCfZWuHv8Cr2TU1hv88ZoXpk8OhWwwZ2DT9kq20i2PSE8sZust0xP0CXYudEX+lvdap7fsntaPBVOILQSlmPciAaA3u53iepCZYNZxey4WWd7anhYNnvvE3gnkCN+s9w= X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(396003)(39860400002)(136003)(46966006)(40470700004)(36840700001)(336012)(426003)(36860700001)(316002)(5660300002)(8936002)(83380400001)(7416002)(4326008)(47076005)(70586007)(356005)(40480700001)(40460700003)(8676002)(86362001)(41300700001)(7696005)(70206006)(36756003)(107886003)(1076003)(81166007)(26005)(82740400003)(82310400005)(186003)(6666004)(54906003)(2616005)(2906002)(110136005)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:40.7591 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e9d343ed-8593-489d-b16e-08da5b520e1e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT062.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1824 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The vfio-pci based driver will have runtime power management support where the user can put the device into the low power state and then PCI devices can go into the D3cold state. If the device is in the low power state and the user issues any IOCTL, then the device should be moved out of the low power state first. Once the IOCTL is serviced, then it can go into the low power state again. The runtime PM framework manages this with help of usage count. One option was to add the runtime PM related API's inside vfio-pci driver but some IOCTL (like VFIO_DEVICE_FEATURE) can follow a different path and more IOCTL can be added in the future. Also, the runtime PM will be added for vfio-pci based drivers variant currently, but the other VFIO based drivers can use the same in the future. So, this patch adds the runtime calls runtime-related API in the top-level IOCTL function itself. For the VFIO drivers which do not have runtime power management support currently, the runtime PM API's won't be invoked. Only for vfio-pci based drivers currently, the runtime PM API's will be invoked to increment and decrement the usage count. Taking this usage count incremented while servicing IOCTL will make sure that the user won't put the device into low power state when any other IOCTL is being serviced in parallel. Let's consider the following scenario: 1. Some other IOCTL is called. 2. The user has opened another device instance and called the power management IOCTL for the low power entry. 3. The power management IOCTL moves the device into the low power state. 4. The other IOCTL finishes. If we don't keep the usage count incremented then the device access will happen between step 3 and 4 while the device has already gone into the low power state. The runtime PM API's should not be invoked for VFIO_DEVICE_FEATURE_POWER_MANAGEMENT since this IOCTL itself performs the runtime power management entry and exit for the VFIO device. The pm_runtime_resume_and_get() will be the first call so its error should not be propagated to user space directly. For example, if pm_runtime_resume_and_get() can return -EINVAL for the cases where the user has passed the correct argument. So the pm_runtime_resume_and_get() errors have been masked behind -EIO. Signed-off-by: Abhishek Sahu --- drivers/vfio/vfio.c | 82 ++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 74 insertions(+), 8 deletions(-) diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c index 61e71c1154be..61a8d9f7629a 100644 --- a/drivers/vfio/vfio.c +++ b/drivers/vfio/vfio.c @@ -32,6 +32,7 @@ #include #include #include +#include #include "vfio.h" #define DRIVER_VERSION "0.3" @@ -1333,6 +1334,39 @@ static const struct file_operations vfio_group_fops = { .release = vfio_group_fops_release, }; +/* + * Wrapper around pm_runtime_resume_and_get(). + * Return error code on failure or 0 on success. + */ +static inline int vfio_device_pm_runtime_get(struct vfio_device *device) +{ + struct device *dev = device->dev; + + if (dev->driver && dev->driver->pm) { + int ret; + + ret = pm_runtime_resume_and_get(dev); + if (ret < 0) { + dev_info_ratelimited(dev, + "vfio: runtime resume failed %d\n", ret); + return -EIO; + } + } + + return 0; +} + +/* + * Wrapper around pm_runtime_put(). + */ +static inline void vfio_device_pm_runtime_put(struct vfio_device *device) +{ + struct device *dev = device->dev; + + if (dev->driver && dev->driver->pm) + pm_runtime_put(dev); +} + /* * VFIO Device fd */ @@ -1607,6 +1641,8 @@ static int vfio_ioctl_device_feature(struct vfio_device *device, { size_t minsz = offsetofend(struct vfio_device_feature, flags); struct vfio_device_feature feature; + int ret = 0; + u16 feature_cmd; if (copy_from_user(&feature, arg, minsz)) return -EFAULT; @@ -1626,28 +1662,51 @@ static int vfio_ioctl_device_feature(struct vfio_device *device, (feature.flags & VFIO_DEVICE_FEATURE_GET)) return -EINVAL; - switch (feature.flags & VFIO_DEVICE_FEATURE_MASK) { + feature_cmd = feature.flags & VFIO_DEVICE_FEATURE_MASK; + + /* + * The VFIO_DEVICE_FEATURE_POWER_MANAGEMENT itself performs the runtime + * power management entry and exit for the VFIO device, so the runtime + * PM API's should not be called for this feature. + */ + if (feature_cmd != VFIO_DEVICE_FEATURE_POWER_MANAGEMENT) { + ret = vfio_device_pm_runtime_get(device); + if (ret) + return ret; + } + + switch (feature_cmd) { case VFIO_DEVICE_FEATURE_MIGRATION: - return vfio_ioctl_device_feature_migration( + ret = vfio_ioctl_device_feature_migration( device, feature.flags, arg->data, feature.argsz - minsz); + break; case VFIO_DEVICE_FEATURE_MIG_DEVICE_STATE: - return vfio_ioctl_device_feature_mig_device_state( + ret = vfio_ioctl_device_feature_mig_device_state( device, feature.flags, arg->data, feature.argsz - minsz); + break; default: if (unlikely(!device->ops->device_feature)) - return -EINVAL; - return device->ops->device_feature(device, feature.flags, - arg->data, - feature.argsz - minsz); + ret = -EINVAL; + else + ret = device->ops->device_feature( + device, feature.flags, arg->data, + feature.argsz - minsz); + break; } + + if (feature_cmd != VFIO_DEVICE_FEATURE_POWER_MANAGEMENT) + vfio_device_pm_runtime_put(device); + + return ret; } static long vfio_device_fops_unl_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) { struct vfio_device *device = filep->private_data; + int ret; switch (cmd) { case VFIO_DEVICE_FEATURE: @@ -1655,7 +1714,14 @@ static long vfio_device_fops_unl_ioctl(struct file *filep, default: if (unlikely(!device->ops->ioctl)) return -EINVAL; - return device->ops->ioctl(device, cmd, arg); + + ret = vfio_device_pm_runtime_get(device); + if (ret) + return ret; + + ret = device->ops->ioctl(device, cmd, arg); + vfio_device_pm_runtime_put(device); + return ret; } } From patchwork Fri Jul 1 11:08:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 12903173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48C5FC43334 for ; Fri, 1 Jul 2022 11:08:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237049AbiGALI5 (ORCPT ); Fri, 1 Jul 2022 07:08:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237034AbiGALIw (ORCPT ); Fri, 1 Jul 2022 07:08:52 -0400 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2074.outbound.protection.outlook.com [40.107.93.74]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57B8313DD5; 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Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 4/6] vfio/pci: Add the support for PCI D3cold state Date: Fri, 1 Jul 2022 16:38:12 +0530 Message-ID: <20220701110814.7310-5-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d572e190-f921-49b5-b3e9-08da5b5211df X-MS-TrafficTypeDiagnostic: DM5PR1201MB0235:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3FjsfiUcQ94vPJfxFPPeuE8jQf78r8lbvx97x0sDtOvS/dtZAkTXPUi0bvx7dqICkm+qYPCGq3xnf+BrnpjbA2TsZOjtLverV/MHVc4rOra1kvKIpCtRYeP9Zuft8sJP+bTKevItwh7fQU0dZOjuxJq/ULWmpXnIn1h6dmDp03Dxfo6PNCponGPk1P+AdsolYvVzBIpnO87ZlIkCoOKsXh7EXfj1F0Ff4ApuYxVPavAmbFEgbjXz7D0s047Z1deaJoGTZKoFlBPizK8CM1tX44T10x9wHigOtqB8cxuoV7YzuuyJAa5W6ExcwlchQ8W7HVI7GOIhCCfthsz/ZweqXq21qVTe/KHGzfId2n9qvmfiFJAhMsIDS/K4b67D/0cS64R9VR4Ol9sATOXC7oADUPXikrhRXrMV4nrX50CQkQTCCeswMVGEeRmIAjUgKS6gPsi8R0QRO49y/RAZ/OaICkaYBvmJxLLjJffuOyS7HBtx1MATqefpbRttZ8FJYfIsy1KKqznjbiB1XEGNzwm3rlFaUX2kb+Apn2X7cyHGMyXFBRFOiLKHkWkdkCTXgGlP+AXdE93R6didalcxdVDlCv62KrNT97DrbuWDtQTj3OHEJjRlnG+slDypeX51i8tARWKnErndl0NCFLqYkfkrMaKzU7ZlHCQqESBb449pI49T8m6reUFTHYlS696YkNRmr3V2Qd9QgOtUtpJ5Ahhtu3TvGKBoT/X4S59R3BVO2qFhwTbCC7adlL3JCxCL0Dn+OhiEMgEv+yQTNDW4auxkuVeXx8jwU91ID4WQT7WYzTZEjQmn0WZ0fnh+PyMSQiOXq5HH7BoYkhyU/2xKO/iytP/lTKUW1E5fFmHCDPSDMd5KwgyzNyeG9jaw5bTd02H6 X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(346002)(136003)(376002)(39860400002)(396003)(36840700001)(46966006)(40470700004)(478600001)(82740400003)(83380400001)(82310400005)(81166007)(356005)(36756003)(2616005)(107886003)(7696005)(41300700001)(316002)(426003)(336012)(186003)(110136005)(1076003)(54906003)(6666004)(47076005)(40480700001)(2906002)(40460700003)(70586007)(30864003)(8676002)(70206006)(4326008)(5660300002)(7416002)(8936002)(86362001)(36860700001)(26005)(32563001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:47.0259 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d572e190-f921-49b5-b3e9-08da5b5211df X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR1201MB0235 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Currently, if the runtime power management is enabled for vfio-pci based devices in the guest OS, then the guest OS will do the register write for PCI_PM_CTRL register. This write request will be handled in vfio_pm_config_write() where it will do the actual register write of PCI_PM_CTRL register. With this, the maximum D3hot state can be achieved for low power. If we can use the runtime PM framework, then we can achieve the D3cold state (on the supported systems) which will help in saving maximum power. 1. D3cold state can't be achieved by writing PCI standard PM config registers. This patch implements the newly added 'VFIO_DEVICE_FEATURE_POWER_MANAGEMENT' device feature which can be used for putting the device into the D3cold state. 2. The hypervisors can implement virtual ACPI methods. For example, in guest linux OS if PCI device ACPI node has _PR3 and _PR0 power resources with _ON/_OFF method, then guest linux OS invokes the _OFF method during D3cold transition and then _ON during D0 transition. The hypervisor can tap these virtual ACPI calls and then call the 'VFIO_DEVICE_FEATURE_POWER_MANAGEMENT' with respective flags. 3. The vfio-pci driver uses runtime PM framework to achieve the D3cold state. For the D3cold transition, decrement the usage count and for the D0 transition, increment the usage count. 4. If the D3cold state is not supported, then the device will still be in the D3hot state. But with the runtime PM, the root port can now also go into the suspended state. 5. The 'pm_runtime_engaged' flag tracks the entry and exit to runtime PM. This flag is protected with 'memory_lock' semaphore. 6. During exit time, the flag clearing and usage count increment are protected with 'memory_lock'. The actual wake-up is happening outside 'memory_lock' since 'memory_lock' will be needed inside runtime_resume callback also in subsequent patches. 7. In D3cold, all kinds of device-related access (BAR read/write, config read/write, etc.) need to be disabled. For BAR-related access, we can use existing D3hot memory disable support. During the low power entry, invalidate the mmap mappings and add the check for 'pm_runtime_engaged' flag. 8. For config space, ideally, we need to return an error whenever there is any config access from the user side once the user moved the device into low power state. But adding a check for 'pm_runtime_engaged' flag alone won't be sufficient due to the following possible scenario from the user side where config space access happens parallelly with the low power entry IOCTL. a. Config space access happens and vfio_pci_config_rw() will be called. b. The IOCTL to move into low power state is called. c. The IOCTL will move the device into d3cold. d. Exit from vfio_pci_config_rw() happened. Now, if we just check 'pm_runtime_engaged', then in the above sequence the config space access will happen when the device already is in the low power state. To prevent this situation, we increment the usage count before any config space access and decrement the same after completing the access. Also, to prevent any similar cases for other types of access, the usage count will be incremented for all kinds of access. Signed-off-by: Abhishek Sahu --- drivers/vfio/pci/vfio_pci_config.c | 2 +- drivers/vfio/pci/vfio_pci_core.c | 169 +++++++++++++++++++++++++++-- include/linux/vfio_pci_core.h | 1 + 3 files changed, 164 insertions(+), 8 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c index 9343f597182d..21a4743d011f 100644 --- a/drivers/vfio/pci/vfio_pci_config.c +++ b/drivers/vfio/pci/vfio_pci_config.c @@ -408,7 +408,7 @@ bool __vfio_pci_memory_enabled(struct vfio_pci_core_device *vdev) * PF SR-IOV capability, there's therefore no need to trigger * faults based on the virtual value. */ - return pdev->current_state < PCI_D3hot && + return !vdev->pm_runtime_engaged && pdev->current_state < PCI_D3hot && (pdev->no_command_memory || (cmd & PCI_COMMAND_MEMORY)); } diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 5948d930449b..8c17ca41d156 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -264,6 +264,18 @@ static int vfio_pci_core_runtime_suspend(struct device *dev) { struct vfio_pci_core_device *vdev = dev_get_drvdata(dev); + down_write(&vdev->memory_lock); + /* + * The user can move the device into D3hot state before invoking + * power management IOCTL. Move the device into D0 state here and then + * the pci-driver core runtime PM suspend function will move the device + * into the low power state. Also, for the devices which have + * NoSoftRst-, it will help in restoring the original state + * (saved locally in 'vdev->pm_save'). + */ + vfio_pci_set_power_state(vdev, PCI_D0); + up_write(&vdev->memory_lock); + /* * If INTx is enabled, then mask INTx before going into the runtime * suspended state and unmask the same in the runtime resume. @@ -386,6 +398,7 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) struct pci_dev *pdev = vdev->pdev; struct vfio_pci_dummy_resource *dummy_res, *tmp; struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp; + bool do_resume = false; int i, bar; /* For needs_reset */ @@ -393,6 +406,25 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) /* * This function can be invoked while the power state is non-D0. + * This non-D0 power state can be with or without runtime PM. + * Increment the usage count corresponding to pm_runtime_put() + * called during setting of 'pm_runtime_engaged'. The device will + * wake up if it has already gone into the suspended state. + * Otherwise, the next vfio_pci_set_power_state() will change the + * device power state to D0. + */ + down_write(&vdev->memory_lock); + if (vdev->pm_runtime_engaged) { + vdev->pm_runtime_engaged = false; + pm_runtime_get_noresume(&pdev->dev); + do_resume = true; + } + up_write(&vdev->memory_lock); + + if (do_resume) + pm_runtime_resume(&pdev->dev); + + /* * This function calls __pci_reset_function_locked() which internally * can use pci_pm_reset() for the function reset. pci_pm_reset() will * fail if the power state is non-D0. Also, for the devices which @@ -1190,6 +1222,99 @@ long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, } EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl); +static int vfio_pci_pm_validate_flags(u32 flags) +{ + if (!flags) + return -EINVAL; + /* Only valid flags should be set */ + if (flags & ~(VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) + return -EINVAL; + /* Both enter and exit should not be set */ + if ((flags & (VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) == + (VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) + return -EINVAL; + + return 0; +} + +static int vfio_pci_core_feature_pm(struct vfio_device *device, u32 flags, + void __user *arg, size_t argsz) +{ + struct vfio_pci_core_device *vdev = + container_of(device, struct vfio_pci_core_device, vdev); + struct pci_dev *pdev = vdev->pdev; + struct vfio_device_feature_power_management vfio_pm = { 0 }; + int ret = 0; + + ret = vfio_check_feature(flags, argsz, + VFIO_DEVICE_FEATURE_SET | + VFIO_DEVICE_FEATURE_GET, + sizeof(vfio_pm)); + if (ret != 1) + return ret; + + if (flags & VFIO_DEVICE_FEATURE_GET) { + down_read(&vdev->memory_lock); + if (vdev->pm_runtime_engaged) + vfio_pm.flags = VFIO_PM_LOW_POWER_ENTER; + else + vfio_pm.flags = VFIO_PM_LOW_POWER_EXIT; + up_read(&vdev->memory_lock); + + if (copy_to_user(arg, &vfio_pm, sizeof(vfio_pm))) + return -EFAULT; + + return 0; + } + + if (copy_from_user(&vfio_pm, arg, sizeof(vfio_pm))) + return -EFAULT; + + ret = vfio_pci_pm_validate_flags(vfio_pm.flags); + if (ret) + return ret; + + /* + * The vdev power related flags are protected with 'memory_lock' + * semaphore. + */ + if (vfio_pm.flags & VFIO_PM_LOW_POWER_ENTER) { + vfio_pci_zap_and_down_write_memory_lock(vdev); + if (vdev->pm_runtime_engaged) { + up_write(&vdev->memory_lock); + return -EINVAL; + } + + vdev->pm_runtime_engaged = true; + up_write(&vdev->memory_lock); + pm_runtime_put(&pdev->dev); + } else if (vfio_pm.flags & VFIO_PM_LOW_POWER_EXIT) { + down_write(&vdev->memory_lock); + if (!vdev->pm_runtime_engaged) { + up_write(&vdev->memory_lock); + return -EINVAL; + } + + vdev->pm_runtime_engaged = false; + pm_runtime_get_noresume(&pdev->dev); + up_write(&vdev->memory_lock); + ret = pm_runtime_resume(&pdev->dev); + if (ret < 0) { + down_write(&vdev->memory_lock); + if (!vdev->pm_runtime_engaged) { + vdev->pm_runtime_engaged = true; + pm_runtime_put_noidle(&pdev->dev); + } + up_write(&vdev->memory_lock); + return ret; + } + } else { + return -EINVAL; + } + + return 0; +} + static int vfio_pci_core_feature_token(struct vfio_device *device, u32 flags, void __user *arg, size_t argsz) { @@ -1224,6 +1349,8 @@ int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags, switch (flags & VFIO_DEVICE_FEATURE_MASK) { case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN: return vfio_pci_core_feature_token(device, flags, arg, argsz); + case VFIO_DEVICE_FEATURE_POWER_MANAGEMENT: + return vfio_pci_core_feature_pm(device, flags, arg, argsz); default: return -ENOTTY; } @@ -1234,31 +1361,47 @@ static ssize_t vfio_pci_rw(struct vfio_pci_core_device *vdev, char __user *buf, size_t count, loff_t *ppos, bool iswrite) { unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos); + int ret; if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions) return -EINVAL; + ret = pm_runtime_resume_and_get(&vdev->pdev->dev); + if (ret < 0) { + pci_info_ratelimited(vdev->pdev, "runtime resume failed %d\n", + ret); + return -EIO; + } + switch (index) { case VFIO_PCI_CONFIG_REGION_INDEX: - return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite); + ret = vfio_pci_config_rw(vdev, buf, count, ppos, iswrite); + break; case VFIO_PCI_ROM_REGION_INDEX: if (iswrite) - return -EINVAL; - return vfio_pci_bar_rw(vdev, buf, count, ppos, false); + ret = -EINVAL; + else + ret = vfio_pci_bar_rw(vdev, buf, count, ppos, false); + break; case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX: - return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite); + ret = vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite); + break; case VFIO_PCI_VGA_REGION_INDEX: - return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite); + ret = vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite); + break; + default: index -= VFIO_PCI_NUM_REGIONS; - return vdev->region[index].ops->rw(vdev, buf, + ret = vdev->region[index].ops->rw(vdev, buf, count, ppos, iswrite); + break; } - return -EINVAL; + pm_runtime_put(&vdev->pdev->dev); + return ret; } ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf, @@ -2157,6 +2300,15 @@ static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set, goto err_unlock; } + /* + * Some of the devices in the dev_set can be in the runtime suspended + * state. Increment the usage count for all the devices in the dev_set + * before reset and decrement the same after reset. + */ + ret = vfio_pci_dev_set_pm_runtime_get(dev_set); + if (ret) + goto err_unlock; + list_for_each_entry(cur_vma, &dev_set->device_list, vdev.dev_set_list) { /* * Test whether all the affected devices are contained by the @@ -2212,6 +2364,9 @@ static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set, else mutex_unlock(&cur->vma_lock); } + + list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) + pm_runtime_put(&cur->pdev->dev); err_unlock: mutex_unlock(&dev_set->lock); return ret; diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index cdfd328ba6b1..bf4823b008f9 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -125,6 +125,7 @@ struct vfio_pci_core_device { bool nointx; bool needs_pm_restore; bool pm_intx_masked; + bool pm_runtime_engaged; struct pci_saved_state *pci_saved_state; struct pci_saved_state *pm_save; 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Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 5/6] vfio/pci: Prevent low power re-entry without guest driver Date: Fri, 1 Jul 2022 16:38:13 +0530 Message-ID: <20220701110814.7310-6-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 44422f5e-9e02-4a46-eae1-08da5b5214e5 X-MS-TrafficTypeDiagnostic: BN8PR12MB2995:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: QhoApFnRVOiMUOY8QW9C4NupsH+48q5rcgk0X+q1gGDCYK0L4P/u2/C3hJwfPxizQ+jvix/x95lYDKKbIPSzEylcz1eiEdRhi0BjGmaLreJciypKx8ZEhQHlgCOX7O9lXBYQluqjACvQ985hhAlePcxK1xK6W3GioG8Sw+6CTWSX1S0N2WmnqZfS0fb2MheswGiOUYeWQ5CBeMqzrNpfIGeN525Dc+R3blAkUQg7BBhwmrHh/1vxaFFMlKY1jmwdW8suOUZY38mGOSH6arMXu2Gb2WVsnmqhbdPVQhrLM+7+rgm8HezflnPIdiF+fWLeYiV39pmtMBlAomIyK0qoftwapU7HrV6yM0ZW1eD23sEb3wiXxJd5VYegD7eWw2b1p5pj5MqXe8ybV3b3hdm5oB5h3JSz4IcAhUI7W+meGOAhl6MnrmYbiIJ0UL9/FpFzvUnKzPwYOKd3B2T0A0Ba4kRKym43qjhx/upojKPPcj8d+LfUUweacE/7ncP84AoFE6WPeT2VsIKDz06DoAmfpee9/npAs/s8q4KmO3hA01fHXabXn+hi7EB7hl0qiUzbObMM0x1v+auxEyIMWwZH7dBl1o4xDnzSqO7tJs4mQZYCzqrK+AfXz2P29d0NR6KSoE/XyPW5AxV3St8NGzgwKLC/6tbfGBVCb6+GhJla9CcP458G5CLQIa76Aptmxyjp3Y3QK43F/FqYQlaZERUBtZ04PwkFcjBWkBDeQHHqRBJqC6v6489wkZEK9uuYhPe/dDx6gYGsYazsCrCXuEDwFliHBmdAjkLDxUKnt6ZUHO/aCOUXUvVqx92JRpdRIJ3T3r7K9KtyoapM1dqBoDivyYmZJHfQ15ni7foyy936A7Q= X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(136003)(39860400002)(346002)(396003)(376002)(36840700001)(40470700004)(46966006)(47076005)(70206006)(7416002)(40480700001)(316002)(336012)(86362001)(426003)(1076003)(110136005)(186003)(2616005)(2906002)(5660300002)(36860700001)(54906003)(7696005)(41300700001)(6666004)(83380400001)(356005)(8676002)(107886003)(81166007)(36756003)(26005)(478600001)(8936002)(40460700003)(82740400003)(70586007)(82310400005)(4326008)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:52.0842 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44422f5e-9e02-4a46-eae1-08da5b5214e5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT034.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB2995 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Some devices (Like NVIDIA VGA or 3D controller) require driver involvement each time before going into D3cold. In the regular flow, the guest driver do all the required steps inside the guest OS and then the IOCTL will be called for D3cold entry by the hypervisor. Now, if there is any activity on the host side (For example user has run lspci, dump the config space through sysfs, etc.), then the runtime PM framework will resume the device first, perform the operation and then suspend the device again. This second time suspend will be without guest driver involvement. This patch adds the support to prevent second-time runtime suspend if there is any wake-up. This prevention is either based on the predefined vendor/class id list or the user can specify the flag (VFIO_PM_LOW_POWER_REENTERY_DISABLE) during entry for the same. 'pm_runtime_reentry_allowed' flag tracks if this re-entry is allowed. It will be set during the entry time. 'pm_runtime_resumed' flag tracks if there is any wake-up before the guest performs the wake-up. If re-entry is not allowed, then during runtime resume, the runtime PM count will be incremented, and this flag will be set. This flag will be checked during guest D3cold exit and then skip the runtime PM-related handling if this flag is set. During guest low power exit time, all vdev power-related flags are accessed under 'memory_lock' and usage count will be incremented. The resume will be triggered after releasing the lock since the runtime resume callback again requires the lock. pm_runtime_get_noresume()/ pm_runtime_resume() have been used instead of pm_runtime_resume_and_get() to handle the following scenario during the race condition. a. The guest triggered the low power exit. b. The guest thread got the lock and cleared the vdev related flags and released the locks. c. Before pm_runtime_resume_and_get(), the host lspci thread got scheduled and triggered the runtime resume. d. Now, all the vdev related flags are cleared so there won't be any extra handling inside the runtime resume. e. The runtime PM put the device again into the suspended state. f. The guest triggered pm_runtime_resume_and_get() got called. So, at step (e), the suspend is happening without the guest driver involvement. Now, by using pm_runtime_get_noresume() before releasing 'memory_lock', the runtime PM framework can't suspend the device due to incremented usage count. Signed-off-by: Abhishek Sahu --- drivers/vfio/pci/vfio_pci_core.c | 87 ++++++++++++++++++++++++++++++-- include/linux/vfio_pci_core.h | 2 + 2 files changed, 84 insertions(+), 5 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 8c17ca41d156..1ddaaa6ccef5 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -191,6 +191,20 @@ static bool vfio_pci_nointx(struct pci_dev *pdev) return false; } +static bool vfio_pci_low_power_reentry_allowed(struct pci_dev *pdev) +{ + /* + * The NVIDIA display class requires driver involvement for every + * D3cold entry. The audio and other classes can go into D3cold + * without driver involvement. + */ + if (pdev->vendor == PCI_VENDOR_ID_NVIDIA && + ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)) + return false; + + return true; +} + static void vfio_pci_probe_power_state(struct vfio_pci_core_device *vdev) { struct pci_dev *pdev = vdev->pdev; @@ -295,6 +309,27 @@ static int vfio_pci_core_runtime_resume(struct device *dev) if (vdev->pm_intx_masked) vfio_pci_intx_unmask(vdev); + down_write(&vdev->memory_lock); + + /* + * The runtime resume callback will be called for one of the following + * two cases: + * + * - If the user has called IOCTL explicitly to move the device out of + * the low power state or closed the device. + * - If there is device access on the host side. + * + * For the second case, check if re-entry to the low power state is + * allowed. If not, then increment the usage count so that runtime PM + * framework won't suspend the device and set the 'pm_runtime_resumed' + * flag. + */ + if (vdev->pm_runtime_engaged && !vdev->pm_runtime_reentry_allowed) { + pm_runtime_get_noresume(dev); + vdev->pm_runtime_resumed = true; + } + up_write(&vdev->memory_lock); + return 0; } #endif /* CONFIG_PM */ @@ -415,9 +450,12 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) */ down_write(&vdev->memory_lock); if (vdev->pm_runtime_engaged) { + if (!vdev->pm_runtime_resumed) { + pm_runtime_get_noresume(&pdev->dev); + do_resume = true; + } + vdev->pm_runtime_resumed = false; vdev->pm_runtime_engaged = false; - pm_runtime_get_noresume(&pdev->dev); - do_resume = true; } up_write(&vdev->memory_lock); @@ -1227,12 +1265,17 @@ static int vfio_pci_pm_validate_flags(u32 flags) if (!flags) return -EINVAL; /* Only valid flags should be set */ - if (flags & ~(VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) + if (flags & ~(VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT | + VFIO_PM_LOW_POWER_REENTERY_DISABLE)) return -EINVAL; /* Both enter and exit should not be set */ if ((flags & (VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) == (VFIO_PM_LOW_POWER_ENTER | VFIO_PM_LOW_POWER_EXIT)) return -EINVAL; + /* re-entry disable can only be set with enter */ + if ((flags & VFIO_PM_LOW_POWER_REENTERY_DISABLE) && + !(flags & VFIO_PM_LOW_POWER_ENTER)) + return -EINVAL; return 0; } @@ -1255,10 +1298,17 @@ static int vfio_pci_core_feature_pm(struct vfio_device *device, u32 flags, if (flags & VFIO_DEVICE_FEATURE_GET) { down_read(&vdev->memory_lock); - if (vdev->pm_runtime_engaged) + if (vdev->pm_runtime_engaged) { vfio_pm.flags = VFIO_PM_LOW_POWER_ENTER; - else + if (!vdev->pm_runtime_reentry_allowed) + vfio_pm.flags |= + VFIO_PM_LOW_POWER_REENTERY_DISABLE; + } else { vfio_pm.flags = VFIO_PM_LOW_POWER_EXIT; + if (!vfio_pci_low_power_reentry_allowed(pdev)) + vfio_pm.flags |= + VFIO_PM_LOW_POWER_REENTERY_DISABLE; + } up_read(&vdev->memory_lock); if (copy_to_user(arg, &vfio_pm, sizeof(vfio_pm))) @@ -1286,6 +1336,19 @@ static int vfio_pci_core_feature_pm(struct vfio_device *device, u32 flags, } vdev->pm_runtime_engaged = true; + vdev->pm_runtime_resumed = false; + + /* + * If there is any access when the device is in the runtime + * suspended state, then the device will be resumed first + * before access and then the device will be suspended again. + * Check if this second time suspend is allowed and track the + * same in 'pm_runtime_reentry_allowed' flag. + */ + vdev->pm_runtime_reentry_allowed = + vfio_pci_low_power_reentry_allowed(pdev) && + !(vfio_pm.flags & VFIO_PM_LOW_POWER_REENTERY_DISABLE); + up_write(&vdev->memory_lock); pm_runtime_put(&pdev->dev); } else if (vfio_pm.flags & VFIO_PM_LOW_POWER_EXIT) { @@ -1296,6 +1359,20 @@ static int vfio_pci_core_feature_pm(struct vfio_device *device, u32 flags, } vdev->pm_runtime_engaged = false; + if (vdev->pm_runtime_resumed) { + vdev->pm_runtime_resumed = false; + up_write(&vdev->memory_lock); + return 0; + } + + /* + * The 'memory_lock' will be acquired again inside the runtime + * resume callback. So, increment the usage count inside the + * lock and call pm_runtime_resume() after releasing the lock. + * If there is any race condition between the wake-up generated + * at the host and the current path. Then the incremented usage + * count will prevent the device to go into the suspended state. + */ pm_runtime_get_noresume(&pdev->dev); up_write(&vdev->memory_lock); ret = pm_runtime_resume(&pdev->dev); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index bf4823b008f9..18cc83b767b8 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -126,6 +126,8 @@ struct vfio_pci_core_device { bool needs_pm_restore; bool pm_intx_masked; bool pm_runtime_engaged; + bool pm_runtime_resumed; + bool pm_runtime_reentry_allowed; struct pci_saved_state *pci_saved_state; struct pci_saved_state *pm_save; int ioeventfds_nr; From patchwork Fri Jul 1 11:08:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Sahu X-Patchwork-Id: 12903176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1A74CCA47F for ; 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Fri, 1 Jul 2022 04:08:50 -0700 From: Abhishek Sahu To: Alex Williamson , Cornelia Huck , Yishai Hadas , Jason Gunthorpe , Shameer Kolothum , Kevin Tian , "Rafael J . Wysocki" CC: Max Gurtovoy , Bjorn Helgaas , , , , , Abhishek Sahu Subject: [PATCH v4 6/6] vfio/pci: Add support for virtual PME Date: Fri, 1 Jul 2022 16:38:14 +0530 Message-ID: <20220701110814.7310-7-abhsahu@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220701110814.7310-1-abhsahu@nvidia.com> References: <20220701110814.7310-1-abhsahu@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 88f1e34e-f7d5-4f8a-6422-08da5b521888 X-MS-TrafficTypeDiagnostic: MN2PR12MB3440:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 75x93W5fMLZVOYwL8zqtTOsnk0ZFlsrTPdxIqoyPxDF+x/WEMohLtWf2phireV2fjWKTmuSe2lS+473EEZR/JvJD5kkHjBEaQPFATMAc3f/2NWPFdc6dn+EQ2xLZkX8NjtPxXxQNXJE6cIsmmT+5XnjqcGkR5u/Jthe2f11nF17CWPFDOFA6o0X/Pi/E74FfazCLiFSbPBgJKl/S/gBrAstUuYnWcMOnBcpqa88/O4NAjW3ucqqu5h/dHlct8v8sul1fCtP8JkKhtSLUduXOrW0nsRP3UEQpue4xtgwDMMJjp3ghwrJEMTgGLgnFhmabX2P/RPs6G2Qg5CsbPLTPlJB1K7VVCoqwRHPC51Faj8YrG2sZvUsdO86OZG1PL/hVDJPt34hEH12I48e0JwSpcLiAVpfqv+Olk7VuMQTW4bHEGhRVzaGxRw3mKZp87xx7okKU3/gFrXGCEYQ6fBpgqxuU/XaEPFxm1zyhOGvIQM9Kxwnn4NWDVwGLKNRYghIPifsatZ3RUxtP06J9+07IljDhFFMotCfYGX4b26OFuxhN4TT3UpW1Dyl51S/EISSlUeakYZemi7aWTGMIoYG1+zic4WXccUMqCJ+PkgGLczFehyoBMf3exyPcTp6QbxkJwt4dwuQHCk4lp1TYKdpdG549/PaCP+2OITq1j6avZmLatSwOi4zY2yye+lGp+CgGT5UPLUhHRfnCcIe9b+Gcs7rvFp88XEbLrWatXQeB4IFv3iDgM6kDFPT+g54XuWiYM42zC8l/xLN3ENEHWlTcDenlU96RSudld4GauHKpZoVIIGKkTkNZvj1/IaYr9q4OO8wkwmEevoiexLVTp2LDm0RqQ2P0aAj09SgGbr69Zy8= X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(136003)(39860400002)(376002)(396003)(346002)(36840700001)(40470700004)(46966006)(40480700001)(7416002)(7696005)(30864003)(5660300002)(40460700003)(36860700001)(426003)(41300700001)(83380400001)(8936002)(478600001)(6666004)(2906002)(186003)(47076005)(336012)(82310400005)(316002)(82740400003)(2616005)(86362001)(54906003)(107886003)(356005)(4326008)(36756003)(110136005)(81166007)(26005)(1076003)(70206006)(8676002)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2022 11:08:58.1977 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88f1e34e-f7d5-4f8a-6422-08da5b521888 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT051.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3440 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If the PCI device is in low power state and the device requires wake-up, then it can generate PME (Power Management Events). Mostly these PME events will be propagated to the root port and then the root port will generate the system interrupt. Then the OS should identify the device which generated the PME and should resume the device. We can implement a similar virtual PME framework where if the device already went into the runtime suspended state and then there is any wake-up on the host side, then it will send the virtual PME notification to the guest. This virtual PME will be helpful for the cases where the device will not be suspended again if there is any wake-up triggered by the host. Following is the overall approach regarding the virtual PME. 1. Add one more event like VFIO_PCI_ERR_IRQ_INDEX named VFIO_PCI_PME_IRQ_INDEX and do the required code changes to get/set this new IRQ. 2. From the guest side, the guest needs to enable eventfd for the virtual PME notification. 3. In the vfio-pci driver, the PME support bits are currently virtualized and set to 0. We can set PME capability support for all the power states. This PME capability support is independent of the physical PME support. 4. The PME enable (PME_En bit in Power Management Control/Status Register) and PME status (PME_Status bit in Power Management Control/Status Register) are also virtualized currently. The write support for PME_En bit can be enabled. 5. The PME_Status bit is a write-1-clear bit where the write with zero value will have no effect and write with 1 value will clear the bit. The write for this bit will be trapped inside vfio_pm_config_write() similar to PCI_PM_CTRL write for PM_STATES. 6. When the host gets a request for resuming the device other than from low power exit feature IOCTL, then PME_Status bit will be set. According to [PCIe v5 7.5.2.2], "PME_Status - This bit is Set when the Function would normally generate a PME signal. The value of this bit is not affected by the value of the PME_En bit." So even if PME_En bit is not set, we can set PME_Status bit. 7. If the guest has enabled PME_En and registered for PME events through eventfd, then the usage count will be incremented to prevent the device to go into the suspended state and notify the guest through eventfd trigger. The virtual PME can help in handling physical PME also. When physical PME comes, then also the runtime resume will be called. If the guest has registered for virtual PME, then it will be sent in this case also. * Implementation for handling the virtual PME on the hypervisor: If we take the implementation in Linux OS, then during runtime suspend time, then it calls __pci_enable_wake(). It internally enables PME through pci_pme_active() and also enables the ACPI side wake-up through platform_pci_set_wakeup(). To handle the PME, the hypervisor has the following two options: 1. Create a virtual root port for the VFIO device and trigger interrupt when the PME comes. It will call pcie_pme_irq() which will resume the device. 2. Create a virtual ACPI _PRW resource and associate it with the device itself. In _PRW, any GPE (General Purpose Event) can be assigned for the wake-up. When PME comes, then GPE can be triggered by the hypervisor. GPE interrupt will call pci_acpi_wake_dev() function internally and it will resume the device. Signed-off-by: Abhishek Sahu --- drivers/vfio/pci/vfio_pci_config.c | 39 +++++++++++++++++++++------ drivers/vfio/pci/vfio_pci_core.c | 43 ++++++++++++++++++++++++------ drivers/vfio/pci/vfio_pci_intrs.c | 18 +++++++++++++ include/linux/vfio_pci_core.h | 2 ++ include/uapi/linux/vfio.h | 1 + 5 files changed, 87 insertions(+), 16 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c index 21a4743d011f..a06375a03758 100644 --- a/drivers/vfio/pci/vfio_pci_config.c +++ b/drivers/vfio/pci/vfio_pci_config.c @@ -719,6 +719,20 @@ static int vfio_pm_config_write(struct vfio_pci_core_device *vdev, int pos, if (count < 0) return count; + /* + * PME_STATUS is write-1-clear bit. If PME_STATUS is 1, then clear the + * bit in vconfig. The PME_STATUS is in the upper byte of the control + * register and user can do single byte write also. + */ + if (offset <= PCI_PM_CTRL + 1 && offset + count > PCI_PM_CTRL + 1) { + if (le32_to_cpu(val) & + (PCI_PM_CTRL_PME_STATUS >> (offset - PCI_PM_CTRL) * 8)) { + __le16 *ctrl = (__le16 *)&vdev->vconfig + [vdev->pm_cap_offset + PCI_PM_CTRL]; + *ctrl &= ~cpu_to_le16(PCI_PM_CTRL_PME_STATUS); + } + } + if (offset == PCI_PM_CTRL) { pci_power_t state; @@ -771,14 +785,16 @@ static int __init init_pci_cap_pm_perm(struct perm_bits *perm) * the user change power state, but we trap and initiate the * change ourselves, so the state bits are read-only. * - * The guest can't process PME from D3cold so virtualize PME_Status - * and PME_En bits. The vconfig bits will be cleared during device - * capability initialization. + * The guest can't process physical PME from D3cold so virtualize + * PME_Status and PME_En bits. These bits will be used for the + * virtual PME between host and guest. The vconfig bits will be + * updated during device capability initialization. PME_Status is + * write-1-clear bit, so it is read-only. We trap and update the + * vconfig bit manually during write. */ p_setd(perm, PCI_PM_CTRL, PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS, - ~(PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS | - PCI_PM_CTRL_STATE_MASK)); + ~(PCI_PM_CTRL_STATE_MASK | PCI_PM_CTRL_PME_STATUS)); return 0; } @@ -1454,8 +1470,13 @@ static void vfio_update_pm_vconfig_bytes(struct vfio_pci_core_device *vdev, __le16 *pmc = (__le16 *)&vdev->vconfig[offset + PCI_PM_PMC]; __le16 *ctrl = (__le16 *)&vdev->vconfig[offset + PCI_PM_CTRL]; - /* Clear vconfig PME_Support, PME_Status, and PME_En bits */ - *pmc &= ~cpu_to_le16(PCI_PM_CAP_PME_MASK); + /* + * Set the vconfig PME_Support bits. The PME_Status is being used for + * virtual PME support and is not dependent upon the physical + * PME support. + */ + *pmc |= cpu_to_le16(PCI_PM_CAP_PME_MASK); + /* Clear vconfig PME_Support and PME_En bits */ *ctrl &= ~cpu_to_le16(PCI_PM_CTRL_PME_ENABLE | PCI_PM_CTRL_PME_STATUS); } @@ -1582,8 +1603,10 @@ static int vfio_cap_init(struct vfio_pci_core_device *vdev) if (ret) return ret; - if (cap == PCI_CAP_ID_PM) + if (cap == PCI_CAP_ID_PM) { + vdev->pm_cap_offset = pos; vfio_update_pm_vconfig_bytes(vdev, pos); + } prev = &vdev->vconfig[pos + PCI_CAP_LIST_NEXT]; pos = next; diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index 1ddaaa6ccef5..6c1225bc2aeb 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -319,14 +319,35 @@ static int vfio_pci_core_runtime_resume(struct device *dev) * the low power state or closed the device. * - If there is device access on the host side. * - * For the second case, check if re-entry to the low power state is - * allowed. If not, then increment the usage count so that runtime PM - * framework won't suspend the device and set the 'pm_runtime_resumed' - * flag. + * For the second case: + * - The virtual PME_STATUS bit will be set. If PME_ENABLE bit is set + * and user has registered for virtual PME events, then send the PME + * virtual PME event. + * - Check if re-entry to the low power state is not allowed. + * + * For the above conditions, increment the usage count so that + * runtime PM framework won't suspend the device and set the + * 'pm_runtime_resumed' flag. */ - if (vdev->pm_runtime_engaged && !vdev->pm_runtime_reentry_allowed) { - pm_runtime_get_noresume(dev); - vdev->pm_runtime_resumed = true; + if (vdev->pm_runtime_engaged) { + bool pme_triggered = false; + __le16 *ctrl = (__le16 *)&vdev->vconfig + [vdev->pm_cap_offset + PCI_PM_CTRL]; + + *ctrl |= cpu_to_le16(PCI_PM_CTRL_PME_STATUS); + if (le16_to_cpu(*ctrl) & PCI_PM_CTRL_PME_ENABLE) { + mutex_lock(&vdev->igate); + if (vdev->pme_trigger) { + pme_triggered = true; + eventfd_signal(vdev->pme_trigger, 1); + } + mutex_unlock(&vdev->igate); + } + + if (!vdev->pm_runtime_reentry_allowed || pme_triggered) { + pm_runtime_get_noresume(dev); + vdev->pm_runtime_resumed = true; + } } up_write(&vdev->memory_lock); @@ -586,6 +607,10 @@ void vfio_pci_core_close_device(struct vfio_device *core_vdev) eventfd_ctx_put(vdev->req_trigger); vdev->req_trigger = NULL; } + if (vdev->pme_trigger) { + eventfd_ctx_put(vdev->pme_trigger); + vdev->pme_trigger = NULL; + } mutex_unlock(&vdev->igate); } EXPORT_SYMBOL_GPL(vfio_pci_core_close_device); @@ -639,7 +664,8 @@ static int vfio_pci_get_irq_count(struct vfio_pci_core_device *vdev, int irq_typ } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) { if (pci_is_pcie(vdev->pdev)) return 1; - } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) { + } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX || + irq_type == VFIO_PCI_PME_IRQ_INDEX) { return 1; } @@ -985,6 +1011,7 @@ long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd, switch (info.index) { case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX: case VFIO_PCI_REQ_IRQ_INDEX: + case VFIO_PCI_PME_IRQ_INDEX: break; case VFIO_PCI_ERR_IRQ_INDEX: if (pci_is_pcie(vdev->pdev)) diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 1a37db99df48..db4180687a74 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -639,6 +639,17 @@ static int vfio_pci_set_req_trigger(struct vfio_pci_core_device *vdev, count, flags, data); } +static int vfio_pci_set_pme_trigger(struct vfio_pci_core_device *vdev, + unsigned index, unsigned start, + unsigned count, uint32_t flags, void *data) +{ + if (index != VFIO_PCI_PME_IRQ_INDEX || start != 0 || count > 1) + return -EINVAL; + + return vfio_pci_set_ctx_trigger_single(&vdev->pme_trigger, + count, flags, data); +} + int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, uint32_t flags, unsigned index, unsigned start, unsigned count, void *data) @@ -688,6 +699,13 @@ int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, uint32_t flags, break; } break; + case VFIO_PCI_PME_IRQ_INDEX: + switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) { + case VFIO_IRQ_SET_ACTION_TRIGGER: + func = vfio_pci_set_pme_trigger; + break; + } + break; } if (!func) diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index 18cc83b767b8..ee2646d820c2 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -102,6 +102,7 @@ struct vfio_pci_core_device { bool bar_mmap_supported[PCI_STD_NUM_BARS]; u8 *pci_config_map; u8 *vconfig; + u8 pm_cap_offset; struct perm_bits *msi_perm; spinlock_t irqlock; struct mutex igate; @@ -133,6 +134,7 @@ struct vfio_pci_core_device { int ioeventfds_nr; struct eventfd_ctx *err_trigger; struct eventfd_ctx *req_trigger; + struct eventfd_ctx *pme_trigger; struct list_head dummy_resources_list; struct mutex ioeventfds_lock; struct list_head ioeventfds_list; diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 7e00de5c21ea..08170950d655 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -621,6 +621,7 @@ enum { VFIO_PCI_MSIX_IRQ_INDEX, VFIO_PCI_ERR_IRQ_INDEX, VFIO_PCI_REQ_IRQ_INDEX, + VFIO_PCI_PME_IRQ_INDEX, VFIO_PCI_NUM_IRQS };