From patchwork Tue Jul 5 09:47:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12906198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2BE9C43334 for ; Tue, 5 Jul 2022 09:49:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Date:Message-Id:MIME-Version:Subject:Cc :To:From:References:In-Reply-To:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=1o000NQIawdznbAcK2Lqww/CopdT9Qa05CG1xmAds1w=; b=JM2t03KlQmhRaq +x4uYIMSgoVo7gx1RYFsTLRNaVqO9LoGb1t2JTheWxRiHa5NBnm1VYirl/8u/KyBoAwlV58LPFflA 3JFcrF7x8+AsdVPSsn4AZa/YH9y1jsdiuZBAb41uXQhn7fNgn3i6QA7Ptd9Yr3w6ltHcT/U8MwSRY ZqX+O5K0SZsYTfiDGGsUcIEr3teoM0jnGy8gTHfZzR4oOpmJoRtd6F09Ma/6725wiw7XAFK4oYIzt 7DyK3NEx1I0rLgv0b9pKJgmHaMKeTlKsHLDUw/2p/AwDbrcNpYU2s+f1yWDuFin9bhREWGKNOyZ98 HwHM1xTWEDkWVhWnFksA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8fAC-00Gtrw-5x; Tue, 05 Jul 2022 09:48:12 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:32c8:5054:ff:fe00:142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8fA3-00Gtka-Ou; Tue, 05 Jul 2022 09:48:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=nmwB/w2ODX+PhO2MIYPtuzhbVH60qFtgTIdGIGmVkNU=; b=wB2LAHhppYezNRkU0nsYYKEKPU bxr1EWDL17XvtKMLG5aayBuqmxr3jAYxTyOz6ioHxzYCblEQGm3RQ/P7tdsHUIJS0JjyEgpEdsEOu qVsZUWxdzyDB7LeROZWc401EA0hhv7nwG/I5jENKLVnP78bb1iUcQQlBQk2AWTCiOdtDyZJlwHmBp 8emoOMfVL26kBMuLbgad52kkXXG6+mrLJlqzxUHV2D1vz9scBtF2YazodxJjuIyjcwtqCDT8dPZnP FvzBXTmyfLa2Y+gJ3jqfBpU1nN73otXlY1t1kh9Une4nIEeLXyIj/LvCS4Fqv19teAHSgSa4V2Pak lVvLxWDQ==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:60648 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8f9n-000133-Lk; Tue, 05 Jul 2022 10:47:48 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o8f9m-0059a0-Ux; Tue, 05 Jul 2022 10:47:47 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 1/5] net: dsa: add support for retrieving the interface mode MIME-Version: 1.0 MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Tue, 05 Jul 2022 10:47:46 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_024804_007556_E4C6FD20 X-CRM114-Status: GOOD ( 20.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DSA port bindings allow for an optional phy interface mode. When an interface mode is not specified, DSA uses the NA interface mode type. However, phylink needs to know the parameters of the link, and this will become especially important when using phylink for ports that are devoid of all properties except the required "reg" property, so that phylink can select the maximum supported link settings. Without knowing the interface mode, phylink can't truely know the maximum link speed. Update the prototype for the phylink_get_caps method to allow drivers to report this information back to DSA, and update all DSA implementations function declarations to cater for this change. No code is added to the implementations. Reviewed-by: Marek Behún Signed-off-by: Russell King (Oracle) --- drivers/net/dsa/b53/b53_common.c | 3 ++- drivers/net/dsa/bcm_sf2.c | 3 ++- drivers/net/dsa/hirschmann/hellcreek.c | 3 ++- drivers/net/dsa/lantiq_gswip.c | 6 ++++-- drivers/net/dsa/microchip/ksz_common.c | 3 ++- drivers/net/dsa/mt7530.c | 3 ++- drivers/net/dsa/mv88e6xxx/chip.c | 3 ++- drivers/net/dsa/ocelot/felix.c | 3 ++- drivers/net/dsa/qca/ar9331.c | 3 ++- drivers/net/dsa/qca8k.c | 3 ++- drivers/net/dsa/realtek/rtl8365mb.c | 3 ++- drivers/net/dsa/sja1105/sja1105_main.c | 3 ++- drivers/net/dsa/xrs700x/xrs700x.c | 3 ++- include/net/dsa.h | 3 ++- net/dsa/port.c | 23 +++++++++++++++++------ 15 files changed, 47 insertions(+), 21 deletions(-) diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c index 48cf344750ff..fe75b84ab791 100644 --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c @@ -1310,7 +1310,8 @@ void b53_port_event(struct dsa_switch *ds, int port) EXPORT_SYMBOL(b53_port_event); static void b53_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct b53_device *dev = ds->priv; diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c index be0edfa093d0..18a3847bd82b 100644 --- a/drivers/net/dsa/bcm_sf2.c +++ b/drivers/net/dsa/bcm_sf2.c @@ -713,7 +713,8 @@ static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port) } static void bcm_sf2_sw_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *interfaces = config->supported_interfaces; struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds); diff --git a/drivers/net/dsa/hirschmann/hellcreek.c b/drivers/net/dsa/hirschmann/hellcreek.c index ac1f3b3a7040..ff78f580bb14 100644 --- a/drivers/net/dsa/hirschmann/hellcreek.c +++ b/drivers/net/dsa/hirschmann/hellcreek.c @@ -1462,7 +1462,8 @@ static void hellcreek_teardown(struct dsa_switch *ds) } static void hellcreek_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct hellcreek *hellcreek = ds->priv; diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c index e531b93f3cb2..a43dabfa5453 100644 --- a/drivers/net/dsa/lantiq_gswip.c +++ b/drivers/net/dsa/lantiq_gswip.c @@ -1492,7 +1492,8 @@ static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) } static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: @@ -1525,7 +1526,8 @@ static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port, } static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 28d7cb2ce98f..4329e29a1695 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -721,7 +721,8 @@ static int ksz_check_device_id(struct ksz_device *dev) } static void ksz_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct ksz_device *dev = ds->priv; diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 835807911be0..dab308e454e3 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2914,7 +2914,8 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port) } static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct mt7530_priv *priv = ds->priv; diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 37b649501500..f98be98551ef 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -819,7 +819,8 @@ static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, } static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct mv88e6xxx_chip *chip = ds->priv; diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 859196898a7d..0c1ac902b110 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -937,7 +937,8 @@ static int felix_vlan_del(struct dsa_switch *ds, int port, } static void felix_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct ocelot *ocelot = ds->priv; diff --git a/drivers/net/dsa/qca/ar9331.c b/drivers/net/dsa/qca/ar9331.c index 0796b7cf8cae..19e95dabe5b9 100644 --- a/drivers/net/dsa/qca/ar9331.c +++ b/drivers/net/dsa/qca/ar9331.c @@ -501,7 +501,8 @@ static enum dsa_tag_protocol ar9331_sw_get_tag_protocol(struct dsa_switch *ds, } static void ar9331_sw_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100; diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c index 1cbb05b0323f..beccd8338c81 100644 --- a/drivers/net/dsa/qca8k.c +++ b/drivers/net/dsa/qca8k.c @@ -1749,7 +1749,8 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, } static void qca8k_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: /* 1st CPU port */ diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c index da31d8b839ac..7bf420c2b083 100644 --- a/drivers/net/dsa/realtek/rtl8365mb.c +++ b/drivers/net/dsa/realtek/rtl8365mb.c @@ -1024,7 +1024,8 @@ static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port, } static void rtl8365mb_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { const struct rtl8365mb_extint *extint = rtl8365mb_get_port_extint(ds->priv, port); diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c index b253e27bcfb4..e15033177643 100644 --- a/drivers/net/dsa/sja1105/sja1105_main.c +++ b/drivers/net/dsa/sja1105/sja1105_main.c @@ -1390,7 +1390,8 @@ static void sja1105_mac_link_up(struct dsa_switch *ds, int port, } static void sja1105_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { struct sja1105_private *priv = ds->priv; struct sja1105_xmii_params_entry *mii; diff --git a/drivers/net/dsa/xrs700x/xrs700x.c b/drivers/net/dsa/xrs700x/xrs700x.c index 3887ed33c5fe..214a1dd670c2 100644 --- a/drivers/net/dsa/xrs700x/xrs700x.c +++ b/drivers/net/dsa/xrs700x/xrs700x.c @@ -443,7 +443,8 @@ static void xrs700x_teardown(struct dsa_switch *ds) } static void xrs700x_phylink_get_caps(struct dsa_switch *ds, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { switch (port) { case 0: diff --git a/include/net/dsa.h b/include/net/dsa.h index b902b31bebce..7c6870d2c607 100644 --- a/include/net/dsa.h +++ b/include/net/dsa.h @@ -852,7 +852,8 @@ struct dsa_switch_ops { * PHYLINK integration */ void (*phylink_get_caps)(struct dsa_switch *ds, int port, - struct phylink_config *config); + struct phylink_config *config, + phy_interface_t *default_interface); void (*phylink_validate)(struct dsa_switch *ds, int port, unsigned long *supported, struct phylink_link_state *state); diff --git a/net/dsa/port.c b/net/dsa/port.c index 3738f2d40a0b..35b4e1f8dc05 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1524,13 +1524,9 @@ static const struct phylink_mac_ops dsa_port_phylink_mac_ops = { int dsa_port_phylink_create(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; - phy_interface_t mode; + phy_interface_t mode, def_mode; int err; - err = of_get_phy_mode(dp->dn, &mode); - if (err) - mode = PHY_INTERFACE_MODE_NA; - /* Presence of phylink_mac_link_state or phylink_mac_an_restart is * an indicator of a legacy phylink driver. */ @@ -1538,8 +1534,23 @@ int dsa_port_phylink_create(struct dsa_port *dp) ds->ops->phylink_mac_an_restart) dp->pl_config.legacy_pre_march2020 = true; + def_mode = PHY_INTERFACE_MODE_NA; if (ds->ops->phylink_get_caps) - ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config); + ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config, + &def_mode); + + err = of_get_phy_mode(dp->dn, &mode); + if (err) { + /* We must not set the default mode for user ports as a PHY + * overrides the NA mode in phylink. Setting it here would + * prevent the interface mode being updated. + */ + if (dp->type == DSA_PORT_TYPE_CPU || + dp->type == DSA_PORT_TYPE_DSA) + mode = def_mode; + else + mode = PHY_INTERFACE_MODE_NA; + } dp->pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn), mode, &dsa_port_phylink_mac_ops); From patchwork Tue Jul 5 09:47:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12906199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C83F3CCA47C for ; Tue, 5 Jul 2022 09:49:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Date:Message-Id:MIME-Version:Subject:Cc :To:From:References:In-Reply-To:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0Xko0QNlI5h/nzRFbpVHinwKB1sjrjGvdVBfbILkp6Y=; b=Uy9+G7yBCG5B/W dNbMWL4dI/fcZ37JDiNvOP4TOxmAbVoFCFj0DgBCU5XE/MhOlpZHUBBXZg+FGlK9H7aJFFvXaXmId QeF8Z8ObNltNaznC9dAOpa3XtXitxDX2a2EePRrZ9Svsl9JzF277zNwkl8W7hHSjlHV4soiupP47/ Ap+bmKRNRK7feZ6c/YTZCauqxbjYcs58DVt98oZqjXPMhVDy5D4c94n+0qfEcmuujSVmtMphzqwCV sCL1sCNQOEzotp5tQeqYjAZ+1lohdoACCmU1Idmee7c7e7DEfyqq9PxptdhxtnvoRf2A0Lla3anrc IE7rwGW3CEi0OPj94DCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8fAY-00Gu7e-Cs; Tue, 05 Jul 2022 09:48:34 +0000 Received: from pandora.armlinux.org.uk ([2001:4d48:ad52:32c8:5054:ff:fe00:142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8fA4-00Gtnn-B3; Tue, 05 Jul 2022 09:48:06 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=WaMhBPinFc7SfDMKhd/cixK+yQqwVIsgsc3kCqlaJHM=; b=ct3g2FtN0T7n5SZ3O20Y31dvdD WEoCcph92MhZyaT6Iwm2EDhkMmUmjZRzE5r2OwvXkzORsKUOtsZWAD6L48DusjVEoaYbjmbE/1UC1 ZHpZJVS9owERasH74oXScLyOg/IFRJpsqSG915z8MkVsReq8Jw+uP1wq7W6ZmuRVDe2ZTahuueBEA x88ESs3TMeGwF/hHgtx1NST4iPh+1pqDSs/YuZlmHI+PUW4fjfU7rzIkxCZYLEqQNvbNfd9gIByU3 WK4rOwesIMUMVUvzl904Rrma1ir/XHeoU/7qoI6Kqh/JAUPiJgcH1U+IweEtmeThpCDFvWmtFVb+S WFLEBT5A==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:60650 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8f9s-00013C-UC; Tue, 05 Jul 2022 10:47:52 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o8f9s-0059a6-3S; Tue, 05 Jul 2022 10:47:52 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 2/5] net: dsa: mv88e6xxx: report the default interface mode for the port MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Tue, 05 Jul 2022 10:47:52 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_024804_585461_7B2EA66B X-CRM114-Status: GOOD ( 18.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Report the maximum speed interface mode for the port, or if we don't have that information, the hardware configured interface mode for the port. This allows phylink to know which interface mode CPU and DSA ports are operating, which will be necessary when we want to select the maximum speed for the port (required for such ports without a PHY or fixed-link specified in firmware.) Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/dsa/mv88e6xxx/chip.c | 83 +++++++++++++++++++++++--------- drivers/net/dsa/mv88e6xxx/chip.h | 3 +- 2 files changed, 62 insertions(+), 24 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index f98be98551ef..877407bc09de 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -578,7 +578,8 @@ static const u8 mv88e6185_phy_interface_modes[] = { }; static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { u8 cmode = chip->ports[port].cmode; @@ -588,23 +589,29 @@ static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); } else { if (cmode < ARRAY_SIZE(mv88e6185_phy_interface_modes) && - mv88e6185_phy_interface_modes[cmode]) + mv88e6185_phy_interface_modes[cmode]) { __set_bit(mv88e6185_phy_interface_modes[cmode], config->supported_interfaces); + *default_interface = + mv88e6185_phy_interface_modes[cmode]; + } config->mac_capabilities |= MAC_1000FD; } } static void mv88e6185_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { u8 cmode = chip->ports[port].cmode; if (cmode < ARRAY_SIZE(mv88e6185_phy_interface_modes) && - mv88e6185_phy_interface_modes[cmode]) + mv88e6185_phy_interface_modes[cmode]) { __set_bit(mv88e6185_phy_interface_modes[cmode], config->supported_interfaces); + *default_interface = mv88e6185_phy_interface_modes[cmode]; + } config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; @@ -616,6 +623,7 @@ static const u8 mv88e6xxx_phy_interface_modes[] = { [MV88E6XXX_PORT_STS_CMODE_GMII] = PHY_INTERFACE_MODE_GMII, [MV88E6XXX_PORT_STS_CMODE_RMII_PHY] = PHY_INTERFACE_MODE_RMII, [MV88E6XXX_PORT_STS_CMODE_RMII] = PHY_INTERFACE_MODE_RMII, + [MV88E6XXX_PORT_STS_CMODE_RGMII] = PHY_INTERFACE_MODE_RGMII, [MV88E6XXX_PORT_STS_CMODE_100BASEX] = PHY_INTERFACE_MODE_100BASEX, [MV88E6XXX_PORT_STS_CMODE_1000BASEX] = PHY_INTERFACE_MODE_1000BASEX, [MV88E6XXX_PORT_STS_CMODE_SGMII] = PHY_INTERFACE_MODE_SGMII, @@ -625,22 +633,32 @@ static const u8 mv88e6xxx_phy_interface_modes[] = { */ }; -static void mv88e6xxx_translate_cmode(u8 cmode, unsigned long *supported) +static void mv88e6xxx_translate_cmode(u8 cmode, unsigned long *supported, + phy_interface_t *default_interface) { + phy_interface_t interface; + if (cmode < ARRAY_SIZE(mv88e6xxx_phy_interface_modes) && - mv88e6xxx_phy_interface_modes[cmode]) - __set_bit(mv88e6xxx_phy_interface_modes[cmode], supported); - else if (cmode == MV88E6XXX_PORT_STS_CMODE_RGMII) - phy_interface_set_rgmii(supported); + mv88e6xxx_phy_interface_modes[cmode]) { + interface = mv88e6xxx_phy_interface_modes[cmode]; + if (interface == PHY_INTERFACE_MODE_RGMII) + phy_interface_set_rgmii(supported); + else + __set_bit(interface, supported); + if (default_interface) + *default_interface = interface; + } } static void mv88e6250_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; /* Translate the default cmode */ - mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); + mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; } @@ -676,13 +694,15 @@ static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip) } static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; int err, cmode; /* Translate the default cmode */ - mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); + mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; @@ -702,19 +722,21 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, dev_err(chip->dev, "p%d: failed to read serdes cmode\n", port); else - mv88e6xxx_translate_cmode(cmode, supported); + mv88e6xxx_translate_cmode(cmode, supported, NULL); unlock: mv88e6xxx_reg_unlock(chip); } } static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; /* Translate the default cmode */ - mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); + mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported, + default_interface); /* No ethtool bits for 200Mbps */ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | @@ -726,17 +748,21 @@ static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported); __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported); + *default_interface = PHY_INTERFACE_MODE_2500BASEX; + config->mac_capabilities |= MAC_2500FD; } } static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; /* Translate the default cmode */ - mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); + mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported, + default_interface); /* No ethtool bits for 200Mbps */ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | @@ -748,16 +774,19 @@ static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, __set_bit(PHY_INTERFACE_MODE_1000BASEX, supported); __set_bit(PHY_INTERFACE_MODE_2500BASEX, supported); + *default_interface = PHY_INTERFACE_MODE_2500BASEX; + config->mac_capabilities |= MAC_2500FD; } } static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; - mv88e6390_phylink_get_caps(chip, port, config); + mv88e6390_phylink_get_caps(chip, port, config, default_interface); /* For the 6x90X, ports 2-7 can be in automedia mode. * (Note that 6x90 doesn't support RXAUI nor XAUI). @@ -783,18 +812,22 @@ static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, __set_bit(PHY_INTERFACE_MODE_XAUI, supported); __set_bit(PHY_INTERFACE_MODE_RXAUI, supported); + *default_interface = PHY_INTERFACE_MODE_XAUI; + config->mac_capabilities |= MAC_10000FD; } } static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config) + struct phylink_config *config, + phy_interface_t *default_interface) { unsigned long *supported = config->supported_interfaces; bool is_6191x = chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X; - mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); + mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported, + default_interface); config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; @@ -812,6 +845,8 @@ static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, /* FIXME: USXGMII is not supported yet */ /* __set_bit(PHY_INTERFACE_MODE_USXGMII, supported); */ + *default_interface = PHY_INTERFACE_MODE_10GBASER; + config->mac_capabilities |= MAC_2500FD | MAC_5000FD | MAC_10000FD; } @@ -823,8 +858,10 @@ static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port, phy_interface_t *default_interface) { struct mv88e6xxx_chip *chip = ds->priv; + u8 cmode = chip->ports[port].cmode; - chip->info->ops->phylink_get_caps(chip, port, config); + chip->info->ops->phylink_get_caps(chip, port, config, + default_interface); /* Internal ports need GMII for PHYLIB */ if (mv88e6xxx_phy_is_internal(ds, port)) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e693154cf803..4518c17c1b9b 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -643,7 +643,8 @@ struct mv88e6xxx_ops { /* Phylink */ void (*phylink_get_caps)(struct mv88e6xxx_chip *chip, int port, - struct phylink_config *config); + struct phylink_config *config, + phy_interface_t *default_interface); /* Max Frame Size */ int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu); From patchwork Tue Jul 5 09:47:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12906200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19E24C43334 for ; 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Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:60652 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8f9y-00013X-1l; Tue, 05 Jul 2022 10:47:58 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o8f9x-0059aC-8S; Tue, 05 Jul 2022 10:47:57 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 3/5] net: phylink: split out interface to caps translation MIME-Version: 1.0 MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Tue, 05 Jul 2022 10:47:57 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_024809_954343_947F00CB X-CRM114-Status: GOOD ( 12.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org phylink_get_linkmodes() translates the interface mode into a set of speed and duplex capabilities which are masked with the MAC modes to then derive the link modes that are available. Split out the initial transformation into a new function phylink_interface_to_caps(), which will be useful when setting the maximum fixed link speed. Reviewed-by: Marek Behún Signed-off-by: Russell King (Oracle) --- drivers/net/phy/phylink.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 48f0b9b39491..2069fc902e19 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -296,18 +296,7 @@ static void phylink_caps_to_linkmodes(unsigned long *linkmodes, } } -/** - * phylink_get_linkmodes() - get acceptable link modes - * @linkmodes: ethtool linkmode mask (must be already initialised) - * @interface: phy interface mode defined by &typedef phy_interface_t - * @mac_capabilities: bitmask of MAC capabilities - * - * Set all possible pause, speed and duplex linkmodes in @linkmodes that - * are supported by the @interface mode and @mac_capabilities. @linkmodes - * must have been initialised previously. - */ -void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, - unsigned long mac_capabilities) +static unsigned long phylink_interface_to_caps(phy_interface_t interface) { unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; @@ -381,6 +370,24 @@ void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, break; } + return caps; +} + +/** + * phylink_get_linkmodes() - get acceptable link modes + * @linkmodes: ethtool linkmode mask (must be already initialised) + * @interface: phy interface mode defined by &typedef phy_interface_t + * @mac_capabilities: bitmask of MAC capabilities + * + * Set all possible pause, speed and duplex linkmodes in @linkmodes that + * are supported by the @interface mode and @mac_capabilities. @linkmodes + * must have been initialised previously. + */ +void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, + unsigned long mac_capabilities) +{ + unsigned long caps = phylink_interface_to_caps(interface); + phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); } EXPORT_SYMBOL_GPL(phylink_get_linkmodes); From patchwork Tue Jul 5 09:48:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12906201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C11AEC43334 for ; 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Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:60654 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8fA3-00013t-7a; Tue, 05 Jul 2022 10:48:03 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o8fA2-0059aI-EN; Tue, 05 Jul 2022 10:48:02 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 4/5] net: phylink: add phylink_set_max_fixed_link() MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Tue, 05 Jul 2022 10:48:02 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_024815_750059_65B267DF X-CRM114-Status: GOOD ( 23.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a function for DSA to use to configure phylink, in the absence of any other configuration, to a fixed link operating at the maximum supported link speed. This is needed so we can support phylink usage on CPU and DSA ports. We use the default interface that the DSA driver provides (if any) otherwise we attempt to find the first supported interface that gives the maximum speed for the link. Signed-off-by: Russell King (Oracle) Reviewed-by: Marek Behún --- drivers/net/phy/phylink.c | 119 ++++++++++++++++++++++++++++++++++++++ include/linux/phylink.h | 5 ++ 2 files changed, 124 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index 2069fc902e19..7ed3b2c3a359 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -1333,6 +1333,125 @@ void phylink_destroy(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_destroy); +static struct { + unsigned long fd_mask; + unsigned long hd_mask; + int speed; +} phylink_caps_speeds[] = { + { MAC_400000FD, 0, SPEED_400000 }, + { MAC_200000FD, 0, SPEED_200000 }, + { MAC_100000FD, 0, SPEED_100000 }, + { MAC_56000FD, 0, SPEED_56000 }, + { MAC_50000FD, 0, SPEED_50000 }, + { MAC_40000FD, 0, SPEED_40000 }, + { MAC_25000FD, 0, SPEED_40000 }, + { MAC_20000FD, 0, SPEED_20000 }, + { MAC_10000FD, 0, SPEED_10000 }, + { MAC_5000FD, 0, SPEED_5000 }, + { MAC_2500FD, 0, SPEED_2500 }, + { MAC_1000FD, MAC_1000HD, SPEED_1000 }, + { MAC_100FD, MAC_100HD, SPEED_100 }, + { MAC_10FD, MAC_10HD, SPEED_10 }, +}; + +/** + * phylink_set_max_fixed_link() - set a fixed link configuration for phylink + * @pl: a pointer to a &struct phylink returned from phylink_create() + * + * Set a maximum speed fixed-link configuration for the chosen interface + * mode and MAC capabilities for the phylink instance. If the interface mode + * is PHY_INTERFACE_MODE_NA, then search the supported interfaces bitmap for + * the first interface that gives the fastest supported speed. + * + * This is only valid for use immediately after phylink_create(). Must not + * be used at any other time. + * + * The user must have initialised mac_capabilities and set a valid interface. + */ +int phylink_set_max_fixed_link(struct phylink *pl) +{ + phy_interface_t intf, interface; + unsigned long caps, max_caps; + unsigned long *interfaces; + int speed, duplex; + int i; + + interface = pl->link_interface; + + phylink_dbg(pl, "sif=%*pbl if=%d(%s) cap=%lx\n", + (int)PHY_INTERFACE_MODE_MAX, + pl->config->supported_interfaces, + interface, phy_modes(interface), + pl->config->mac_capabilities); + + /* If we are not in PHY mode, or have a PHY, or have a SFP bus, + * then we must not default to a fixed link. + */ + if (pl->cfg_link_an_mode != MLO_AN_PHY || pl->phydev || pl->sfp_bus) + return -EBUSY; + + if (interface != PHY_INTERFACE_MODE_NA) { + /* Get the speed/duplex capabilities and reduce according to the + * specified interface mode. + */ + caps = pl->config->mac_capabilities; + caps &= phylink_interface_to_caps(interface); + } else { + interfaces = pl->config->supported_interfaces; + max_caps = 0; + + /* Find the supported interface mode which gives the maximum + * speed. + */ + for_each_set_bit(intf, interfaces, PHY_INTERFACE_MODE_MAX) { + caps = pl->config->mac_capabilities; + caps &= phylink_interface_to_caps(intf); + if (caps > max_caps) { + max_caps = caps; + interface = intf; + } + } + + caps = max_caps; + } + + caps &= ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); + + /* If there are no capabilities, then we are not using this default. */ + if (!caps) + return -EINVAL; + + /* Decode to fastest speed and duplex */ + duplex = DUPLEX_UNKNOWN; + speed = SPEED_UNKNOWN; + for (i = 0; i < ARRAY_SIZE(phylink_caps_speeds); i++) { + if (caps & phylink_caps_speeds[i].fd_mask) { + duplex = DUPLEX_FULL; + speed = phylink_caps_speeds[i].speed; + break; + } else if (caps & phylink_caps_speeds[i].hd_mask) { + duplex = DUPLEX_HALF; + speed = phylink_caps_speeds[i].speed; + break; + } + } + + /* If we didn't find anything, bail. */ + if (speed == SPEED_UNKNOWN) + return -EINVAL; + + pl->link_interface = interface; + pl->link_config.interface = interface; + pl->link_config.speed = speed; + pl->link_config.duplex = duplex; + pl->link_config.link = 1; + pl->cfg_link_an_mode = MLO_AN_FIXED; + pl->cur_link_an_mode = MLO_AN_FIXED; + + return 0; +} +EXPORT_SYMBOL_GPL(phylink_set_max_fixed_link); + static void phylink_phy_change(struct phy_device *phydev, bool up) { struct phylink *pl = phydev->phylink; diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 6d06896fc20d..9e2fb476d19c 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -23,6 +23,9 @@ enum { MAC_SYM_PAUSE = BIT(0), MAC_ASYM_PAUSE = BIT(1), + /* These speed bits must be sorted according to speed for + * phylink_set_max_fixed_link() + */ MAC_10HD = BIT(2), MAC_10FD = BIT(3), MAC_10 = MAC_10HD | MAC_10FD, @@ -529,6 +532,8 @@ struct phylink *phylink_create(struct phylink_config *, struct fwnode_handle *, const struct phylink_mac_ops *mac_ops); void phylink_destroy(struct phylink *); +int phylink_set_max_fixed_link(struct phylink *pl); + int phylink_connect_phy(struct phylink *, struct phy_device *); int phylink_of_phy_connect(struct phylink *, struct device_node *, u32 flags); int phylink_fwnode_phy_connect(struct phylink *pl, From patchwork Tue Jul 5 09:48:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 12906202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0A129C43334 for ; Tue, 5 Jul 2022 09:52:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Date:Message-Id:MIME-Version:Subject:Cc :To:From:References:In-Reply-To:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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bh=VeDQ3f9B7pR3qloIC/BpOn9WMCHG9Pe+77zRp0FsYcs=; b=XT32XUR3NiZcke+Nt3JEezWGsg tkLKGQ/pGttWrvps/f00EGG7AOjkxtGOqmT1VP0UrxygLIT6WNKo5Z21GCjoMqpGCif27L/vP+WAJ 8Qn/5HtDN/mePBCTkrt1TsIlrq701fjyWq8MrrflvQYW4my3uNTr15G1MsRffAcZnSTexwhTA2Taa jxPjdb2QK9I1BxRYoeD/BzlxjGHpC7obPGp2m61FXnqs48cAJQVcEDVJqbXfp5Izjqo89qCNt3JRu 2r1m5mH6rBQrq2e42dteWGpi5iAehQ4cqybxF5cFLfy36zuGxHqGQvS7sg/RLg7I78e+N1oDeT7Lb w5YvKYQw==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:60656 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o8fA9-00014Q-OT; Tue, 05 Jul 2022 10:48:10 +0100 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1o8fA7-0059aO-K8; Tue, 05 Jul 2022 10:48:07 +0100 In-Reply-To: References: From: "Russell King (Oracle)" To: Andrew Lunn , Heiner Kallweit Cc: Alexandre Belloni , "Alvin __ipraga" , Claudiu Manoil , "David S. Miller" , DENG Qingfang , Eric Dumazet , Florian Fainelli , George McCollister , Hauke Mehrtens , Jakub Kicinski , Kurt Kanzenbach , Landen Chao , Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Matthias Brugger , netdev@vger.kernel.org, Paolo Abeni , Sean Wang , UNGLinuxDriver@microchip.com, Vivien Didelot , Vladimir Oltean , Woojung Huh , Marek =?iso-8859-1?q?Beh=FAn?= Subject: [PATCH RFC net-next 5/5] net: dsa: always use phylink for CPU and DSA ports MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Tue, 05 Jul 2022 10:48:07 +0100 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_024826_648114_F90477BF X-CRM114-Status: GOOD ( 22.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently, we only use phylink for CPU and DSA ports if there is a fixed-link specification, or a PHY specified. The reason for this behaviour is that when neither is specified, there was no way for phylink to know the link parameters. Now that we have phylink_set_max_link_speed() (which has become possible through the addition of mac_capabilities) we now have the ability to know the maximum link speed for a specific link, and can use phylink for this case as well. However, we need all DSA drivers to provide mac_capabilities for this to work, and either report the default interface to be used for a port or have filled in supported_interfaces, so that we can select a maximum speed appropriate for the interface mode that hardware may have configured for the port. Any drivers that do not meet these requirements are likely to break. This is especially important with the conversion of DSA drivers to phylink_pcs, as the PCS code only gets called if we are using phylink for the port. Signed-off-by: Russell King (Oracle) Signed-off-by: Vladimir Oltean --- drivers/net/dsa/mv88e6xxx/chip.c | 50 ++++---------------------------- drivers/net/dsa/mv88e6xxx/chip.h | 3 -- drivers/net/dsa/mv88e6xxx/port.c | 32 -------------------- drivers/net/dsa/mv88e6xxx/port.h | 5 ---- net/dsa/port.c | 24 ++++++++------- 5 files changed, 18 insertions(+), 96 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 877407bc09de..7fd89239a7a7 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3315,9 +3315,8 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) { struct device_node *phy_handle = NULL; struct dsa_switch *ds = chip->ds; - phy_interface_t mode; struct dsa_port *dp; - int tx_amp, speed; + int tx_amp; int err; u16 reg; @@ -3326,40 +3325,10 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) dp = dsa_to_port(ds, port); - /* MAC Forcing register: don't force link, speed, duplex or flow control - * state to any particular values on physical ports, but force the CPU - * port and all DSA ports to their maximum bandwidth and full duplex. - */ - if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) { - unsigned long caps = dp->pl_config.mac_capabilities; - - if (chip->info->ops->port_max_speed_mode) - mode = chip->info->ops->port_max_speed_mode(port); - else - mode = PHY_INTERFACE_MODE_NA; - - if (caps & MAC_10000FD) - speed = SPEED_10000; - else if (caps & MAC_5000FD) - speed = SPEED_5000; - else if (caps & MAC_2500FD) - speed = SPEED_2500; - else if (caps & MAC_1000) - speed = SPEED_1000; - else if (caps & MAC_100) - speed = SPEED_100; - else - speed = SPEED_10; - - err = mv88e6xxx_port_setup_mac(chip, port, LINK_FORCED_UP, - speed, DUPLEX_FULL, - PAUSE_OFF, mode); - } else { - err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED, - SPEED_UNFORCED, DUPLEX_UNFORCED, - PAUSE_ON, - PHY_INTERFACE_MODE_NA); - } + err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED, + SPEED_UNFORCED, DUPLEX_UNFORCED, + PAUSE_ON, + PHY_INTERFACE_MODE_NA); if (err) return err; @@ -4307,7 +4276,6 @@ static const struct mv88e6xxx_ops mv88e6141_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6341_port_set_speed_duplex, - .port_max_speed_mode = mv88e6341_port_max_speed_mode, .port_tag_remap = mv88e6095_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -4700,7 +4668,6 @@ static const struct mv88e6xxx_ops mv88e6190_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -4763,7 +4730,6 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -4826,7 +4792,6 @@ static const struct mv88e6xxx_ops mv88e6191_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_frame_mode = mv88e6351_port_set_frame_mode, .port_set_ucast_flood = mv88e6352_port_set_ucast_flood, @@ -4991,7 +4956,6 @@ static const struct mv88e6xxx_ops mv88e6290_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -5142,7 +5106,6 @@ static const struct mv88e6xxx_ops mv88e6341_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6341_port_set_speed_duplex, - .port_max_speed_mode = mv88e6341_port_max_speed_mode, .port_tag_remap = mv88e6095_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -5365,7 +5328,6 @@ static const struct mv88e6xxx_ops mv88e6390_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -5432,7 +5394,6 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6390x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6390x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6352_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, @@ -5498,7 +5459,6 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = { .port_sync_link = mv88e6xxx_port_sync_link, .port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay, .port_set_speed_duplex = mv88e6393x_port_set_speed_duplex, - .port_max_speed_mode = mv88e6393x_port_max_speed_mode, .port_tag_remap = mv88e6390_port_tag_remap, .port_set_policy = mv88e6393x_port_set_policy, .port_set_frame_mode = mv88e6351_port_set_frame_mode, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 4518c17c1b9b..a3b7cfe3eb23 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -502,9 +502,6 @@ struct mv88e6xxx_ops { int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip, int port, int speed, int duplex); - /* What interface mode should be used for maximum speed? */ - phy_interface_t (*port_max_speed_mode)(int port); - int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port); int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port, diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c index 90c55f23b7c9..47e21f3c437a 100644 --- a/drivers/net/dsa/mv88e6xxx/port.c +++ b/drivers/net/dsa/mv88e6xxx/port.c @@ -333,14 +333,6 @@ int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6341_port_max_speed_mode(int port) -{ - if (port == 5) - return PHY_INTERFACE_MODE_2500BASEX; - - return PHY_INTERFACE_MODE_NA; -} - /* Support 10, 100, 200, 1000 Mbps (e.g. 88E6352 family) */ int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, int speed, int duplex) @@ -372,14 +364,6 @@ int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6390_port_max_speed_mode(int port) -{ - if (port == 9 || port == 10) - return PHY_INTERFACE_MODE_2500BASEX; - - return PHY_INTERFACE_MODE_NA; -} - /* Support 10, 100, 200, 1000, 2500, 10000 Mbps (e.g. 88E6190X) */ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, int speed, int duplex) @@ -394,14 +378,6 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, duplex); } -phy_interface_t mv88e6390x_port_max_speed_mode(int port) -{ - if (port == 9 || port == 10) - return PHY_INTERFACE_MODE_XAUI; - - return PHY_INTERFACE_MODE_NA; -} - /* Support 10, 100, 200, 1000, 2500, 5000, 10000 Mbps (e.g. 88E6393X) * Function mv88e6xxx_port_set_speed_duplex() can't be used as the register * values for speeds 2500 & 5000 conflict. @@ -491,14 +467,6 @@ int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, return 0; } -phy_interface_t mv88e6393x_port_max_speed_mode(int port) -{ - if (port == 0 || port == 9 || port == 10) - return PHY_INTERFACE_MODE_10GBASER; - - return PHY_INTERFACE_MODE_NA; -} - static int mv88e6xxx_port_set_cmode(struct mv88e6xxx_chip *chip, int port, phy_interface_t mode, bool force) { diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h index cb04243f37c1..2a5741a44e97 100644 --- a/drivers/net/dsa/mv88e6xxx/port.h +++ b/drivers/net/dsa/mv88e6xxx/port.h @@ -357,11 +357,6 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port, int speed, int duplex); -phy_interface_t mv88e6341_port_max_speed_mode(int port); -phy_interface_t mv88e6390_port_max_speed_mode(int port); -phy_interface_t mv88e6390x_port_max_speed_mode(int port); -phy_interface_t mv88e6393x_port_max_speed_mode(int port); - int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state); int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map); diff --git a/net/dsa/port.c b/net/dsa/port.c index 35b4e1f8dc05..34487e62eb03 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -1525,6 +1525,7 @@ int dsa_port_phylink_create(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; phy_interface_t mode, def_mode; + struct device_node *phy_np; int err; /* Presence of phylink_mac_link_state or phylink_mac_an_restart is @@ -1559,6 +1560,13 @@ int dsa_port_phylink_create(struct dsa_port *dp) return PTR_ERR(dp->pl); } + if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) { + phy_np = of_parse_phandle(dp->dn, "phy-handle", 0); + of_node_put(phy_np); + if (!phy_np) + err = phylink_set_max_fixed_link(dp->pl); + } + return 0; } @@ -1663,20 +1671,14 @@ static int dsa_port_phylink_register(struct dsa_port *dp) int dsa_port_link_register_of(struct dsa_port *dp) { struct dsa_switch *ds = dp->ds; - struct device_node *phy_np; int port = dp->index; if (!ds->ops->adjust_link) { - phy_np = of_parse_phandle(dp->dn, "phy-handle", 0); - if (of_phy_is_fixed_link(dp->dn) || phy_np) { - if (ds->ops->phylink_mac_link_down) - ds->ops->phylink_mac_link_down(ds, port, - MLO_AN_FIXED, PHY_INTERFACE_MODE_NA); - of_node_put(phy_np); - return dsa_port_phylink_register(dp); - } - of_node_put(phy_np); - return 0; + if (ds->ops->phylink_mac_link_down) + ds->ops->phylink_mac_link_down(ds, port, + MLO_AN_FIXED, PHY_INTERFACE_MODE_NA); + + return dsa_port_phylink_register(dp); } dev_warn(ds->dev,