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Thu, 7 Jul 2022 09:15:07 +0000 From: Ioana Ciornei To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org Cc: robh+dt@kernel.org, linux@armlinux.org.uk, devicetree@vger.kernel.org, Ioana Ciornei Subject: [PATCH net-next v3 1/4] dt-bindings: net: convert sff,sfp to dtschema Date: Thu, 7 Jul 2022 12:14:34 +0300 Message-Id: <20220707091437.446458-2-ioana.ciornei@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220707091437.446458-1-ioana.ciornei@nxp.com> References: <20220707091437.446458-1-ioana.ciornei@nxp.com> X-ClientProxiedBy: AM0PR06CA0125.eurprd06.prod.outlook.com (2603:10a6:208:ab::30) To GV1PR04MB9055.eurprd04.prod.outlook.com (2603:10a6:150:1e::22) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e6d879ce-ad5c-4910-2b31-08da5ff92ef9 X-MS-TrafficTypeDiagnostic: HE1PR0402MB3595:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: l+V4I+nU1LdFUEHmJt0212rfb1ACqHZlaWSKuk1dziTdkCfNlicM3Qw0nrCUQNFj6auUv01ZeimE7o3dFd5hNoATq5Nhtg/aT1SRqP+dMwc6XKbqt24wcTadlYa5vhXff+irFevp4zQWh5gempBJi8oT/6W5sAhiHmbYo13FEf4kPHPd4yfY4+KpLUr8/MOQv2nM4mz2UqbaORva9thfv77HJGymXmEcuPldfFFuWYoh0WsQo+YsY38h99LlW6tCGzKbztTJU8LN1UCVyTpnFAry6Uf5LZ5UoLtluJXEGPWYZ5Av8lKJ4njNqLxfU3bDrPZblqZt49UlsR3jnk0BdjfDjawNLMY7aprPO2Tj1dbl8Ij8tN5PKzGBEc+0T83vZisOFLaD4D9aOGd9NplJgvAXHwhuL3UGsVTppiAv553g+GxKwTDGwzyIOcRxswHGoPYkuyuB/87xD0s7mxYdrORKJcEdaWkLNVHsb6QXEdLsyB+lhvEUjTZphbG4HK99akgSVOtRmus2IsPjAUQ0wuVNn6yGkAoGBcKtDDCfNFLZIJXgL7GMXwKtyFg4o+En4BE8S6thF9bvwmtfWv6RQEtv2PM1Jga1PkH1xdGLu1PWYPmf+evl2jL9XhY3bw/D8q+0LXTG8eZhbLX+j/m12hOyWTJ6DCDr8I3eFygdjtWgxvoSQJ5M3yJ6bZ6anxJVUMKizrEpGsdgtxwYAZe3GM8AWlW1v/u0gvGG8aTBx/HuPJkIHLhVm059yh74KNM1G28HEiRBmSV48poBovYMcYZEzb0z9/CegqhSJ1ytYGvklR5RdPOzFl7xGQB2X6KekWbeafD3eaNN25W9kexQeN3CknfsDH/Y0y2YOED05ktvxZ2NeZW2agHIroT0IhkJ X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:GV1PR04MB9055.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230016)(4636009)(346002)(376002)(396003)(366004)(136003)(39860400002)(316002)(83380400001)(186003)(26005)(36756003)(6512007)(66556008)(66476007)(6506007)(5660300002)(86362001)(2906002)(8676002)(4326008)(66946007)(1076003)(38350700002)(38100700002)(478600001)(6666004)(6486002)(44832011)(41300700001)(2616005)(52116002)(8936002);DIR:OUT;SFP:1101; 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Also add the new path to the list of maintained files. Signed-off-by: Ioana Ciornei Reviewed-by: Rob Herring --- Changes in v2: - used the -gpios suffix - restricted the use of some gpios if the compatible is sff,sff Changes in v3: - moved the -gpios properties to be under properties and not pattern properties. .../devicetree/bindings/net/sff,sfp.txt | 85 ----------- .../devicetree/bindings/net/sff,sfp.yaml | 142 ++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 143 insertions(+), 85 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/sff,sfp.txt create mode 100644 Documentation/devicetree/bindings/net/sff,sfp.yaml diff --git a/Documentation/devicetree/bindings/net/sff,sfp.txt b/Documentation/devicetree/bindings/net/sff,sfp.txt deleted file mode 100644 index 832139919f20..000000000000 --- a/Documentation/devicetree/bindings/net/sff,sfp.txt +++ /dev/null @@ -1,85 +0,0 @@ -Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) -Transceiver - -Required properties: - -- compatible : must be one of - "sff,sfp" for SFP modules - "sff,sff" for soldered down SFF modules - -- i2c-bus : phandle of an I2C bus controller for the SFP two wire serial - interface - -Optional Properties: - -- mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS) - module presence input gpio signal, active (module absent) high. Must - not be present for SFF modules - -- los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal - Indication input gpio signal, active (signal lost) high - -- tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter - Fault input gpio signal, active (fault condition) high - -- tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable - output gpio signal, active (Tx disable) high - -- rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate - Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate - Must not be present for SFF modules - -- rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate - Select (AKA RS1) output gpio signal (SFP+ only), low: low Tx rate, high: - high Tx rate. Must not be present for SFF modules - -- maximum-power-milliwatt : Maximum module power consumption - Specifies the maximum power consumption allowable by a module in the - slot, in milli-Watts. Presently, modules can be up to 1W, 1.5W or 2W. - -Example #1: Direct serdes to SFP connection - -sfp_eth3: sfp-eth3 { - compatible = "sff,sfp"; - i2c-bus = <&sfp_1g_i2c>; - los-gpios = <&cpm_gpio2 22 GPIO_ACTIVE_HIGH>; - mod-def0-gpios = <&cpm_gpio2 21 GPIO_ACTIVE_LOW>; - maximum-power-milliwatt = <1000>; - pinctrl-names = "default"; - pinctrl-0 = <&cpm_sfp_1g_pins &cps_sfp_1g_pins>; - tx-disable-gpios = <&cps_gpio1 24 GPIO_ACTIVE_HIGH>; - tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>; -}; - -&cps_emac3 { - phy-names = "comphy"; - phys = <&cps_comphy5 0>; - sfp = <&sfp_eth3>; -}; - -Example #2: Serdes to PHY to SFP connection - -sfp_eth0: sfp-eth0 { - compatible = "sff,sfp"; - i2c-bus = <&sfpp0_i2c>; - los-gpios = <&cps_gpio1 28 GPIO_ACTIVE_HIGH>; - mod-def0-gpios = <&cps_gpio1 27 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&cps_sfpp0_pins>; - tx-disable-gpios = <&cps_gpio1 29 GPIO_ACTIVE_HIGH>; - tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>; -}; - -p0_phy: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c45"; - pinctrl-names = "default"; - pinctrl-0 = <&cpm_phy0_pins &cps_phy0_pins>; - reg = <0>; - interrupt = <&cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING>; - sfp = <&sfp_eth0>; -}; - -&cpm_eth0 { - phy = <&p0_phy>; - phy-mode = "10gbase-kr"; -}; diff --git a/Documentation/devicetree/bindings/net/sff,sfp.yaml b/Documentation/devicetree/bindings/net/sff,sfp.yaml new file mode 100644 index 000000000000..19cf88284295 --- /dev/null +++ b/Documentation/devicetree/bindings/net/sff,sfp.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/sff,sfp.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) + Transceiver + +maintainers: + - Russell King + +properties: + compatible: + enum: + - sff,sfp # for SFP modules + - sff,sff # for soldered down SFF modules + + i2c-bus: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle of an I2C bus controller for the SFP two wire serial + + maximum-power-milliwatt: + maxItems: 1 + description: + Maximum module power consumption Specifies the maximum power consumption + allowable by a module in the slot, in milli-Watts. Presently, modules can + be up to 1W, 1.5W or 2W. + + "mod-def0-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS) module + presence input gpio signal, active (module absent) high. Must not be + present for SFF modules + + "los-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the Receiver Loss of Signal Indication + input gpio signal, active (signal lost) high + + "tx-fault-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the Module Transmitter Fault input gpio + signal, active (fault condition) high + + "tx-disable-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the Transmitter Disable output gpio + signal, active (Tx disable) high + + "rate-select0-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the Rx Signaling Rate Select (AKA RS0) + output gpio signal, low - low Rx rate, high - high Rx rate Must not be + present for SFF modules + + "rate-select1-gpios": + maxItems: 1 + description: + GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1) + output gpio signal (SFP+ only), low - low Tx rate, high - high Tx rate. Must + not be present for SFF modules + +allOf: + - if: + properties: + compatible: + contains: + const: sff,sff + then: + properties: + mod-def0-gpios: false + rate-select0-gpios: false + rate-select1-gpios: false + +required: + - compatible + - i2c-bus + +additionalProperties: false + +examples: + - | # Direct serdes to SFP connection + #include + + sfp_eth3: sfp-eth3 { + compatible = "sff,sfp"; + i2c-bus = <&sfp_1g_i2c>; + los-gpios = <&cpm_gpio2 22 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cpm_gpio2 21 GPIO_ACTIVE_LOW>; + maximum-power-milliwatt = <1000>; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sfp_1g_pins &cps_sfp_1g_pins>; + tx-disable-gpios = <&cps_gpio1 24 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>; + }; + + cps_emac3 { + phy-names = "comphy"; + phys = <&cps_comphy5 0>; + sfp = <&sfp_eth3>; + }; + + - | # Serdes to PHY to SFP connection + #include + #include + + sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&sfpp0_i2c>; + los-gpios = <&cps_gpio1 28 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cps_gpio1 27 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&cps_sfpp0_pins>; + tx-disable-gpios = <&cps_gpio1 29 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + p0_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + pinctrl-names = "default"; + pinctrl-0 = <&cpm_phy0_pins &cps_phy0_pins>; + reg = <0>; + interrupt = <&cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING>; + sfp = <&sfp_eth0>; + }; + }; + + cpm_eth0 { + phy = <&p0_phy>; + phy-mode = "10gbase-kr"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 32c4708cdeb9..d495f6d7c2c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18109,6 +18109,7 @@ SFF/SFP/SFP+ MODULE SUPPORT M: Russell King L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/sff,sfp.yaml F: drivers/net/phy/phylink.c F: drivers/net/phy/sfp* F: include/linux/mdio/mdio-i2c.h From patchwork Thu Jul 7 09:14:35 2022 Content-Type: text/plain; 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Signed-off-by: Ioana Ciornei Acked-by: Rob Herring --- Changes in v2: - new patch Changes in v3: - none .../devicetree/bindings/net/sff,sfp.yaml | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/net/sff,sfp.yaml b/Documentation/devicetree/bindings/net/sff,sfp.yaml index 19cf88284295..06c66ab81c01 100644 --- a/Documentation/devicetree/bindings/net/sff,sfp.yaml +++ b/Documentation/devicetree/bindings/net/sff,sfp.yaml @@ -89,7 +89,7 @@ examples: - | # Direct serdes to SFP connection #include - sfp_eth3: sfp-eth3 { + sfp1: sfp { compatible = "sff,sfp"; i2c-bus = <&sfp_1g_i2c>; los-gpios = <&cpm_gpio2 22 GPIO_ACTIVE_HIGH>; @@ -101,19 +101,19 @@ examples: tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>; }; - cps_emac3 { + ethernet { phy-names = "comphy"; phys = <&cps_comphy5 0>; - sfp = <&sfp_eth3>; + sfp = <&sfp1>; }; - | # Serdes to PHY to SFP connection #include #include - sfp_eth0: sfp-eth0 { + sfp2: sfp { compatible = "sff,sfp"; - i2c-bus = <&sfpp0_i2c>; + i2c-bus = <&sfp_i2c>; los-gpios = <&cps_gpio1 28 GPIO_ACTIVE_HIGH>; mod-def0-gpios = <&cps_gpio1 27 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; @@ -126,17 +126,17 @@ examples: #address-cells = <1>; #size-cells = <0>; - p0_phy: ethernet-phy@0 { + phy: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; pinctrl-names = "default"; pinctrl-0 = <&cpm_phy0_pins &cps_phy0_pins>; reg = <0>; interrupt = <&cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING>; - sfp = <&sfp_eth0>; + sfp = <&sfp2>; }; }; - cpm_eth0 { - phy = <&p0_phy>; + ethernet { + phy = <&phy>; phy-mode = "10gbase-kr"; }; From patchwork Thu Jul 7 09:14:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ioana Ciornei X-Patchwork-Id: 12909265 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78D00C43334 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3f1MfzsbfcpNsT2Myi9ZDlsttYRH6Un8yNmxG1V4LTHl8qLicvmxjikQIY8GX4xjQ6pgvIk1tpNG15vlV7wW8QvbpsmMSfaRLQrg2uv99oFfY71bCKmOKpzXy9kHW2jl+9iw+q90EU9aRwg9YjX2AzzE/gZimmheSxWKlQmCPMyFD+n5au+zRWuXEGXNWEHCPeDJfehyDQbCcmJ2/4XfO7mtfEAXR+Ts3rHGmQpJ4zV/Sb4IgUwq3t9l83OANOZCBfvX6HXICd3KRJ5N2vlQyL+qmv8QM5q6r77d21stk2bUEK0nyQvqinvoeUKpeY3AasZbZ2bHsspIf2ryN0QJjOQPs8g+L7V8U1svktsIwhIJw21s43Rcz+btGmepX0auE5Cl60o2s2cEa+vcVUAuPHGNJo1K7lPR6b+S2Jsf7wFG44QxDoKSW9iXoISyI3Vwi+aZy3l58hH7xnsSSwxp7aJbG8JDFPhtvZPyRi4z/c6xYKFBEBcqZM2IQl8tS4xl5tdexDFUMg5pgGntCeiuNs1vHQuV9lAcUOgzn1EtT32ShG5GuvqJ4QepNWXDKlDPPZA1wFaTd9tniiKp/zg4Yq7O2Y7Uhyuaulpx6LkhXXju+JAp7MRD3iYumc1fEEYLXJCTrNw5aaEcmIdEIyHfaKvSzgLHo+bMRuTIH5KCsV6Bd801hQ0T+SHdUYyHQzVit5FObKHMV43rK8O/xGedD/63Hzs0Qx+/VSQW+OL5M2ys7OGemTNkT0u8Oa3wtUDAqk3Bu4Pt/F2m0HpBUDYF738qJtpsWNL/9doZGK+eEneTLRm8s68fayYuPwk+9akYxuOtONGF4Ohd3McujHafij5Gw2ozH+jPBrWSMLkqQCqRizkEKDly87nfbsCK0vS3EsaQWiq+9fDpomLbTQZrYVdzB59uDYQsmOW+gYhX/FYLMpoLns7NsSOq4XI2JeI4o5kxdSrF3pRqTL95M6h7I3bKKuaXtw1tYKeM1psD9TU01NVknvbE2ZOCdgm4nVFMioOgHXLJ1ewPAA80trWDEEONfyuPPyQP75uDZY6Bwp521Yma/sMXGR14Lg7zlQZY0SEVM4pZItzWB5AOSW2W4zJpoOUJqclA9gXPxogl0ta+C6L5QjcagPayeCL4t1dn31mGiz07nVIA+DZjTxZc427nfqMTNSWDcIWe6EYH7OZzhWQP2F/MW9TPVvQvFWtk/7tEwBOhmY6jNqyX3/iqw5MvbSCr0dVxQu98aPmyLDDdVMjoQoA5rTH3qqMJFtDfR9f8z30xntgvcJqDtfRmmPglQeCUDcb0ofwzfb67b+ZfNGelurZd/ffueGmkTmWcj/Qx1wxGBXlBvc6JKsZsODQlsXT4kz1By/Qb+jik4/TintiCo2JurJiBKhEz5ZOOy5fI0c94eb4i2/HmGlTHhdowu4H6hyhLJFvYlCE2H3LuhgJ584AkiiKqBT8gSuGHxf08uMcTKBVNk1Bi9qYwDmcAgf+uaBVNDxEjl8gJvT7wINAh+cn33OdHup38V0tRGa4zxW+SwIOkdA9xEbbQh/o4oRFSpa8M7r2isTd8q20nU9cR9tU/Gjy7KtL/NJhn X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 63c9c809-2f5b-4b58-bab0-08da5ff930c9 X-MS-Exchange-CrossTenant-AuthSource: GV1PR04MB9055.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2022 09:15:09.8712 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SNULcfNkgNBqMSp7L+f2Kd3b+AAb1t1wCTexgno8N4T77DdxRw/SlS3VePAMN2wZe8uqQ4THDxk4HnWJeerceA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0402MB3595 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Rename the 'mod-def0-gpio' property to 'mod-def0-gpios' so that we use the preferred -gpios suffix. Also, with this change the dtb_check will not complain when trying to verify the DTS against the sff,sfp.yaml binding. Signed-off-by: Ioana Ciornei --- Changes in v2: - new patch Changes in v3: - none .../boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi index 41702e7386e3..a7dcbecc1f41 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi @@ -34,28 +34,28 @@ key { sfp0: sfp-0 { compatible = "sff,sfp"; i2c-bus = <&sfp0_i2c>; - mod-def0-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>; + mod-def0-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; maximum-power-milliwatt = <2000>; }; sfp1: sfp-1 { compatible = "sff,sfp"; i2c-bus = <&sfp1_i2c>; - mod-def0-gpio = <&gpio2 9 GPIO_ACTIVE_LOW>; + mod-def0-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; maximum-power-milliwatt = <2000>; }; sfp2: sfp-2 { compatible = "sff,sfp"; i2c-bus = <&sfp2_i2c>; - mod-def0-gpio = <&gpio2 10 GPIO_ACTIVE_LOW>; + mod-def0-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; maximum-power-milliwatt = <2000>; }; sfp3: sfp-3 { compatible = "sff,sfp"; i2c-bus = <&sfp3_i2c>; - mod-def0-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>; + mod-def0-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; maximum-power-milliwatt = <2000>; }; }; From patchwork Thu Jul 7 09:14:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ioana Ciornei X-Patchwork-Id: 12909266 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4FD1CCA479 for ; Thu, 7 Jul 2022 09:15:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234920AbiGGJPU (ORCPT ); Thu, 7 Jul 2022 05:15:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230183AbiGGJPQ (ORCPT ); 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: GX8Jhn6orzlmN7oXlaEukaBgf+k9ddeaflonmvBzy1Inv2MLQy4Mnvm5N1rEQ21nLQkJ4HPxzPAy6LgRJAVan5KuRiTgfRvPYPuOAw7GXB/JahBDuicTkWu+D/8B6yhcm2eI7aClILEB6HqVsAqwQkRe8VjjRYjQL1qLEAIBZt5wN/nVg2dPA8XViUPDjeS/Si67WcOxA4nANEkAvCgpScuLcMqBj0IUy/Lvfm47SopQk5eI3Rx5gHfhEryKj2t0y1TrZ2KUPJ223Rw6klybhOpfiGQboHTHXrsCKHMuhbhpIlum5Tdngx9BLWz/H4m6pZZ5T6r13KwFkjxpDY/DfEp3T0wOVoQa0yXw7BRKPdnLFzO1S2PyYgS3qkvzjA3Wt/ex8scw/R7oX1IEG4DBMxDbWLf/7W6HJHSNpo/rxbypf5GsnW/2oKSToQTeQnB4+0e+gb1J/n+hy574FeLZlTMFv6kH8D/EgYLrA2UDIsYMmLyO4qJTt2J7gkyNu4PX8GS+uNOK+wOCZuj6CJrB74QZSOsJFrKEVDwgxHXIYWfbylUAyfr9x6YAjwVQOjHinMybvT4nvdJevEr+NPV0M0n10j04WmkPbXaJdAbjs3z987S+0oH8M8Xg9FyxjHN7otFbLOmSbMGJsbpMvUZ40aBvvvzpr5S4gB57CZT/GbcMtfMpCFGzoYwwU5gkqaaI3qgm9MLlv1B7vo1POLGziyaA4mhklxc4RwZ+gv/0UY8x0GnqL6h2rfQF68kG5EfBwQk5ApHAEZolR6STccr1ZujR/eJkSrkV5w4e0e0mGl/fVNdwJ2uJIpfN50pP8t2HgsWl4f6CYPabX9U7EtkJdm9WV3AK5NUq+BusVZx9zaw+/D89Hrb8ecDTZz37eN03JKMCvpFbZv+1B5ezcRmyQKGkbAVGaEw/UrtQM1ww85CqFIY2EFloraXJavhSt+BbJ0jyJ9JFAvmdsLlLZnYZZ1KQjoESR8wGvigXYYQfi5uEjez82sv4IRHoX3AVEDLvVPstifb/my2CHBbdyDWdnqPsjtamaWZirKcIDxqqjAgIyI2kH10LSaYjI4XgRiH1lsdDlwUVNoeKQN3RdUsCpfit2JZmK53AFCA61300dikiyvMsYN3S2nxXyig/J0aYv/OvQzg1cqcHv+ZTmCtQDvHgI2y2SXnc8G3kUmotrFAldFS8k/AAbuT99X+2ueyb6c4c78c5JbN7SOtx+eAQ7h+83w2aS2ToOmvvT34ET3DAkG7N5GAOC4ToxWuycpm34YlAQETeMezuFV5mN5AKqXMfHcObrkwX+remE7ICmd9b1w19+tUqbpwF48X+b+9zHvAc3+JzNEm8svDGoXnH8LBIEf/tJKFHKibSwICdDM/pm4+RXsfkhguYfwkXfzyYSglfrVrlHPES+R+n2dZnHHeUEsD1m9pGA3ulXWl1ByoTg+iQ9R+jsLJHEHIfFNqbu/qnlJDsrXn+x3lnDBk6pY22jkxYO9i4JouDafDlx38P4LZgiZSx33lPyqGTuU8QL5e/5+IWbU/hvbrocuwMrJ/d83MKvvXVZJUTaGOtg91OCJmvW0z3U5blJcwBokCu X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 400b916c-2d85-4696-bb59-08da5ff9319d X-MS-Exchange-CrossTenant-AuthSource: GV1PR04MB9055.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jul 2022 09:15:11.3104 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5CS47sjSdFll9iokbJ2HIWj3tnCgRv1pK19xJ5mqtr99H4XYpLAwmqNgKcdovbhoiNoaUfE741n5PdAS/zVaIA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0402MB3595 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Rename the GPIO related sfp properties to include the preffered -gpios suffix. Also, with this change the dtb_check will no longer complain when trying to verify the DTS against the sff,sfp.yaml binding. Signed-off-by: Ioana Ciornei --- Changes in v2: - new patch Changes in v3: - none .../dts/marvell/armada-3720-turris-mox.dts | 10 ++++---- .../boot/dts/marvell/armada-3720-uDPU.dts | 16 ++++++------- .../boot/dts/marvell/armada-7040-mochabin.dts | 16 ++++++------- .../marvell/armada-8040-clearfog-gt-8k.dts | 4 ++-- .../boot/dts/marvell/armada-8040-mcbin.dtsi | 24 +++++++++---------- .../dts/marvell/armada-8040-puzzle-m801.dts | 16 ++++++------- arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 6 ++--- arch/arm64/boot/dts/marvell/cn9130-db.dtsi | 8 +++---- arch/arm64/boot/dts/marvell/cn9131-db.dtsi | 8 +++---- arch/arm64/boot/dts/marvell/cn9132-db.dtsi | 8 +++---- 10 files changed, 58 insertions(+), 58 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index caf9c8529fca..cbf75ddd6857 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -100,11 +100,11 @@ sdhci1_pwrseq: sdhci1-pwrseq { sfp: sfp { compatible = "sff,sfp"; i2c-bus = <&i2c0>; - los-gpio = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>; - rate-select0-gpio = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>; + los-gpios = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>; + rate-select0-gpios = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; /* enabled by U-Boot if SFP module is present */ diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts index a35317d24d6c..b20c8e7d923b 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts @@ -65,20 +65,20 @@ alarm2 { sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&i2c0>; - los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; + los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; sfp_eth1: sfp-eth1 { compatible = "sff,sfp"; i2c-bus = <&i2c1>; - los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; + los-gpios = <&gpiosb 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&gpiosb 8 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&gpiosb 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&gpiosb 10 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts index 39a8e5e99d79..5f6ed735e31a 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -34,20 +34,20 @@ aliases { sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&cp0_i2c1>; - los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>; + los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>; }; /* SFP 1G */ sfp_eth2: sfp-eth2 { compatible = "sff,sfp"; i2c-bus = <&cp0_i2c0>; - los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>; + los-gpios = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sfp_gpio 6 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 871f84b4a6ed..079c2745070a 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -64,8 +64,8 @@ v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 { sfp_cp0_eth0: sfp-cp0-eth0 { compatible = "sff,sfp"; i2c-bus = <&cp0_i2c1>; - mod-def0-gpio = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp0_gpio2 17 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cp0_sfp_present_pins &cp1_sfp_tx_disable_pins>; maximum-power-milliwatt = <2000>; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi index 779cf167c33e..33c179838e24 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi @@ -65,10 +65,10 @@ sfp_eth0: sfp-eth0 { /* CON15,16 - CPM lane 4 */ compatible = "sff,sfp"; i2c-bus = <&sfpp0_i2c>; - los-gpio = <&cp1_gpio1 28 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp1_gpio1 27 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp1_gpio1 28 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp1_gpio1 27 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp1_gpio1 29 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cp1_sfpp0_pins>; maximum-power-milliwatt = <2000>; @@ -78,10 +78,10 @@ sfp_eth1: sfp-eth1 { /* CON17,18 - CPS lane 4 */ compatible = "sff,sfp"; i2c-bus = <&sfpp1_i2c>; - los-gpio = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp1_gpio1 10 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp0_gpio2 30 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp1_gpio1 10 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio2 30 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cp1_sfpp1_pins &cp0_sfpp1_pins>; maximum-power-milliwatt = <2000>; @@ -91,10 +91,10 @@ sfp_eth3: sfp-eth3 { /* CON13,14 - CPS lane 5 */ compatible = "sff,sfp"; i2c-bus = <&sfp_1g_i2c>; - los-gpio = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp0_gpio2 21 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp0_gpio2 19 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp0_gpio2 22 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp0_gpio2 21 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio2 19 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cp0_sfp_1g_pins &cp1_sfp_1g_pins>; maximum-power-milliwatt = <2000>; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts b/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts index 74bed79e4f5e..72e9b0f671a9 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-puzzle-m801.dts @@ -67,20 +67,20 @@ v_vddo_h: regulator-1-8v { sfp_cp0_eth0: sfp-cp0-eth0 { compatible = "sff,sfp"; i2c-bus = <&sfpplus0_i2c>; - los-gpio = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>; + los-gpios = <&sfpplus_gpio 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sfpplus_gpio 10 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&sfpplus_gpio 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&sfpplus_gpio 8 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; sfp_cp1_eth0: sfp-cp1-eth0 { compatible = "sff,sfp"; i2c-bus = <&sfpplus1_i2c>; - los-gpio = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>; + los-gpios = <&sfpplus_gpio 3 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&sfpplus_gpio 2 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&sfpplus_gpio 1 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&sfpplus_gpio 0 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; }; diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 1acd746284dc..8e4ec243fb8f 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -78,9 +78,9 @@ sfp: sfp { compatible = "sff,sfp"; i2c-bus = <&cp0_i2c1>; mod-def0-gpios = <&expander0 3 GPIO_ACTIVE_LOW>; - los-gpio = <&expander0 15 GPIO_ACTIVE_HIGH>; - tx-disable-gpio = <&expander0 2 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>; + los-gpios = <&expander0 15 GPIO_ACTIVE_HIGH>; + tx-disable-gpios = <&expander0 2 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>; maximum-power-milliwatt = <3000>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi index 7e20987253a3..85d7ce13e70a 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi @@ -90,10 +90,10 @@ cp0_reg_sd_vcc: cp0_sd_vcc@0 { cp0_sfp_eth0: sfp-eth@0 { compatible = "sff,sfp"; i2c-bus = <&cp0_sfpp0_i2c>; - los-gpio = <&cp0_module_expander1 11 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp0_module_expander1 10 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp0_module_expander1 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp0_module_expander1 8 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp0_module_expander1 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp0_module_expander1 10 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp0_module_expander1 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp0_module_expander1 8 GPIO_ACTIVE_HIGH>; /* * SFP cages are unconnected on early PCBs because of an the I2C * lanes not being connected. Prevent the port for being diff --git a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi index b7fc241a228c..ff8422fae31b 100644 --- a/arch/arm64/boot/dts/marvell/cn9131-db.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9131-db.dtsi @@ -37,10 +37,10 @@ cp1_usb3_0_phy0: cp1_usb3_phy0 { cp1_sfp_eth1: sfp-eth1 { compatible = "sff,sfp"; i2c-bus = <&cp1_i2c0>; - los-gpio = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp1_gpio1 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp1_gpio1 10 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp1_gpio1 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp1_gpio1 8 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&cp1_sfp_pins>; /* diff --git a/arch/arm64/boot/dts/marvell/cn9132-db.dtsi b/arch/arm64/boot/dts/marvell/cn9132-db.dtsi index 3f1795fb4fe7..512a4fa2861e 100644 --- a/arch/arm64/boot/dts/marvell/cn9132-db.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9132-db.dtsi @@ -57,10 +57,10 @@ cp2_reg_sd_vccq: cp2_sd_vccq@0 { cp2_sfp_eth0: sfp-eth0 { compatible = "sff,sfp"; i2c-bus = <&cp2_sfpp0_i2c>; - los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; - mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; - tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; - tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; + los-gpios = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpios = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; + tx-disable-gpios = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; /* * SFP cages are unconnected on early PCBs because of an the I2C * lanes not being connected. Prevent the port for being