From patchwork Thu Jul 7 11:05:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zheng X-Patchwork-Id: 12909355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77BF0C43334 for ; Thu, 7 Jul 2022 11:07:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lJFuU51OxpsRM4+gXeT1sdJGjvoP6C4heIzqfSA92/A=; b=1ACJylgo1FQ4xf cwnTQmcFW88G1KXditMMbn8heuy3BOvrG8KQlBv+8KhaewAxeoki/TrdVJthL2vwuq6D6e0kz44i6 zoSVTuGAqmJATa+qEY73Cp3dUJWxoF2KTvwo90XoZp8ytXRi+D08HPQGEBaQgBS6gNbzUaVJTtLIY HOm0g/mp418wFNgOIBDTvaeq6gwP6iKVkSM2Yh8KYj1qrvCihSLY/oLy8AD5LUafDw8vvG5XpFP6n CbQ1DJfurxC2BRAstkDQAAsdwcxk+Ndov64CU29Idih6bOapRR2czzkefnbkUCYpy5Z83d/WE1Vzu aclXyZnx2P1yPUSXuygQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9PKn-00Fk1A-4Z; Thu, 07 Jul 2022 11:06:13 +0000 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9PKd-00Fjwm-2Q for linux-arm-kernel@lists.infradead.org; Thu, 07 Jul 2022 11:06:05 +0000 Received: by mail-pg1-x529.google.com with SMTP id 23so17828666pgc.8 for ; Thu, 07 Jul 2022 04:06:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R+H04G+1sbEsT1Vwo2PzH8D8ql+BkczGA26aIjD53FM=; b=wKcGv2/iE3mQ3uPvTHSfbHT86kJLoiIOovbMVqqzibgJxuFd8xFcR+AfkN178EY2+6 gmPO2Mcfp6YwjWvXzXuawAZ5q8BjVIPtn3nBAzg6qpn+c9Jsl4IbYnyTpRU9pzvJpdAu MWrxjt0LJa865lMD/Hw7x1DJLQdynnAJEuTHEYerCtJoIcHLFylDUNFUKHxQGdnNl5eW bgPoha6k0VIxHBIel2cCWSDy5rrlNrIk7FEbAe/6egFQUwjiEn8F41WxokvJ2miTZQeR 5JkUAECOm/ReMHrRd9I0QsadMzvTwwyiZsFcj3t8d85+8B/tPO1Jj871YBKca12AbRYz Yhkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R+H04G+1sbEsT1Vwo2PzH8D8ql+BkczGA26aIjD53FM=; b=5fKo0Nhzm6idyKOUVxFU8JKSNIssbjGqlKvhAasSsuseRqmsvPDJqMYsfoBDYNW4AJ 0N7mk4MAw0aV67EVxpa1Bv2jugOk/TezPhiWsH2xwwYpzL2ljinpWQF2SCp8z+MGHSVg CZ9Qij1p7UeeRnHRg9dTbQVmRGKSU2c93RmlFgB4tD/LLVeJzBxrEzba4V5ch8n6S1zB XQr6GKYeGA0BgRoYVIkk/Va3mLX9yqwTbe3ZK7kojQzTWsz1rqNWV8z013hE7n9/Qy63 ksp0dPq4zsA42bGQbXR1uIH/xiuM4r/Pv94LHdjmqK8TCd+EQYr0InCs/6YzgMEwD2j7 dMsw== X-Gm-Message-State: AJIora8c0SmcLxNb3eOYc+E4hKuuKIzUGk37NxCOyXlXDbvNI6B3MNpB 5gheOs2d9N/oIuZjuUsahn+fXQ== X-Google-Smtp-Source: AGRyM1sIs8s4JT9g0SLi5t7N5/jxpFkC9Z8kSZSVHpD9q8G3jgH3az1rsxc2BtZf69utGx2dmcj5MA== X-Received: by 2002:a17:90b:4b41:b0:1ec:cb06:2fa3 with SMTP id mi1-20020a17090b4b4100b001eccb062fa3mr4369801pjb.55.1657191960365; Thu, 07 Jul 2022 04:06:00 -0700 (PDT) Received: from C02DW0BEMD6R.bytedance.net ([139.177.225.229]) by smtp.gmail.com with ESMTPSA id 72-20020a62174b000000b005289a50e4c2sm1046403pfx.23.2022.07.07.04.05.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jul 2022 04:05:59 -0700 (PDT) From: Qi Zheng To: catalin.marinas@arm.com, will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Qi Zheng Subject: [RFC PATCH 1/2] arm64: run softirqs on the per-CPU IRQ stack Date: Thu, 7 Jul 2022 19:05:10 +0800 Message-Id: <20220707110511.52129-2-zhengqi.arch@bytedance.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20220707110511.52129-1-zhengqi.arch@bytedance.com> References: <20220707110511.52129-1-zhengqi.arch@bytedance.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220707_040603_202509_30388F43 X-CRM114-Status: GOOD ( 11.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently arm64 supports per-CPU IRQ stack, but softirqs are still handled in the task context. Since any call to local_bh_enable() at any level in the task's call stack may trigger a softirq processing run, which could potentially cause a task stack overflow if the combined stack footprints exceed the stack's size, let's run these softirqs on the IRQ stack as well. Signed-off-by: Qi Zheng --- arch/arm64/Kconfig | 1 + arch/arm64/kernel/irq.c | 11 +++++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 3491d0d99891..402e16fec02a 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -230,6 +230,7 @@ config ARM64 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD select TRACE_IRQFLAGS_SUPPORT select TRACE_IRQFLAGS_NMI_SUPPORT + select HAVE_SOFTIRQ_ON_OWN_STACK help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index bda49430c9ea..e6aa37672fd4 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -22,6 +22,7 @@ #include #include #include +#include /* Only access this in an NMI enter/exit */ DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts); @@ -71,6 +72,16 @@ static void init_irq_stacks(void) } #endif +static void ____do_softirq(struct pt_regs *regs) +{ + __do_softirq(); +} + +void do_softirq_own_stack(void) +{ + call_on_irq_stack(NULL, ____do_softirq); +} + static void default_handle_irq(struct pt_regs *regs) { panic("IRQ taken without a root IRQ handler\n"); From patchwork Thu Jul 7 11:05:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zheng X-Patchwork-Id: 12909356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBADFC43334 for ; Thu, 7 Jul 2022 11:07:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Thu, 07 Jul 2022 04:06:03 -0700 (PDT) Received: from C02DW0BEMD6R.bytedance.net ([139.177.225.229]) by smtp.gmail.com with ESMTPSA id 72-20020a62174b000000b005289a50e4c2sm1046403pfx.23.2022.07.07.04.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jul 2022 04:06:03 -0700 (PDT) From: Qi Zheng To: catalin.marinas@arm.com, will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Qi Zheng Subject: [RFC PATCH 2/2] arm64: support HAVE_IRQ_EXIT_ON_IRQ_STACK Date: Thu, 7 Jul 2022 19:05:11 +0800 Message-Id: <20220707110511.52129-3-zhengqi.arch@bytedance.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20220707110511.52129-1-zhengqi.arch@bytedance.com> References: <20220707110511.52129-1-zhengqi.arch@bytedance.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220707_040604_366028_1400750D X-CRM114-Status: GOOD ( 14.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since softirqs are handled on the per-CPU IRQ stack, let's support HAVE_IRQ_EXIT_ON_IRQ_STACK which causes the core code to invoke __do_softirq() directly without going through do_softirq_own_stack(). Signed-off-by: Qi Zheng --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/exception.h | 4 +++- arch/arm64/kernel/entry-common.c | 30 ++++++++++++++++++++---------- arch/arm64/kernel/entry.S | 6 ++++-- arch/arm64/kernel/irq.c | 5 +++-- 5 files changed, 31 insertions(+), 15 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 402e16fec02a..89f6368b705e 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -231,6 +231,7 @@ config ARM64 select TRACE_IRQFLAGS_SUPPORT select TRACE_IRQFLAGS_NMI_SUPPORT select HAVE_SOFTIRQ_ON_OWN_STACK + select HAVE_IRQ_EXIT_ON_IRQ_STACK help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h index d94aecff9690..8bff0aa7ab50 100644 --- a/arch/arm64/include/asm/exception.h +++ b/arch/arm64/include/asm/exception.h @@ -54,7 +54,9 @@ asmlinkage void el0t_32_fiq_handler(struct pt_regs *regs); asmlinkage void el0t_32_error_handler(struct pt_regs *regs); asmlinkage void call_on_irq_stack(struct pt_regs *regs, - void (*func)(struct pt_regs *)); + void (*func)(struct pt_regs *), + void (*do_func)(struct pt_regs *, + void (*)(struct pt_regs *))); asmlinkage void asm_exit_to_user_mode(struct pt_regs *regs); void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index c75ca36b4a49..935d1ab150b5 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -266,14 +266,16 @@ static void __sched arm64_preempt_schedule_irq(void) } static void do_interrupt_handler(struct pt_regs *regs, - void (*handler)(struct pt_regs *)) + void (*handler)(struct pt_regs *), + void (*do_handler)(struct pt_regs *, + void (*)(struct pt_regs *))) { struct pt_regs *old_regs = set_irq_regs(regs); if (on_thread_stack()) - call_on_irq_stack(regs, handler); + call_on_irq_stack(regs, handler, do_handler); else - handler(regs); + do_handler(regs, handler); set_irq_regs(old_regs); } @@ -441,22 +443,32 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) } } +static void nmi_handler(struct pt_regs *regs, void (*handler)(struct pt_regs *)) +{ + handler(regs); +} + static __always_inline void __el1_pnmi(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { arm64_enter_nmi(regs); - do_interrupt_handler(regs, handler); + do_interrupt_handler(regs, handler, nmi_handler); arm64_exit_nmi(regs); } +static void irq_handler(struct pt_regs *regs, void (*handler)(struct pt_regs *)) +{ + irq_enter_rcu(); + handler(regs); + irq_exit_rcu(); +} + static __always_inline void __el1_irq(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { enter_from_kernel_mode(regs); - irq_enter_rcu(); - do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_interrupt_handler(regs, handler, irq_handler); arm64_preempt_schedule_irq(); @@ -699,9 +711,7 @@ static void noinstr el0_interrupt(struct pt_regs *regs, if (regs->pc & BIT(55)) arm64_apply_bp_hardening(); - irq_enter_rcu(); - do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_interrupt_handler(regs, handler, irq_handler); exit_to_user_mode(regs); } diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 254fe31c03a0..1c351391f6bd 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -867,7 +867,9 @@ NOKPROBE(ret_from_fork) /* * void call_on_irq_stack(struct pt_regs *regs, - * void (*func)(struct pt_regs *)); + * void (*func)(struct pt_regs *) + * void (*do_func)(struct pt_regs *, + * void (*)(struct pt_regs *))); * * Calls func(regs) using this CPU's irq stack and shadow irq stack. */ @@ -886,7 +888,7 @@ SYM_FUNC_START(call_on_irq_stack) /* Move to the new stack and call the function there */ mov sp, x16 - blr x1 + blr x2 /* * Restore the SP from the FP, and restore the FP and LR from the frame diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index e6aa37672fd4..54cd418d47ef 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -72,14 +72,15 @@ static void init_irq_stacks(void) } #endif -static void ____do_softirq(struct pt_regs *regs) +static void ____do_softirq(struct pt_regs *regs, + void (*handler)(struct pt_regs *)) { __do_softirq(); } void do_softirq_own_stack(void) { - call_on_irq_stack(NULL, ____do_softirq); + call_on_irq_stack(NULL, NULL, ____do_softirq); } static void default_handle_irq(struct pt_regs *regs)