From patchwork Fri Jul 8 09:49:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zheng X-Patchwork-Id: 12910837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D892BC433EF for ; Fri, 8 Jul 2022 09:51:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lliw1PTsCbNJKVdyGILQ3ETzQ/hVx6GV80BhyKMGmW4=; b=FN9W2L2/Cx0fAJ fmmKCdOiFj7ObRhfLx6ztLPB3e8g4etbSJeDqejME2FoBm30Y0KjZIcwHrcBlVAnS4JXyvqH9AvFt teY+gsvAUirbABvbYqDtfys/NtK6QSWTSKb7F2h//GTCExJRM4spUgNqcONX70YCyKuKXHQEL/kjC xEdWJD6Dnrj3zNM2ROn0cBc4a/Ji6xwVF2D+7mfol4bhZK9D5OEqFnyQwcJM76K9cKUQ03Q3ngng3 aYDsJYtYFHgcXW44UdxLh4OkJl/ltYXVBdbphQE+pGH8euz6k7jDy+g68clhCwAnWqBjiSdh7lfch FG1d87yWhUrEpJd8btxg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9kdI-0031aV-5L; Fri, 08 Jul 2022 09:50:45 +0000 Received: from mail-pj1-x1031.google.com ([2607:f8b0:4864:20::1031]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o9kcu-0031O1-B5 for linux-arm-kernel@lists.infradead.org; Fri, 08 Jul 2022 09:50:22 +0000 Received: by mail-pj1-x1031.google.com with SMTP id x18-20020a17090a8a9200b001ef83b332f5so1397147pjn.0 for ; Fri, 08 Jul 2022 02:50:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4jkOqxcIBQLQ5eXTZyOJgkqi8V8OLaYB23LUkp1ByWQ=; b=1BQ/tfXanGFpMFjNAcJaktjsNTJO2Ix+TlfvkM8+DRdCM+TQJgbOKjIpF3MiANq3It c7hfVkGdQsdjKCLbbEjWgodkcKTUPOfsQ6bXqxpiuCSzKmawmYzxWzqxIYAtM+fdJ4uL 2OsyvV/scdUurXA5YlvqJksdhJTMcVKWIWjLknH5i/+aSa8x+VpWW9MImoS3Ci1or+x1 gIPYJorcVidrhYhYcDv5VzHBlb1o7j9vdkigw011F5prGRrWR5v00fjrkajH1kev1V5X Ldr88ehPn9JaZeJXLtdyI6Xa+KiFoYshqug9TIK+3oWpNP0xmI+X1IjMPOJ2nvxpdN6T me+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4jkOqxcIBQLQ5eXTZyOJgkqi8V8OLaYB23LUkp1ByWQ=; b=0rBVRbyAPupUKMZInyL1ESxroD2i5gX0PcAQUpRJg6Sw8v1czv/an/Ns+7myg/HhIu hMvJZm9qBlAlGyu+vL7N0WwGJz13lCD7Tj0FVyihsqSYs/61J1zbsaGN6BoDaU1uUVIs SqYIKnvgwbuTKESk8aTKTbvy5RI2+HJhNQO4Hg7+eLrTrsUGWSdRdlIs30B5zNmumv5/ XkvTgK0pGrIP0qNaQc373Dg2eCeEa0qPJPKJ2ZUyO1rQiig4DqmfsqCkiBKU151Cx/39 yrDgOtuQ27Klu6fbMUACGzGzm0FxH92/RxAylwJjdMvqpL56Iz5SfUKa95UN9kxCFxdf Wc3A== X-Gm-Message-State: AJIora/qzSJ4PWStwNoHPjAWWfr5PabqH8i2pWLpmH8JVuEHT3A7Lwd+ 1eoglXpkA8V0aepuv2i7GUu2eQ== X-Google-Smtp-Source: AGRyM1u7AMj7GkfbB3EyA7uxddW7w0Or4OxuSPugOlKsXFvBWgXG7+x3nFx/fqpi5m0+YBUIZ0NXMw== X-Received: by 2002:a17:903:2686:b0:16b:d663:5b4f with SMTP id jf6-20020a170903268600b0016bd6635b4fmr2773886plb.129.1657273817282; Fri, 08 Jul 2022 02:50:17 -0700 (PDT) Received: from C02DW0BEMD6R.bytedance.net ([139.177.225.235]) by smtp.gmail.com with ESMTPSA id c18-20020a621c12000000b0051bbd79fc9csm28551035pfc.57.2022.07.08.02.50.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 02:50:16 -0700 (PDT) From: Qi Zheng To: arnd@arndb.de, catalin.marinas@arm.com, will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Qi Zheng Subject: [PATCH v1 1/2] arm64: run softirqs on the per-CPU IRQ stack Date: Fri, 8 Jul 2022 17:49:49 +0800 Message-Id: <20220708094950.41944-2-zhengqi.arch@bytedance.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20220708094950.41944-1-zhengqi.arch@bytedance.com> References: <20220708094950.41944-1-zhengqi.arch@bytedance.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220708_025020_428886_93B3D43E X-CRM114-Status: GOOD ( 11.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently arm64 supports per-CPU IRQ stack, but softirqs are still handled in the task context. Since any call to local_bh_enable() at any level in the task's call stack may trigger a softirq processing run, which could potentially cause a task stack overflow if the combined stack footprints exceed the stack's size, let's run these softirqs on the IRQ stack as well. Signed-off-by: Qi Zheng Reviewed-by: Arnd Bergmann Acked-by: Will Deacon --- arch/arm64/Kconfig | 1 + arch/arm64/kernel/irq.c | 13 +++++++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 4c1e1d2d2f8b..be0a9f0052ee 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -230,6 +230,7 @@ config ARM64 select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD select TRACE_IRQFLAGS_SUPPORT select TRACE_IRQFLAGS_NMI_SUPPORT + select HAVE_SOFTIRQ_ON_OWN_STACK help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index bda49430c9ea..c36ad20a52f3 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -22,6 +22,7 @@ #include #include #include +#include /* Only access this in an NMI enter/exit */ DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts); @@ -71,6 +72,18 @@ static void init_irq_stacks(void) } #endif +#ifndef CONFIG_PREEMPT_RT +static void ____do_softirq(struct pt_regs *regs) +{ + __do_softirq(); +} + +void do_softirq_own_stack(void) +{ + call_on_irq_stack(NULL, ____do_softirq); +} +#endif + static void default_handle_irq(struct pt_regs *regs) { panic("IRQ taken without a root IRQ handler\n"); From patchwork Fri Jul 8 09:49:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zheng X-Patchwork-Id: 12910838 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08687C433EF for ; Fri, 8 Jul 2022 09:52:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 08 Jul 2022 02:50:20 -0700 (PDT) Received: from C02DW0BEMD6R.bytedance.net ([139.177.225.235]) by smtp.gmail.com with ESMTPSA id c18-20020a621c12000000b0051bbd79fc9csm28551035pfc.57.2022.07.08.02.50.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 02:50:20 -0700 (PDT) From: Qi Zheng To: arnd@arndb.de, catalin.marinas@arm.com, will@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Qi Zheng Subject: [PATCH v1 2/2] arm64: support HAVE_IRQ_EXIT_ON_IRQ_STACK Date: Fri, 8 Jul 2022 17:49:50 +0800 Message-Id: <20220708094950.41944-3-zhengqi.arch@bytedance.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) In-Reply-To: <20220708094950.41944-1-zhengqi.arch@bytedance.com> References: <20220708094950.41944-1-zhengqi.arch@bytedance.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220708_025024_213133_07579B2D X-CRM114-Status: GOOD ( 14.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Since softirqs are handled on the per-CPU IRQ stack, let's support HAVE_IRQ_EXIT_ON_IRQ_STACK which causes the core code to invoke __do_softirq() directly without going through do_softirq_own_stack(). Signed-off-by: Qi Zheng --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/exception.h | 4 +++- arch/arm64/kernel/entry-common.c | 30 ++++++++++++++++++++---------- arch/arm64/kernel/entry.S | 6 ++++-- arch/arm64/kernel/irq.c | 5 +++-- 5 files changed, 31 insertions(+), 15 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index be0a9f0052ee..d2cc7daecce3 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -231,6 +231,7 @@ config ARM64 select TRACE_IRQFLAGS_SUPPORT select TRACE_IRQFLAGS_NMI_SUPPORT select HAVE_SOFTIRQ_ON_OWN_STACK + select HAVE_IRQ_EXIT_ON_IRQ_STACK help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/include/asm/exception.h b/arch/arm64/include/asm/exception.h index d94aecff9690..8bff0aa7ab50 100644 --- a/arch/arm64/include/asm/exception.h +++ b/arch/arm64/include/asm/exception.h @@ -54,7 +54,9 @@ asmlinkage void el0t_32_fiq_handler(struct pt_regs *regs); asmlinkage void el0t_32_error_handler(struct pt_regs *regs); asmlinkage void call_on_irq_stack(struct pt_regs *regs, - void (*func)(struct pt_regs *)); + void (*func)(struct pt_regs *), + void (*do_func)(struct pt_regs *, + void (*)(struct pt_regs *))); asmlinkage void asm_exit_to_user_mode(struct pt_regs *regs); void do_mem_abort(unsigned long far, unsigned long esr, struct pt_regs *regs); diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index c75ca36b4a49..935d1ab150b5 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -266,14 +266,16 @@ static void __sched arm64_preempt_schedule_irq(void) } static void do_interrupt_handler(struct pt_regs *regs, - void (*handler)(struct pt_regs *)) + void (*handler)(struct pt_regs *), + void (*do_handler)(struct pt_regs *, + void (*)(struct pt_regs *))) { struct pt_regs *old_regs = set_irq_regs(regs); if (on_thread_stack()) - call_on_irq_stack(regs, handler); + call_on_irq_stack(regs, handler, do_handler); else - handler(regs); + do_handler(regs, handler); set_irq_regs(old_regs); } @@ -441,22 +443,32 @@ asmlinkage void noinstr el1h_64_sync_handler(struct pt_regs *regs) } } +static void nmi_handler(struct pt_regs *regs, void (*handler)(struct pt_regs *)) +{ + handler(regs); +} + static __always_inline void __el1_pnmi(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { arm64_enter_nmi(regs); - do_interrupt_handler(regs, handler); + do_interrupt_handler(regs, handler, nmi_handler); arm64_exit_nmi(regs); } +static void irq_handler(struct pt_regs *regs, void (*handler)(struct pt_regs *)) +{ + irq_enter_rcu(); + handler(regs); + irq_exit_rcu(); +} + static __always_inline void __el1_irq(struct pt_regs *regs, void (*handler)(struct pt_regs *)) { enter_from_kernel_mode(regs); - irq_enter_rcu(); - do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_interrupt_handler(regs, handler, irq_handler); arm64_preempt_schedule_irq(); @@ -699,9 +711,7 @@ static void noinstr el0_interrupt(struct pt_regs *regs, if (regs->pc & BIT(55)) arm64_apply_bp_hardening(); - irq_enter_rcu(); - do_interrupt_handler(regs, handler); - irq_exit_rcu(); + do_interrupt_handler(regs, handler, irq_handler); exit_to_user_mode(regs); } diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 254fe31c03a0..1c351391f6bd 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -867,7 +867,9 @@ NOKPROBE(ret_from_fork) /* * void call_on_irq_stack(struct pt_regs *regs, - * void (*func)(struct pt_regs *)); + * void (*func)(struct pt_regs *) + * void (*do_func)(struct pt_regs *, + * void (*)(struct pt_regs *))); * * Calls func(regs) using this CPU's irq stack and shadow irq stack. */ @@ -886,7 +888,7 @@ SYM_FUNC_START(call_on_irq_stack) /* Move to the new stack and call the function there */ mov sp, x16 - blr x1 + blr x2 /* * Restore the SP from the FP, and restore the FP and LR from the frame diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index c36ad20a52f3..003db605bc4f 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -73,14 +73,15 @@ static void init_irq_stacks(void) #endif #ifndef CONFIG_PREEMPT_RT -static void ____do_softirq(struct pt_regs *regs) +static void ____do_softirq(struct pt_regs *regs, + void (*handler)(struct pt_regs *)) { __do_softirq(); } void do_softirq_own_stack(void) { - call_on_irq_stack(NULL, ____do_softirq); + call_on_irq_stack(NULL, NULL, ____do_softirq); } #endif