From patchwork Mon Jul 11 07:22:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913013 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 09ACB1FB7 for ; Mon, 11 Jul 2022 07:24:17 +0000 (UTC) Received: by mail-pj1-f48.google.com with SMTP id o5-20020a17090a3d4500b001ef76490983so4138672pjf.2 for ; Mon, 11 Jul 2022 00:24:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4/k63WnMwERwrGtWvOGIp1+u87qK7eZtcLQT01GC6oU=; b=AyMx5c8RuvO9csHD48UkBnkqZ4BXos27LEzlw40nsSPGVmddJaKaS5pzy5lISoTPwp OmURWRs9On+bTy3NdY6Zxjz4lXXLbsOmKBoW0FmBiwJ8ldUucAXZ64EMMhhxqCaDX7X0 J79lChFd/bm94s6VmuS6z+QaQZF8fxVOBgJr8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4/k63WnMwERwrGtWvOGIp1+u87qK7eZtcLQT01GC6oU=; b=OCQJItH3il3HYI5oaG1bDUHFZEG2vY3Y65cE8K8RaFQ/RsG420Hnmc/OCF1qO1u/T6 lE2AfMs2dpNmRVKc1Yf6bBzndbT/2zBAOyN56lTSqLE3Qp5fN3v8vOXYzJqRlYIhkemU HYlShxvLBAGR0N4TC5kzJJBbBB6UtPMiL7i0iclKb6QHq8BvfeMAACgriZHeaqUQqoaP 8l9Y+TW/qYpqmU7ggOHkow8tt9Vk4t0cj5KiF51e7R1rwreSGC8Ez7lrHgfLkWIRzUQF N2Ei6NSWwYA6fbV2wJGF34xy63fk3ZHP10Nzd3I/ZfNbSaHvhMjGybaQ1AhDrYDaC8TU ErnQ== X-Gm-Message-State: AJIora9WlSSmNnieevKOrOZvMythadroI763k9l+QrciTwoQkgcoZ8OH CEVfdn7B6/mVbM3o8S56R6gTXQ== X-Google-Smtp-Source: AGRyM1uZ15jkB0w0jwy1L/hngSIijM95Gya7G8xJH1dhFaSI0IjB6qIobYIu5DmW3IycrflEn/DodQ== X-Received: by 2002:a17:90a:7409:b0:1ef:8e95:c861 with SMTP id a9-20020a17090a740900b001ef8e95c861mr16416072pjg.115.1657524257437; Mon, 11 Jul 2022 00:24:17 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.24.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:24:17 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 1/9] usb: typec: Add support for retimers Date: Mon, 11 Jul 2022 07:22:55 +0000 Message-Id: <20220711072333.2064341-2-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Introduce a retimer device class and associated functions that register and use retimer "switch" devices. These operate in a manner similar to the "mode-switch" and help configure retimers that exist between the Type-C connector and host controller(s). Type C ports can be linked to retimers using firmware node device references (again, in a manner similar to "mode-switch"). There are no new sysfs files being created; there is the new retimer class directory, but there are no class-specific files being created there. Signed-off-by: Prashant Malani Acked-by: Heikki Krogerus --- Changes since v3: - Updated Commit message to mention that no new class-specific sysfs files are being added. Changes since v2: - No changes. Changes since v1: - Change class name to "retimer" - Change device type to "typec_retimer". drivers/usb/typec/Makefile | 2 +- drivers/usb/typec/class.c | 9 +- drivers/usb/typec/class.h | 1 + drivers/usb/typec/retimer.c | 168 ++++++++++++++++++++++++++++++ drivers/usb/typec/retimer.h | 15 +++ include/linux/usb/typec_retimer.h | 45 ++++++++ 6 files changed, 238 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/typec/retimer.c create mode 100644 drivers/usb/typec/retimer.h create mode 100644 include/linux/usb/typec_retimer.h diff --git a/drivers/usb/typec/Makefile b/drivers/usb/typec/Makefile index 2f174cd3e5df..4955d9af0811 100644 --- a/drivers/usb/typec/Makefile +++ b/drivers/usb/typec/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_TYPEC) += typec.o -typec-y := class.o mux.o bus.o pd.o +typec-y := class.o mux.o bus.o pd.o retimer.o typec-$(CONFIG_ACPI) += port-mapper.o obj-$(CONFIG_TYPEC) += altmodes/ obj-$(CONFIG_TYPEC_TCPM) += tcpm/ diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c index bbc46b14f99a..9062836bb638 100644 --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c @@ -2299,10 +2299,14 @@ static int __init typec_init(void) if (ret) goto err_unregister_bus; - ret = class_register(&typec_class); + ret = class_register(&retimer_class); if (ret) goto err_unregister_mux_class; + ret = class_register(&typec_class); + if (ret) + goto err_unregister_retimer_class; + ret = usb_power_delivery_init(); if (ret) goto err_unregister_class; @@ -2312,6 +2316,9 @@ static int __init typec_init(void) err_unregister_class: class_unregister(&typec_class); +err_unregister_retimer_class: + class_unregister(&retimer_class); + err_unregister_mux_class: class_unregister(&typec_mux_class); diff --git a/drivers/usb/typec/class.h b/drivers/usb/typec/class.h index b531f9853bc0..43fcf9e37a8c 100644 --- a/drivers/usb/typec/class.h +++ b/drivers/usb/typec/class.h @@ -76,6 +76,7 @@ extern const struct device_type typec_port_dev_type; #define is_typec_port(dev) ((dev)->type == &typec_port_dev_type) extern struct class typec_mux_class; +extern struct class retimer_class; extern struct class typec_class; #if defined(CONFIG_ACPI) diff --git a/drivers/usb/typec/retimer.c b/drivers/usb/typec/retimer.c new file mode 100644 index 000000000000..051eaa7d2899 --- /dev/null +++ b/drivers/usb/typec/retimer.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + * + * USB Type-C Retimer support. + * Author: Prashant Malani + * + */ + +#include +#include +#include +#include +#include +#include + +#include "class.h" +#include "retimer.h" + +static bool dev_name_ends_with(struct device *dev, const char *suffix) +{ + const char *name = dev_name(dev); + const int name_len = strlen(name); + const int suffix_len = strlen(suffix); + + if (suffix_len > name_len) + return false; + + return strcmp(name + (name_len - suffix_len), suffix) == 0; +} + +static int retimer_fwnode_match(struct device *dev, const void *fwnode) +{ + return dev_fwnode(dev) == fwnode && dev_name_ends_with(dev, "-retimer"); +} + +static void *typec_retimer_match(struct fwnode_handle *fwnode, const char *id, void *data) +{ + struct device *dev = class_find_device(&retimer_class, NULL, fwnode, + retimer_fwnode_match); + + return dev ? to_typec_retimer(dev) : ERR_PTR(-EPROBE_DEFER); +} + +/** + * fwnode_typec_retimer_get - Find USB Type-C retimer. + * @fwnode: The caller device node. + * + * Finds a retimer linked to the caller. This function is primarily meant for the + * Type-C drivers. Returns a reference to the retimer on success, NULL if no + * matching connection was found, or ERR_PTR(-EPROBE_DEFER) when a connection + * was found but the retimer has not been enumerated yet. + */ +struct typec_retimer *fwnode_typec_retimer_get(struct fwnode_handle *fwnode) +{ + struct typec_retimer *retimer; + + retimer = fwnode_connection_find_match(fwnode, "retimer-switch", NULL, typec_retimer_match); + if (!IS_ERR_OR_NULL(retimer)) + WARN_ON(!try_module_get(retimer->dev.parent->driver->owner)); + + return retimer; +} +EXPORT_SYMBOL_GPL(fwnode_typec_retimer_get); + +/** + * typec_retimer_put - Release handle to a retimer. + * @retimer: USB Type-C Connector Retimer. + * + * Decrements reference count for @retimer. + */ +void typec_retimer_put(struct typec_retimer *retimer) +{ + if (!IS_ERR_OR_NULL(retimer)) { + module_put(retimer->dev.parent->driver->owner); + put_device(&retimer->dev); + } +} +EXPORT_SYMBOL_GPL(typec_retimer_put); + +int typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) +{ + if (IS_ERR_OR_NULL(retimer)) + return 0; + + return retimer->set(retimer, state); +} +EXPORT_SYMBOL_GPL(typec_retimer_set); + +static void typec_retimer_release(struct device *dev) +{ + kfree(to_typec_retimer(dev)); +} + +static const struct device_type typec_retimer_dev_type = { + .name = "typec_retimer", + .release = typec_retimer_release, +}; + +/** + * typec_retimer_register - Register a retimer device. + * @parent: Parent device. + * @desc: Retimer description. + * + * Some USB Type-C connectors have their physical lines routed through retimers before they + * reach muxes or host controllers. In some cases (for example: using alternate modes) + * these retimers need to be reconfigured appropriately. This function registers retimer + * switches which route and potentially modify the signals on the Type C physical lines + * enroute to the host controllers. + */ +struct typec_retimer * +typec_retimer_register(struct device *parent, const struct typec_retimer_desc *desc) +{ + struct typec_retimer *retimer; + int ret; + + if (!desc || !desc->set) + return ERR_PTR(-EINVAL); + + retimer = kzalloc(sizeof(*retimer), GFP_KERNEL); + if (!retimer) + return ERR_PTR(-ENOMEM); + + retimer->set = desc->set; + + device_initialize(&retimer->dev); + retimer->dev.parent = parent; + retimer->dev.fwnode = desc->fwnode; + retimer->dev.class = &retimer_class; + retimer->dev.type = &typec_retimer_dev_type; + retimer->dev.driver_data = desc->drvdata; + dev_set_name(&retimer->dev, "%s-retimer", + desc->name ? desc->name : dev_name(parent)); + + ret = device_add(&retimer->dev); + if (ret) { + dev_err(parent, "failed to register retimer (%d)\n", ret); + put_device(&retimer->dev); + return ERR_PTR(ret); + } + + return retimer; +} +EXPORT_SYMBOL_GPL(typec_retimer_register); + +/** + * typec_retimer_unregister - Unregister retimer device. + * @retimer: USB Type-C Connector retimer. + * + * Unregister retimer that was registered with typec_retimer_register(). + */ +void typec_retimer_unregister(struct typec_retimer *retimer) +{ + if (!IS_ERR_OR_NULL(retimer)) + device_unregister(&retimer->dev); +} +EXPORT_SYMBOL_GPL(typec_retimer_unregister); + +void *typec_retimer_get_drvdata(struct typec_retimer *retimer) +{ + return dev_get_drvdata(&retimer->dev); +} +EXPORT_SYMBOL_GPL(typec_retimer_get_drvdata); + +struct class retimer_class = { + .name = "retimer", + .owner = THIS_MODULE, +}; diff --git a/drivers/usb/typec/retimer.h b/drivers/usb/typec/retimer.h new file mode 100644 index 000000000000..fa15951d4846 --- /dev/null +++ b/drivers/usb/typec/retimer.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __USB_TYPEC_RETIMER__ +#define __USB_TYPEC_RETIMER__ + +#include + +struct typec_retimer { + struct device dev; + typec_retimer_set_fn_t set; +}; + +#define to_typec_retimer(_dev_) container_of(_dev_, struct typec_retimer, dev) + +#endif /* __USB_TYPEC_RETIMER__ */ diff --git a/include/linux/usb/typec_retimer.h b/include/linux/usb/typec_retimer.h new file mode 100644 index 000000000000..5e036b3360e2 --- /dev/null +++ b/include/linux/usb/typec_retimer.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __USB_TYPEC_RETIMER +#define __USB_TYPEC_RETIMER + +#include +#include + +struct device; +struct typec_retimer; +struct typec_altmode; +struct fwnode_handle; + +struct typec_retimer_state { + struct typec_altmode *alt; + unsigned long mode; + void *data; +}; + +typedef int (*typec_retimer_set_fn_t)(struct typec_retimer *retimer, + struct typec_retimer_state *state); + +struct typec_retimer_desc { + struct fwnode_handle *fwnode; + typec_retimer_set_fn_t set; + const char *name; + void *drvdata; +}; + +struct typec_retimer *fwnode_typec_retimer_get(struct fwnode_handle *fwnode); +void typec_retimer_put(struct typec_retimer *retimer); +int typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state); + +static inline struct typec_retimer *typec_retimer_get(struct device *dev) +{ + return fwnode_typec_retimer_get(dev_fwnode(dev)); +} + +struct typec_retimer * +typec_retimer_register(struct device *parent, const struct typec_retimer_desc *desc); +void typec_retimer_unregister(struct typec_retimer *retimer); + +void *typec_retimer_get_drvdata(struct typec_retimer *retimer); + +#endif /* __USB_TYPEC_RETIMER */ From patchwork Mon Jul 11 07:22:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913014 Received: from mail-pg1-f175.google.com (mail-pg1-f175.google.com [209.85.215.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C74D1FB7 for ; Mon, 11 Jul 2022 07:24:54 +0000 (UTC) Received: by mail-pg1-f175.google.com with SMTP id r22so4032185pgr.2 for ; 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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.24.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:24:53 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 2/9] usb: typec: Add retimer handle to port Date: Mon, 11 Jul 2022 07:22:56 +0000 Message-Id: <20220711072333.2064341-3-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Similar to mux and orientation switch, add a handle for registered retimer to the port, so that it has handles to the various switches connected to it. Signed-off-by: Prashant Malani Acked-by: Heikki Krogerus --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - Relinquish retimer reference during typec_release. drivers/usb/typec/class.c | 9 +++++++++ drivers/usb/typec/class.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c index 9062836bb638..f08e32d552b4 100644 --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "bus.h" #include "class.h" @@ -1736,6 +1737,7 @@ static void typec_release(struct device *dev) ida_destroy(&port->mode_ids); typec_switch_put(port->sw); typec_mux_put(port->mux); + typec_retimer_put(port->retimer); kfree(port->cap); kfree(port); } @@ -2249,6 +2251,13 @@ struct typec_port *typec_register_port(struct device *parent, return ERR_PTR(ret); } + port->retimer = typec_retimer_get(&port->dev); + if (IS_ERR(port->retimer)) { + ret = PTR_ERR(port->retimer); + put_device(&port->dev); + return ERR_PTR(ret); + } + ret = device_add(&port->dev); if (ret) { dev_err(parent, "failed to register port (%d)\n", ret); diff --git a/drivers/usb/typec/class.h b/drivers/usb/typec/class.h index 43fcf9e37a8c..673b2952b074 100644 --- a/drivers/usb/typec/class.h +++ b/drivers/usb/typec/class.h @@ -55,6 +55,7 @@ struct typec_port { enum typec_orientation orientation; struct typec_switch *sw; struct typec_mux *mux; + struct typec_retimer *retimer; const struct typec_capability *cap; const struct typec_operations *ops; From patchwork Mon Jul 11 07:22:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913015 Received: from mail-pj1-f45.google.com (mail-pj1-f45.google.com [209.85.216.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD1B51FB7 for ; Mon, 11 Jul 2022 07:25:44 +0000 (UTC) Received: by mail-pj1-f45.google.com with SMTP id v4-20020a17090abb8400b001ef966652a3so7484777pjr.4 for ; Mon, 11 Jul 2022 00:25:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G4zksFMUl75dVs5Pjq0iM/EMwPszh5Co7nc8XI1GOhs=; b=IEN1LCM5zf9fZ7Qk08bWt9IDa0Crk6nzfQCotGqrc0uJNhcNPoquj3E9BllvyZaGh9 eGFiEHy+PzH6iCO9M44fm5sNX6UmCWxQQ4uCvLyUWV7qbecXW9sf87487Os8xk/Oj10M D3WxilsHS1OOU934G5LFezt+V0ON6llaZh3sM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G4zksFMUl75dVs5Pjq0iM/EMwPszh5Co7nc8XI1GOhs=; b=Y4k8EXZfYOYzHmSy/t66s/Cmdua9qgQAAJhuKRXIuTnq70h9sZUPoto5Kv0vTpRrU0 3PW6caTIdqAPbm8pvaQEV3FnNhpkez3G3eS3fx8ZYKQAyyVVBqKn0IcStectAKnZ0qGO gYlQjn8Gt7t9WUBwxnRKNdwTTQDGOXvQiqacz4aQsJ1yMwKqX+y8WhU5osdc7nOIbltG 2OW9ZiQQMVDnZu/raMdon0KTKz+Zsq+3cEzOj8NKRAnTwnWityHc3As0Wk04QW4Xvnwd RPjCdxLv020WtlT4Ang6oX1hDSiC3BgD7RbTNU71ZZEmJijXkQdBesSdz4rsfVNMbegl 3qmg== X-Gm-Message-State: AJIora9E92uqO0+zLCSuhDMxKMpehVh0MIL4NVH37liZPYpLsBBD/3SY qapGC3saSB0vR9mO91SC69Pkdg== X-Google-Smtp-Source: AGRyM1uU1hJ8LwZ7cO9JNfbmNoCYrstU4XPCCUFD4FYNuUV581UTkznx+Y27/SCWZUdDqxYRZs7b2A== X-Received: by 2002:a17:903:28e:b0:16a:3bea:11eb with SMTP id j14-20020a170903028e00b0016a3bea11ebmr16914760plr.154.1657524344434; Mon, 11 Jul 2022 00:25:44 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:25:44 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 3/9] platform/chrome: Add Type-C mux set command definitions Date: Mon, 11 Jul 2022 07:22:57 +0000 Message-Id: <20220711072333.2064341-4-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Copy EC header definitions for the USB Type-C Mux control command from the EC code base. Also pull in "TBT_UFP_REPLY" definitions, since that is the prior entry in the enum. These headers are already present in the EC code base. [1] [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/b80f85a94a423273c1638ef7b662c56931a138dd/include/ec_commands.h Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. include/linux/platform_data/cros_ec_commands.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index 8cfa8cfca77e..a3945c5e7f50 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -5722,8 +5722,21 @@ enum typec_control_command { TYPEC_CONTROL_COMMAND_EXIT_MODES, TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, TYPEC_CONTROL_COMMAND_ENTER_MODE, + TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY, + TYPEC_CONTROL_COMMAND_USB_MUX_SET, }; +/* Replies the AP may specify to the TBT EnterMode command as a UFP */ +enum typec_tbt_ufp_reply { + TYPEC_TBT_UFP_REPLY_NAK, + TYPEC_TBT_UFP_REPLY_ACK, +}; + +struct typec_usb_mux_set { + uint8_t mux_index; /* Index of the mux to set in the chain */ + uint8_t mux_flags; /* USB_PD_MUX_*-encoded USB mux state to set */ +} __ec_align1; + struct ec_params_typec_control { uint8_t port; uint8_t command; /* enum typec_control_command */ @@ -5737,6 +5750,8 @@ struct ec_params_typec_control { union { uint32_t clear_events_mask; uint8_t mode_to_enter; /* enum typec_mode */ + uint8_t tbt_ufp_reply; /* enum typec_tbt_ufp_reply */ + struct typec_usb_mux_set mux_params; uint8_t placeholder[128]; }; } __ec_align1; @@ -5815,6 +5830,9 @@ enum tcpc_cc_polarity { #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) #define PD_STATUS_EVENT_HARD_RESET BIT(2) +#define PD_STATUS_EVENT_DISCONNECTED BIT(3) +#define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4) +#define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5) struct ec_params_typec_status { uint8_t port; From patchwork Mon Jul 11 07:22:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913016 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 782FF1FB7 for ; Mon, 11 Jul 2022 07:26:51 +0000 (UTC) Received: by mail-pf1-f170.google.com with SMTP id y141so4074248pfb.7 for ; Mon, 11 Jul 2022 00:26:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g0y3SC6bOT8thGbHuA6qSx7QbiLdoqkXfjgc3hKF3gg=; b=c3L5Jn+qP+R/5L9g7PHJawl1hpB6alX2ytZTd5j3j+amBGnLZB10zsIAqauKvmpCzM 2QQcdW3Dd7Z42VjUdyfdAT23UhqSArmiK07vVrzK1whhy8kSXRvA2fD+/7Ql4ii4nkm6 nGAVOMnrJMjFCAGVDuRYedHEyw8sk4GJrZ1f0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g0y3SC6bOT8thGbHuA6qSx7QbiLdoqkXfjgc3hKF3gg=; b=xwxL6rvVXxmCzg0FNvgpNrGtkEDObMkZt08zJ+xzkp5XrKGGihmoJeDKD9KVVBl3SU r3ITt2vmvO+qHS0QSMa3ZryD1TiEWaUPFdj6Tr6P99Oq2NxahNytdmumFN7GLeZgyJqu PAcQw95dMHqsiEsmk5ydznTCbhjtkjXyufBU4boTvb73a9c6Cf73mmUtrnXakEAFCvFj hXyNvhvH2dm6yFePPEf2QQBRBfG29sk8l8eZ4qaVMPn4BK9JJlnCF9Zy88+tTc44+pDk b5uCkbe6Kz1FL0MqBPNdLj0r+cpA/2v+RJLNQLERf76nWLanDLCCWpvraH3kRHzKSZRT X9gA== X-Gm-Message-State: AJIora/PHbs6/d230JKN1qQemQpT/q8CNNOdJaGfw5GhwKwj3VAQE9fm hK8AEHjNqDj2qRozP8GIhTWuRg== X-Google-Smtp-Source: AGRyM1sqQPx1xTgugrJrpJPcoZCdyIXuaRyfEwl5fR1nVKVbFINK99ftPjb4slaHft/Qx3gTAATIyA== X-Received: by 2002:a65:6bca:0:b0:411:f92b:5e39 with SMTP id e10-20020a656bca000000b00411f92b5e39mr15344480pgw.259.1657524410959; Mon, 11 Jul 2022 00:26:50 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.26.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:26:50 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , kernel test robot , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 4/9] platform/chrome: cros_typec_switch: Add switch driver Date: Mon, 11 Jul 2022 07:22:58 +0000 Message-Id: <20220711072333.2064341-5-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Introduce a driver to configure USB Type-C mode switches and retimers which are controlled by the Chrome OS EC (Embedded Controller). This allows Type-C port drivers, as well as alternate mode drivers to configure their relevant mode switches and retimers according to the Type-C state they want to achieve. ACPI devices with ID GOOG001A will bind to this driver. Currently, we only register a retimer switch with a stub set function. Subsequent patches will implement the host command set functionality, and introduce mode switches. Reported-by: kernel test robot Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - Fixed missing "static" identifier. - Removed unnecessary new line for function signature. Changes since v1: - No changes. MAINTAINERS | 1 + drivers/platform/chrome/Kconfig | 11 ++ drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_typec_switch.c | 170 ++++++++++++++++++++ 4 files changed, 183 insertions(+) create mode 100644 drivers/platform/chrome/cros_typec_switch.c diff --git a/MAINTAINERS b/MAINTAINERS index 7533cb27adc0..35ea91c619b7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4752,6 +4752,7 @@ M: Prashant Malani L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_ec_typec.c +F: drivers/platform/chrome/cros_typec_switch.c CHROMEOS EC USB PD NOTIFY DRIVER M: Prashant Malani diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index 717299cbccac..c62a514a087f 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -265,6 +265,17 @@ config CHROMEOS_PRIVACY_SCREEN this should probably always be built into the kernel to avoid or minimize drm probe deferral. +config CROS_TYPEC_SWITCH + tristate "ChromeOS EC Type-C Switch Control" + depends on MFD_CROS_EC_DEV && TYPEC + default MFD_CROS_EC_DEV + help + If you say Y here, you get support for configuring the Chrome OS EC Type C + muxes and retimers. + + To compile this driver as a module, choose M here: the module will be + called cros_typec_switch. + source "drivers/platform/chrome/wilco_ec/Kconfig" endif # CHROMEOS_PLATFORMS diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index 52f5a2dde8b8..0dcaf6a7ed27 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_CHROMEOS_TBMC) += chromeos_tbmc.o obj-$(CONFIG_CROS_EC) += cros_ec.o obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_ISHTP) += cros_ec_ishtp.o +obj-$(CONFIG_CROS_TYPEC_SWITCH) += cros_typec_switch.o obj-$(CONFIG_CROS_EC_RPMSG) += cros_ec_rpmsg.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c new file mode 100644 index 000000000000..0d319e315d57 --- /dev/null +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2022 Google LLC + * + * This driver provides the ability to configure Type C muxes and retimers which are controlled by + * the Chrome OS EC. + */ + +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-typec-switch" + +/* Handles and other relevant data required for each port's switches. */ +struct cros_typec_port { + int port_num; + struct typec_retimer *retimer; + struct cros_typec_switch_data *sdata; +}; + +/* Driver-specific data. */ +struct cros_typec_switch_data { + struct device *dev; + struct cros_ec_device *ec; + struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS]; +}; + +static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) +{ + return 0; +} + +static void cros_typec_unregister_switches(struct cros_typec_switch_data *sdata) +{ + int i; + + for (i = 0; i < EC_USB_PD_MAX_PORTS; i++) { + if (!sdata->ports[i]) + continue; + typec_retimer_unregister(sdata->ports[i]->retimer); + } +} + +static int cros_typec_register_retimer(struct cros_typec_port *port, struct fwnode_handle *fwnode) +{ + struct typec_retimer_desc retimer_desc = { + .fwnode = fwnode, + .drvdata = port, + .name = fwnode_get_name(fwnode), + .set = cros_typec_retimer_set, + }; + + port->retimer = typec_retimer_register(port->sdata->dev, &retimer_desc); + if (IS_ERR(port->retimer)) + return PTR_ERR(port->retimer); + + return 0; +} + +static int cros_typec_register_switches(struct cros_typec_switch_data *sdata) +{ + struct cros_typec_port *port = NULL; + struct device *dev = sdata->dev; + struct fwnode_handle *fwnode; + struct acpi_device *adev; + unsigned long long index; + int ret = 0; + int nports; + + nports = device_get_child_node_count(dev); + if (nports == 0) { + dev_err(dev, "No switch devices found.\n"); + return -ENODEV; + } + + device_for_each_child_node(dev, fwnode) { + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); + if (!port) { + ret = -ENOMEM; + goto err_switch; + } + + adev = to_acpi_device_node(fwnode); + if (!adev) { + dev_err(fwnode->dev, "Couldn't get ACPI device handle\n"); + ret = -ENODEV; + goto err_switch; + } + + ret = acpi_evaluate_integer(adev->handle, "_ADR", NULL, &index); + if (ACPI_FAILURE(ret)) { + dev_err(fwnode->dev, "_ADR wasn't evaluated\n"); + ret = -ENODATA; + goto err_switch; + } + + if (index < 0 || index >= EC_USB_PD_MAX_PORTS) { + dev_err(fwnode->dev, "Invalid port index number: %llu", index); + ret = -EINVAL; + goto err_switch; + } + port->sdata = sdata; + port->port_num = index; + sdata->ports[index] = port; + + ret = cros_typec_register_retimer(port, fwnode); + if (ret) { + dev_err(dev, "Retimer switch register failed\n"); + goto err_switch; + } + + dev_dbg(dev, "Retimer switch registered for index %llu\n", index); + } + + return 0; +err_switch: + cros_typec_unregister_switches(sdata); + return ret; +} + +static int cros_typec_switch_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_typec_switch_data *sdata; + + sdata = devm_kzalloc(dev, sizeof(*sdata), GFP_KERNEL); + if (!sdata) + return -ENOMEM; + + sdata->dev = dev; + sdata->ec = dev_get_drvdata(pdev->dev.parent); + + platform_set_drvdata(pdev, sdata); + + return cros_typec_register_switches(sdata); +} + +static int cros_typec_switch_remove(struct platform_device *pdev) +{ + struct cros_typec_switch_data *sdata = platform_get_drvdata(pdev); + + cros_typec_unregister_switches(sdata); + return 0; +} + +#ifdef CONFIG_ACPI +static const struct acpi_device_id cros_typec_switch_acpi_id[] = { + { "GOOG001A", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, cros_typec_switch_acpi_id); +#endif + +static struct platform_driver cros_typec_switch_driver = { + .driver = { + .name = DRV_NAME, + .acpi_match_table = ACPI_PTR(cros_typec_switch_acpi_id), + }, + .probe = cros_typec_switch_probe, + .remove = cros_typec_switch_remove, +}; + +module_platform_driver(cros_typec_switch_driver); + +MODULE_AUTHOR("Prashant Malani "); +MODULE_DESCRIPTION("Chrome OS EC Type C Switch control"); +MODULE_LICENSE("GPL"); From patchwork Mon Jul 11 07:22:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913026 Received: from mail-pg1-f169.google.com (mail-pg1-f169.google.com [209.85.215.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CE641FB7 for ; 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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.27.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:27:36 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 5/9] platform/chrome: cros_typec_switch: Set EC retimer Date: Mon, 11 Jul 2022 07:22:59 +0000 Message-Id: <20220711072333.2064341-6-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Invoke Chrome EC host commands to set EC-controlled retimer switches to the state the Type-C framework instructs. Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 56 ++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index 0d319e315d57..b50ecedce662 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -9,7 +9,10 @@ #include #include #include +#include #include +#include +#include #include #define DRV_NAME "cros-typec-switch" @@ -28,9 +31,60 @@ struct cros_typec_switch_data { struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS]; }; +static int cros_typec_cmd_mux_set(struct cros_typec_switch_data *sdata, int port_num, u8 index, + u8 state) +{ + struct typec_usb_mux_set params = { + .mux_index = index, + .mux_flags = state, + }; + + struct ec_params_typec_control req = { + .port = port_num, + .command = TYPEC_CONTROL_COMMAND_USB_MUX_SET, + .mux_params = params, + }; + + return cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, + sizeof(req), NULL, 0); +} + +static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt) +{ + int ret = -EOPNOTSUPP; + + if (mode == TYPEC_STATE_SAFE) + ret = USB_PD_MUX_SAFE_MODE; + else if (mode == TYPEC_STATE_USB) + ret = USB_PD_MUX_USB_ENABLED; + else if (alt && alt->svid == USB_TYPEC_DP_SID) + ret = USB_PD_MUX_DP_ENABLED; + + return ret; +} + +/* + * The Chrome EC treats both mode-switches and retimers as "muxes" for the purposes of the + * host command API. This common function configures and verifies the retimer/mode-switch + * according to the provided setting. + */ +static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int port_num, int index, + unsigned long mode, struct typec_altmode *alt) +{ + int ret = cros_typec_get_mux_state(mode, alt); + + if (ret < 0) + return ret; + + return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); +} + static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) { - return 0; + struct cros_typec_port *port = typec_retimer_get_drvdata(retimer); + + /* Retimers have index 1. */ + return cros_typec_configure_mux(port->sdata, port->port_num, 1, state->mode, state->alt); } static void cros_typec_unregister_switches(struct cros_typec_switch_data *sdata) From patchwork Mon Jul 11 07:23:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913027 Received: from mail-pj1-f42.google.com (mail-pj1-f42.google.com [209.85.216.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1E6A1FB7 for ; Mon, 11 Jul 2022 07:28:09 +0000 (UTC) Received: by mail-pj1-f42.google.com with SMTP id q5-20020a17090a304500b001efcc885cc4so4136690pjl.4 for ; Mon, 11 Jul 2022 00:28:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DYEnVLpQyHzRpDYIlQiFIUGlyV0bCp99JLRQGIyhka8=; b=ZnXi/uGZtCZD8AXO7vZ8GGC7HOg9PLziEbYJQjdiPncsRb3Hnrw1Ha7u426hcigE1V zZeFeUt8V2AFpfXN4fyoELF5P/y90IOMaxNuojeHNpBn4FEDr3hTws3bDA5nxO9jWlic yd0Kigzg6DVm0fgLai/x/5cREpr32kmglbNAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DYEnVLpQyHzRpDYIlQiFIUGlyV0bCp99JLRQGIyhka8=; b=5tCknIReiJis6TSUs5Extq2xQycfNzqVO9EmzEWM70hzi5HMdRZiS/bzeSdAZ1qV3M E34d4nPOFgE9kmoa72/0GTQoDCFmGd3BGndDMuWRW22A2sYHNp3GNiXBjZWx+dtNyXUB zSroofgs+5IJBB8Cd61U6VDpI0/uToead68p3W2g2Z4NmDy/kcUQK/JlQvMnu3Qij9oo tlFaai+I8eU+W2jUlt6ct6EdOO+Pvq/pflapDGcimAh1aqIMfknYZOl5l6UUzSYWyUIR Rv5xBJrwrSSuqHXMHZLWwa3yPgi3kdY8iK+xyAU08Icbcm3ErMWk3Balj3K3zLx6QLLl wWQQ== X-Gm-Message-State: AJIora/+MG/QcoHSzjkZ4ya+UWVyFZUCu58SR9FljQ9VTNmf7v0tLDYP lJvc+t7WQ6l2QvY9W2TuoMyEDw== X-Google-Smtp-Source: AGRyM1sNwW0WjdGUS0MHFW0lDLimexeWHHAMfMZlQZivnlBsQh1I4HmWaKxi7N0zFzZW0/GLhER/pQ== X-Received: by 2002:a17:902:eaca:b0:16b:dbde:130d with SMTP id p10-20020a170902eaca00b0016bdbde130dmr17172276pld.48.1657524489432; Mon, 11 Jul 2022 00:28:09 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.28.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:28:09 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , kernel test robot , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 6/9] platform/chrome: cros_typec_switch: Add event check Date: Mon, 11 Jul 2022 07:23:00 +0000 Message-Id: <20220711072333.2064341-7-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Chrome EC updates Type-C status events when mux set requests from the Application Processor (AP) are completed. Add a check to the flow of configuring muxes to look for this status done bit, so that the driver is aware that the mux set completed successfully or not. Reported-by: kernel test robot Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - Fixed missing "static" identifier. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 72 ++++++++++++++++++++- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index b50ecedce662..7c01957a032d 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -7,6 +7,8 @@ */ #include +#include +#include #include #include #include @@ -63,6 +65,40 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al return ret; } +static int cros_typec_send_clear_event(struct cros_typec_switch_data *sdata, int port_num, + u32 events_mask) +{ + struct ec_params_typec_control req = { + .port = port_num, + .command = TYPEC_CONTROL_COMMAND_CLEAR_EVENTS, + .clear_events_mask = events_mask, + }; + + return cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, + sizeof(req), NULL, 0); +} + +static bool cros_typec_check_event(struct cros_typec_switch_data *sdata, int port_num, u32 mask) +{ + struct ec_response_typec_status resp; + struct ec_params_typec_status req = { + .port = port_num, + }; + int ret; + + ret = cros_ec_command(sdata->ec, 0, EC_CMD_TYPEC_STATUS, &req, sizeof(req), + &resp, sizeof(resp)); + if (ret < 0) { + dev_warn(sdata->dev, "EC_CMD_TYPEC_STATUS failed for port: %d\n", port_num); + return false; + } + + if (resp.events & mask) + return true; + + return false; +} + /* * The Chrome EC treats both mode-switches and retimers as "muxes" for the purposes of the * host command API. This common function configures and verifies the retimer/mode-switch @@ -71,12 +107,44 @@ static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *al static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int port_num, int index, unsigned long mode, struct typec_altmode *alt) { - int ret = cros_typec_get_mux_state(mode, alt); + unsigned long end; + u32 event_mask; + u8 mux_state; + int ret; + + ret = cros_typec_get_mux_state(mode, alt); + if (ret < 0) + return ret; + mux_state = (u8)ret; + /* Clear any old mux set done event. */ + if (index == 0) + event_mask = PD_STATUS_EVENT_MUX_0_SET_DONE; + else + event_mask = PD_STATUS_EVENT_MUX_1_SET_DONE; + + ret = cros_typec_send_clear_event(sdata, port_num, event_mask); + if (ret < 0) + return ret; + + /* Send the set command. */ + ret = cros_typec_cmd_mux_set(sdata, port_num, index, mux_state); if (ret < 0) return ret; - return cros_typec_cmd_mux_set(sdata, port_num, index, (u8)ret); + /* Check for the mux set done event. */ + end = jiffies + msecs_to_jiffies(1000); + do { + if (cros_typec_check_event(sdata, port_num, event_mask)) + return 0; + + usleep_range(500, 1000); + } while (time_before(jiffies, end)); + + dev_err(sdata->dev, "Timed out waiting for mux set done on index: %d, state: %d\n", + index, mux_state); + + return -ETIMEDOUT; } static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) From patchwork Mon Jul 11 07:23:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913028 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 522101FB7 for ; Mon, 11 Jul 2022 07:28:45 +0000 (UTC) Received: by mail-pl1-f170.google.com with SMTP id m14so3736510plg.5 for ; Mon, 11 Jul 2022 00:28:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+189CxxcoXTJww1vvNRT20TPCnm9kCVhx1btF3TMXi8=; b=k74DOFzNKkceSWgme9B9za4lw91QGrG2qroaIHb8gns+t7uTeteRvn4NBHF6QGCAz7 3PaEWSWLS9kbrum42fuA4GA6Tko9EfKdNPyTKFyn1UXvXVfw6Abh+Wyp9v/uWQbAAfjC HHnYXgeP+D9JEx0OYFvlogJ2vUNGnqXtBqEUY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+189CxxcoXTJww1vvNRT20TPCnm9kCVhx1btF3TMXi8=; b=hyTxJdCpzKH+FSz5cy011Vcuabugxhh5UCJI7eg4Zc+lo2VnNhxaQhHZsRWNE2nN4j 6A/Xf/sEOU1Zrp7ir2xTFS/Yv19CYOWLBFggOZfpUot7xSAwHHCK7PNoJDtHQobXteXx usxSMuI6sPkFvw3lSPxWTJ67YO7iJIDOfuG9tyXzqOoXLlKTn74nSuqkUJbUIm9qzVEz OnEQxUYTV0fOFj+4iBaCbM7ZmqAZUs0MfMWwo8LLLwVtnTiUIuj3uAGT94Tq59y9tXHN FmsUfujdBX5EY8y3UpabuSNsfOHzpV0Z04cBd25zyPohz981Z2FhcR/IPVp7SsGW9cp2 owEg== X-Gm-Message-State: AJIora+vH3bzVjmYO/fcIwbAeDQ2+v+f8H48ge2ZGFEKr3zQAx8afY5Z 7k3NICpE5wafa6okjibvd4x+Vg== X-Google-Smtp-Source: AGRyM1vvlzYjpioNK7owzTp0M9LAaXsvaxsc/kYBhI2lIuqlMsmMz4iD3WVH7/La8w+rtVzCIakaMw== X-Received: by 2002:a17:90b:4f85:b0:1f0:95d:c02b with SMTP id qe5-20020a17090b4f8500b001f0095dc02bmr14519392pjb.89.1657524524861; Mon, 11 Jul 2022 00:28:44 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.28.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:28:44 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 7/9] platform/chrome: cros_typec_switch: Register mode switches Date: Mon, 11 Jul 2022 07:23:01 +0000 Message-Id: <20220711072333.2064341-8-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Register mode switch devices for Type C connectors, when they are specified by firmware. These control Type C configuration for any USB Type-C mode switches (sometimes known as "muxes") which are controlled by the Chrome EC. Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - Fixed missing "static" identifier. Changes since v1: - No changes. drivers/platform/chrome/cros_typec_switch.c | 40 +++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/platform/chrome/cros_typec_switch.c b/drivers/platform/chrome/cros_typec_switch.c index 7c01957a032d..024a2bb146b2 100644 --- a/drivers/platform/chrome/cros_typec_switch.c +++ b/drivers/platform/chrome/cros_typec_switch.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #define DRV_NAME "cros-typec-switch" @@ -22,6 +23,7 @@ /* Handles and other relevant data required for each port's switches. */ struct cros_typec_port { int port_num; + struct typec_mux_dev *mode_switch; struct typec_retimer *retimer; struct cros_typec_switch_data *sdata; }; @@ -147,6 +149,15 @@ static int cros_typec_configure_mux(struct cros_typec_switch_data *sdata, int po return -ETIMEDOUT; } +static int cros_typec_mode_switch_set(struct typec_mux_dev *mode_switch, + struct typec_mux_state *state) +{ + struct cros_typec_port *port = typec_mux_get_drvdata(mode_switch); + + /* Mode switches have index 0. */ + return cros_typec_configure_mux(port->sdata, port->port_num, 0, state->mode, state->alt); +} + static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_retimer_state *state) { struct cros_typec_port *port = typec_retimer_get_drvdata(retimer); @@ -163,9 +174,27 @@ static void cros_typec_unregister_switches(struct cros_typec_switch_data *sdata) if (!sdata->ports[i]) continue; typec_retimer_unregister(sdata->ports[i]->retimer); + typec_mux_unregister(sdata->ports[i]->mode_switch); } } +static int cros_typec_register_mode_switch(struct cros_typec_port *port, + struct fwnode_handle *fwnode) +{ + struct typec_mux_desc mode_switch_desc = { + .fwnode = fwnode, + .drvdata = port, + .name = fwnode_get_name(fwnode), + .set = cros_typec_mode_switch_set, + }; + + port->mode_switch = typec_mux_register(port->sdata->dev, &mode_switch_desc); + if (IS_ERR(port->mode_switch)) + return PTR_ERR(port->mode_switch); + + return 0; +} + static int cros_typec_register_retimer(struct cros_typec_port *port, struct fwnode_handle *fwnode) { struct typec_retimer_desc retimer_desc = { @@ -235,6 +264,17 @@ static int cros_typec_register_switches(struct cros_typec_switch_data *sdata) } dev_dbg(dev, "Retimer switch registered for index %llu\n", index); + + if (!fwnode_property_read_bool(fwnode, "mode-switch")) + continue; + + ret = cros_typec_register_mode_switch(port, fwnode); + if (ret) { + dev_err(dev, "Mode switch register failed\n"); + goto err_switch; + } + + dev_dbg(dev, "Mode switch registered for index %llu\n", index); } return 0; From patchwork Mon Jul 11 07:23:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913029 Received: from mail-pg1-f180.google.com (mail-pg1-f180.google.com [209.85.215.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B55B1FB7 for ; Mon, 11 Jul 2022 07:29:29 +0000 (UTC) Received: by mail-pg1-f180.google.com with SMTP id q82so4031127pgq.6 for ; Mon, 11 Jul 2022 00:29:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ARuOjXkb9WXnMbJXcHgDAqXcx2iKK+w+U5wn5FQDR6Y=; b=LsrfyOyORhRqy17RRdlUiq4/FL4fmPohUX0HMOTvZcv3yzrGxL/RLEQkQLySym6zT8 geDq4SkIulIvPi8e0WHHf2dW07ZZMJt8dp24O+BtXaI0YO58AfnC7Zqwzsci2gIJbXZt a+aFY/sJvcltJ2Kr5EIRakDkQo/wWXvOeY0H4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ARuOjXkb9WXnMbJXcHgDAqXcx2iKK+w+U5wn5FQDR6Y=; b=72C4eZfViEYn70j0ZEzS+hMJFrD+bH8UbaGwFq1Rr1/n2dWaxitqMPhmwOJSIkM5+o LLcKzaxe4GaELH4Db7IQzbUsO8r8jlPcUp+Qs1AokRKDk4jVaoa0Vc81z83+YqMzByfk 5O1hhflTX93I81Od/XRbemFP44Mm/jq50kZrZmGAXIDeSSt9mSEydXiv/dk8LSvlVq5g ml81z8iOKRwMT21/YXnwYrAuNLeIZxYMIXbksmDpcz7zjdBXokbj9aBZ4n3UyJWHNp4+ 9JAe2SoI6BqIVscHXUOlHUR8NM2z7Mt7tF8z8jbpzYauRDj2CVdvWnONWveWmBw7RFUF 960g== X-Gm-Message-State: AJIora/TDyPeIGw555ya5/q021cV/NgY8egeEaSr8EV/2Rrtvmzykpci wE3z6kAwY6glaTLgUd5rQdipvQ== X-Google-Smtp-Source: AGRyM1uXjFYsxXcTBMnm60zGyOA7F3T8MVkEl93WM7/+YkjruocghxWq4EfsD+tnXUN+29P8LY1rYw== X-Received: by 2002:a05:6a02:11b:b0:40d:dfdc:95d7 with SMTP id bg27-20020a056a02011b00b0040ddfdc95d7mr14907022pgb.536.1657524568710; Mon, 11 Jul 2022 00:29:28 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.29.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:29:28 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 8/9] platform/chrome: cros_ec_typec: Cleanup switch handle return paths Date: Mon, 11 Jul 2022 07:23:02 +0000 Message-Id: <20220711072333.2064341-9-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some of the return paths for the cros_typec_get_switch_handles() aren't necessary. Clean up the return paths to only undo the handle get's which succeeded. Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. drivers/platform/chrome/cros_ec_typec.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 7cb2e35c4ded..39e6fd4491a9 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -157,12 +157,10 @@ static int cros_typec_get_switch_handles(struct cros_typec_port *port, return 0; role_sw_err: - usb_role_switch_put(port->role_sw); -ori_sw_err: typec_switch_put(port->ori_sw); -mux_err: +ori_sw_err: typec_mux_put(port->mux); - +mux_err: return -ENODEV; } From patchwork Mon Jul 11 07:23:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prashant Malani X-Patchwork-Id: 12913030 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 021531FB7 for ; Mon, 11 Jul 2022 07:30:01 +0000 (UTC) Received: by mail-pf1-f172.google.com with SMTP id 70so4093930pfx.1 for ; Mon, 11 Jul 2022 00:30:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=80XNm89Tlt+6cCcVIZ3c8q5hP69CK6UTNK8HJz+yZjI=; b=hcEXaCBHEunsLe3ab3lDb25v/u8v3zX6C6JnggBTUWLH9s+edsQbb6mU556vl/TgWc /UyZ6HA3UB7rNR3v0rYyx3FFSfIw5qf3IqNDrYHprWd1AXZEwFoZoDO6A/4FI2gWoZIt Sux3ev2g4+ZZAxs6e72sjn4Lq7TAx1uosJ+xQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=80XNm89Tlt+6cCcVIZ3c8q5hP69CK6UTNK8HJz+yZjI=; b=8G1licaYqXgOjowOVq9Ry+t/efhqu1lLeW8wF1zc8bn79xmnyQEzvcdJU3sdZM7uYr AHVSkn+pE5rxyoyk8GRhLQhQZxmg94msZGbBU5xUcPJLoxIp+QbyAdDcVOn9YIz72AD+ 90n2y5dON0FV0xfrFGwEkoamy4Z8wQYymNotkXXV8cI/d3KwxCsR6m1T+hsaBrnyrgm1 i9o3VMjZ2YKpSqXg/gFuqL9oqdxyTiITbrudwBYhVe694HiMeGvZfqqpaXLezjJM4e4y gN7l0YhmQ9AwWQKdAQP1faw6UHdgASUJmK1wZvOcNyd50lvx65LsYDv2pwjFs4cSK5hZ /IEw== X-Gm-Message-State: AJIora981SW0UvcluQg54xTg90mS6UU7mRSEgJwmzZdhqqu/FSOMFwvP Xi75yFg1h0yyQCqcNfDh10uaHw== X-Google-Smtp-Source: AGRyM1sTzes0KAkaSVhjtzQQAGDlpm33fvxw2hCg0l6U6bI9+jLQe4RpwDaYiOpgzSV2+06xSvSQbA== X-Received: by 2002:a63:d711:0:b0:415:c581:2aff with SMTP id d17-20020a63d711000000b00415c5812affmr11912006pgg.278.1657524601493; Mon, 11 Jul 2022 00:30:01 -0700 (PDT) Received: from pmalani.c.googlers.com.com (157.214.185.35.bc.googleusercontent.com. [35.185.214.157]) by smtp.gmail.com with ESMTPSA id z8-20020aa79e48000000b0051bc5f4df1csm4012839pfq.154.2022.07.11.00.30.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Jul 2022 00:30:01 -0700 (PDT) From: Prashant Malani To: linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: bleung@chromium.org, heikki.krogerus@linux.intel.com, Prashant Malani , Daisuke Nojiri , "Dustin L. Howett" , Greg Kroah-Hartman , Guenter Roeck , "Gustavo A. R. Silva" , Kees Cook , Sebastian Reichel , Tzung-Bi Shih Subject: [PATCH v4 9/9] platform/chrome: cros_ec_typec: Get retimer handle Date: Mon, 11 Jul 2022 07:23:03 +0000 Message-Id: <20220711072333.2064341-10-pmalani@chromium.org> X-Mailer: git-send-email 2.37.0.144.g8ac04bfd2-goog In-Reply-To: <20220711072333.2064341-1-pmalani@chromium.org> References: <20220711072333.2064341-1-pmalani@chromium.org> Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Where available, obtain the handle to retimer switch specified via firmware, and update the mux configuration callsites to add retimer support for supported modes. Signed-off-by: Prashant Malani --- Changes since v3: - No changes. Changes since v2: - No changes. Changes since v1: - No changes. drivers/platform/chrome/cros_ec_typec.c | 44 +++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 3 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index 39e6fd4491a9..38c4ac754ea9 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -53,6 +54,7 @@ struct cros_typec_port { struct usb_pd_identity c_identity; struct typec_switch *ori_sw; struct typec_mux *mux; + struct typec_retimer *retimer; struct usb_role_switch *role_sw; /* Variables keeping track of switch state. */ @@ -142,6 +144,12 @@ static int cros_typec_get_switch_handles(struct cros_typec_port *port, goto mux_err; } + port->retimer = fwnode_typec_retimer_get(fwnode); + if (IS_ERR(port->retimer)) { + dev_dbg(dev, "Retimer handle not found.\n"); + goto retimer_sw_err; + } + port->ori_sw = fwnode_typec_switch_get(fwnode); if (IS_ERR(port->ori_sw)) { dev_dbg(dev, "Orientation switch handle not found.\n"); @@ -159,6 +167,8 @@ static int cros_typec_get_switch_handles(struct cros_typec_port *port, role_sw_err: typec_switch_put(port->ori_sw); ori_sw_err: + typec_retimer_put(port->retimer); +retimer_sw_err: typec_mux_put(port->mux); mux_err: return -ENODEV; @@ -203,6 +213,21 @@ static void cros_typec_unregister_altmodes(struct cros_typec_data *typec, int po } } +/* + * Map the Type-C Mux state to retimer state and call the retimer set function. We need this + * because we re-use the Type-C mux state for retimers. + */ +static int cros_typec_retimer_set(struct typec_retimer *retimer, struct typec_mux_state state) +{ + struct typec_retimer_state rstate = { + .alt = state.alt, + .mode = state.mode, + .data = state.data, + }; + + return typec_retimer_set(retimer, &rstate); +} + static int cros_typec_usb_disconnect_state(struct cros_typec_port *port) { port->state.alt = NULL; @@ -211,6 +236,7 @@ static int cros_typec_usb_disconnect_state(struct cros_typec_port *port) usb_role_switch_set_role(port->role_sw, USB_ROLE_NONE); typec_switch_set(port->ori_sw, TYPEC_ORIENTATION_NONE); + cros_typec_retimer_set(port->retimer, port->state); return typec_mux_set(port->mux, &port->state); } @@ -381,9 +407,14 @@ static int cros_typec_init_ports(struct cros_typec_data *typec) static int cros_typec_usb_safe_state(struct cros_typec_port *port) { + int ret; port->state.mode = TYPEC_STATE_SAFE; - return typec_mux_set(port->mux, &port->state); + ret = cros_typec_retimer_set(port->retimer, port->state); + if (!ret) + ret = typec_mux_set(port->mux, &port->state); + + return ret; } /* @@ -480,7 +511,11 @@ static int cros_typec_enable_dp(struct cros_typec_data *typec, port->state.data = &dp_data; port->state.mode = TYPEC_MODAL_STATE(ffs(pd_ctrl->dp_mode)); - return typec_mux_set(port->mux, &port->state); + ret = cros_typec_retimer_set(port->retimer, port->state); + if (!ret) + ret = typec_mux_set(port->mux, &port->state); + + return ret; } static int cros_typec_enable_usb4(struct cros_typec_data *typec, @@ -569,7 +604,10 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num, } else if (port->mux_flags & USB_PD_MUX_USB_ENABLED) { port->state.alt = NULL; port->state.mode = TYPEC_STATE_USB; - ret = typec_mux_set(port->mux, &port->state); + + ret = cros_typec_retimer_set(port->retimer, port->state); + if (!ret) + ret = typec_mux_set(port->mux, &port->state); } else { dev_dbg(typec->dev, "Unrecognized mode requested, mux flags: %x\n",