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Wed, 27 Jul 2022 11:18:24 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20220727021824epcas2p122d13c927fc8e3304b84aae2a9ca298d~Fjh_UJuJs0147401474epcas2p1P; Wed, 27 Jul 2022 02:18:24 +0000 (GMT) Received: from epsmgms1p2.samsung.com (unknown [182.195.42.42]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20220727021824epsmtrp1749d4036dd88b50c5c4eec01fc0ba283~Fjh_TX9X83129031290epsmtrp1K; Wed, 27 Jul 2022 02:18:24 +0000 (GMT) X-AuditID: b6c32a46-0b9ff700000025b2-c4-62e0a07032f7 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p2.samsung.com (Symantec Messaging Gateway) with SMTP id DD.E7.08802.F60A0E26; Wed, 27 Jul 2022 11:18:23 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220727021823epsmtip16d6c8f5a32f2a9e505436543ddf3fb4e~Fjh_KgqGv2106921069epsmtip1j; Wed, 27 Jul 2022 02:18:23 +0000 (GMT) From: Chanho Park To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette Cc: Alim Akhtar , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Chanho Park Subject: [RESEND PATCH v2 1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 Date: Wed, 27 Jul 2022 11:13:55 +0900 Message-Id: <20220727021357.152421-2-chanho61.park@samsung.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220727021357.152421-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrBJsWRmVeSWpSXmKPExsWy7bCmuW7BggdJBrOWyFo8mLeNzeLyfm2L 61+es1rsfb2V3WLT42usFh977rFazDi/j8ni4ilXi8Nv2lkt/l3byGKxatcfRgduj/c3Wtk9 ds66y+6xaVUnm8eda3vYPDYvqffo27KK0ePzJrkA9qhsm4zUxJTUIoXUvOT8lMy8dFsl7+B4 53hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygC5UUyhJzSoFCAYnFxUr6djZF+aUlqQoZ+cUl tkqpBSk5BeYFesWJucWleel6eaklVoYGBkamQIUJ2Rn/9wcV7JSsaP51irGB8btoFyMnh4SA icSdh03sXYxcHEICOxglVv5aDeV8YpRY/WsmI4TzmVFiyqdvTF2MHGAtl4+7Q8R3MUocfnEH quMjo0Rn0zcWkLlsAroSW56/AusWEWhhkmg9uIEVxGEW2MMo8W/JWnaQKmGBdIm1s1+CdbAI qErM7F7HDGLzCthLzG89wQxxobzE9ZttYDangIPEvp7JTBA1ghInZz4B62UGqmneOpsZZIGE wFQOiTtr/zFCNLtIPGm7zQJhC0u8Or6FHcKWknjZ3wZlF0ssnfWJCaK5gVHi8rZfbBAJY4lZ z9oZQZ5mFtCUWL9LH+J/ZYkjt6D28kl0HP7LDhHmlehoE4JoVJc4sH061FZZie45n1khbA+J SevPskJCazKjxNrzU1knMCrMQvLOLCTvzEJYvICReRWjWGpBcW56arFRgRE8ipPzczcxgpOs ltsOxilvP+gdYmTiYDzEKMHBrCTCmxB9P0mINyWxsiq1KD++qDQntfgQoykwsCcyS4km5wPT fF5JvKGJpYGJmZmhuZGpgbmSOK9XyoZEIYH0xJLU7NTUgtQimD4mDk6pBqaw9siTYmscmfc8 sJmnFrv/35pbG2MyS/8U9XGF+1+y+uvINlfq9en6vUyN4f2Tpx29e7LojKZNhfRhO/0Xu0Ij V01RTJa/d2d/1Nf/J3ZqPbX+du9l9JwZJ519f0npaqzZ12bex32WKzBwH/t33vMTXGQzOYI/ 7fF9Z3feY/7nD+fWLxMX98r6yLaE6bDkrV7XrczNCSuXZs7bNHvJm6DY13ItTSlSsy2aNq84 t2jmgz9vf8mbizG1n4g6MWlq8yqPTrX1V26fy9okuD7I5BRHmP4qgUSddwr6plqzN9zYVnBN oPpgoanFVpPPj2o1/vS+1tJnCGaOVU7O++wdcSb8X8IH7pUqvj5xPE0z1u9QYinOSDTUYi4q TgQARpjECTsEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrILMWRmVeSWpSXmKPExsWy7bCSnG7+ggdJBucOWVs8mLeNzeLyfm2L 61+es1rsfb2V3WLT42usFh977rFazDi/j8ni4ilXi8Nv2lkt/l3byGKxatcfRgduj/c3Wtk9 ds66y+6xaVUnm8eda3vYPDYvqffo27KK0ePzJrkA9igum5TUnMyy1CJ9uwSujP/7gwp2SlY0 /zrF2MD4XbSLkYNDQsBE4vJx9y5GLg4hgR2MEtO2rWTsYuQEistKPHu3gx3CFpa433KEFaLo PaPEjZcL2UASbAK6Eluev2IESYgIdDBJzFpxEayKWWAfo8Tc45uYQVYIC6RKbNnDBdLAIqAq MbN7HTOIzStgLzG/9QQzxAZ5ies328BsTgEHiX09k5lAbCGgmrU/jrND1AtKnJz5hAXEZgaq b946m3kCo8AsJKlZSFILGJlWMUqmFhTnpucWGxYY5aWW6xUn5haX5qXrJefnbmIEx4KW1g7G Pas+6B1iZOJgPMQowcGsJMKbEH0/SYg3JbGyKrUoP76oNCe1+BCjNAeLkjjvha6T8UIC6Ykl qdmpqQWpRTBZJg5OqQamzDXn6w/dUFmzbtNKnfyTSzd6OH5e3fFOSefg9QP8N9d43amOPBLA Y8Lfcz/m+QKmrczbJdQDLreHZS2UvuAeOqEszTlEo5rzh+nXfqfZp9hDxbLCr4SUXv5UUery x1fsxYw+72vf/rx5lyYzzbJ0fb1swK7ZdcUtW9y7k9buq5jaw6LDp8yxgbu/4Pjfr10Pmu0s KuwMjYV5NJ1fXo1K3Vt7urwjdvOMvqv1ilrGE54WbKtY6mHDq3aqYvcRx0TPNUrpqw7Xm78U DdLiPCKpLGst9vpf8xXui/p3zvipZUXdt4nLlbhzo+zlX7NWrylrRDIj6mZejd55sPiEUAn7 0Rx11bTtn0xub7q6XVuJpTgj0VCLuag4EQDkQoYS9AIAAA== X-CMS-MailID: 20220727021824epcas2p122d13c927fc8e3304b84aae2a9ca298d X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220727021824epcas2p122d13c927fc8e3304b84aae2a9ca298d References: <20220727021357.152421-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org There are duplicated definitions of peric0 and peric1 cmu blocks. Thus, they should be defined correctly as numerical order. Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9") Signed-off-by: Chanho Park Reviewed-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- .../dt-bindings/clock/samsung,exynosautov9.h | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h index ea9f91b4eb1a..a7db6516593f 100644 --- a/include/dt-bindings/clock/samsung,exynosautov9.h +++ b/include/dt-bindings/clock/samsung,exynosautov9.h @@ -226,21 +226,21 @@ #define CLK_GOUT_PERIC0_IPCLK_8 28 #define CLK_GOUT_PERIC0_IPCLK_9 29 #define CLK_GOUT_PERIC0_IPCLK_10 30 -#define CLK_GOUT_PERIC0_IPCLK_11 30 -#define CLK_GOUT_PERIC0_PCLK_0 31 -#define CLK_GOUT_PERIC0_PCLK_1 32 -#define CLK_GOUT_PERIC0_PCLK_2 33 -#define CLK_GOUT_PERIC0_PCLK_3 34 -#define CLK_GOUT_PERIC0_PCLK_4 35 -#define CLK_GOUT_PERIC0_PCLK_5 36 -#define CLK_GOUT_PERIC0_PCLK_6 37 -#define CLK_GOUT_PERIC0_PCLK_7 38 -#define CLK_GOUT_PERIC0_PCLK_8 39 -#define CLK_GOUT_PERIC0_PCLK_9 40 -#define CLK_GOUT_PERIC0_PCLK_10 41 -#define CLK_GOUT_PERIC0_PCLK_11 42 +#define CLK_GOUT_PERIC0_IPCLK_11 31 +#define CLK_GOUT_PERIC0_PCLK_0 32 +#define CLK_GOUT_PERIC0_PCLK_1 33 +#define CLK_GOUT_PERIC0_PCLK_2 34 +#define CLK_GOUT_PERIC0_PCLK_3 35 +#define CLK_GOUT_PERIC0_PCLK_4 36 +#define CLK_GOUT_PERIC0_PCLK_5 37 +#define CLK_GOUT_PERIC0_PCLK_6 38 +#define CLK_GOUT_PERIC0_PCLK_7 39 +#define CLK_GOUT_PERIC0_PCLK_8 40 +#define CLK_GOUT_PERIC0_PCLK_9 41 +#define CLK_GOUT_PERIC0_PCLK_10 42 +#define CLK_GOUT_PERIC0_PCLK_11 43 -#define PERIC0_NR_CLK 43 +#define PERIC0_NR_CLK 44 /* CMU_PERIC1 */ #define CLK_MOUT_PERIC1_BUS_USER 1 @@ -272,21 +272,21 @@ #define CLK_GOUT_PERIC1_IPCLK_8 28 #define CLK_GOUT_PERIC1_IPCLK_9 29 #define CLK_GOUT_PERIC1_IPCLK_10 30 -#define CLK_GOUT_PERIC1_IPCLK_11 30 -#define CLK_GOUT_PERIC1_PCLK_0 31 -#define CLK_GOUT_PERIC1_PCLK_1 32 -#define CLK_GOUT_PERIC1_PCLK_2 33 -#define CLK_GOUT_PERIC1_PCLK_3 34 -#define CLK_GOUT_PERIC1_PCLK_4 35 -#define CLK_GOUT_PERIC1_PCLK_5 36 -#define CLK_GOUT_PERIC1_PCLK_6 37 -#define CLK_GOUT_PERIC1_PCLK_7 38 -#define CLK_GOUT_PERIC1_PCLK_8 39 -#define CLK_GOUT_PERIC1_PCLK_9 40 -#define CLK_GOUT_PERIC1_PCLK_10 41 -#define CLK_GOUT_PERIC1_PCLK_11 42 +#define CLK_GOUT_PERIC1_IPCLK_11 31 +#define CLK_GOUT_PERIC1_PCLK_0 32 +#define CLK_GOUT_PERIC1_PCLK_1 33 +#define CLK_GOUT_PERIC1_PCLK_2 34 +#define CLK_GOUT_PERIC1_PCLK_3 35 +#define CLK_GOUT_PERIC1_PCLK_4 36 +#define CLK_GOUT_PERIC1_PCLK_5 37 +#define CLK_GOUT_PERIC1_PCLK_6 38 +#define CLK_GOUT_PERIC1_PCLK_7 39 +#define CLK_GOUT_PERIC1_PCLK_8 40 +#define CLK_GOUT_PERIC1_PCLK_9 41 +#define CLK_GOUT_PERIC1_PCLK_10 42 +#define CLK_GOUT_PERIC1_PCLK_11 43 -#define PERIC1_NR_CLK 43 +#define PERIC1_NR_CLK 44 /* CMU_PERIS */ #define CLK_MOUT_PERIS_BUS_USER 1 From patchwork Wed Jul 27 02:13:56 2022 Content-Type: text/plain; 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Signed-off-by: Chanho Park Reviewed-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynosautov9.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/samsung/clk-exynosautov9.c b/drivers/clk/samsung/clk-exynosautov9.c index d9e1f8e4a7b4..c5a4e1bee711 100644 --- a/drivers/clk/samsung/clk-exynosautov9.c +++ b/drivers/clk/samsung/clk-exynosautov9.c @@ -1330,6 +1330,10 @@ static const struct samsung_gate_clock peric0_gate_clks[] __initconst = { "mout_peric0_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_0, 21, 0, 0), + GATE(CLK_GOUT_PERIC0_PCLK_1, "gout_peric0_pclk_1", + "mout_peric0_bus_user", + CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_1, + 21, 0, 0), GATE(CLK_GOUT_PERIC0_PCLK_2, "gout_peric0_pclk_2", "mout_peric0_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_2, @@ -1581,6 +1585,10 @@ static const struct samsung_gate_clock peric1_gate_clks[] __initconst = { "mout_peric1_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_0, 21, 0, 0), + GATE(CLK_GOUT_PERIC1_PCLK_1, "gout_peric1_pclk_1", + "mout_peric1_bus_user", + CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_1, + 21, 0, 0), GATE(CLK_GOUT_PERIC1_PCLK_2, "gout_peric1_pclk_2", "mout_peric1_bus_user", CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2, From patchwork Wed Jul 27 02:13:57 2022 Content-Type: text/plain; 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Wed, 27 Jul 2022 11:18:24 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas2p1.samsung.com (KnoxPortal) with ESMTPA id 20220727021824epcas2p1f87c387e6c4923b036e4736a5c7855cf~Fjh_hQ4jq2667126671epcas2p1S; Wed, 27 Jul 2022 02:18:24 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20220727021824epsmtrp1e67fb98144a56989843cfaff4015e3d4~Fjh_gjbG63129031290epsmtrp1M; Wed, 27 Jul 2022 02:18:24 +0000 (GMT) X-AuditID: b6c32a48-9f7ff700000025be-ee-62e0a070cba7 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 42.F2.08905.070A0E26; Wed, 27 Jul 2022 11:18:24 +0900 (KST) Received: from localhost.localdomain (unknown [10.229.9.51]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220727021823epsmtip1af1facfdc5b8e0bcd7907b2e577e6ed5~Fjh_RKOAG2106221062epsmtip1p; Wed, 27 Jul 2022 02:18:23 +0000 (GMT) From: Chanho Park To: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Krzysztof Kozlowski , Stephen Boyd , Michael Turquette Cc: Alim Akhtar , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Chanho Park Subject: [RESEND PATCH v2 3/3] clk: samsung: exynosautov9: correct register offsets of peric0/c1 Date: Wed, 27 Jul 2022 11:13:57 +0900 Message-Id: <20220727021357.152421-4-chanho61.park@samsung.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220727021357.152421-1-chanho61.park@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrFJsWRmVeSWpSXmKPExsWy7bCmuW7BggdJBn/OG1s8mLeNzeLyfm2L 61+es1rsfb2V3WLT42usFh977rFazDi/j8ni4ilXi8Nv2lkt/l3byGKxatcfRgduj/c3Wtk9 ds66y+6xaVUnm8eda3vYPDYvqffo27KK0ePzJrkA9qhsm4zUxJTUIoXUvOT8lMy8dFsl7+B4 53hTMwNDXUNLC3MlhbzE3FRbJRefAF23zBygC5UUyhJzSoFCAYnFxUr6djZF+aUlqQoZ+cUl tkqpBSk5BeYFesWJucWleel6eaklVoYGBkamQIUJ2Rk7u6cwFRxWqHi68hRLA2OHXBcjJ4eE gInEyfsHmLsYuTiEBHYwSvzbOJEJwvnEKLHrSgMjhPONUeJV71V2mJZ9x4+zQyT2Mko8XX8e quUjo8TjbTuZQarYBHQltjx/BdYuItDCJNF6cAMriMMssAdoy5K1YLOEBZIkzn+/xwZiswio Sqw8tI8RxOYVsJfY+/sZK8Q+eYnrN9vApnIKOEjs65nMBFEjKHFy5hMWEJsZqKZ562ywNyQE pnJILHnwG+pYF4kN7/uhbGGJV8e3QNlSEi/726DsYomlsz4xQTQ3MEpc3vaLDSJhLDHrWTvQ RRxAGzQl1u/SBzElBJQljtyC2ssn0XH4LztEmFeio00IolFd4sD26SwQtqxE95zPUK94SDT2 rWGFhNZkRonf524wTmBUmIXknVlI3pmFsHgBI/MqRrHUguLc9NRiowITeCQn5+duYgQnWi2P HYyz337QO8TIxMF4iFGCg1lJhDch+n6SEG9KYmVValF+fFFpTmrxIUZTYGBPZJYSTc4Hpvq8 knhDE0sDEzMzQ3MjUwNzJXFer5QNiUIC6YklqdmpqQWpRTB9TBycUg1MIn+dfky9qb3O4fhB vcViLa77ky+dt++qyIuO2h/XucntoMmJY19DdK8cN1/+SHJO1LZzHaf5HSQ2t97RT5aOdi7U s7v9Z4Om+1O2iPfsH5RaQ45U8pytqjqktz3vzJWLczYs3ZI7/1/XgYsxhy/k3eRlji2aMiH/ CGvXPpa5YuxHWp2mqXFcVXj98XDWirkHQpMnT2x5uCLi2zPPVbkzZso+ORDO3Cz2+2nEda21 UXrXTcJMUpu+JM7ctECefeKv/zsbz25+dGHijrbyGSUlH1Ukjz+Ys511usth8T1sDj9yr17r kQxPlbY/vN9uk/3b+xbfDSyX/2GY6xnOetLkU98lzf2hM368dvEuC79wdrkSS3FGoqEWc1Fx IgAbvv7yPQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRmVeSWpSXmKPExsWy7bCSnG7BggdJBqu/s1o8mLeNzeLyfm2L 61+es1rsfb2V3WLT42usFh977rFazDi/j8ni4ilXi8Nv2lkt/l3byGKxatcfRgduj/c3Wtk9 ds66y+6xaVUnm8eda3vYPDYvqffo27KK0ePzJrkA9igum5TUnMyy1CJ9uwSujJ3dU5gKDitU PF15iqWBsUOui5GTQ0LARGLf8ePsXYxcHEICuxklFq+5xwKRkJV49m4HO4QtLHG/5QgriC0k 8J5R4uF2bxCbTUBXYsvzV4wgzSICHUwSs1ZcZAVxmAX2MUrMPb6JGaRKWCBB4smb42DdLAKq EisP7WMEsXkF7CX2/n7GCrFBXuL6zTawek4BB4l9PZOZILbZS6z9cZwdol5Q4uTMJ2DXMQPV N2+dzTyBUWAWktQsJKkFjEyrGCVTC4pz03OLDQsM81LL9YoTc4tL89L1kvNzNzGC40FLcwfj 9lUf9A4xMnEwHmKU4GBWEuFNiL6fJMSbklhZlVqUH19UmpNafIhRmoNFSZz3QtfJeCGB9MSS 1OzU1ILUIpgsEwenVANTd6rp+ZZzKqIeS79LnnnfKHPQzOn3jgsshyuvSdVVvL3l1FOeeLdo 6xLxd3XcZpkedyeZ6Ye+uCXJyJO85oNGeKPcmasGOyWWPvXXnfS8I/ge47TrU39vWeqewsdw 0rgu7K176tPF7TPmLD677PaM8kdhPx2ms86RywtW6q3QeGto6P3n/sZV4YuXeDt/P9Uq5Zwy UZ3FWD80sGG5+OMD3PdWBgbN2S/755/wZbWDqa1/EhJ7n8/Wl9/54UfbpbgnE37fFO4r5fQ8 a1nB8b9rzzIWX4F9pTP0+pd7Xn6QMtmZZdfPxItzxbQ+d8gsEHHJ3iQxbbrGhDMhTz9Wv5HN i1RW/frIw/aui+DZe0v+KLEUZyQaajEXFScCAFgdlKb2AgAA X-CMS-MailID: 20220727021824epcas2p1f87c387e6c4923b036e4736a5c7855cf X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220727021824epcas2p1f87c387e6c4923b036e4736a5c7855cf References: <20220727021357.152421-1-chanho61.park@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Some register offsets of peric0 and peric1 cmu blocks need to be corrected and re-ordered by numerical order. Fixes: f2dd366992d0 ("clk: samsung: exynosautov9: add cmu_peric0 clock support") Fixes: b35f27fe73d8 ("clk: samsung: exynosautov9: add cmu_peric1 clock support") Signed-off-by: Chanho Park Reviewed-by: Krzysztof Kozlowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynosautov9.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/clk/samsung/clk-exynosautov9.c b/drivers/clk/samsung/clk-exynosautov9.c index c5a4e1bee711..76c4841f2970 100644 --- a/drivers/clk/samsung/clk-exynosautov9.c +++ b/drivers/clk/samsung/clk-exynosautov9.c @@ -1170,9 +1170,9 @@ static const struct samsung_cmu_info fsys2_cmu_info __initconst = { #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_2 0x2058 #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_3 0x205c #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_4 0x2060 -#define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_7 0x206c #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_5 0x2064 #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_6 0x2068 +#define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_7 0x206c #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_8 0x2070 #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_9 0x2074 #define CLK_CON_GAT_GOUT_BLK_PERIC0_UID_PERIC0_TOP0_IPCLKPORT_PCLK_10 0x204c @@ -1422,14 +1422,14 @@ static const struct samsung_cmu_info peric0_cmu_info __initconst = { #define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_IPCLK_11 0x2020 #define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_0 0x2044 #define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_1 0x2048 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2 0x2058 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3 0x205c -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4 0x2060 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7 0x206c -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5 0x2064 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6 0x2068 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8 0x2070 -#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9 0x2074 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2 0x2054 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3 0x2058 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4 0x205c +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5 0x2060 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6 0x2064 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7 0x2068 +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8 0x206c +#define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9 0x2070 #define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_10 0x204c #define CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_11 0x2050 @@ -1467,9 +1467,9 @@ static const unsigned long peric1_clk_regs[] __initconst = { CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_2, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_3, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_4, - CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_5, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_6, + CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_7, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_8, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_9, CLK_CON_GAT_GOUT_BLK_PERIC1_UID_PERIC1_TOP0_IPCLKPORT_PCLK_10,