From patchwork Wed Jul 27 16:07:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930524 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7BA2DC04A68 for ; Wed, 27 Jul 2022 16:09:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BF3A396C9A; Wed, 27 Jul 2022 16:08:58 +0000 (UTC) Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 274F0A5439 for ; Wed, 27 Jul 2022 16:08:05 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="129334710" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:04 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 920EB40183E9; Thu, 28 Jul 2022 01:08:01 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 01/10] drm: rcar-du: Move rcar_du_vsp_plane_prepare_fb() Date: Wed, 27 Jul 2022 17:07:44 +0100 Message-Id: <20220727160753.1774761-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move rcar_du_vsp_plane_prepare_fb() to RCar DU vsp lib so that both RCar and RZ/G2L DU vsp drivers can share this function. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 21 --------------------- drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 21 +++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 7 +++++++ 3 files changed, 28 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index d192c31a5fe1..72128915a2ff 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -124,27 +124,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) plane->index, &cfg); } -static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, - struct drm_plane_state *state) -{ - struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); - struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; - int ret; - - /* - * There's no need to prepare (and unprepare) the framebuffer when the - * plane is not visible, as it will not be displayed. - */ - if (!state->visible) - return 0; - - ret = rcar_du_vsp_map_fb(vsp, state->fb, rstate->sg_tables); - if (ret < 0) - return ret; - - return drm_gem_plane_helper_prepare_fb(plane, state); -} - static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *state) { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c index 80da12f1fe71..40d44bf521c0 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c @@ -147,6 +147,27 @@ int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, return ret; } +int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *state) +{ + struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); + struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; + int ret; + + /* + * There's no need to prepare (and unprepare) the framebuffer when the + * plane is not visible, as it will not be displayed. + */ + if (!state->visible) + return 0; + + ret = rcar_du_vsp_map_fb(vsp, state->fb, rstate->sg_tables); + if (ret < 0) + return ret; + + return drm_gem_plane_helper_prepare_fb(plane, state); +} + void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, struct sg_table sg_tables[3]) { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h index abfde19fd1a3..d79cdf7d7316 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h @@ -66,6 +66,8 @@ void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, unsigned int crtcs, const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs); +int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *state); #else static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { }; static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { }; @@ -88,6 +90,11 @@ rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, { return -ENXIO; } +static inline int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, + struct drm_plane_state *state) +{ + return -ENXIO; +} #endif #endif /* __RCAR_DU_VSP_LIB_H__ */ From patchwork Wed Jul 27 16:07:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C4F4C19F2C for ; Wed, 27 Jul 2022 16:08:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B0118E683; Wed, 27 Jul 2022 16:08:28 +0000 (UTC) Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 37DA710E13D for ; Wed, 27 Jul 2022 16:08:09 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="129334718" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:08 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8685C40183E9; Thu, 28 Jul 2022 01:08:05 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 02/10] drm: rcar-du: Move rcar_du_vsp_plane_cleanup_fb() Date: Wed, 27 Jul 2022 17:07:45 +0100 Message-Id: <20220727160753.1774761-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move rcar_du_vsp_plane_cleanup_fb() to RCar DU vsp lib so that it can be shared by both RCar and RZ/G2L DU vsp drivers. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 12 ------------ drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 12 ++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 6 ++++++ 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index 72128915a2ff..c9090e581b12 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -124,18 +124,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) plane->index, &cfg); } -static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, - struct drm_plane_state *state) -{ - struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); - struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; - - if (!state->visible) - return; - - rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables); -} - static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c index 40d44bf521c0..9062837e68da 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c @@ -181,6 +181,18 @@ void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, } } +void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, + struct drm_plane_state *state) +{ + struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(state); + struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; + + if (!state->visible) + return; + + rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables); +} + static struct drm_plane_state * rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane) { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h index d79cdf7d7316..094ada022fe5 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h @@ -68,6 +68,8 @@ int rcar_du_lib_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, const struct drm_plane_helper_funcs *rcar_du_vsp_plane_helper_funcs); int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state); +void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, + struct drm_plane_state *state); #else static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { }; static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { }; @@ -95,6 +97,10 @@ static inline int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, { return -ENXIO; } +static inline void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, + struct drm_plane_state *state) +{ +} #endif #endif /* __RCAR_DU_VSP_LIB_H__ */ From patchwork Wed Jul 27 16:07:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0F4BC04A68 for ; Wed, 27 Jul 2022 16:08:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4695D92807; Wed, 27 Jul 2022 16:08:28 +0000 (UTC) Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F26410E13D for ; Wed, 27 Jul 2022 16:08:12 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="129334729" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:12 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7A6674018A35; Thu, 28 Jul 2022 01:08:09 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 03/10] drm: rcar-du: Move rcar_du_vsp_plane_atomic_update() Date: Wed, 27 Jul 2022 17:07:46 +0100 Message-Id: <20220727160753.1774761-4-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move rcar_du_vsp_plane_atomic_update() to RCar DU vsp lib so that both RCar and RZ/G2L DU vsp drivers can share this function. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 51 ----------------------- drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 51 +++++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 6 +++ 3 files changed, 57 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c index c9090e581b12..aa63e2d19649 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c @@ -88,42 +88,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); } -static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) -{ - struct rcar_du_vsp_plane_state *state = - to_rcar_vsp_plane_state(plane->plane.state); - struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc); - struct drm_framebuffer *fb = plane->plane.state->fb; - const struct rcar_du_format_info *format; - struct vsp1_du_atomic_config cfg = { - .pixelformat = 0, - .pitch = fb->pitches[0], - .alpha = state->state.alpha >> 8, - .zpos = state->state.zpos, - }; - unsigned int i; - - cfg.src.left = state->state.src.x1 >> 16; - cfg.src.top = state->state.src.y1 >> 16; - cfg.src.width = drm_rect_width(&state->state.src) >> 16; - cfg.src.height = drm_rect_height(&state->state.src) >> 16; - - cfg.dst.left = state->state.dst.x1; - cfg.dst.top = state->state.dst.y1; - cfg.dst.width = drm_rect_width(&state->state.dst); - cfg.dst.height = drm_rect_height(&state->state.dst); - - for (i = 0; i < state->format->planes; ++i) - cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl) - + fb->offsets[i]; - - format = rcar_du_format_info(state->format->fourcc); - cfg.pixelformat = format->v4l2; - - vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, - plane->index, &cfg); -} - static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -135,21 +99,6 @@ static int rcar_du_vsp_plane_atomic_check(struct drm_plane *plane, &rstate->format); } -static void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, - struct drm_atomic_state *state) -{ - struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane); - struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); - struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane); - struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc); - - if (new_state->visible) - rcar_du_vsp_plane_setup(rplane); - else if (old_state->crtc) - vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe, - rplane->index, NULL); -} - static const struct drm_plane_helper_funcs rcar_du_vsp_plane_helper_funcs = { .prepare_fb = rcar_du_vsp_plane_prepare_fb, .cleanup_fb = rcar_du_vsp_plane_cleanup_fb, diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c index 9062837e68da..97f8ac22b582 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c @@ -85,6 +85,42 @@ static const u32 rcar_du_vsp_formats[] = { DRM_FORMAT_YVU444, }; +static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) +{ + struct rcar_du_vsp_plane_state *state = + to_rcar_vsp_plane_state(plane->plane.state); + struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc); + struct drm_framebuffer *fb = plane->plane.state->fb; + const struct rcar_du_format_info *format; + struct vsp1_du_atomic_config cfg = { + .pixelformat = 0, + .pitch = fb->pitches[0], + .alpha = state->state.alpha >> 8, + .zpos = state->state.zpos, + }; + unsigned int i; + + cfg.src.left = state->state.src.x1 >> 16; + cfg.src.top = state->state.src.y1 >> 16; + cfg.src.width = drm_rect_width(&state->state.src) >> 16; + cfg.src.height = drm_rect_height(&state->state.src) >> 16; + + cfg.dst.left = state->state.dst.x1; + cfg.dst.top = state->state.dst.y1; + cfg.dst.width = drm_rect_width(&state->state.dst); + cfg.dst.height = drm_rect_height(&state->state.dst); + + for (i = 0; i < state->format->planes; ++i) + cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl) + + fb->offsets[i]; + + format = rcar_du_format_info(state->format->fourcc); + cfg.pixelformat = format->v4l2; + + vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, + plane->index, &cfg); +} + int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb, struct sg_table sg_tables[3]) { @@ -193,6 +229,21 @@ void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, rcar_du_vsp_unmap_fb(vsp, state->fb, rstate->sg_tables); } +void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane); + struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane); + struct rcar_du_vsp_plane *rplane = to_rcar_vsp_plane(plane); + struct rcar_du_crtc *crtc = to_rcar_crtc(old_state->crtc); + + if (new_state->visible) + rcar_du_vsp_plane_setup(rplane); + else if (old_state->crtc) + vsp1_du_atomic_update(rplane->vsp->vsp, crtc->vsp_pipe, + rplane->index, NULL); +} + static struct drm_plane_state * rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane) { diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h index 094ada022fe5..0686894e659c 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h @@ -70,6 +70,8 @@ int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state); void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *state); +void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state); #else static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { }; static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { }; @@ -101,6 +103,10 @@ static inline void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, struct drm_plane_state *state) { } +static inline void rcar_du_vsp_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state) +{ +} #endif #endif /* __RCAR_DU_VSP_LIB_H__ */ From patchwork Wed Jul 27 16:07:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930522 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D34D5C19F2B for ; Wed, 27 Jul 2022 16:08:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E33119629C; Wed, 27 Jul 2022 16:08:29 +0000 (UTC) Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 196FA10E15B for ; Wed, 27 Jul 2022 16:08:16 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="129334740" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:16 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7200D4018932; Thu, 28 Jul 2022 01:08:13 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 04/10] drm: rcar-du: Add rcar_du_lib_fb_create() Date: Wed, 27 Jul 2022 17:07:47 +0100 Message-Id: <20220727160753.1774761-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move the common code from rcar_du_fb_create->rcar_du_lib_fb_create, so that rzg2l_du_fb_create() can reuse the common code. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 64 +-------------------- drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 69 +++++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 4 ++ 3 files changed, 74 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index ea2b7d5f1c23..9d65a7d6d96e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c @@ -41,69 +41,7 @@ static struct drm_framebuffer * rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd) { - struct rcar_du_device *rcdu = to_rcar_du_device(dev); - const struct rcar_du_format_info *format; - unsigned int chroma_pitch; - unsigned int max_pitch; - unsigned int align; - unsigned int i; - - format = rcar_du_format_info(mode_cmd->pixel_format); - if (format == NULL) { - dev_dbg(dev->dev, "unsupported pixel format %08x\n", - mode_cmd->pixel_format); - return ERR_PTR(-EINVAL); - } - - if (rcdu->info->gen < 3) { - /* - * On Gen2 the DU limits the pitch to 4095 pixels and requires - * buffers to be aligned to a 16 pixels boundary (or 128 bytes - * on some platforms). - */ - unsigned int bpp = format->planes == 1 ? format->bpp / 8 : 1; - - max_pitch = 4095 * bpp; - - if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B)) - align = 128; - else - align = 16 * bpp; - } else { - /* - * On Gen3 the memory interface is handled by the VSP that - * limits the pitch to 65535 bytes and has no alignment - * constraint. - */ - max_pitch = 65535; - align = 1; - } - - if (mode_cmd->pitches[0] & (align - 1) || - mode_cmd->pitches[0] > max_pitch) { - dev_dbg(dev->dev, "invalid pitch value %u\n", - mode_cmd->pitches[0]); - return ERR_PTR(-EINVAL); - } - - /* - * Calculate the chroma plane(s) pitch using the horizontal subsampling - * factor. For semi-planar formats, the U and V planes are combined, the - * pitch must thus be doubled. - */ - chroma_pitch = mode_cmd->pitches[0] / format->hsub; - if (format->planes == 2) - chroma_pitch *= 2; - - for (i = 1; i < format->planes; ++i) { - if (mode_cmd->pitches[i] != chroma_pitch) { - dev_dbg(dev->dev, - "luma and chroma pitches are not compatible\n"); - return ERR_PTR(-EINVAL); - } - } - - return drm_gem_fb_create(dev, file_priv, mode_cmd); + return rcar_du_lib_fb_create(dev, file_priv, mode_cmd); } /* ----------------------------------------------------------------------------- diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c index 6461b99e08dc..d8f778a7b6db 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c @@ -392,3 +392,72 @@ int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev, return drm_gem_cma_dumb_create_internal(file, dev, args); } + +struct drm_framebuffer * +rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd) +{ + struct rcar_du_device *rcdu = to_rcar_du_device(dev); + const struct rcar_du_format_info *format; + unsigned int chroma_pitch; + unsigned int max_pitch; + unsigned int align; + unsigned int i; + + format = rcar_du_format_info(mode_cmd->pixel_format); + if (format == NULL) { + dev_dbg(dev->dev, "unsupported pixel format %08x\n", + mode_cmd->pixel_format); + return ERR_PTR(-EINVAL); + } + + if (rcdu->info->gen < 3) { + /* + * On Gen2 the DU limits the pitch to 4095 pixels and requires + * buffers to be aligned to a 16 pixels boundary (or 128 bytes + * on some platforms). + */ + unsigned int bpp = format->planes == 1 ? format->bpp / 8 : 1; + + max_pitch = 4095 * bpp; + + if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B)) + align = 128; + else + align = 16 * bpp; + } else { + /* + * On Gen3 the memory interface is handled by the VSP that + * limits the pitch to 65535 bytes and has no alignment + * constraint. + */ + max_pitch = 65535; + align = 1; + } + + if (mode_cmd->pitches[0] & (align - 1) || + mode_cmd->pitches[0] > max_pitch) { + dev_dbg(dev->dev, "invalid pitch value %u\n", + mode_cmd->pitches[0]); + return ERR_PTR(-EINVAL); + } + + /* + * Calculate the chroma plane(s) pitch using the horizontal subsampling + * factor. For semi-planar formats, the U and V planes are combined, the + * pitch must thus be doubled. + */ + chroma_pitch = mode_cmd->pitches[0] / format->hsub; + if (format->planes == 2) + chroma_pitch *= 2; + + for (i = 1; i < format->planes; ++i) { + if (mode_cmd->pitches[i] != chroma_pitch) { + dev_dbg(dev->dev, + "luma and chroma pitches are not compatible\n"); + return ERR_PTR(-EINVAL); + } + } + + return drm_gem_fb_create(dev, file_priv, mode_cmd); +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h index 5f45a369bb88..160928dc68b8 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h @@ -39,4 +39,8 @@ struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device *dev, struct dma_buf_attachment *attach, struct sg_table *sgt); +struct drm_framebuffer * +rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd); + #endif /* __RCAR_DU_KMS_LIB_H__ */ From patchwork Wed Jul 27 16:07:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C406CC04A68 for ; Wed, 27 Jul 2022 16:09:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10001ADBD6; Wed, 27 Jul 2022 16:09:12 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 61C9F9094B for ; Wed, 27 Jul 2022 16:08:21 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="127555152" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:20 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 655C94018932; Thu, 28 Jul 2022 01:08:17 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 05/10] drm: rcar-du: Add rcar_du_lib_mode_cfg_helper_fns() Date: Wed, 27 Jul 2022 17:07:48 +0100 Message-Id: <20220727160753.1774761-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add rcar_du_lib_mode_cfg_helper_fns() in RCar DU kms lib to get the pointer to rcar_du_mode_config_helper, so that both rcar_du_atomic_ commit_tail() and rcar_du_mode_config_helper can be reused by rcar_du_modeset_init() and rzg2l_du_modeset_init(). Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 44 +----------------- drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 56 +++++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 3 ++ 3 files changed, 60 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index 9d65a7d6d96e..ed8d14701178 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c @@ -64,52 +64,10 @@ static int rcar_du_atomic_check(struct drm_device *dev, return rcar_du_atomic_check_planes(dev, state); } -static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state) -{ - struct drm_device *dev = old_state->dev; - struct rcar_du_device *rcdu = to_rcar_du_device(dev); - struct drm_crtc_state *crtc_state; - struct drm_crtc *crtc; - unsigned int i; - - /* - * Store RGB routing to DPAD0 and DPAD1, the hardware will be configured - * when starting the CRTCs. - */ - rcdu->dpad1_source = -1; - - for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) { - struct rcar_du_crtc_state *rcrtc_state = - to_rcar_crtc_state(crtc_state); - struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); - - if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD0)) - rcdu->dpad0_source = rcrtc->index; - - if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD1)) - rcdu->dpad1_source = rcrtc->index; - } - - /* Apply the atomic update. */ - drm_atomic_helper_commit_modeset_disables(dev, old_state); - drm_atomic_helper_commit_planes(dev, old_state, - DRM_PLANE_COMMIT_ACTIVE_ONLY); - drm_atomic_helper_commit_modeset_enables(dev, old_state); - - drm_atomic_helper_commit_hw_done(old_state); - drm_atomic_helper_wait_for_flip_done(dev, old_state); - - drm_atomic_helper_cleanup_planes(dev, old_state); -} - /* ----------------------------------------------------------------------------- * Initialization */ -static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = { - .atomic_commit_tail = rcar_du_atomic_commit_tail, -}; - static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = { .fb_create = rcar_du_fb_create, .atomic_check = rcar_du_atomic_check, @@ -415,7 +373,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu) dev->mode_config.min_height = 0; dev->mode_config.normalize_zpos = true; dev->mode_config.funcs = &rcar_du_mode_config_funcs; - dev->mode_config.helper_private = &rcar_du_mode_config_helper; + dev->mode_config.helper_private = rcar_du_lib_mode_cfg_helper_fns(); if (rcdu->info->gen < 3) { dev->mode_config.max_width = 4095; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c index d8f778a7b6db..a1027436cfe3 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c @@ -461,3 +461,59 @@ rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv, return drm_gem_fb_create(dev, file_priv, mode_cmd); } + +/* ----------------------------------------------------------------------------- + * Atomic Check and Update + */ + +static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state) +{ + struct drm_device *dev = old_state->dev; + struct rcar_du_device *rcdu = to_rcar_du_device(dev); + struct drm_crtc_state *crtc_state; + struct drm_crtc *crtc; + unsigned int i; + + /* + * Store RGB routing to DPAD0 and DPAD1, the hardware will be configured + * when starting the CRTCs. + */ + rcdu->dpad1_source = -1; + + for_each_new_crtc_in_state(old_state, crtc, crtc_state, i) { + struct rcar_du_crtc_state *rcrtc_state = + to_rcar_crtc_state(crtc_state); + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD0)) + rcdu->dpad0_source = rcrtc->index; + + if (rcrtc_state->outputs & BIT(RCAR_DU_OUTPUT_DPAD1)) + rcdu->dpad1_source = rcrtc->index; + } + + /* Apply the atomic update. */ + drm_atomic_helper_commit_modeset_disables(dev, old_state); + drm_atomic_helper_commit_planes(dev, old_state, + DRM_PLANE_COMMIT_ACTIVE_ONLY); + drm_atomic_helper_commit_modeset_enables(dev, old_state); + + drm_atomic_helper_commit_hw_done(old_state); + drm_atomic_helper_wait_for_flip_done(dev, old_state); + + drm_atomic_helper_cleanup_planes(dev, old_state); +} + +/* ----------------------------------------------------------------------------- + * Initialization + */ + +static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = { + .atomic_commit_tail = rcar_du_atomic_commit_tail, +}; + +const struct drm_mode_config_helper_funcs * +rcar_du_lib_mode_cfg_helper_fns(void) +{ + return &rcar_du_mode_config_helper; +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h index 160928dc68b8..8a689ac6c83f 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h @@ -43,4 +43,7 @@ struct drm_framebuffer * rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd); +const struct drm_mode_config_helper_funcs * +rcar_du_lib_mode_cfg_helper_fns(void); + #endif /* __RCAR_DU_KMS_LIB_H__ */ From patchwork Wed Jul 27 16:07:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A58C5C19F28 for ; Wed, 27 Jul 2022 16:09:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D9AA965D1; Wed, 27 Jul 2022 16:08:58 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 28B2B18ABA9 for ; Wed, 27 Jul 2022 16:08:24 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="127555165" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:24 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 580A440183E9; Thu, 28 Jul 2022 01:08:21 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 06/10] drm: rcar-du: Move rcar_du_encoders_init() Date: Wed, 27 Jul 2022 17:07:49 +0100 Message-Id: <20220727160753.1774761-7-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" RZ/G2L supports only DSI and DPI. Add rcar_du_encoders_init() to handle the pointer to du_output_name(), so that we can share du_encoders_init() between RCar and RZ/G2L kms drivers. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 92 +------------------- drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 100 ++++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 6 ++ 3 files changed, 108 insertions(+), 90 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index ed8d14701178..7586520e1871 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c @@ -74,95 +74,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, }; -static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu, - enum rcar_du_output output, - struct of_endpoint *ep) -{ - struct device_node *entity; - int ret; - - /* Locate the connected entity and initialize the encoder. */ - entity = of_graph_get_remote_port_parent(ep->local_node); - if (!entity) { - dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n", - ep->local_node); - return -ENODEV; - } - - if (!of_device_is_available(entity)) { - dev_dbg(rcdu->dev, - "connected entity %pOF is disabled, skipping\n", - entity); - of_node_put(entity); - return -ENODEV; - } - - ret = rcar_du_encoder_init(rcdu, output, entity); - if (ret && ret != -EPROBE_DEFER && ret != -ENOLINK) - dev_warn(rcdu->dev, - "failed to initialize encoder %pOF on output %s (%d), skipping\n", - entity, rcar_du_output_name(output), ret); - - of_node_put(entity); - - return ret; -} - -static int rcar_du_encoders_init(struct rcar_du_device *rcdu) -{ - struct device_node *np = rcdu->dev->of_node; - struct device_node *ep_node; - unsigned int num_encoders = 0; - - /* - * Iterate over the endpoints and create one encoder for each output - * pipeline. - */ - for_each_endpoint_of_node(np, ep_node) { - enum rcar_du_output output; - struct of_endpoint ep; - unsigned int i; - int ret; - - ret = of_graph_parse_endpoint(ep_node, &ep); - if (ret < 0) { - of_node_put(ep_node); - return ret; - } - - /* Find the output route corresponding to the port number. */ - for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) { - if (rcdu->info->routes[i].possible_crtcs && - rcdu->info->routes[i].port == ep.port) { - output = i; - break; - } - } - - if (i == RCAR_DU_OUTPUT_MAX) { - dev_warn(rcdu->dev, - "port %u references unexisting output, skipping\n", - ep.port); - continue; - } - - /* Process the output pipeline. */ - ret = rcar_du_encoders_init_one(rcdu, output, &ep); - if (ret < 0) { - if (ret == -EPROBE_DEFER) { - of_node_put(ep_node); - return ret; - } - - continue; - } - - num_encoders++; - } - - return num_encoders; -} - static int rcar_du_properties_init(struct rcar_du_device *rcdu) { /* @@ -462,7 +373,8 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu) } /* Initialize the encoders. */ - ret = rcar_du_encoders_init(rcdu); + ret = rcar_du_encoders_init(rcdu, rcar_du_output_name, + rcar_du_encoder_init); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c index a1027436cfe3..d41fee590ee4 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c @@ -517,3 +517,103 @@ rcar_du_lib_mode_cfg_helper_fns(void) { return &rcar_du_mode_config_helper; } + +static int +rcar_du_encoders_init_one(struct rcar_du_device *rcdu, + enum rcar_du_output output, + struct of_endpoint *ep, + const char *output_name, + int (*rcar_du_encoder_init_fn)(struct rcar_du_device *r, + enum rcar_du_output op, + struct device_node *d)) +{ + struct device_node *entity; + int ret; + + /* Locate the connected entity and initialize the encoder. */ + entity = of_graph_get_remote_port_parent(ep->local_node); + if (!entity) { + dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n", + ep->local_node); + return -ENODEV; + } + + if (!of_device_is_available(entity)) { + dev_dbg(rcdu->dev, + "connected entity %pOF is disabled, skipping\n", + entity); + of_node_put(entity); + return -ENODEV; + } + + ret = rcar_du_encoder_init_fn(rcdu, output, entity); + if (ret && ret != -EPROBE_DEFER && ret != -ENOLINK) + dev_warn(rcdu->dev, + "failed to initialize encoder %pOF on output %s (%d), skipping\n", + entity, output_name, ret); + + of_node_put(entity); + + return ret; +} + +int rcar_du_encoders_init(struct rcar_du_device *rcdu, + const char* (*out_name)(enum rcar_du_output output), + int (*encoder_init_fn)(struct rcar_du_device *rcdu, + enum rcar_du_output output, + struct device_node *enc_node)) +{ + struct device_node *np = rcdu->dev->of_node; + struct device_node *ep_node; + unsigned int num_encoders = 0; + + /* + * Iterate over the endpoints and create one encoder for each output + * pipeline. + */ + for_each_endpoint_of_node(np, ep_node) { + enum rcar_du_output output; + struct of_endpoint ep; + unsigned int i; + int ret; + + ret = of_graph_parse_endpoint(ep_node, &ep); + if (ret < 0) { + of_node_put(ep_node); + return ret; + } + + /* Find the output route corresponding to the port number. */ + for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) { + if (rcdu->info->routes[i].possible_crtcs && + rcdu->info->routes[i].port == ep.port) { + output = i; + break; + } + } + + if (i == RCAR_DU_OUTPUT_MAX) { + dev_warn(rcdu->dev, + "port %u references unexisting output, skipping\n", + ep.port); + continue; + } + + /* Process the output pipeline. */ + ret = rcar_du_encoders_init_one(rcdu, output, &ep, + out_name(output), + encoder_init_fn); + if (ret < 0) { + if (ret == -EPROBE_DEFER) { + of_node_put(ep_node); + return ret; + } + + continue; + } + + num_encoders++; + } + + return num_encoders; +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h index 8a689ac6c83f..02d6ed5aa154 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h @@ -46,4 +46,10 @@ rcar_du_lib_fb_create(struct drm_device *dev, struct drm_file *file_priv, const struct drm_mode_config_helper_funcs * rcar_du_lib_mode_cfg_helper_fns(void); +int rcar_du_encoders_init(struct rcar_du_device *rcdu, + const char* (*out_name)(enum rcar_du_output output), + int (*encoder_init_fn)(struct rcar_du_device *rcdu, + enum rcar_du_output output, + struct device_node *enc_node)); + #endif /* __RCAR_DU_KMS_LIB_H__ */ From patchwork Wed Jul 27 16:07:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEA62C04A68 for ; Wed, 27 Jul 2022 16:09:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AD4496846; Wed, 27 Jul 2022 16:08:58 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 865509094B for ; Wed, 27 Jul 2022 16:08:28 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="127555176" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:28 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 51BFE4018A35; Thu, 28 Jul 2022 01:08:25 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 07/10] drm: rcar-du: Move rcar_du_properties_init() Date: Wed, 27 Jul 2022 17:07:50 +0100 Message-Id: <20220727160753.1774761-8-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move rcar_du_properties_init() to RCar DU kms lib, so that it can be shared by both RCar and RZ/G2L kms drivers. Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 16 ---------------- drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 16 ++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 2 ++ 3 files changed, 18 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index 7586520e1871..b3ebe694be6e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c @@ -74,22 +74,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, }; -static int rcar_du_properties_init(struct rcar_du_device *rcdu) -{ - /* - * The color key is expressed as an RGB888 triplet stored in a 32-bit - * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0) - * or enable source color keying (1). - */ - rcdu->props.colorkey = - drm_property_create_range(&rcdu->ddev, 0, "colorkey", - 0, 0x01ffffff); - if (rcdu->props.colorkey == NULL) - return -ENOMEM; - - return 0; -} - static int rcar_du_vsps_init(struct rcar_du_device *rcdu) { const struct device_node *np = rcdu->dev->of_node; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c index d41fee590ee4..a56f3d6db321 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c @@ -617,3 +617,19 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu, return num_encoders; } + +int rcar_du_properties_init(struct rcar_du_device *rcdu) +{ + /* + * The color key is expressed as an RGB888 triplet stored in a 32-bit + * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0) + * or enable source color keying (1). + */ + rcdu->props.colorkey = + drm_property_create_range(&rcdu->ddev, 0, "colorkey", + 0, 0x01ffffff); + if (rcdu->props.colorkey == NULL) + return -ENOMEM; + + return 0; +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h index 02d6ed5aa154..b04c42bbae5c 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h @@ -52,4 +52,6 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu, enum rcar_du_output output, struct device_node *enc_node)); +int rcar_du_properties_init(struct rcar_du_device *rcdu); + #endif /* __RCAR_DU_KMS_LIB_H__ */ From patchwork Wed Jul 27 16:07:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930523 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D621C04A68 for ; Wed, 27 Jul 2022 16:09:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D644A375B; Wed, 27 Jul 2022 16:08:58 +0000 (UTC) Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by gabe.freedesktop.org (Postfix) with ESMTP id BFC91965D1 for ; Wed, 27 Jul 2022 16:08:33 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="129334782" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:32 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 4554340183E9; Thu, 28 Jul 2022 01:08:29 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter Subject: [PATCH v5 08/10] drm: rcar-du: Add rcar_du_lib_vsps_init() Date: Wed, 27 Jul 2022 17:07:51 +0100 Message-Id: <20220727160753.1774761-9-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add rcar_du_lib_vsps_init() to RCar DU kms lib to handle both rcar_du_vsp_init() and rzg2l_du_vsp_init(). Signed-off-by: Biju Das --- v5: * New patch --- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 88 +--------------------- drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 89 +++++++++++++++++++++++ drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 5 ++ 3 files changed, 95 insertions(+), 87 deletions(-) diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c index b3ebe694be6e..73269b7e067e 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c @@ -74,92 +74,6 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, }; -static int rcar_du_vsps_init(struct rcar_du_device *rcdu) -{ - const struct device_node *np = rcdu->dev->of_node; - const char *vsps_prop_name = "renesas,vsps"; - struct of_phandle_args args; - struct { - struct device_node *np; - unsigned int crtcs_mask; - } vsps[RCAR_DU_MAX_VSPS] = { { NULL, }, }; - unsigned int vsps_count = 0; - unsigned int cells; - unsigned int i; - int ret; - - /* - * First parse the DT vsps property to populate the list of VSPs. Each - * entry contains a pointer to the VSP DT node and a bitmask of the - * connected DU CRTCs. - */ - ret = of_property_count_u32_elems(np, vsps_prop_name); - if (ret < 0) { - /* Backward compatibility with old DTBs. */ - vsps_prop_name = "vsps"; - ret = of_property_count_u32_elems(np, vsps_prop_name); - } - cells = ret / rcdu->num_crtcs - 1; - if (cells > 1) - return -EINVAL; - - for (i = 0; i < rcdu->num_crtcs; ++i) { - unsigned int j; - - ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name, - cells, i, &args); - if (ret < 0) - goto error; - - /* - * Add the VSP to the list or update the corresponding existing - * entry if the VSP has already been added. - */ - for (j = 0; j < vsps_count; ++j) { - if (vsps[j].np == args.np) - break; - } - - if (j < vsps_count) - of_node_put(args.np); - else - vsps[vsps_count++].np = args.np; - - vsps[j].crtcs_mask |= BIT(i); - - /* - * Store the VSP pointer and pipe index in the CRTC. If the - * second cell of the 'renesas,vsps' specifier isn't present, - * default to 0 to remain compatible with older DT bindings. - */ - rcdu->crtcs[i].vsp = &rcdu->vsps[j]; - rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0; - } - - /* - * Then initialize all the VSPs from the node pointers and CRTCs bitmask - * computed previously. - */ - for (i = 0; i < vsps_count; ++i) { - struct rcar_du_vsp *vsp = &rcdu->vsps[i]; - - vsp->index = i; - vsp->dev = rcdu; - - ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask); - if (ret < 0) - goto error; - } - - return 0; - -error: - for (i = 0; i < ARRAY_SIZE(vsps); ++i) - of_node_put(vsps[i].np); - - return ret; -} - static int rcar_du_cmm_init(struct rcar_du_device *rcdu) { const struct device_node *np = rcdu->dev->of_node; @@ -331,7 +245,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu) /* Initialize the compositors. */ if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) { - ret = rcar_du_vsps_init(rcdu); + ret = rcar_du_lib_vsps_init(rcdu, rcar_du_vsp_init); if (ret < 0) return ret; } diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c index a56f3d6db321..c9fa4d1c78fd 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c @@ -633,3 +633,92 @@ int rcar_du_properties_init(struct rcar_du_device *rcdu) return 0; } + +int rcar_du_lib_vsps_init(struct rcar_du_device *rcdu, + int (*rcar_du_vsp_init_fn)(struct rcar_du_vsp *vsp, + struct device_node *np, + unsigned int crtcs)) +{ + const struct device_node *np = rcdu->dev->of_node; + const char *vsps_prop_name = "renesas,vsps"; + struct of_phandle_args args; + struct { + struct device_node *np; + unsigned int crtcs_mask; + } vsps[RCAR_DU_MAX_VSPS] = { { NULL, }, }; + unsigned int vsps_count = 0; + unsigned int cells; + unsigned int i; + int ret; + + /* + * First parse the DT vsps property to populate the list of VSPs. Each + * entry contains a pointer to the VSP DT node and a bitmask of the + * connected DU CRTCs. + */ + ret = of_property_count_u32_elems(np, vsps_prop_name); + if (ret < 0) { + /* Backward compatibility with old DTBs. */ + vsps_prop_name = "vsps"; + ret = of_property_count_u32_elems(np, vsps_prop_name); + } + cells = ret / rcdu->num_crtcs - 1; + if (cells > 1) + return -EINVAL; + + for (i = 0; i < rcdu->num_crtcs; ++i) { + unsigned int j; + + ret = of_parse_phandle_with_fixed_args(np, vsps_prop_name, + cells, i, &args); + if (ret < 0) + goto error; + + /* + * Add the VSP to the list or update the corresponding existing + * entry if the VSP has already been added. + */ + for (j = 0; j < vsps_count; ++j) { + if (vsps[j].np == args.np) + break; + } + + if (j < vsps_count) + of_node_put(args.np); + else + vsps[vsps_count++].np = args.np; + + vsps[j].crtcs_mask |= BIT(i); + + /* + * Store the VSP pointer and pipe index in the CRTC. If the + * second cell of the 'renesas,vsps' specifier isn't present, + * default to 0 to remain compatible with older DT bindings. + */ + rcdu->crtcs[i].vsp = &rcdu->vsps[j]; + rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0; + } + + /* + * Then initialize all the VSPs from the node pointers and CRTCs bitmask + * computed previously. + */ + for (i = 0; i < vsps_count; ++i) { + struct rcar_du_vsp *vsp = &rcdu->vsps[i]; + + vsp->index = i; + vsp->dev = rcdu; + + ret = rcar_du_vsp_init_fn(vsp, vsps[i].np, vsps[i].crtcs_mask); + if (ret < 0) + goto error; + } + + return 0; + +error: + for (i = 0; i < ARRAY_SIZE(vsps); ++i) + of_node_put(vsps[i].np); + + return ret; +} diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h index b04c42bbae5c..fc3aa1a3be89 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h +++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h @@ -54,4 +54,9 @@ int rcar_du_encoders_init(struct rcar_du_device *rcdu, int rcar_du_properties_init(struct rcar_du_device *rcdu); +int rcar_du_lib_vsps_init(struct rcar_du_device *rcdu, + int (*rcar_du_vsp_init_fn)(struct rcar_du_vsp *vsp, + struct device_node *np, + unsigned int crtcs)); + #endif /* __RCAR_DU_KMS_LIB_H__ */ From patchwork Wed Jul 27 16:07:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12B0DC04A68 for ; Wed, 27 Jul 2022 16:09:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 595CE99C88; Wed, 27 Jul 2022 16:08:58 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 48FFF9666F for ; Wed, 27 Jul 2022 16:08:38 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="127555192" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:37 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 3EE6540183E9; Thu, 28 Jul 2022 01:08:32 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski Subject: [PATCH v5 09/10] dt-bindings: display: Document Renesas RZ/G2L DU bindings Date: Wed, 27 Jul 2022 17:07:52 +0100 Message-Id: <20220727160753.1774761-10-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Chris Paterson , Laurent Pinchart , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The RZ/G2L LCD controller is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). The DU module supports the following hardware features − Display Parallel Interface (DPI) and MIPI LINK Video Interface − Display timing master − Generates video timings − Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE − Supports Progressive − Input data format (from VSPD): RGB888, RGB666 − Output data format: same as Input data format − Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output − Supporting WXGA (1280 pixels x 800 lines) for Parallel Output This patch document DU module found on RZ/G2L LCDC. Signed-off-by: Biju Das Reviewed-by: Rob Herring --- v4->v5: * Added Rb tag from Rob. v3->v4: * Changed compatible name from renesas,du-r9a07g044->renesas,r9a07g044-du * started using same compatible for RZ/G2{L,LC} v3: New patch --- .../bindings/display/renesas,rzg2l-du.yaml | 124 ++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml new file mode 100644 index 000000000000..7626043debd8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/G2L Display Unit (DU) + +maintainers: + - Laurent Pinchart + - Biju Das + +description: | + These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L + and RZ/V2L SoCs. + +properties: + compatible: + enum: + - renesas,r9a07g044-du # RZ/G2{L,LC} + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Main clock + - description: Register access clock + - description: Video clock + + clock-names: + items: + - const: aclk + - const: pclk + - const: vclk + + resets: + maxItems: 1 + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + description: | + The connections to the DU output video ports are modeled using the OF + graph bindings specified in Documentation/devicetree/bindings/graph.txt. + The number of ports and their assignment are model-dependent. Each port + shall have a single endpoint. + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/properties/port + unevaluatedProperties: false + + required: + - port@0 + + unevaluatedProperties: false + + renesas,vsps: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + items: + items: + - description: phandle to VSP instance that serves the DU channel + - description: Channel index identifying the LIF instance in that VSP + description: + A list of phandle and channel index tuples to the VSPs that handle the + memory interfaces for the DU channels. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - power-domains + - ports + - renesas,vsps + +additionalProperties: false + +examples: + # RZ/G2L DU + - | + #include + #include + + display@10890000 { + compatible = "renesas,r9a07g044-du"; + reg = <0x10890000 0x10000>; + interrupts = ; + clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G044_LCDC_CLK_D>; + clock-names = "aclk", "pclk", "vclk"; + resets = <&cpg R9A07G044_LCDC_RESET_N>; + power-domains = <&cpg>; + + renesas,vsps = <&vspd0 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + port@1 { + reg = <1>; + endpoint { + }; + }; + }; + }; + +... From patchwork Wed Jul 27 16:07:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 12930529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E209C04A68 for ; Wed, 27 Jul 2022 16:09:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 91B6FADDC5; Wed, 27 Jul 2022 16:09:13 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 07FD311347A for ; Wed, 27 Jul 2022 16:08:41 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.93,195,1654527600"; d="scan'208";a="127555200" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 28 Jul 2022 01:08:41 +0900 Received: from localhost.localdomain (unknown [10.226.92.195]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 171944018A35; Thu, 28 Jul 2022 01:08:37 +0900 (JST) From: Biju Das To: David Airlie , Daniel Vetter , Philipp Zabel Subject: [PATCH v5 10/10] drm: rcar-du: Add RZ/G2L DU Support Date: Wed, 27 Jul 2022 17:07:53 +0100 Message-Id: <20220727160753.1774761-11-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> References: <20220727160753.1774761-1-biju.das.jz@bp.renesas.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Chris Paterson , Geert Uytterhoeven , Prabhakar Mahadev Lad , dri-devel@lists.freedesktop.org, Biju Das , linux-renesas-soc@vger.kernel.org, Kieran Bingham , Laurent Pinchart , Biju Das Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The LCD controller is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). It has DPI/DSI interfaces and supports a maximum resolution of 1080p along with 2 RPFs to support blending of two picture layers and raster operations (ROPs). The DU part is similar to RCar like DU is connected to VSPD, so most of the framework related functionality is based on RCar DU. Signed-off-by: Biju Das --- v4->v5: * Started using RCar DU libs(kms, vsp and encoder) * Started using rcar_du_device, rcar_du_write, rcar_du_crtc, rcar_du_format_info and rcar_du_encoder. v3->v4: * Removed rzg2l_du_group.h and struct rzg2l_du_group * Renamed __rzg2l_du_group_start_stop->rzg2l_du_start_stop * Removed rzg2l_du_group_restart * Updated rzg2l_du_crtc_set_display_timing * Removed mode_valid callback. * Updated rzg2l_du_crtc_create() parameters * Updated compatible * Removed RZG2L_DU_MAX_GROUPS v3: * New patch after removing all the indirections and by adding new DRM driver. --- drivers/gpu/drm/rcar-du/Kconfig | 17 +- drivers/gpu/drm/rcar-du/Makefile | 13 + drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c | 718 +++++++++++++++++++++ drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h | 26 + drivers/gpu/drm/rcar-du/rzg2l_du_drv.c | 206 ++++++ drivers/gpu/drm/rcar-du/rzg2l_du_drv.h | 20 + drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c | 26 + drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h | 19 + drivers/gpu/drm/rcar-du/rzg2l_du_kms.c | 158 +++++ drivers/gpu/drm/rcar-du/rzg2l_du_kms.h | 17 + drivers/gpu/drm/rcar-du/rzg2l_du_regs.h | 67 ++ drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c | 82 +++ drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h | 29 + 13 files changed, 1396 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_drv.h create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_kms.h create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_regs.h create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c create mode 100644 drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig index f8e1341be5f8..c45416197a2b 100644 --- a/drivers/gpu/drm/rcar-du/Kconfig +++ b/drivers/gpu/drm/rcar-du/Kconfig @@ -11,6 +11,18 @@ config DRM_RCAR_DU Choose this option if you have an R-Car chipset. If M is selected the module will be called rcar-du-drm. +config DRM_RZG2L_DU + tristate "DRM Support for RZ/G2L DU" + depends on DRM && OF + depends on ARM || ARM64 + depends on ARCH_RENESAS || COMPILE_TEST + select DRM_KMS_HELPER + select DRM_GEM_CMA_HELPER + select VIDEOMODE_HELPERS + help + Choose this option if you have an RZ/G2L chipset. + If M is selected the module will be called rzg2l-du-drm. + config DRM_RCAR_USE_CMM bool "R-Car DU Color Management Module (CMM) Support" depends on DRM_RCAR_DU @@ -62,8 +74,9 @@ config DRM_RZG2L_MIPI_DSI config DRM_RCAR_VSP bool "R-Car DU VSP Compositor Support" if ARM default y if ARM64 - depends on DRM_RCAR_DU + depends on DRM_RCAR_DU || DRM_RZG2L_DU depends on VIDEO_RENESAS_VSP1=y || (VIDEO_RENESAS_VSP1 && DRM_RCAR_DU=m) + depends on VIDEO_RENESAS_VSP1=y || (VIDEO_RENESAS_VSP1 && DRM_RZG2L_DU=m) help Enable support to expose the R-Car VSP Compositor as KMS planes. @@ -75,7 +88,7 @@ config DRM_RCAR_WRITEBACK config DRM_RCAR_LIB bool default y - depends on DRM_RCAR_DU + depends on DRM_RCAR_DU || DRM_RZG2L_DU config DRM_RCAR_VSP_LIB bool diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile index cee1f69926db..445ff4e7186f 100644 --- a/drivers/gpu/drm/rcar-du/Makefile +++ b/drivers/gpu/drm/rcar-du/Makefile @@ -19,6 +19,19 @@ obj-$(CONFIG_DRM_RCAR_DW_HDMI) += rcar_dw_hdmi.o obj-$(CONFIG_DRM_RCAR_LVDS) += rcar_lvds.o obj-$(CONFIG_DRM_RCAR_MIPI_DSI) += rcar_mipi_dsi.o +rzg2l-du-drm-y := rzg2l_du_crtc.o \ + rzg2l_du_drv.o \ + rzg2l_du_encoder.o \ + rzg2l_du_kms.o \ + +rzg2l-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \ + rcar_du_kms_lib.o + +rzg2l-du-drm-$(CONFIG_DRM_RCAR_VSP) += rzg2l_du_vsp.o +rzg2l-du-drm-$(CONFIG_DRM_RCAR_VSP_LIB) += rcar_du_vsp_lib.o +rzg2l-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o + +obj-$(CONFIG_DRM_RZG2L_DU) += rzg2l-du-drm.o obj-$(CONFIG_DRM_RZG2L_MIPI_DSI) += rzg2l_mipi_dsi.o # 'remote-endpoint' is fixed up at run-time diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c new file mode 100644 index 000000000000..6a2bfcd1f4fa --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.c @@ -0,0 +1,718 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L DU CRTCs + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_crtc.c + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "rzg2l_du_crtc.h" +#include "rzg2l_du_drv.h" +#include "rzg2l_du_encoder.h" +#include "rzg2l_du_kms.h" +#include "rzg2l_du_vsp.h" +#include "rzg2l_du_regs.h" + +/* ----------------------------------------------------------------------------- + * Hardware Setup + */ + +static void rzg2l_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc) +{ + const struct drm_display_mode *mode = &rcrtc->crtc.state->adjusted_mode; + struct rcar_du_device *rcdu = rcrtc->dev; + unsigned long mode_clock = mode->clock * 1000; + u32 ditr0, ditr1, ditr2, ditr3, ditr4, ditr5, pbcr0; + struct clk *parent_clk; + + parent_clk = clk_get_parent(rcrtc->rzg2l_clocks.dclk); + clk_set_rate(parent_clk, mode_clock); + + clk_prepare_enable(rcrtc->rzg2l_clocks.dclk); + + ditr0 = (DU_DITR0_DEMD_HIGH + | ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? DU_DITR0_VSPOL : 0) + | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? DU_DITR0_HSPOL : 0)); + + ditr1 = DU_DITR1_VSA(mode->vsync_end - mode->vsync_start) + | DU_DITR1_VACTIVE(mode->vdisplay); + + ditr2 = DU_DITR2_VBP(mode->vtotal - mode->vsync_end) + | DU_DITR2_VFP(mode->vsync_start - mode->vdisplay); + + ditr3 = DU_DITR3_HSA(mode->hsync_end - mode->hsync_start) + | DU_DITR3_HACTIVE(mode->hdisplay); + + ditr4 = DU_DITR4_HBP(mode->htotal - mode->hsync_end) + | DU_DITR4_HFP(mode->hsync_start - mode->hdisplay); + + ditr5 = DU_DITR5_VSFT(0) | DU_DITR5_HSFT(0); + + pbcr0 = DU_PBCR0_PB_DEP(0x1f); + + rcar_du_write(rcdu, DU_DITR0, ditr0); + rcar_du_write(rcdu, DU_DITR1, ditr1); + rcar_du_write(rcdu, DU_DITR2, ditr2); + rcar_du_write(rcdu, DU_DITR3, ditr3); + rcar_du_write(rcdu, DU_DITR4, ditr4); + rcar_du_write(rcdu, DU_DITR5, ditr5); + rcar_du_write(rcdu, DU_PBCR0, pbcr0); + + /* Enable auto resume when underrun */ + rcar_du_write(rcdu, DU_MCR1, DU_MCR1_PB_AUTOCLR); +} + +/* ----------------------------------------------------------------------------- + * Page Flip + */ + +void rzg2l_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc) +{ + struct drm_pending_vblank_event *event; + struct drm_device *dev = rcrtc->crtc.dev; + unsigned long flags; + + spin_lock_irqsave(&dev->event_lock, flags); + event = rcrtc->event; + rcrtc->event = NULL; + spin_unlock_irqrestore(&dev->event_lock, flags); + + if (!event) + return; + + spin_lock_irqsave(&dev->event_lock, flags); + drm_crtc_send_vblank_event(&rcrtc->crtc, event); + wake_up(&rcrtc->flip_wait); + spin_unlock_irqrestore(&dev->event_lock, flags); + + drm_crtc_vblank_put(&rcrtc->crtc); +} + +static bool rzg2l_du_crtc_page_flip_pending(struct rcar_du_crtc *rcrtc) +{ + struct drm_device *dev = rcrtc->crtc.dev; + unsigned long flags; + bool pending; + + spin_lock_irqsave(&dev->event_lock, flags); + pending = rcrtc->event; + spin_unlock_irqrestore(&dev->event_lock, flags); + + return pending; +} + +static void rzg2l_du_crtc_wait_page_flip(struct rcar_du_crtc *rcrtc) +{ + struct rcar_du_device *rcdu = rcrtc->dev; + + if (wait_event_timeout(rcrtc->flip_wait, + !rzg2l_du_crtc_page_flip_pending(rcrtc), + msecs_to_jiffies(50))) + return; + + dev_warn(rcdu->dev, "page flip timeout\n"); + + rzg2l_du_crtc_finish_page_flip(rcrtc); +} + +/* ----------------------------------------------------------------------------- + * Start/Stop and Suspend/Resume + */ + +static void rzg2l_du_crtc_setup(struct rcar_du_crtc *rcrtc) +{ + /* Configure display timings and output routing */ + rzg2l_du_crtc_set_display_timing(rcrtc); + + /* Enable the VSP compositor. */ + rzg2l_du_vsp_enable(rcrtc); + + /* Turn vertical blanking interrupt reporting on. */ + drm_crtc_vblank_on(&rcrtc->crtc); +} + +static int rzg2l_du_crtc_get(struct rcar_du_crtc *rcrtc) +{ + int ret; + + /* + * Guard against double-get, as the function is called from both the + * .atomic_enable() and .atomic_begin() handlers. + */ + if (rcrtc->initialized) + return 0; + + ret = reset_control_deassert(rcrtc->rstc); + if (ret < 0) + goto error_reset; + + ret = clk_prepare_enable(rcrtc->rzg2l_clocks.aclk); + if (ret < 0) + goto error_reset; + + ret = clk_prepare_enable(rcrtc->rzg2l_clocks.pclk); + if (ret < 0) + goto error_clock; + + rzg2l_du_crtc_setup(rcrtc); + rcrtc->initialized = true; + + return 0; + +error_clock: + clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk); +error_reset: + reset_control_assert(rcrtc->rstc); + return ret; +} + +static void rzg2l_du_crtc_put(struct rcar_du_crtc *rcrtc) +{ + clk_disable_unprepare(rcrtc->rzg2l_clocks.aclk); + clk_disable_unprepare(rcrtc->rzg2l_clocks.pclk); + clk_disable_unprepare(rcrtc->rzg2l_clocks.dclk); + reset_control_assert(rcrtc->rstc); + + rcrtc->initialized = false; +} + +static void rzg2l_du_start_stop(struct rcar_du_crtc *rcrtc, bool start) +{ + struct rcar_du_device *rcdu = rcrtc->dev; + + rcar_du_write(rcdu, DU_MCR0, start ? DU_MCR0_DI_EN : 0); +} + +static void rzg2l_du_crtc_start(struct rcar_du_crtc *rcrtc) +{ + rzg2l_du_start_stop(rcrtc, true); +} + +static void rzg2l_du_crtc_disable_planes(struct rcar_du_crtc *rcrtc) +{ + struct rcar_du_device *rcdu = rcrtc->dev; + struct drm_crtc *crtc = &rcrtc->crtc; + + /* Make sure vblank interrupts are enabled. */ + drm_crtc_vblank_get(crtc); + + if (!wait_event_timeout(rcrtc->vblank_wait, rcrtc->vblank_count == 0, + msecs_to_jiffies(100))) + dev_warn(rcdu->dev, "vertical blanking timeout\n"); + + drm_crtc_vblank_put(crtc); +} + +static void rzg2l_du_crtc_stop(struct rcar_du_crtc *rcrtc) +{ + struct drm_crtc *crtc = &rcrtc->crtc; + + /* + * Disable all planes and wait for the change to take effect. This is + * required as the plane enable registers are updated on vblank, and no + * vblank will occur once the CRTC is stopped. Disabling planes when + * starting the CRTC thus wouldn't be enough as it would start scanning + * out immediately from old frame buffers until the next vblank. + * + * This increases the CRTC stop delay, especially when multiple CRTCs + * are stopped in one operation as we now wait for one vblank per CRTC. + * Whether this can be improved needs to be researched. + */ + rzg2l_du_crtc_disable_planes(rcrtc); + + /* + * Disable vertical blanking interrupt reporting. We first need to wait + * for page flip completion before stopping the CRTC as userspace + * expects page flips to eventually complete. + */ + rzg2l_du_crtc_wait_page_flip(rcrtc); + drm_crtc_vblank_off(crtc); + + /* Disable the VSP compositor. */ + rcar_du_vsp_disable(rcrtc); + + rzg2l_du_start_stop(rcrtc, false); +} + +/* ----------------------------------------------------------------------------- + * CRTC Functions + */ + +int __rzg2l_du_crtc_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state, + const struct rcar_du_format_info **format) +{ + struct drm_device *dev = plane->dev; + struct drm_crtc_state *crtc_state; + int ret; + + if (!state->crtc) { + /* + * The visible field is not reset by the DRM core but only + * updated by drm_plane_helper_check_state(), set it manually. + */ + state->visible = false; + *format = NULL; + return 0; + } + + crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + ret = drm_atomic_helper_check_plane_state(state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + true, true); + if (ret < 0) + return ret; + + if (!state->visible) { + *format = NULL; + return 0; + } + + *format = rcar_du_format_info(state->fb->format->format); + if (*format == NULL) { + dev_dbg(dev->dev, "%s: unsupported format %08x\n", __func__, + state->fb->format->format); + return -EINVAL; + } + + return 0; +} + +static int rzg2l_du_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, + crtc); + struct rcar_du_crtc_state *rstate = to_rcar_crtc_state(crtc_state); + struct drm_encoder *encoder; + + /* Store the routes from the CRTC output to the DU outputs. */ + rstate->outputs = 0; + + drm_for_each_encoder_mask(encoder, crtc->dev, + crtc_state->encoder_mask) { + struct rcar_du_encoder *renc; + + /* Skip the writeback encoder. */ + if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL) + continue; + + renc = to_rcar_encoder(encoder); + rstate->outputs |= BIT(renc->output); + } + + return 0; +} + +static void rzg2l_du_crtc_atomic_enable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + rzg2l_du_crtc_get(rcrtc); + + rzg2l_du_crtc_start(rcrtc); +} + +static void rzg2l_du_crtc_atomic_disable(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + rzg2l_du_crtc_stop(rcrtc); + rzg2l_du_crtc_put(rcrtc); + + spin_lock_irq(&crtc->dev->event_lock); + if (crtc->state->event) { + drm_crtc_send_vblank_event(crtc, crtc->state->event); + crtc->state->event = NULL; + } + spin_unlock_irq(&crtc->dev->event_lock); +} + +static void rzg2l_du_crtc_atomic_begin(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + WARN_ON(!crtc->state->enable); + + /* + * If a mode set is in progress we can be called with the CRTC disabled. + * We thus need to first get and setup the CRTC in order to configure + * planes. We must *not* put the CRTC in .atomic_flush(), as it must be + * kept awake until the .atomic_enable() call that will follow. The get + * operation in .atomic_enable() will in that case be a no-op, and the + * CRTC will be put later in .atomic_disable(). + * + * If a mode set is not in progress the CRTC is enabled, and the + * following get call will be a no-op. There is thus no need to balance + * it in .atomic_flush() either. + */ + rzg2l_du_crtc_get(rcrtc); + + rcar_du_vsp_atomic_begin(rcrtc); +} + +static void rzg2l_du_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + struct drm_device *dev = rcrtc->crtc.dev; + unsigned long flags; + + if (crtc->state->event) { + WARN_ON(drm_crtc_vblank_get(crtc) != 0); + + spin_lock_irqsave(&dev->event_lock, flags); + rcrtc->event = crtc->state->event; + crtc->state->event = NULL; + spin_unlock_irqrestore(&dev->event_lock, flags); + } + + rcar_du_vsp_atomic_flush(rcrtc); +} + +static const struct drm_crtc_helper_funcs crtc_helper_funcs = { + .atomic_check = rzg2l_du_crtc_atomic_check, + .atomic_begin = rzg2l_du_crtc_atomic_begin, + .atomic_flush = rzg2l_du_crtc_atomic_flush, + .atomic_enable = rzg2l_du_crtc_atomic_enable, + .atomic_disable = rzg2l_du_crtc_atomic_disable, +}; + +static void rzg2l_du_crtc_crc_init(struct rcar_du_crtc *rcrtc) +{ + const char **sources; + unsigned int count; + int i = -1; + + /* Reserve 1 for "auto" source. */ + count = rcrtc->vsp->num_planes + 1; + + sources = kmalloc_array(count, sizeof(*sources), GFP_KERNEL); + if (!sources) + return; + + sources[0] = kstrdup("auto", GFP_KERNEL); + if (!sources[0]) + goto error; + + for (i = 0; i < rcrtc->vsp->num_planes; ++i) { + struct drm_plane *plane = &rcrtc->vsp->planes[i].plane; + char name[16]; + + sprintf(name, "plane%u", plane->base.id); + sources[i + 1] = kstrdup(name, GFP_KERNEL); + if (!sources[i + 1]) + goto error; + } + + rcrtc->sources = sources; + rcrtc->sources_count = count; + return; + +error: + while (i >= 0) { + kfree(sources[i]); + i--; + } + kfree(sources); +} + +static void rzg2l_du_crtc_crc_cleanup(struct rcar_du_crtc *rcrtc) +{ + unsigned int i; + + if (!rcrtc->sources) + return; + + for (i = 0; i < rcrtc->sources_count; i++) + kfree(rcrtc->sources[i]); + kfree(rcrtc->sources); + + rcrtc->sources = NULL; + rcrtc->sources_count = 0; +} + +static struct drm_crtc_state * +rzg2l_du_crtc_atomic_duplicate_state(struct drm_crtc *crtc) +{ + struct rcar_du_crtc_state *state; + struct rcar_du_crtc_state *copy; + + if (WARN_ON(!crtc->state)) + return NULL; + + state = to_rcar_crtc_state(crtc->state); + copy = kmemdup(state, sizeof(*state), GFP_KERNEL); + if (!copy) + return NULL; + + __drm_atomic_helper_crtc_duplicate_state(crtc, ©->state); + + return ©->state; +} + +static void rzg2l_du_crtc_atomic_destroy_state(struct drm_crtc *crtc, + struct drm_crtc_state *state) +{ + __drm_atomic_helper_crtc_destroy_state(state); + kfree(to_rcar_crtc_state(state)); +} + +static void rzg2l_du_crtc_cleanup(struct drm_crtc *crtc) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + rzg2l_du_crtc_crc_cleanup(rcrtc); + + return drm_crtc_cleanup(crtc); +} + +static void rzg2l_du_crtc_reset(struct drm_crtc *crtc) +{ + struct rcar_du_crtc_state *state; + + if (crtc->state) { + rzg2l_du_crtc_atomic_destroy_state(crtc, crtc->state); + crtc->state = NULL; + } + + state = kzalloc(sizeof(*state), GFP_KERNEL); + if (!state) + return; + + state->crc.source = VSP1_DU_CRC_NONE; + state->crc.index = 0; + + __drm_atomic_helper_crtc_reset(crtc, &state->state); +} + +static int rzg2l_du_crtc_enable_vblank(struct drm_crtc *crtc) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + rcrtc->vblank_enable = true; + + return 0; +} + +static void rzg2l_du_crtc_disable_vblank(struct drm_crtc *crtc) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + rcrtc->vblank_enable = false; +} + +static int rzg2l_du_crtc_parse_crc_source(struct rcar_du_crtc *rcrtc, + const char *source_name, + enum vsp1_du_crc_source *source) +{ + unsigned int index; + int ret; + + /* + * Parse the source name. Supported values are "plane%u" to compute the + * CRC on an input plane (%u is the plane ID), and "auto" to compute the + * CRC on the composer (VSP) output. + */ + + if (!source_name) { + *source = VSP1_DU_CRC_NONE; + return 0; + } else if (!strcmp(source_name, "auto")) { + *source = VSP1_DU_CRC_OUTPUT; + return 0; + } else if (strstarts(source_name, "plane")) { + unsigned int i; + + *source = VSP1_DU_CRC_PLANE; + + ret = kstrtouint(source_name + strlen("plane"), 10, &index); + if (ret < 0) + return ret; + + for (i = 0; i < rcrtc->vsp->num_planes; ++i) { + if (index == rcrtc->vsp->planes[i].plane.base.id) + return i; + } + } + + return -EINVAL; +} + +static int rzg2l_du_crtc_verify_crc_source(struct drm_crtc *crtc, + const char *source_name, + size_t *values_cnt) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + enum vsp1_du_crc_source source; + + if (rzg2l_du_crtc_parse_crc_source(rcrtc, source_name, &source) < 0) { + DRM_DEBUG_DRIVER("unknown source %s\n", source_name); + return -EINVAL; + } + + *values_cnt = 1; + return 0; +} + +static const char *const * +rzg2l_du_crtc_get_crc_sources(struct drm_crtc *crtc, size_t *count) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + + *count = rcrtc->sources_count; + return rcrtc->sources; +} + +static int rzg2l_du_crtc_set_crc_source(struct drm_crtc *crtc, + const char *source_name) +{ + struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc); + struct drm_modeset_acquire_ctx ctx; + struct drm_crtc_state *crtc_state; + struct drm_atomic_state *state; + enum vsp1_du_crc_source source; + unsigned int index; + int ret; + + ret = rzg2l_du_crtc_parse_crc_source(rcrtc, source_name, &source); + if (ret < 0) + return ret; + + index = ret; + + /* Perform an atomic commit to set the CRC source. */ + drm_modeset_acquire_init(&ctx, 0); + + state = drm_atomic_state_alloc(crtc->dev); + if (!state) { + ret = -ENOMEM; + goto unlock; + } + + state->acquire_ctx = &ctx; + +retry: + crtc_state = drm_atomic_get_crtc_state(state, crtc); + if (!IS_ERR(crtc_state)) { + struct rcar_du_crtc_state *rcrtc_state; + + rcrtc_state = to_rcar_crtc_state(crtc_state); + rcrtc_state->crc.source = source; + rcrtc_state->crc.index = index; + + ret = drm_atomic_commit(state); + } else { + ret = PTR_ERR(crtc_state); + } + + if (ret == -EDEADLK) { + drm_atomic_state_clear(state); + drm_modeset_backoff(&ctx); + goto retry; + } + + drm_atomic_state_put(state); + +unlock: + drm_modeset_drop_locks(&ctx); + drm_modeset_acquire_fini(&ctx); + + return ret; +} + +static const struct drm_crtc_funcs crtc_funcs_rzg2l = { + .reset = rzg2l_du_crtc_reset, + .destroy = rzg2l_du_crtc_cleanup, + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, + .atomic_duplicate_state = rzg2l_du_crtc_atomic_duplicate_state, + .atomic_destroy_state = rzg2l_du_crtc_atomic_destroy_state, + .enable_vblank = rzg2l_du_crtc_enable_vblank, + .disable_vblank = rzg2l_du_crtc_disable_vblank, + .set_crc_source = rzg2l_du_crtc_set_crc_source, + .verify_crc_source = rzg2l_du_crtc_verify_crc_source, + .get_crc_sources = rzg2l_du_crtc_get_crc_sources, +}; + +/* ----------------------------------------------------------------------------- + * Initialization + */ + +int rzg2l_du_crtc_create(struct rcar_du_device *rcdu) +{ + struct rcar_du_crtc *rcrtc = &rcdu->crtcs[0]; + struct drm_crtc *crtc = &rcrtc->crtc; + struct drm_plane *primary; + int ret; + + rcrtc->rstc = devm_reset_control_get_shared(rcdu->dev, NULL); + if (IS_ERR(rcrtc->rstc)) { + dev_err(rcdu->dev, "can't get cpg reset\n"); + return PTR_ERR(rcrtc->rstc); + } + + rcrtc->rzg2l_clocks.aclk = devm_clk_get(rcdu->dev, "aclk"); + if (IS_ERR(rcrtc->rzg2l_clocks.aclk)) { + dev_err(rcdu->dev, "no axi clock for DU\n"); + return PTR_ERR(rcrtc->rzg2l_clocks.aclk); + } + + rcrtc->rzg2l_clocks.pclk = devm_clk_get(rcdu->dev, "pclk"); + if (IS_ERR(rcrtc->rzg2l_clocks.pclk)) { + dev_err(rcdu->dev, "no peripheral clock for DU\n"); + return PTR_ERR(rcrtc->rzg2l_clocks.pclk); + } + + rcrtc->rzg2l_clocks.dclk = devm_clk_get(rcdu->dev, "vclk"); + if (IS_ERR(rcrtc->rzg2l_clocks.dclk)) { + dev_err(rcdu->dev, "no video clock for DU\n"); + return PTR_ERR(rcrtc->rzg2l_clocks.dclk); + } + + init_waitqueue_head(&rcrtc->flip_wait); + init_waitqueue_head(&rcrtc->vblank_wait); + spin_lock_init(&rcrtc->vblank_lock); + + rcrtc->dev = rcdu; + rcrtc->index = 0; + + primary = &rcrtc->vsp->planes[rcrtc->vsp_pipe].plane; + + ret = drm_crtc_init_with_planes(&rcdu->ddev, crtc, primary, NULL, + &crtc_funcs_rzg2l, + NULL); + if (ret < 0) + return ret; + + drm_crtc_helper_add(crtc, &crtc_helper_funcs); + + rzg2l_du_crtc_crc_init(rcrtc); + + return 0; +} diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h new file mode 100644 index 000000000000..3ce55f2d2b3d --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_crtc.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit CRTCs + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_crtc.h + */ + +#ifndef __RZG2L_DU_CRTC_H__ +#define __RZG2L_DU_CRTC_H__ + +#include "rcar_du_crtc.h" + +struct rcar_du_format_info; +struct reset_control; + +int rzg2l_du_crtc_create(struct rcar_du_device *rcdu); + +void rzg2l_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc); + +int __rzg2l_du_crtc_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state, + const struct rcar_du_format_info **format); + +#endif /* __RZG2L_DU_CRTC_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c new file mode 100644 index 000000000000..4cec9ddb64dd --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L DU DRM driver + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_drv.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "rzg2l_du_drv.h" +#include "rzg2l_du_kms.h" + +/* ----------------------------------------------------------------------------- + * Device Information + */ + +static const struct rcar_du_device_info rzg2l_du_r9a07g044_info = { + .gen = 3, + .features = RCAR_DU_FEATURE_CRTC_IRQ + | RCAR_DU_FEATURE_CRTC_CLOCK + | RCAR_DU_FEATURE_VSP1_SOURCE, + .channels_mask = BIT(0), + .routes = { + [RCAR_DU_OUTPUT_DPAD0] = { + .possible_crtcs = BIT(0), + .port = 0, + }, + [RCAR_DU_OUTPUT_DSI0] = { + .possible_crtcs = BIT(0), + .port = 1, + }, + }, + .num_rpf = 2, +}; + +static const struct of_device_id rzg2l_du_of_table[] = { + { .compatible = "renesas,r9a07g044-du", .data = &rzg2l_du_r9a07g044_info }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, rzg2l_du_of_table); + +const char *rzg2l_du_output_name(enum rcar_du_output output) +{ + static const char * const names[] = { + [RCAR_DU_OUTPUT_DPAD0] = "DPAD0", + [RCAR_DU_OUTPUT_DPAD1] = "DPAD1", + [RCAR_DU_OUTPUT_DSI0] = "DSI0", + [RCAR_DU_OUTPUT_DSI1] = "DSI1", + [RCAR_DU_OUTPUT_HDMI0] = "HDMI0", + [RCAR_DU_OUTPUT_HDMI1] = "HDMI1", + [RCAR_DU_OUTPUT_LVDS0] = "LVDS0", + [RCAR_DU_OUTPUT_LVDS1] = "LVDS1", + [RCAR_DU_OUTPUT_TCON] = "TCON", + }; + + if (output != RCAR_DU_OUTPUT_DPAD0 && output != RCAR_DU_OUTPUT_DSI0) + return "NOT SUPPORTED"; + + if (output >= ARRAY_SIZE(names) || !names[output]) + return "UNKNOWN"; + + return names[output]; +} + +/* ----------------------------------------------------------------------------- + * DRM operations + */ + +DEFINE_DRM_GEM_CMA_FOPS(rzg2l_du_fops); + +static const struct drm_driver rzg2l_du_driver = { + .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, + .dumb_create = rcar_du_dumb_create, + .prime_handle_to_fd = drm_gem_prime_handle_to_fd, + .prime_fd_to_handle = drm_gem_prime_fd_to_handle, + .gem_prime_import_sg_table = rcar_du_gem_prime_import_sg_table, + .gem_prime_mmap = drm_gem_prime_mmap, + .fops = &rzg2l_du_fops, + .name = "rzg2l-du", + .desc = "Renesas RZ/G2L DU", + .date = "20220305", + .major = 1, + .minor = 0, +}; + +/* ----------------------------------------------------------------------------- + * Platform driver + */ + +static int rzg2l_du_remove(struct platform_device *pdev) +{ + struct rcar_du_device *rcdu = platform_get_drvdata(pdev); + struct drm_device *ddev = &rcdu->ddev; + + drm_dev_unregister(ddev); + drm_atomic_helper_shutdown(ddev); + + drm_kms_helper_poll_fini(ddev); + + return 0; +} + +static void rzg2l_du_shutdown(struct platform_device *pdev) +{ + struct rcar_du_device *rcdu = platform_get_drvdata(pdev); + + drm_atomic_helper_shutdown(&rcdu->ddev); +} + +static int rzg2l_du_probe(struct platform_device *pdev) +{ + struct rcar_du_device *rcdu; + unsigned int mask; + int ret; + + if (drm_firmware_drivers_only()) + return -ENODEV; + + /* Allocate and initialize the RZ/G2L device structure. */ + rcdu = devm_drm_dev_alloc(&pdev->dev, &rzg2l_du_driver, + struct rcar_du_device, ddev); + if (IS_ERR(rcdu)) + return PTR_ERR(rcdu); + + rcdu->dev = &pdev->dev; + rcdu->info = of_device_get_match_data(rcdu->dev); + + platform_set_drvdata(pdev, rcdu); + + /* I/O resources */ + rcdu->mmio = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(rcdu->mmio)) + return PTR_ERR(rcdu->mmio); + + /* + * When sourcing frames from a VSP the DU doesn't perform any memory + * access so set the DMA coherent mask to 40 bits to accept all buffers. + */ + mask = 40; + ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(mask)); + if (ret) + return ret; + + /* DRM/KMS objects */ + ret = rzg2l_du_modeset_init(rcdu); + if (ret < 0) { + if (ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "failed to initialize DRM/KMS (%d)\n", ret); + goto error; + } + + /* + * Register the DRM device with the core and the connectors with + * sysfs. + */ + ret = drm_dev_register(&rcdu->ddev, 0); + if (ret) + goto error; + + DRM_INFO("Device %s probed\n", dev_name(&pdev->dev)); + + drm_fbdev_generic_setup(&rcdu->ddev, 32); + + return 0; + +error: + drm_kms_helper_poll_fini(&rcdu->ddev); + return ret; +} + +static struct platform_driver rzg2l_du_platform_driver = { + .probe = rzg2l_du_probe, + .remove = rzg2l_du_remove, + .shutdown = rzg2l_du_shutdown, + .driver = { + .name = "rzg2l-du", + .of_match_table = rzg2l_du_of_table, + }, +}; + +module_platform_driver(rzg2l_du_platform_driver); + +MODULE_AUTHOR("Biju Das "); +MODULE_DESCRIPTION("Renesas RZ/G2L DU DRM Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h new file mode 100644 index 000000000000..1f619c2362fe --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_drv.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit DRM driver + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_drv.h + */ + +#ifndef __RZG2L_DU_DRV_H__ +#define __RZG2L_DU_DRV_H__ + +#include "rcar_du_drv.h" + +#include "rzg2l_du_crtc.h" +#include "rzg2l_du_vsp.h" + +const char *rzg2l_du_output_name(enum rcar_du_output output); + +#endif /* __RZG2L_DU_DRV_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c new file mode 100644 index 000000000000..cf4ed49f3db1 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L Display Unit Encoder + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_encoder.c + */ + +#include +#include + +#include "rzg2l_du_drv.h" +#include "rzg2l_du_encoder.h" + +/* ----------------------------------------------------------------------------- + * Encoder + */ + +int rzg2l_du_encoder_init(struct rcar_du_device *rcdu, + enum rcar_du_output output, + struct device_node *enc_node) +{ + return rcar_du_lib_encoder_init(rcdu, output, enc_node, + rzg2l_du_output_name(output)); +} diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h new file mode 100644 index 000000000000..c39a0c7cd12f --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_encoder.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit Encoder + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_encoder.h + */ + +#ifndef __RZG2L_DU_ENCODER_H__ +#define __RZG2L_DU_ENCODER_H__ + +#include "rcar_du_encoder_lib.h" + +int rzg2l_du_encoder_init(struct rcar_du_device *rcdu, + enum rcar_du_output output, + struct device_node *enc_node); + +#endif /* __RZG2L_DU_ENCODER_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c new file mode 100644 index 000000000000..1f68b36abb46 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.c @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L Display Unit Mode Setting + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_kms.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "rzg2l_du_crtc.h" +#include "rzg2l_du_drv.h" +#include "rzg2l_du_encoder.h" +#include "rzg2l_du_kms.h" +#include "rzg2l_du_vsp.h" +#include "rcar_du_writeback.h" + +/* ----------------------------------------------------------------------------- + * Frame buffer + */ + +static struct drm_framebuffer * +rzg2l_du_fb_create(struct drm_device *dev, struct drm_file *file_priv, + const struct drm_mode_fb_cmd2 *mode_cmd) +{ + return rcar_du_lib_fb_create(dev, file_priv, mode_cmd); +} + +/* ----------------------------------------------------------------------------- + * Initialization + */ + +static const struct drm_mode_config_funcs rzg2l_du_mode_config_funcs = { + .fb_create = rzg2l_du_fb_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +int rzg2l_du_modeset_init(struct rcar_du_device *rcdu) +{ + struct drm_device *dev = &rcdu->ddev; + struct drm_encoder *encoder; + unsigned int dpad0_sources; + unsigned int num_encoders; + unsigned int i; + int ret; + + ret = drmm_mode_config_init(dev); + if (ret) + return ret; + + dev->mode_config.min_width = 0; + dev->mode_config.min_height = 0; + dev->mode_config.normalize_zpos = true; + dev->mode_config.funcs = &rzg2l_du_mode_config_funcs; + dev->mode_config.helper_private = rcar_du_lib_mode_cfg_helper_fns(); + + /* + * The RZ/G2L DU uses the VSP1 for memory access, and is limited + * to frame sizes of 1920x1080. + */ + dev->mode_config.max_width = 1920; + dev->mode_config.max_height = 1080; + + rcdu->num_crtcs = hweight8(rcdu->info->channels_mask); + + ret = rcar_du_properties_init(rcdu); + if (ret < 0) + return ret; + + /* + * Initialize vertical blanking interrupts handling. Start with vblank + * disabled for all CRTCs. + */ + ret = drm_vblank_init(dev, rcdu->num_crtcs); + if (ret < 0) + return ret; + + /* Initialize the compositors. */ + ret = rcar_du_lib_vsps_init(rcdu, rzg2l_du_vsp_init); + if (ret < 0) + return ret; + + /* Create the CRTCs. */ + ret = rzg2l_du_crtc_create(rcdu); + if (ret < 0) + return ret; + + /* Initialize the encoders. */ + ret = rcar_du_encoders_init(rcdu, rzg2l_du_output_name, + rzg2l_du_encoder_init); + if (ret < 0) + return ret; + + if (ret == 0) { + dev_err(rcdu->dev, "error: no encoder could be initialized\n"); + return -EINVAL; + } + + num_encoders = ret; + + /* + * Set the possible CRTCs and possible clones. There's always at least + * one way for all encoders to clone each other, set all bits in the + * possible clones field. + */ + list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { + struct rcar_du_encoder *renc = to_rcar_encoder(encoder); + const struct rcar_du_output_routing *route = + &rcdu->info->routes[renc->output]; + + encoder->possible_crtcs = route->possible_crtcs; + encoder->possible_clones = (1 << num_encoders) - 1; + } + + /* Create the writeback connectors. */ + for (i = 0; i < rcdu->num_crtcs; ++i) { + struct rcar_du_crtc *rcrtc = &rcdu->crtcs[i]; + + ret = rcar_du_writeback_init(rcdu, rcrtc); + if (ret < 0) + return ret; + } + + /* + * Initialize the default DPAD0 source to the index of the first DU + * channel that can be connected to DPAD0. The exact value doesn't + * matter as it should be overwritten by mode setting for the RGB + * output, but it is nonetheless required to ensure a valid initial + * hardware configuration on Gen3 where DU0 can't always be connected to + * DPAD0. + */ + dpad0_sources = rcdu->info->routes[RCAR_DU_OUTPUT_DPAD0].possible_crtcs; + rcdu->dpad0_source = ffs(dpad0_sources) - 1; + + drm_mode_config_reset(dev); + + drm_kms_helper_poll_init(dev); + + return 0; +} diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h new file mode 100644 index 000000000000..c56d29953d2b --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_kms.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit Mode Setting + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_kms.h + */ + +#ifndef __RZG2L_DU_KMS_H__ +#define __RZG2L_DU_KMS_H__ + +#include "rcar_du_kms_lib.h" + +int rzg2l_du_modeset_init(struct rcar_du_device *rcdu); + +#endif /* __RZG2L_DU_KMS_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h b/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h new file mode 100644 index 000000000000..07787c12d5b6 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_regs.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * RZ/G2L LCDC Registers Definitions + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + */ + +#ifndef __RZG2L_DU_REGS_H__ +#define __RZG2L_DU_REGS_H__ + +/* ----------------------------------------------------------------------------- + * RZ/G2L Display Registers + */ + +#define DU_MCR0 0x00 +#define DU_MCR0_DPI_OE BIT(0) +#define DU_MCR0_DI_EN BIT(8) +#define DU_MCR0_PB_CLR BIT(16) + +#define DU_MSR0 0x04 +#define DU_MSR0_ST_DI_BSY BIT(8) +#define DU_MSR0_ST_PB_WFULL BIT(16) +#define DU_MSR0_ST_PB_WINIT BIT(18) +#define DU_MSR0_ST_PB_REMPTY BIT(20) +#define DU_MSR0_ST_PB_RUF BIT(21) +#define DU_MSR0_ST_PB_RINIT BIT(22) + +#define DU_MSR1 0x08 + +#define DU_IMR0 0x0c +#define DU_MSR0_IM_PB_RUF BIT(0) + +#define DU_DITR0 0x10 +#define DU_DITR0_DPI_CLKMD BIT(0) +#define DU_DITR0_DEMD_LOW 0x0 +#define DU_DITR0_DEMD_HIGH (BIT(8) | BIT(9)) +#define DU_DITR0_VSPOL BIT(16) +#define DU_DITR0_HSPOL BIT(17) + +#define DU_DITR1 0x14 +#define DU_DITR1_VSA(x) ((x) << 0) +#define DU_DITR1_VACTIVE(x) ((x) << 16) + +#define DU_DITR2 0x18 +#define DU_DITR2_VBP(x) ((x) << 0) +#define DU_DITR2_VFP(x) ((x) << 16) + +#define DU_DITR3 0x1c +#define DU_DITR3_HSA(x) ((x) << 0) +#define DU_DITR3_HACTIVE(x) ((x) << 16) + +#define DU_DITR4 0x20 +#define DU_DITR4_HBP(x) ((x) << 0) +#define DU_DITR4_HFP(x) ((x) << 16) + +#define DU_DITR5 0x24 +#define DU_DITR5_VSFT(x) ((x) << 0) +#define DU_DITR5_HSFT(x) ((x) << 16) + +#define DU_MCR1 0x40 +#define DU_MCR1_PB_AUTOCLR BIT(16) + +#define DU_PBCR0 0x4c +#define DU_PBCR0_PB_DEP(x) ((x) << 0) + +#endif /* __RZG2L_DU_REGS_H__ */ diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c new file mode 100644 index 000000000000..e6da657b77c5 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * RZ/G2L Display Unit VSP-Based Compositor + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_vsp.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "rzg2l_du_drv.h" +#include "rzg2l_du_kms.h" +#include "rzg2l_du_vsp.h" +#include "rcar_du_writeback.h" + +static void rzg2l_du_vsp_complete(void *private, unsigned int status, u32 crc) +{ + struct rcar_du_crtc *crtc = private; + + if (crtc->vblank_enable) + drm_crtc_handle_vblank(&crtc->crtc); + + if (status & VSP1_DU_STATUS_COMPLETE) + rzg2l_du_crtc_finish_page_flip(crtc); + if (status & VSP1_DU_STATUS_WRITEBACK) + rcar_du_writeback_complete(crtc); + + drm_crtc_add_crc_entry(&crtc->crtc, false, 0, &crc); +} + +void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc) +{ + const struct drm_display_mode *mode = &crtc->crtc.state->adjusted_mode; + struct vsp1_du_lif_config cfg = { + .width = mode->hdisplay, + .height = mode->vdisplay, + .interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE, + .callback = rzg2l_du_vsp_complete, + .callback_data = crtc, + }; + + vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg); +} + +static int rzg2l_du_vsp_plane_atomic_check(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, + plane); + struct rcar_du_vsp_plane_state *rstate = to_rcar_vsp_plane_state(new_plane_state); + + return __rzg2l_du_crtc_plane_atomic_check(plane, new_plane_state, &rstate->format); +} + +static const struct drm_plane_helper_funcs rzg2l_du_vsp_plane_helper_funcs = { + .prepare_fb = rcar_du_vsp_plane_prepare_fb, + .cleanup_fb = rcar_du_vsp_plane_cleanup_fb, + .atomic_check = rzg2l_du_vsp_plane_atomic_check, + .atomic_update = rcar_du_vsp_plane_atomic_update, +}; + +int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, + unsigned int crtcs) +{ + return rcar_du_lib_vsp_init(vsp, np, crtcs, + &rzg2l_du_vsp_plane_helper_funcs); +} diff --git a/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h new file mode 100644 index 000000000000..a15a57ed88d8 --- /dev/null +++ b/drivers/gpu/drm/rcar-du/rzg2l_du_vsp.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * RZ/G2L Display Unit VSP-Based Compositor + * + * Copyright (C) 2022 Renesas Electronics Corporation + * + * Based on rcar_du_vsp.h + */ + +#ifndef __RZG2L_DU_VSP_H__ +#define __RZG2L_DU_VSP_H__ + +#include "rcar_du_vsp_lib.h" + +#ifdef CONFIG_DRM_RCAR_VSP +int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np, + unsigned int crtcs); +void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc); +#else +static inline int rzg2l_du_vsp_init(struct rcar_du_vsp *vsp, + struct device_node *np, + unsigned int crtcs) +{ + return -ENXIO; +} +static inline void rzg2l_du_vsp_enable(struct rcar_du_crtc *crtc) { }; +#endif + +#endif /* __RZG2L_DU_VSP_H__ */