From patchwork Thu Jul 28 12:40:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931251 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D189C04A68 for ; Thu, 28 Jul 2022 12:42:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 90A189443C; Thu, 28 Jul 2022 12:41:46 +0000 (UTC) Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7DF208FCE1 for ; Thu, 28 Jul 2022 12:41:06 +0000 (UTC) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 28E69336C1; Thu, 28 Jul 2022 12:41:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1659012065; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=US3SZt+NntNgJdLjO0kcmpbhdUkBaOvAEH3vHlwki1M=; b=lGjRM6uuziSqCEASRYL+a84UL/YvkI9573hhT9mHYZr555593ljSmCNdrKD/gsgzulOtIm yxAAG9guJ1MLtRiQS0QXhX++6JeA+zfRKHSzJJyBGd7uFdI0wHj8R1wE1NHE6vGSNctBGZ ew9w2NpDIq+ILVkn3zx8bzGjrVaAXFQ= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1659012065; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=US3SZt+NntNgJdLjO0kcmpbhdUkBaOvAEH3vHlwki1M=; b=bT74zGWMEGWABWg2F93KfUbm601MYUYivRXAtX3IkHibK8Wq8AMidMvIpYNIHIErKfabxL so2s6ZApefccSKBQ== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 010E813AB4; Thu, 28 Jul 2022 12:41:04 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id iISaOuCD4mJwMAAAMHmgww (envelope-from ); Thu, 28 Jul 2022 12:41:04 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 01/14] drm/mgag200: Split mgag200_modeset_init() Date: Thu, 28 Jul 2022 14:40:50 +0200 Message-Id: <20220728124103.30159-2-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Split mgag200_modeset_init() into smaller helpers to initialize the mode_config structure and the pipeline. This will be helpful for transforming this code into per-model functions. No functional changes. Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_mode.c | 41 ++++++++++++++++++++------ 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index a02f599cb9cf..78fdb3148ed7 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1047,23 +1047,16 @@ static const struct drm_mode_config_funcs mgag200_mode_config_funcs = { .atomic_commit = drm_atomic_helper_commit, }; -int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_available) +static int mgag200_mode_config_init(struct mga_device *mdev, resource_size_t vram_available) { struct drm_device *dev = &mdev->base; - struct mga_i2c_chan *i2c = &mdev->i2c; - struct drm_connector *connector = &mdev->connector; - struct drm_simple_display_pipe *pipe = &mdev->display_pipe; - size_t format_count = ARRAY_SIZE(mgag200_simple_display_pipe_formats); int ret; - mgag200_init_regs(mdev); - mdev->vram_available = vram_available; ret = drmm_mode_config_init(dev); if (ret) { - drm_err(dev, "drmm_mode_config_init() failed, error %d\n", - ret); + drm_err(dev, "drmm_mode_config_init() failed: %d\n", ret); return ret; } @@ -1073,6 +1066,18 @@ int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_available dev->mode_config.fb_base = mdev->vram_res->start; dev->mode_config.funcs = &mgag200_mode_config_funcs; + return 0; +} + +static int mgag200_pipeline_init(struct mga_device *mdev) +{ + struct drm_device *dev = &mdev->base; + struct mga_i2c_chan *i2c = &mdev->i2c; + struct drm_connector *connector = &mdev->connector; + struct drm_simple_display_pipe *pipe = &mdev->display_pipe; + size_t format_count = ARRAY_SIZE(mgag200_simple_display_pipe_formats); + int ret; + ret = mgag200_i2c_init(mdev, i2c); if (ret) { drm_err(dev, "failed to add DDC bus: %d\n", ret); @@ -1113,6 +1118,24 @@ int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_available drm_crtc_enable_color_mgmt(&pipe->crtc, 0, false, MGAG200_LUT_SIZE); + return 0; +} + +int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_available) +{ + struct drm_device *dev = &mdev->base; + int ret; + + mgag200_init_regs(mdev); + + ret = mgag200_mode_config_init(mdev, vram_available); + if (ret) + return ret; + + ret = mgag200_pipeline_init(mdev); + if (ret) + return ret; + drm_mode_config_reset(dev); return 0; From patchwork Thu Jul 28 12:40:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931248 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8263FC04A68 for ; Thu, 28 Jul 2022 12:41:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 672CC18A126; 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a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1659012065; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FQexzAzQ69QJXehNdKzurZvb622XXrk+r9/1mnGn0p0=; b=hSqsuIT8+dWs3H/6nwZV6NwwOJbamfO1o+ysLY4niZ05R9lz1Ib3uYFRDehiSg8X/tz8eQ iYqN7IERDK+tEIBw== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 2C2BE13A7E; Thu, 28 Jul 2022 12:41:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id SJ77CeGD4mJwMAAAMHmgww (envelope-from ); Thu, 28 Jul 2022 12:41:05 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 02/14] drm/mgag200: Move DAC-register setup into model-specific code Date: Thu, 28 Jul 2022 14:40:51 +0200 Message-Id: <20220728124103.30159-3-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Provide an init function for each model's DAC registers. Remove the shared helper. The code for initializing the DAC registers consisted of a large table of default value, plus many exceptions for the various G200 models. Providing a per-model implementation makes if more readable. At some point, some of the initialization should probably move into the modesetting code. v2: * don't duplicate DAC values unnecessarily (Sam, Jocelyn) Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe --- drivers/gpu/drm/mgag200/mgag200_drv.h | 30 +++++++++ drivers/gpu/drm/mgag200/mgag200_g200.c | 25 +++++++ drivers/gpu/drm/mgag200/mgag200_g200eh.c | 26 ++++++++ drivers/gpu/drm/mgag200/mgag200_g200eh3.c | 2 + drivers/gpu/drm/mgag200/mgag200_g200er.c | 25 +++++++ drivers/gpu/drm/mgag200/mgag200_g200ev.c | 27 ++++++++ drivers/gpu/drm/mgag200/mgag200_g200ew3.c | 2 + drivers/gpu/drm/mgag200/mgag200_g200se.c | 30 +++++++++ drivers/gpu/drm/mgag200/mgag200_g200wb.c | 24 +++++++ drivers/gpu/drm/mgag200/mgag200_mode.c | 80 +---------------------- 10 files changed, 192 insertions(+), 79 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index 301c4ab46539..face2904556a 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -123,6 +123,33 @@ #define MGA_MISC_OUT 0x1fc2 #define MGA_MISC_IN 0x1fcc +/* + * TODO: This is a pretty large set of default values for all kinds of + * settings. It should be split and set in the various DRM helpers, + * such as the CRTC reset or atomic_enable helpers. The PLL values + * probably belong to each model's PLL code. + */ +#define MGAG200_DAC_DEFAULT(xvrefctrl, xpixclkctrl, xmiscctrl, xsyspllm, xsysplln, xsyspllp) \ + /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, \ + /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, \ + /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, \ + /* 0x18: */ (xvrefctrl), \ + /* 0x19: */ 0, \ + /* 0x1a: */ (xpixclkctrl), \ + /* 0x1b: */ 0xff, 0xbf, 0x20, \ + /* 0x1e: */ (xmiscctrl), \ + /* 0x1f: */ 0x20, \ + /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ + /* 0x28: */ 0x00, 0x00, 0x00, 0x00, \ + /* 0x2c: */ (xsyspllm), \ + /* 0x2d: */ (xsysplln), \ + /* 0x2e: */ (xsyspllp), \ + /* 0x2f: */ 0x40, \ + /* 0x30: */ 0x00, 0xb0, 0x00, 0xc2, 0x34, 0x14, 0x02, 0x83, \ + /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3a, \ + /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, \ + /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 \ + #define MGAG200_MAX_FB_HEIGHT 4096 #define MGAG200_MAX_FB_WIDTH 4096 @@ -295,10 +322,12 @@ struct mga_device *mgag200_g200_device_create(struct pci_dev *pdev, const struct enum mga_type type); struct mga_device *mgag200_g200se_device_create(struct pci_dev *pdev, const struct drm_driver *drv, enum mga_type type); +void mgag200_g200wb_init_registers(struct mga_device *mdev); struct mga_device *mgag200_g200wb_device_create(struct pci_dev *pdev, const struct drm_driver *drv, enum mga_type type); struct mga_device *mgag200_g200ev_device_create(struct pci_dev *pdev, const struct drm_driver *drv, enum mga_type type); +void mgag200_g200eh_init_registers(struct mga_device *mdev); struct mga_device *mgag200_g200eh_device_create(struct pci_dev *pdev, const struct drm_driver *drv, enum mga_type type); struct mga_device *mgag200_g200eh3_device_create(struct pci_dev *pdev, const struct drm_driver *drv, @@ -310,6 +339,7 @@ struct mga_device *mgag200_g200ew3_device_create(struct pci_dev *pdev, const str /* mgag200_mode.c */ resource_size_t mgag200_device_probe_vram(struct mga_device *mdev); +void mgag200_init_registers(struct mga_device *mdev); int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_fb_available); /* mgag200_i2c.c */ diff --git a/drivers/gpu/drm/mgag200/mgag200_g200.c b/drivers/gpu/drm/mgag200/mgag200_g200.c index 674385921b7f..4a5af20efa36 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200.c @@ -30,6 +30,29 @@ static int mgag200_g200_init_pci_options(struct pci_dev *pdev) return mgag200_init_pci_options(pdev, option, 0x00008000); } +static void mgag200_g200_init_registers(struct mgag200_g200_device *g200) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x00, 0xc9, 0x1f, + 0x04, 0x2d, 0x19) + }; + + struct mga_device *mdev = &g200->base; + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); ++i) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + mgag200_init_registers(mdev); +} + /* * DRM Device */ @@ -191,6 +214,8 @@ struct mga_device *mgag200_g200_device_create(struct pci_dev *pdev, const struct if (ret) return ERR_PTR(ret); + mgag200_g200_init_registers(g200); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200eh.c b/drivers/gpu/drm/mgag200/mgag200_g200eh.c index 1b9a22728744..f2c53fe8d927 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200eh.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200eh.c @@ -6,6 +6,30 @@ #include "mgag200_drv.h" +void mgag200_g200eh_init_registers(struct mga_device *mdev) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x00, 0xc9, + MGA1064_MISC_CTL_VGA8 | MGA1064_MISC_CTL_DAC_RAM_CS, + 0x00, 0x00, 0x00) + }; + + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37)) || + ((i >= 0x44) && (i <= 0x4e))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + mgag200_init_registers(mdev); +} + /* * DRM device */ @@ -40,6 +64,8 @@ struct mga_device *mgag200_g200eh_device_create(struct pci_dev *pdev, const stru if (ret) return ERR_PTR(ret); + mgag200_g200eh_init_registers(mdev); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200eh3.c b/drivers/gpu/drm/mgag200/mgag200_g200eh3.c index 438cda1b14c9..adb9190b62af 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200eh3.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200eh3.c @@ -41,6 +41,8 @@ struct mga_device *mgag200_g200eh3_device_create(struct pci_dev *pdev, if (ret) return ERR_PTR(ret); + mgag200_g200eh_init_registers(mdev); // same as G200EH + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200er.c b/drivers/gpu/drm/mgag200/mgag200_g200er.c index 0790d4e6463d..7bee20459ab6 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200er.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200er.c @@ -6,6 +6,29 @@ #include "mgag200_drv.h" +static void mgag200_g200er_init_registers(struct mga_device *mdev) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x00, 0xc9, 0x1f, 0x00, 0x00, 0x00) + }; + + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + WREG_DAC(0x90, 0); /* G200ER specific */ + + mgag200_init_registers(mdev); +} + /* * DRM device */ @@ -36,6 +59,8 @@ struct mga_device *mgag200_g200er_device_create(struct pci_dev *pdev, const stru if (ret) return ERR_PTR(ret); + mgag200_g200er_init_registers(mdev); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200ev.c b/drivers/gpu/drm/mgag200/mgag200_g200ev.c index 5353422d0eef..0dc5c342e7c4 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200ev.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200ev.c @@ -6,6 +6,31 @@ #include "mgag200_drv.h" +static void mgag200_g200ev_init_registers(struct mga_device *mdev) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x00, + MGA1064_PIX_CLK_CTL_SEL_PLL, + MGA1064_MISC_CTL_VGA8 | MGA1064_MISC_CTL_DAC_RAM_CS, + 0x00, 0x00, 0x00) + }; + + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37)) || + ((i >= 0x44) && (i <= 0x4e))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + mgag200_init_registers(mdev); +} + /* * DRM device */ @@ -40,6 +65,8 @@ struct mga_device *mgag200_g200ev_device_create(struct pci_dev *pdev, const stru if (ret) return ERR_PTR(ret); + mgag200_g200ev_init_registers(mdev); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200ew3.c b/drivers/gpu/drm/mgag200/mgag200_g200ew3.c index 3bfc1324cf78..d86284c0eb4d 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200ew3.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200ew3.c @@ -50,6 +50,8 @@ struct mga_device *mgag200_g200ew3_device_create(struct pci_dev *pdev, if (ret) return ERR_PTR(ret); + mgag200_g200wb_init_registers(mdev); // same as G200WB + vram_available = mgag200_g200ew3_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200se.c b/drivers/gpu/drm/mgag200/mgag200_g200se.c index 0a3e66695e22..bd8fc7a177c2 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200se.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200se.c @@ -28,6 +28,34 @@ static int mgag200_g200se_init_pci_options(struct pci_dev *pdev) return mgag200_init_pci_options(pdev, option, 0x00008000); } +static void mgag200_g200se_init_registers(struct mgag200_g200se_device *g200se) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x03, + MGA1064_PIX_CLK_CTL_SEL_PLL, + MGA1064_MISC_CTL_DAC_EN | + MGA1064_MISC_CTL_VGA8 | + MGA1064_MISC_CTL_DAC_RAM_CS, + 0x00, 0x00, 0x00) + }; + + struct mga_device *mdev = &g200se->base; + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i == 0x2c) || (i == 0x2d) || (i == 0x2e)) || + ((i >= 0x30) && (i <= 0x37))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + mgag200_init_registers(mdev); +} + /* * DRM device */ @@ -120,6 +148,8 @@ struct mga_device *mgag200_g200se_device_create(struct pci_dev *pdev, const stru if (ret) return ERR_PTR(ret); + mgag200_g200se_init_registers(g200se); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_g200wb.c b/drivers/gpu/drm/mgag200/mgag200_g200wb.c index c8450ac8eaec..05f17986b95a 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200wb.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200wb.c @@ -6,6 +6,28 @@ #include "mgag200_drv.h" +void mgag200_g200wb_init_registers(struct mga_device *mdev) +{ + static const u8 dacvalue[] = { + MGAG200_DAC_DEFAULT(0x07, 0xc9, 0x1f, 0x00, 0x00, 0x00) + }; + + size_t i; + + for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { + if ((i <= 0x17) || + (i == 0x1b) || + (i == 0x1c) || + ((i >= 0x1f) && (i <= 0x29)) || + ((i >= 0x30) && (i <= 0x37)) || + ((i >= 0x44) && (i <= 0x4e))) + continue; + WREG_DAC(i, dacvalue[i]); + } + + mgag200_init_registers(mdev); +} + /* * DRM device */ @@ -40,6 +62,8 @@ struct mga_device *mgag200_g200wb_device_create(struct pci_dev *pdev, const stru if (ret) return ERR_PTR(ret); + mgag200_g200wb_init_registers(mdev); + vram_available = mgag200_device_probe_vram(mdev); ret = mgag200_modeset_init(mdev, vram_available); diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 78fdb3148ed7..ba5661cc6686 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -266,86 +266,10 @@ static void mgag200_set_startadd(struct mga_device *mdev, WREG_ECRT(0x00, crtcext0); } -static void mgag200_set_dac_regs(struct mga_device *mdev) -{ - size_t i; - u8 dacvalue[] = { - /* 0x00: */ 0, 0, 0, 0, 0, 0, 0x00, 0, - /* 0x08: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x10: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x18: */ 0x00, 0, 0xC9, 0xFF, 0xBF, 0x20, 0x1F, 0x20, - /* 0x20: */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - /* 0x28: */ 0x00, 0x00, 0x00, 0x00, 0, 0, 0, 0x40, - /* 0x30: */ 0x00, 0xB0, 0x00, 0xC2, 0x34, 0x14, 0x02, 0x83, - /* 0x38: */ 0x00, 0x93, 0x00, 0x77, 0x00, 0x00, 0x00, 0x3A, - /* 0x40: */ 0, 0, 0, 0, 0, 0, 0, 0, - /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 - }; - - switch (mdev->type) { - case G200_PCI: - case G200_AGP: - dacvalue[MGA1064_SYS_PLL_M] = 0x04; - dacvalue[MGA1064_SYS_PLL_N] = 0x2D; - dacvalue[MGA1064_SYS_PLL_P] = 0x19; - break; - case G200_SE_A: - case G200_SE_B: - dacvalue[MGA1064_VREF_CTL] = 0x03; - dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_DAC_EN | - MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - break; - case G200_WB: - case G200_EW3: - dacvalue[MGA1064_VREF_CTL] = 0x07; - break; - case G200_EV: - dacvalue[MGA1064_PIX_CLK_CTL] = MGA1064_PIX_CLK_CTL_SEL_PLL; - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - break; - case G200_EH: - case G200_EH3: - dacvalue[MGA1064_MISC_CTL] = MGA1064_MISC_CTL_VGA8 | - MGA1064_MISC_CTL_DAC_RAM_CS; - break; - case G200_ER: - break; - } - - for (i = 0; i < ARRAY_SIZE(dacvalue); i++) { - if ((i <= 0x17) || - (i == 0x1b) || - (i == 0x1c) || - ((i >= 0x1f) && (i <= 0x29)) || - ((i >= 0x30) && (i <= 0x37))) - continue; - if (IS_G200_SE(mdev) && - ((i == 0x2c) || (i == 0x2d) || (i == 0x2e))) - continue; - if ((mdev->type == G200_EV || - mdev->type == G200_WB || - mdev->type == G200_EH || - mdev->type == G200_EW3 || - mdev->type == G200_EH3) && - (i >= 0x44) && (i <= 0x4e)) - continue; - - WREG_DAC(i, dacvalue[i]); - } - - if (mdev->type == G200_ER) - WREG_DAC(0x90, 0); -} - -static void mgag200_init_regs(struct mga_device *mdev) +void mgag200_init_registers(struct mga_device *mdev) { u8 crtc11, misc; - mgag200_set_dac_regs(mdev); - WREG_SEQ(2, 0x0f); WREG_SEQ(3, 0x00); WREG_SEQ(4, 0x0e); @@ -1126,8 +1050,6 @@ int mgag200_modeset_init(struct mga_device *mdev, resource_size_t vram_available struct drm_device *dev = &mdev->base; int ret; - mgag200_init_regs(mdev); - ret = mgag200_mode_config_init(mdev, vram_available); if (ret) return ret; From patchwork Thu Jul 28 12:40:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C7D2C04A68 for ; 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Thu, 28 Jul 2022 12:41:05 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 03/14] dmr/mgag200: Move ER/EW3 register initialization to per-model code Date: Thu, 28 Jul 2022 14:40:52 +0200 Message-Id: <20220728124103.30159-4-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The register initialization code contains special cases for G200ER and G200EW3 hardware. Move this to per-model code. Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_g200er.c | 2 ++ drivers/gpu/drm/mgag200/mgag200_g200ew3.c | 9 ++++++++- drivers/gpu/drm/mgag200/mgag200_mode.c | 6 ------ 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_g200er.c b/drivers/gpu/drm/mgag200/mgag200_g200er.c index 7bee20459ab6..8ff050906e1c 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200er.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200er.c @@ -27,6 +27,8 @@ static void mgag200_g200er_init_registers(struct mga_device *mdev) WREG_DAC(0x90, 0); /* G200ER specific */ mgag200_init_registers(mdev); + + WREG_ECRT(0x24, 0x5); /* G200ER specific */ } /* diff --git a/drivers/gpu/drm/mgag200/mgag200_g200ew3.c b/drivers/gpu/drm/mgag200/mgag200_g200ew3.c index d86284c0eb4d..a4ecdd3784a3 100644 --- a/drivers/gpu/drm/mgag200/mgag200_g200ew3.c +++ b/drivers/gpu/drm/mgag200/mgag200_g200ew3.c @@ -6,6 +6,13 @@ #include "mgag200_drv.h" +static void mgag200_g200ew3_init_registers(struct mga_device *mdev) +{ + mgag200_g200wb_init_registers(mdev); // same as G200WB + + WREG_ECRT(0x34, 0x5); // G200EW3 specific +} + /* * DRM device */ @@ -50,7 +57,7 @@ struct mga_device *mgag200_g200ew3_device_create(struct pci_dev *pdev, if (ret) return ERR_PTR(ret); - mgag200_g200wb_init_registers(mdev); // same as G200WB + mgag200_g200ew3_init_registers(mdev); vram_available = mgag200_g200ew3_device_probe_vram(mdev); diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index ba5661cc6686..11a88ef9d664 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -287,12 +287,6 @@ void mgag200_init_registers(struct mga_device *mdev) MGAREG_CRTC11_VINTCLR); WREG_CRT(0x11, crtc11); - if (mdev->type == G200_ER) - WREG_ECRT(0x24, 0x5); - - if (mdev->type == G200_EW3) - WREG_ECRT(0x34, 0x5); - misc = RREG8(MGA_MISC_IN); misc |= MGAREG_MISC_IOADSEL; WREG8(MGA_MISC_OUT, misc); From patchwork Thu Jul 28 12:40:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931259 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2474EC04A68 for ; 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Thu, 28 Jul 2022 12:41:05 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 04/14] drm/mgag200: Acquire I/O-register lock in atomic_commit_tail function Date: Thu, 28 Jul 2022 14:40:53 +0200 Message-Id: <20220728124103.30159-5-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hold I/O-register lock in atomic_commit_tail to protect all pipeline updates at once. Protects against concurrent I/O access in get-modes helper. Complex modesetting operations involve mode changes, plane updates and possibly BMC updates. Make all this atomic wrt to reading display modes via EDID. It's not so much an issue with simple-KMS helpers, but will become necessary for using regular atomic helpers. Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_mode.c | 36 ++++++++++++++++---------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 11a88ef9d664..2622fa83942d 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include @@ -702,14 +703,6 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, .y2 = fb->height, }; - /* - * Concurrent operations could possibly trigger a call to - * drm_connector_helper_funcs.get_modes by trying to read the - * display modes. Protect access to I/O registers by acquiring - * the I/O-register lock. - */ - mutex_lock(&mdev->rmmio_lock); - if (mdev->type == G200_WB || mdev->type == G200_EW3) mgag200_g200wb_hold_bmc(mdev); @@ -741,8 +734,6 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, /* Always scanout image at VRAM offset 0 */ mgag200_set_startadd(mdev, (u32)0); mgag200_set_offset(mdev, fb); - - mutex_unlock(&mdev->rmmio_lock); } static void @@ -812,8 +803,6 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, if (!fb) return; - mutex_lock(&mdev->rmmio_lock); - if (crtc->state->color_mgmt_changed && crtc->state->gamma_lut) mgag200_crtc_set_gamma(mdev, fb->format, crtc->state->gamma_lut->data); @@ -824,8 +813,6 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, /* Always scanout image at VRAM offset 0 */ mgag200_set_startadd(mdev, (u32)0); mgag200_set_offset(mdev, fb); - - mutex_unlock(&mdev->rmmio_lock); } static struct drm_crtc_state * @@ -903,6 +890,26 @@ static const uint64_t mgag200_simple_display_pipe_fmtmods[] = { * Mode config */ +static void mgag200_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state) +{ + struct mga_device *mdev = to_mga_device(state->dev); + + /* + * Concurrent operations could possibly trigger a call to + * drm_connector_helper_funcs.get_modes by trying to read the + * display modes. Protect access to I/O registers by acquiring + * the I/O-register lock. + */ + mutex_lock(&mdev->rmmio_lock); + drm_atomic_helper_commit_tail(state); + mutex_unlock(&mdev->rmmio_lock); +} + +static const struct drm_mode_config_helper_funcs mgag200_mode_config_helper_funcs = { + .atomic_commit_tail = mgag200_mode_config_helper_atomic_commit_tail, +}; + + /* Calculates a mode's required memory bandwidth (in KiB/sec). */ static uint32_t mgag200_calculate_mode_bandwidth(const struct drm_display_mode *mode, unsigned int bits_per_pixel) @@ -983,6 +990,7 @@ static int mgag200_mode_config_init(struct mga_device *mdev, resource_size_t vra dev->mode_config.preferred_depth = 24; dev->mode_config.fb_base = mdev->vram_res->start; dev->mode_config.funcs = &mgag200_mode_config_funcs; + dev->mode_config.helper_private = &mgag200_mode_config_helper_funcs; return 0; } From patchwork Thu Jul 28 12:40:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931252 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF4DEC04A68 for ; Thu, 28 Jul 2022 12:42:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A9E72BBC1; Thu, 28 Jul 2022 12:41:46 +0000 (UTC) Received: from smtp-out2.suse.de (smtp-out2.suse.de [IPv6:2001:67c:2178:6::1d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9B19F946F8 for ; Thu, 28 Jul 2022 12:41:07 +0000 (UTC) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id DF647204D1; Thu, 28 Jul 2022 12:41:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1659012065; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7NjJkPtdpT0FSGYTJ3TKbo2mpldzGBk9IcDMz2O4hv8=; b=XIsgCBUtiqiH3uoB104ydgOO4yUwkme6yeAp9S1pmwdVxB3xYKBiblab/EvSbbto7ZIDuM 2d0WMe18wBWMAXlAwCrW+bLSKOjzdl7HHQhY/96Wc5cT0+ZAmxxUVAK5kxKVcb59CXLOmQ AFh7n3Jw5u1MFX9ED/wyCvjxO26Vrr4= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1659012065; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7NjJkPtdpT0FSGYTJ3TKbo2mpldzGBk9IcDMz2O4hv8=; b=r6hVqFn8vRUyGJkojDz0GY6oHSQOJUKSV52QIkWeS72HJ7E6xsxm8uLFYVBElnJe8rawHe tzBqFh0cbmOHvoBw== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id B7DD313AB4; Thu, 28 Jul 2022 12:41:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id CJn7K+GD4mJwMAAAMHmgww (envelope-from ); Thu, 28 Jul 2022 12:41:05 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 05/14] drm/mgag200: Store primary plane's color format in CRTC state Date: Thu, 28 Jul 2022 14:40:54 +0200 Message-Id: <20220728124103.30159-6-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Store the primary plane's color format in the CRTC state and use it for programming the CRTC's gamma LUTs. Gamma tables (i.e., color management) are provided by the CRTC, but depend in the primary plane's color format. Store the format in the CRTC state and use it. This has not been an issue with simple-KMS helpers, which mix-up plane and CRTC state to some extent. For using regular atomic helpers, it's necessary to distinguish between the two. Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_drv.h | 3 +++ drivers/gpu/drm/mgag200/mgag200_mode.c | 22 ++++++++++++---------- 2 files changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index face2904556a..bf6a01ff9719 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -187,6 +187,9 @@ struct mgag200_pll { struct mgag200_crtc_state { struct drm_crtc_state base; + /* Primary-plane format; required for modesetting and color mgmt. */ + const struct drm_format_info *format; + struct mgag200_pll_values pixpllc; }; diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 2622fa83942d..93e55f820eb5 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -418,11 +418,9 @@ static void mgag200_set_offset(struct mga_device *mdev, WREG_ECRT(0x00, crtcext0); } -static void mgag200_set_format_regs(struct mga_device *mdev, - const struct drm_framebuffer *fb) +static void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format) { struct drm_device *dev = &mdev->base; - const struct drm_format_info *format = fb->format; unsigned int bpp, bppshift, scale; u8 crtcext3, xmulctrl; @@ -501,7 +499,7 @@ static void mgag200_g200er_reset_tagfifo(struct mga_device *mdev) static void mgag200_g200se_set_hiprilvl(struct mga_device *mdev, const struct drm_display_mode *mode, - const struct drm_framebuffer *fb) + const struct drm_format_info *format) { struct mgag200_g200se_device *g200se = to_mgag200_g200se_device(&mdev->base); unsigned int hiprilvl; @@ -513,9 +511,9 @@ static void mgag200_g200se_set_hiprilvl(struct mga_device *mdev, unsigned int bpp; unsigned long mb; - if (fb->format->cpp[0] * 8 > 16) + if (format->cpp[0] * 8 > 16) bpp = 32; - else if (fb->format->cpp[0] * 8 > 8) + else if (format->cpp[0] * 8 > 8) bpp = 16; else bpp = 8; @@ -695,6 +693,7 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state); struct drm_framebuffer *fb = plane_state->fb; + const struct drm_format_info *format = mgag200_crtc_state->format; struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); struct drm_rect fullscreen = { .x1 = 0, @@ -706,7 +705,7 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, if (mdev->type == G200_WB || mdev->type == G200_EW3) mgag200_g200wb_hold_bmc(mdev); - mgag200_set_format_regs(mdev, fb); + mgag200_set_format_regs(mdev, format); mgag200_set_mode_regs(mdev, adjusted_mode); pixpll->funcs->update(pixpll, &mgag200_crtc_state->pixpllc); @@ -715,7 +714,7 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, mgag200_g200er_reset_tagfifo(mdev); if (IS_G200_SE(mdev)) - mgag200_g200se_set_hiprilvl(mdev, adjusted_mode, fb); + mgag200_g200se_set_hiprilvl(mdev, adjusted_mode, format); else if (mdev->type == G200_EV) mgag200_g200ev_set_hiprilvl(mdev); @@ -723,9 +722,9 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, mgag200_g200wb_release_bmc(mdev); if (crtc_state->gamma_lut) - mgag200_crtc_set_gamma(mdev, fb->format, crtc_state->gamma_lut->data); + mgag200_crtc_set_gamma(mdev, format, crtc_state->gamma_lut->data); else - mgag200_crtc_set_gamma_linear(mdev, fb->format); + mgag200_crtc_set_gamma_linear(mdev, format); mgag200_enable_display(mdev); @@ -768,6 +767,8 @@ mgag200_simple_display_pipe_check(struct drm_simple_display_pipe *pipe, if (!fb || (fb->format != new_fb->format)) crtc_state->mode_changed = true; /* update PLL settings */ + mgag200_crtc_state->format = new_fb->format; + if (crtc_state->mode_changed) { ret = pixpll->funcs->compute(pixpll, crtc_state->mode.clock, &mgag200_crtc_state->pixpllc); @@ -831,6 +832,7 @@ mgag200_simple_display_pipe_duplicate_crtc_state(struct drm_simple_display_pipe return NULL; __drm_atomic_helper_crtc_duplicate_state(crtc, &new_mgag200_crtc_state->base); + new_mgag200_crtc_state->format = mgag200_crtc_state->format; memcpy(&new_mgag200_crtc_state->pixpllc, &mgag200_crtc_state->pixpllc, sizeof(new_mgag200_crtc_state->pixpllc)); From patchwork Thu Jul 28 12:40:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C5A19C04A68 for ; Thu, 28 Jul 2022 12:42:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C68A094851; Thu, 28 Jul 2022 12:41:44 +0000 (UTC) Received: from smtp-out2.suse.de (smtp-out2.suse.de [IPv6:2001:67c:2178:6::1d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 98D0090A13 for ; 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h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WxQAR/HAiHCBMuUUpTDWZvrURD+vRh0ReB03g/0ahaM=; b=zbRCNIfLd/OR4qC3Sy1qNImGKqzQCngj9psOcw6lUlCKvEURWsHH+NyCV3CVKPWpBwxIN/ mxlIG7696wTA8iBQ== Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id E1EFC13A7E; Thu, 28 Jul 2022 12:41:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id eFZLNuGD4mJwMAAAMHmgww (envelope-from ); Thu, 28 Jul 2022 12:41:05 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 06/14] drm/mgag200: Reorganize before dropping simple-KMS helpers Date: Thu, 28 Jul 2022 14:40:55 +0200 Message-Id: <20220728124103.30159-7-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move around some modesetting code before dropping simple-KMS helpers. Makes the next patch more readable. No functional changes. Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_mode.c | 95 +++++++++++++------------- 1 file changed, 47 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index 93e55f820eb5..67795135d4dd 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -603,42 +603,31 @@ static void mgag200_disable_display(struct mga_device *mdev) WREG_ECRT(0x01, crtcext1); } -/* - * Connector - */ - -static int mgag200_vga_connector_helper_get_modes(struct drm_connector *connector) +static void mgag200_handle_damage(struct mga_device *mdev, const struct iosys_map *vmap, + struct drm_framebuffer *fb, const struct drm_rect *clip) { - struct mga_device *mdev = to_mga_device(connector->dev); - int ret; - - /* - * Protect access to I/O registers from concurrent modesetting - * by acquiring the I/O-register lock. - */ - mutex_lock(&mdev->rmmio_lock); - ret = drm_connector_helper_get_modes_from_ddc(connector); - mutex_unlock(&mdev->rmmio_lock); + void __iomem *dst = mdev->vram; + void *vaddr = vmap[0].vaddr; /* TODO: Use mapping abstraction properly */ - return ret; + dst += drm_fb_clip_offset(fb->pitches[0], fb->format, clip); + drm_fb_memcpy_toio(dst, fb->pitches[0], vaddr, fb, clip); } -static const struct drm_connector_helper_funcs mga_vga_connector_helper_funcs = { - .get_modes = mgag200_vga_connector_helper_get_modes, -}; - -static const struct drm_connector_funcs mga_vga_connector_funcs = { - .reset = drm_atomic_helper_connector_reset, - .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = drm_connector_cleanup, - .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, - .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -}; - /* * Simple Display Pipe */ +static const uint32_t mgag200_simple_display_pipe_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_RGB565, + DRM_FORMAT_RGB888, +}; + +static const uint64_t mgag200_simple_display_pipe_fmtmods[] = { + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_INVALID +}; + static enum drm_mode_status mgag200_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe, const struct drm_display_mode *mode) @@ -670,17 +659,6 @@ mgag200_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe, return MODE_OK; } -static void -mgag200_handle_damage(struct mga_device *mdev, struct drm_framebuffer *fb, - struct drm_rect *clip, const struct iosys_map *map) -{ - void __iomem *dst = mdev->vram; - void *vmap = map->vaddr; /* TODO: Use mapping abstraction properly */ - - dst += drm_fb_clip_offset(fb->pitches[0], fb->format, clip); - drm_fb_memcpy_toio(dst, fb->pitches[0], vmap, fb, clip); -} - static void mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, struct drm_crtc_state *crtc_state, @@ -728,7 +706,7 @@ mgag200_simple_display_pipe_enable(struct drm_simple_display_pipe *pipe, mgag200_enable_display(mdev); - mgag200_handle_damage(mdev, fb, &fullscreen, &shadow_plane_state->data[0]); + mgag200_handle_damage(mdev, shadow_plane_state->data, fb, &fullscreen); /* Always scanout image at VRAM offset 0 */ mgag200_set_startadd(mdev, (u32)0); @@ -809,7 +787,7 @@ mgag200_simple_display_pipe_update(struct drm_simple_display_pipe *pipe, drm_atomic_helper_damage_iter_init(&iter, old_state, state); drm_atomic_for_each_plane_damage(&iter, &damage) { - mgag200_handle_damage(mdev, fb, &damage, &shadow_plane_state->data[0]); + mgag200_handle_damage(mdev, shadow_plane_state->data, fb, &damage); } /* Always scanout image at VRAM offset 0 */ mgag200_set_startadd(mdev, (u32)0); @@ -877,15 +855,36 @@ mgag200_simple_display_pipe_funcs = { DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS, }; -static const uint32_t mgag200_simple_display_pipe_formats[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_RGB565, - DRM_FORMAT_RGB888, +/* + * Connector + */ + +static int mgag200_vga_connector_helper_get_modes(struct drm_connector *connector) +{ + struct mga_device *mdev = to_mga_device(connector->dev); + int ret; + + /* + * Protect access to I/O registers from concurrent modesetting + * by acquiring the I/O-register lock. + */ + mutex_lock(&mdev->rmmio_lock); + ret = drm_connector_helper_get_modes_from_ddc(connector); + mutex_unlock(&mdev->rmmio_lock); + + return ret; +} + +static const struct drm_connector_helper_funcs mga_vga_connector_helper_funcs = { + .get_modes = mgag200_vga_connector_helper_get_modes, }; -static const uint64_t mgag200_simple_display_pipe_fmtmods[] = { - DRM_FORMAT_MOD_LINEAR, - DRM_FORMAT_MOD_INVALID +static const struct drm_connector_funcs mga_vga_connector_funcs = { + .reset = drm_atomic_helper_connector_reset, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = drm_connector_cleanup, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, }; /* From patchwork Thu Jul 28 12:40:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 12931255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0BD3C04A68 for ; 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Thu, 28 Jul 2022 12:41:06 +0000 From: Thomas Zimmermann To: jfalempe@redhat.com, sam@ravnborg.org, airlied@redhat.com, airlied@linux.ie, daniel@ffwll.ch Subject: [PATCH v3 07/14] drm/mgag200: Replace simple-KMS with regular atomic helpers Date: Thu, 28 Jul 2022 14:40:56 +0200 Message-Id: <20220728124103.30159-8-tzimmermann@suse.de> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220728124103.30159-1-tzimmermann@suse.de> References: <20220728124103.30159-1-tzimmermann@suse.de> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Zimmermann , dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Drop simple-KMS in favor of regular atomic helpers. Makes the code more modular and hence better to adapt to per-model requirements. The simple-KMS helpers provide few extra features, so the patch is mostly about open-coding what simple-KMS does. The simple-KMS helpers do mix up plane and CRTC state. Changing to regular atomic helpers requires to split some of the simple-pipe functions into per-plane and per-CRTC code No functional changes. v3: * always run drm_atomic_helper_check_plane_state() * clean up style Signed-off-by: Thomas Zimmermann Reviewed-by: Jocelyn Falempe Tested-by: Jocelyn Falempe Acked-by: Sam Ravnborg --- drivers/gpu/drm/mgag200/mgag200_drv.h | 8 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 382 +++++++++++++++---------- 2 files changed, 233 insertions(+), 157 deletions(-) diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h index bf6a01ff9719..b0433985ec0d 100644 --- a/drivers/gpu/drm/mgag200/mgag200_drv.h +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h @@ -15,11 +15,13 @@ #include