From patchwork Tue Aug 2 17:34:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauri Sandberg X-Patchwork-Id: 12934930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3D79C3F6B0 for ; Tue, 2 Aug 2022 17:37:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Subject:MIME-Version:References: In-Reply-To:Message-Id:Date:Cc:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=1+1mRpZjLXl3E7SbtjXTRbvCK0Pig6GlHwAXQu+OqiE=; b=BmBfUevCYzq0MtI4c6IidJrRr5 SFbQMH4jYaQ+sO31nrfLhkIUrKNOxe6oAPHaedfqNQdVblZ9NUXy1WQgckYxdKx48u0poc/NppfBL 9t/xraeUCnlYTIozH8Chx9k1fot1+y79t3mRYxLXIjxv6ufWCGOe22Ab0kMYbODZDCgfpM0YhAZYB dpLIHmeolkF2PF5jjTbdMowBAI78ns9srSMcszQINo4S5ZcXTTGVSzBSJAfUFPwnO74EDcQf9GS7J A3wyGifTVg/eE/QtulMbODRKHdjPP9gAXwX5k5wk2+1txmDIbycaYALpAvhrQNTRr1L/AVzfmSsy0 4O/6rqfQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIvpE-00GD3T-H7; Tue, 02 Aug 2022 17:37:00 +0000 Received: from mailserv1.kapsi.fi ([2001:67c:1be8::25:1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oIvp0-00GCrp-LR for linux-arm-kernel@lists.infradead.org; Tue, 02 Aug 2022 17:36:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=ext.kapsi.fi; s=20161220; h=Subject:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=fvM/g7yEmol5LB1hRTfh0dP3z5l+1DidjnEGxSNhVDA=; b=Udv7QKnmiAS3H9k5XfcUw89ka8 6GvIX2sUR1RGU8wqdC+UaMMxTLcVcVkQtBso1YnE9zAOYcuDQmHRcNsp9yehY11VzgvT6Hjvmvpg8 yHDSlM/g45n3GcV2Q31cv78fiILx2Dgv5itMZOZVDF1U32SgIXxpbfJ1ozxsjoqSbvhLPUrIZVYN5 vXxEK1WM6YKHACA5j+jzkVU5dZ8I4nmTsNGGvz0bAHI0IEXP+ky7XoLa8iM2wNuwUDNyaZGTGnyAa hIlTLeIsQY/ILk7VtXPoTKeymCavyeckp9Oawa4E+4+8Xqg+biopdLXeOlkSYxT4TQ7m0CxEwL25o KYpc7mkQ==; Received: from a82-197-11-249.mpynet.fi ([82.197.11.249]:55983 helo=localhost) by mailserv1.kapsi.fi with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oIvop-008Ymy-4O; Tue, 02 Aug 2022 20:36:36 +0300 Received: by localhost (sSMTP sendmail emulation); Tue, 02 Aug 2022 20:36:33 +0300 From: Mauri Sandberg To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: bhelgaas@google.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch, sebastian.hesselbarth@gmail.com, gregory.clement@bootlin.com, linux@armlinux.org.uk, lpieralisi@kernel.org, kw@linux.com, thomas.petazzoni@bootlin.com, pali@kernel.org, Mauri Sandberg , Rob Herring Date: Tue, 2 Aug 2022 20:34:22 +0300 Message-Id: <20220802173423.47230-2-maukka@ext.kapsi.fi> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220802173423.47230-1-maukka@ext.kapsi.fi> References: <20220718202843.6766-1-maukka@ext.kapsi.fi> <20220802173423.47230-1-maukka@ext.kapsi.fi> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 82.197.11.249 X-SA-Exim-Mail-From: maukka@ext.kapsi.fi Subject: [PATCH v2 1/2] dt-bindings: PCI: mvebu: Add orion5x compatible X-SA-Exim-Version: 4.2.1 (built Sat, 13 Feb 2021 17:57:42 +0000) X-SA-Exim-Scanned: Yes (on mailserv1.kapsi.fi) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220802_103646_776721_FC462C74 X-CRM114-Status: UNSURE ( 9.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a compatible string to bindings to indicate that orion5x PCIe is supported too. Signed-off-by: Mauri Sandberg Acked-by: Rob Herring --- v1->v2: - added ack by Rob --- Documentation/devicetree/bindings/pci/mvebu-pci.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt index 6d022a9d36ee..ced5d030fe55 100644 --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt @@ -7,6 +7,7 @@ Mandatory properties: marvell,armada-xp-pcie marvell,dove-pcie marvell,kirkwood-pcie + marvell,orion5x-pcie - #address-cells, set to <3> - #size-cells, set to <2> - #interrupt-cells, set to <1> From patchwork Tue Aug 2 17:34:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mauri Sandberg X-Patchwork-Id: 12934931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B4C6DC00140 for ; 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Received: from a82-197-11-249.mpynet.fi ([82.197.11.249]:55984 helo=localhost) by mailserv1.kapsi.fi with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oIvoq-008Yn2-WB; Tue, 02 Aug 2022 20:36:38 +0300 Received: by localhost (sSMTP sendmail emulation); Tue, 02 Aug 2022 20:36:35 +0300 From: Mauri Sandberg To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: bhelgaas@google.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, andrew@lunn.ch, sebastian.hesselbarth@gmail.com, gregory.clement@bootlin.com, linux@armlinux.org.uk, lpieralisi@kernel.org, kw@linux.com, thomas.petazzoni@bootlin.com, pali@kernel.org, Mauri Sandberg Date: Tue, 2 Aug 2022 20:34:23 +0300 Message-Id: <20220802173423.47230-3-maukka@ext.kapsi.fi> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220802173423.47230-1-maukka@ext.kapsi.fi> References: <20220718202843.6766-1-maukka@ext.kapsi.fi> <20220802173423.47230-1-maukka@ext.kapsi.fi> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 82.197.11.249 X-SA-Exim-Mail-From: maukka@ext.kapsi.fi Subject: [PATCH v2 2/2] PCI: mvebu: add support for orion5x X-SA-Exim-Version: 4.2.1 (built Sat, 13 Feb 2021 17:57:42 +0000) X-SA-Exim-Scanned: Yes (on mailserv1.kapsi.fi) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220802_103647_070704_C9D3ECFE X-CRM114-Status: GOOD ( 23.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for orion5x PCIe controller. There is Orion-specific errata that config space via CF8/CFC registers is broken. Workaround documented in errata documented (linked from above documentation) does not work when DMA is used and instead other undocumented workaround is needed which maps config space to memory (and therefore avoids usage of broken CF8/CFC memory mapped registers). Signed-off-by: Mauri Sandberg Cc: Pali Rohár --- v1 -> v2: - do pcie related mvebu windows and remaps in pcie_setup() --- arch/arm/mach-orion5x/common.c | 13 ------- arch/arm/mach-orion5x/pci.c | 14 +++++++ drivers/pci/controller/Kconfig | 2 +- drivers/pci/controller/pci-mvebu.c | 59 ++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 7bcb41137bbf..9d8be5ce1266 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -231,19 +231,6 @@ void __init orion5x_init_early(void) void orion5x_setup_wins(void) { - /* - * The PCIe windows will no longer be statically allocated - * here once Orion5x is migrated to the pci-mvebu driver. - */ - mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET, - ORION_MBUS_PCIE_IO_ATTR, - ORION5X_PCIE_IO_PHYS_BASE, - ORION5X_PCIE_IO_SIZE, - ORION5X_PCIE_IO_BUS_BASE); - mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET, - ORION_MBUS_PCIE_MEM_ATTR, - ORION5X_PCIE_MEM_PHYS_BASE, - ORION5X_PCIE_MEM_SIZE); mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCI_IO_TARGET, ORION_MBUS_PCI_IO_ATTR, ORION5X_PCI_IO_PHYS_BASE, diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index 9574c73f3c03..7c4e2f355cc7 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -150,6 +150,20 @@ static int __init pcie_setup(struct pci_sys_data *sys) */ orion_pcie_setup(PCIE_BASE); + /* + * The PCIe windows will no longer be statically allocated + * here once Orion5x is migrated to the pci-mvebu driver. + */ + mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET, + ORION_MBUS_PCIE_IO_ATTR, + ORION5X_PCIE_IO_PHYS_BASE, + ORION5X_PCIE_IO_SIZE, + ORION5X_PCIE_IO_BUS_BASE); + mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET, + ORION_MBUS_PCIE_MEM_ATTR, + ORION5X_PCIE_MEM_PHYS_BASE, + ORION5X_PCIE_MEM_SIZE); + /* * Check whether to apply Orion-1/Orion-NAS PCIe config * read transaction workaround. diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index b8d96d38064d..a249375837f0 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -5,7 +5,7 @@ menu "PCI controller drivers" config PCI_MVEBU tristate "Marvell EBU PCIe controller" - depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST + depends on ARCH_MVEBU || ARCH_DOVE || ARCH_ORION5X || COMPILE_TEST depends on MVEBU_MBUS depends on ARM depends on OF diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index c1ffdb06c971..1d3052aa7e49 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -1487,6 +1487,54 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie) return 0; } +static int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val) +{ + *val = readl(wa_base + (PCIE_CONF_BUS(bus->number) | + PCIE_CONF_DEV(PCI_SLOT(devfn)) | + PCIE_CONF_FUNC(PCI_FUNC(devfn)) | + PCIE_CONF_REG(where))); + + if (size == 1) + *val = (*val >> (8 * (where & 3))) & 0xff; + else if (size == 2) + *val = (*val >> (8 * (where & 3))) & 0xffff; + + return PCIBIOS_SUCCESSFUL; +} + +/* Relevant only for Orion-1/Orion-NAS */ +#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 +#define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) +#define ORION5X_PCIE_WA_SIZE SZ_16M +#define ORION_MBUS_PCIE_WA_TARGET 0x04 +#define ORION_MBUS_PCIE_WA_ATTR 0x79 + +static int mvebu_pcie_child_rd_conf_wa(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) +{ + struct mvebu_pcie *pcie = bus->sysdata; + struct mvebu_pcie_port *port; + + port = mvebu_pcie_find_port(pcie, bus, devfn); + if (!port) + return PCIBIOS_DEVICE_NOT_FOUND; + + if (!mvebu_pcie_link_up(port)) + return PCIBIOS_DEVICE_NOT_FOUND; + + /* + * We only support access to the non-extended configuration + * space when using the WA access method (or we would have to + * sacrifice 256M of CPU virtual address space.) + */ + if (where >= 0x100) { + *val = 0xffffffff; + return PCIBIOS_DEVICE_NOT_FOUND; + } + + return orion_pcie_rd_conf_wa(ORION5X_PCIE_WA_VIRT_BASE, bus, devfn, where, size, val); +} + static int mvebu_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1663,6 +1711,16 @@ static int mvebu_pcie_probe(struct platform_device *pdev) bridge->align_resource = mvebu_pcie_align_resource; bridge->map_irq = mvebu_pcie_map_irq; + if (of_machine_is_compatible("marvell,orion5x-88f5181")) { + dev_info(dev, "Applying Orion-1/Orion-NAS PCIe config read transaction workaround\n"); + + mvebu_pcie_child_ops.read = mvebu_pcie_child_rd_conf_wa; + mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_WA_TARGET, + ORION_MBUS_PCIE_WA_ATTR, + ORION5X_PCIE_WA_PHYS_BASE, + ORION5X_PCIE_WA_SIZE); + } + return pci_host_probe(bridge); } @@ -1733,6 +1791,7 @@ static const struct of_device_id mvebu_pcie_of_match_table[] = { { .compatible = "marvell,armada-370-pcie", }, { .compatible = "marvell,dove-pcie", }, { .compatible = "marvell,kirkwood-pcie", }, + { .compatible = "marvell,orion5x-pcie", }, {}, };