From patchwork Thu Aug 11 04:59:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 12941155 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86411C19F2D for ; Thu, 11 Aug 2022 05:02:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BFC63A133F; Thu, 11 Aug 2022 05:01:27 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8BB7EA11A3 for ; Thu, 11 Aug 2022 05:00:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660194028; x=1691730028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZHyEiSl0OKvhb4AgR6NaatiVZHh6ENhQctE+g5bS7Xc=; b=YnW7MRjXBSCwaJZxfGq5qankgh1gsd9kaQ79LkfRdnqPg9WgjmO6V0bB xqPXnu9em78B6RctOdBAqjQyxql70QcdQQljluWbV2If+8SpEgfURaq9W cwSq//fEUN1LRWwMTjtgFNMW1WBW0NjGYdG8Nq/NCJwhFDF46qYwP1/IF vravTew5np/i4ZjP8JDc4pFyykjdngAmddPBWzS48BE9PdMma0K75YF2U PSL3AN8IdBeFEXRust/tvqaZXp8XBFE7lf+CKH08Fqbh2jei54hkLXS7X 9uhRaYnEKfpV17h7LNicTBBrd/u0yffaGDOVW7QJ+IIX8ZKPZ/KKQ1oww Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10435"; a="291257746" X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="291257746" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:20 -0700 X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="673553157" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:18 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Aug 2022 10:29:42 +0530 Message-Id: <20220811045945.2113431-2-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> References: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/4] drm/edid: Fix minimum bpc supported with DSC1.2 for HDMI sink X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maarten.lankhorst@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" HF-VSDB/SCDB has bits to advertise support for 16, 12 and 10 bpc. If none of the bits are set, the minimum bpc supported with DSC is 8. This patch corrects the min bpc supported to be 8, instead of 0. Fixes: 76ee7b905678 ("drm/edid: Parse DSC1.2 cap fields from HFVSDB block") Cc: Ankit Nautiyal Cc: Uma Shankar Cc: Jani Nikula Cc: Maarten Lankhorst Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_edid.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index bbc25e3b7220..cdf10279e1bd 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -5770,7 +5770,8 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, else if (hf_scds[11] & DRM_EDID_DSC_10BPC) hdmi_dsc->bpc_supported = 10; else - hdmi_dsc->bpc_supported = 0; + /* Supports min 8 BPC if DSC1.2 is supported*/ + hdmi_dsc->bpc_supported = 8; dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4; drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, From patchwork Thu Aug 11 04:59:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 12941154 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E85E2C19F2D for ; Thu, 11 Aug 2022 05:01:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4DF662BE7E; Thu, 11 Aug 2022 05:01:12 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id E0DB893D62 for ; Thu, 11 Aug 2022 05:00:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660194028; x=1691730028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oOi+mk6H8Y1FlCwv93wecQNG/a7hue8NDHBfaNjaCjg=; b=C3/khKycu/By2PM9sMfPyvALfUWqfMjls1fQv/5Cteemype1GDWqFQ3o Av9apbsEWoD5EVlYPbAlm9Oxx/qaAHPi6y0frtDCil5nPE5Tby1NqKkkl Cfm2v8EFD7Dn3AVVBzqCDU+H+8opCvqGVeFK3jOPbR1Rvk9fMUBSQAFYB 6Fk8myizQ92Cj9MtoZVZzO/oEz1hyZeeKrGQ4wZ217WJxeQeO0++FAXjx G3yd/S+fOXv28RgI3LiLf2K4R1qkvZfANV60ZkZwqwOhjbSWLwFc3+eAH Fv9PwlAR0QrVKHwIq+veRPs8eH7aBtV6Ml2q7D1H/hu/j0Avm2TzB5ps/ g==; X-IronPort-AV: E=McAfee;i="6400,9594,10435"; a="291257749" X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="291257749" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:22 -0700 X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="673553178" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:20 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Aug 2022 10:29:43 +0530 Message-Id: <20220811045945.2113431-3-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> References: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/4] drm/edid: Split DSC parsing into separate function X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maarten.lankhorst@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move the DSC parsing logic into separate function. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_edid.c | 128 ++++++++++++++++++++----------------- 1 file changed, 69 insertions(+), 59 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index cdf10279e1bd..ffff1d08b3a4 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -5703,6 +5703,73 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector, hdmi->y420_dc_modes = dc_mask; } +static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, + const u8 *hf_scds) +{ + u8 dsc_max_slices; + u8 dsc_max_frl_rate; + + hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2; + + if (!hdmi_dsc->v_1p2) + return; + + hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420; + hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP; + + if (hf_scds[11] & DRM_EDID_DSC_16BPC) + hdmi_dsc->bpc_supported = 16; + else if (hf_scds[11] & DRM_EDID_DSC_12BPC) + hdmi_dsc->bpc_supported = 12; + else if (hf_scds[11] & DRM_EDID_DSC_10BPC) + hdmi_dsc->bpc_supported = 10; + else + /* Supports min 8 BPC if DSC1.2 is supported*/ + hdmi_dsc->bpc_supported = 8; + + dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4; + drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, + &hdmi_dsc->max_frl_rate_per_lane); + hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; + + dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES; + + switch (dsc_max_slices) { + case 1: + hdmi_dsc->max_slices = 1; + hdmi_dsc->clk_per_slice = 340; + break; + case 2: + hdmi_dsc->max_slices = 2; + hdmi_dsc->clk_per_slice = 340; + break; + case 3: + hdmi_dsc->max_slices = 4; + hdmi_dsc->clk_per_slice = 340; + break; + case 4: + hdmi_dsc->max_slices = 8; + hdmi_dsc->clk_per_slice = 340; + break; + case 5: + hdmi_dsc->max_slices = 8; + hdmi_dsc->clk_per_slice = 400; + break; + case 6: + hdmi_dsc->max_slices = 12; + hdmi_dsc->clk_per_slice = 400; + break; + case 7: + hdmi_dsc->max_slices = 16; + hdmi_dsc->clk_per_slice = 400; + break; + case 0: + default: + hdmi_dsc->max_slices = 0; + hdmi_dsc->clk_per_slice = 0; + } +} + /* Sink Capability Data Structure */ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, const u8 *hf_scds) @@ -5749,71 +5816,14 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, if (hf_scds[7]) { u8 max_frl_rate; - u8 dsc_max_frl_rate; - u8 dsc_max_slices; struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n"); max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4; drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, &hdmi->max_frl_rate_per_lane); - hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2; - - if (hdmi_dsc->v_1p2) { - hdmi_dsc->native_420 = hf_scds[11] & DRM_EDID_DSC_NATIVE_420; - hdmi_dsc->all_bpp = hf_scds[11] & DRM_EDID_DSC_ALL_BPP; - - if (hf_scds[11] & DRM_EDID_DSC_16BPC) - hdmi_dsc->bpc_supported = 16; - else if (hf_scds[11] & DRM_EDID_DSC_12BPC) - hdmi_dsc->bpc_supported = 12; - else if (hf_scds[11] & DRM_EDID_DSC_10BPC) - hdmi_dsc->bpc_supported = 10; - else - /* Supports min 8 BPC if DSC1.2 is supported*/ - hdmi_dsc->bpc_supported = 8; - - dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4; - drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, - &hdmi_dsc->max_frl_rate_per_lane); - hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; - - dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES; - switch (dsc_max_slices) { - case 1: - hdmi_dsc->max_slices = 1; - hdmi_dsc->clk_per_slice = 340; - break; - case 2: - hdmi_dsc->max_slices = 2; - hdmi_dsc->clk_per_slice = 340; - break; - case 3: - hdmi_dsc->max_slices = 4; - hdmi_dsc->clk_per_slice = 340; - break; - case 4: - hdmi_dsc->max_slices = 8; - hdmi_dsc->clk_per_slice = 340; - break; - case 5: - hdmi_dsc->max_slices = 8; - hdmi_dsc->clk_per_slice = 400; - break; - case 6: - hdmi_dsc->max_slices = 12; - hdmi_dsc->clk_per_slice = 400; - break; - case 7: - hdmi_dsc->max_slices = 16; - hdmi_dsc->clk_per_slice = 400; - break; - case 0: - default: - hdmi_dsc->max_slices = 0; - hdmi_dsc->clk_per_slice = 0; - } - } + + drm_parse_dsc_info(hdmi_dsc, hf_scds); } drm_parse_ycbcr420_deep_color_info(connector, hf_scds); From patchwork Thu Aug 11 04:59:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 12941152 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7FBCC25B07 for ; Thu, 11 Aug 2022 05:01:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4AFCD95B34; Thu, 11 Aug 2022 05:00:41 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1EA9DA1148 for ; Thu, 11 Aug 2022 05:00:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660194029; x=1691730029; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wYpekYwgyES3XW+MkMdMUgh293oFwoIYxmBDiNT5sqQ=; b=kbmntxZNKi8+9eZ6LLz/kIW6ATy8ELIGQQQWeNbXn0jeBg5WatR08qyr qRPksew4nVkSl0ktjUS8nv8gbOXwtjzHrK6sJXyDlCUznsF5U8Lu6HUCs mqPV+t2eX+4wSmKP7ycZr3+Ybd8kqNhPKRFmW6QCyyz1Oeuwos29WbCUT aIMQ9NEMbiVIlVKXYRp7KFD+RbAG0N5njymiewRbJILmlCBYQb8zusPYb WUrA+3Zq2oVSEGDSkG1BPSRlgYr2jt9nsDW3G18tmRhrgId+5+qBxIQ6G 2wbZF5hPKiPU1GVI1cX+wkG6lWJuOCKF7/FpfUBB8y53OkVqJQyliG5Ii w==; X-IronPort-AV: E=McAfee;i="6400,9594,10435"; a="291257762" X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="291257762" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:24 -0700 X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="673553202" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:22 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Aug 2022 10:29:44 +0530 Message-Id: <20220811045945.2113431-4-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> References: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] drm/edid: Refactor HFVSDB parsing for DSC1.2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maarten.lankhorst@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DSC capabilities are given in bytes 11-13 of VSDB (i.e. bytes 8-10 of SCDS). Since minimum length of Data block is 7, all bytes greater than 7 must be read only after checking the length of the data block. This patch adds check for data block length before reading relavant DSC bytes. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_edid.c | 93 ++++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 44 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index ffff1d08b3a4..c9c3a9c8fa26 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -5706,9 +5706,6 @@ static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector, static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, const u8 *hf_scds) { - u8 dsc_max_slices; - u8 dsc_max_frl_rate; - hdmi_dsc->v_1p2 = hf_scds[11] & DRM_EDID_DSC_1P2; if (!hdmi_dsc->v_1p2) @@ -5727,47 +5724,54 @@ static void drm_parse_dsc_info(struct drm_hdmi_dsc_cap *hdmi_dsc, /* Supports min 8 BPC if DSC1.2 is supported*/ hdmi_dsc->bpc_supported = 8; - dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4; - drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, - &hdmi_dsc->max_frl_rate_per_lane); - hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; + if (cea_db_payload_len(hf_scds) >= 12 && hf_scds[12]) { + u8 dsc_max_slices; + u8 dsc_max_frl_rate; - dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES; + dsc_max_frl_rate = (hf_scds[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4; + drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes, + &hdmi_dsc->max_frl_rate_per_lane); - switch (dsc_max_slices) { - case 1: - hdmi_dsc->max_slices = 1; - hdmi_dsc->clk_per_slice = 340; - break; - case 2: - hdmi_dsc->max_slices = 2; - hdmi_dsc->clk_per_slice = 340; - break; - case 3: - hdmi_dsc->max_slices = 4; - hdmi_dsc->clk_per_slice = 340; - break; - case 4: - hdmi_dsc->max_slices = 8; - hdmi_dsc->clk_per_slice = 340; - break; - case 5: - hdmi_dsc->max_slices = 8; - hdmi_dsc->clk_per_slice = 400; - break; - case 6: - hdmi_dsc->max_slices = 12; - hdmi_dsc->clk_per_slice = 400; - break; - case 7: - hdmi_dsc->max_slices = 16; - hdmi_dsc->clk_per_slice = 400; - break; - case 0: - default: - hdmi_dsc->max_slices = 0; - hdmi_dsc->clk_per_slice = 0; + dsc_max_slices = hf_scds[12] & DRM_EDID_DSC_MAX_SLICES; + + switch (dsc_max_slices) { + case 1: + hdmi_dsc->max_slices = 1; + hdmi_dsc->clk_per_slice = 340; + break; + case 2: + hdmi_dsc->max_slices = 2; + hdmi_dsc->clk_per_slice = 340; + break; + case 3: + hdmi_dsc->max_slices = 4; + hdmi_dsc->clk_per_slice = 340; + break; + case 4: + hdmi_dsc->max_slices = 8; + hdmi_dsc->clk_per_slice = 340; + break; + case 5: + hdmi_dsc->max_slices = 8; + hdmi_dsc->clk_per_slice = 400; + break; + case 6: + hdmi_dsc->max_slices = 12; + hdmi_dsc->clk_per_slice = 400; + break; + case 7: + hdmi_dsc->max_slices = 16; + hdmi_dsc->clk_per_slice = 400; + break; + case 0: + default: + hdmi_dsc->max_slices = 0; + hdmi_dsc->clk_per_slice = 0; + } } + + if (cea_db_payload_len(hf_scds) >= 13 && hf_scds[13]) + hdmi_dsc->total_chunk_kbytes = hf_scds[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES; } /* Sink Capability Data Structure */ @@ -5776,6 +5780,7 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, { struct drm_display_info *display = &connector->display_info; struct drm_hdmi_info *hdmi = &display->hdmi; + struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; display->has_hdmi_infoframe = true; @@ -5816,17 +5821,17 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, if (hf_scds[7]) { u8 max_frl_rate; - struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n"); max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4; drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, &hdmi->max_frl_rate_per_lane); - - drm_parse_dsc_info(hdmi_dsc, hf_scds); } drm_parse_ycbcr420_deep_color_info(connector, hf_scds); + + if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) + drm_parse_dsc_info(hdmi_dsc, hf_scds); } static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector, From patchwork Thu Aug 11 04:59:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 12941153 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 90100C19F2D for ; Thu, 11 Aug 2022 05:01:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D1427A116F; Thu, 11 Aug 2022 05:00:44 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2361DA1184 for ; Thu, 11 Aug 2022 05:00:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660194029; x=1691730029; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qnvaoTUMoOqUlGkaHukknlPyZe/BCIMzFBNHjJBktWY=; b=Mg/Vakt2K6dkgLP6aeCuyAY8sQkIJiKJSrnIm3cTwZ6iB1olfW1wtsPt xvfwg+FajSaL1YktrbF6TBZXGahVGxuWvbwNn2th8FpeOtGygcNRWpUsF AzG2a1ZJY+3IUPn3idWSduQsP+Qo6uDoNrcdxjAsFgo5pvm+/UxsZpNUt 41Om8IsQX85eAFkEm/1aJkuiWvXDm/0rzgEGyAt+kkduShMUuhFu9fGnv 35OXf8HXCBKfX1DdPW7kFoQtSPOyTOShtG+WTI+/rcqO5QCnci3JWXdFe R+ShILrcGJNSWK5hl0E5zwQiLgLp0jVYkl50hnMWDHz7Amr69S17ros96 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10435"; a="291257765" X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="291257765" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:26 -0700 X-IronPort-AV: E=Sophos;i="5.93,228,1654585200"; d="scan'208";a="673553215" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2022 22:00:24 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Aug 2022 10:29:45 +0530 Message-Id: <20220811045945.2113431-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> References: <20220811045945.2113431-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] drm/edid: Avoid multiple log lines for HFVSDB parsing X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maarten.lankhorst@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Replace multiple log lines with a single log line at the end of parsing HF-VSDB. Also use drm_dbg_kms instead of DRM_DBG_KMS, and add log for DSC1.2 support. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/drm_edid.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index c9c3a9c8fa26..7a319d570297 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -5781,6 +5781,9 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, struct drm_display_info *display = &connector->display_info; struct drm_hdmi_info *hdmi = &display->hdmi; struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap; + u32 max_tmds_clock = 0; + u8 max_frl_rate = 0; + bool dsc_support = false; display->has_hdmi_infoframe = true; @@ -5800,14 +5803,13 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, */ if (hf_scds[5]) { - /* max clock is 5000 KHz times block value */ - u32 max_tmds_clock = hf_scds[5] * 5000; struct drm_scdc *scdc = &hdmi->scdc; + /* max clock is 5000 KHz times block value */ + max_tmds_clock = hf_scds[5] * 5000; + if (max_tmds_clock > 340000) { display->max_tmds_clock = max_tmds_clock; - DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n", - display->max_tmds_clock); } if (scdc->supported) { @@ -5820,9 +5822,6 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, } if (hf_scds[7]) { - u8 max_frl_rate; - - DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n"); max_frl_rate = (hf_scds[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4; drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes, &hdmi->max_frl_rate_per_lane); @@ -5830,8 +5829,14 @@ static void drm_parse_hdmi_forum_scds(struct drm_connector *connector, drm_parse_ycbcr420_deep_color_info(connector, hf_scds); - if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) + if (cea_db_payload_len(hf_scds) >= 11 && hf_scds[11]) { drm_parse_dsc_info(hdmi_dsc, hf_scds); + dsc_support = true; + } + + drm_dbg_kms(connector->dev, + "HF-VSDB: max TMDS clock:%d Khz, HDMI2.1 support:%s, DSC1.2 support:%s\n", + max_tmds_clock, max_frl_rate ? "yes" : "no", dsc_support ? "yes" : "no"); } static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,