From patchwork Thu Aug 11 09:20:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 12941291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E0AAC19F2A for ; Thu, 11 Aug 2022 09:21:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=4L1uGSoo8D5P4AVnGFPiKQH4rF2LvmrPznu36mzuW9g=; b=t7aFzCphFL11HH t6XBEOaWFz7xIUGux6bRUvPZtbnZgwLeVQx0IALAkc+CmMsFsZiZfglhJZeuqwm99BLnPp4LcFbGi Ds6lMrHr8dRpgWpWOQX33VPFz8U+vnvGK0pPSSjuehlIU0EwHKfXtJgtTNvCbNIvya/tF5VY96gOg JJncYZ3EQ8PK5YRtyiy36OgMZ8UmaiOd7gwesy5l1ec9R8fbl1rg93cqSDbYlfYCinmHnwE04tRTS FVcQfzJzwqCwaB7e5vPuDz1o19MoNTxxgx3eUMWR64timtiCaGSlRtmHibTSzzad4A6TE9gPSmvG6 1TX+wa3VMfMg4bVuvOBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oM4Mx-00Ahhz-66; Thu, 11 Aug 2022 09:20:47 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oM4Mt-00Aher-ME for linux-arm-kernel@lists.infradead.org; Thu, 11 Aug 2022 09:20:44 +0000 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oM4Mq-0001M2-Dl; Thu, 11 Aug 2022 11:20:40 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1oM4Mn-0034zp-7t; Thu, 11 Aug 2022 11:20:39 +0200 Received: from str by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1oM4Mo-00FWnX-P3; Thu, 11 Aug 2022 11:20:38 +0200 From: Steffen Trumtrar To: Michal Simek Cc: linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, Steffen Trumtrar Subject: [PATCH] ARM: dts: zynq: add QSPI controller node Date: Thu, 11 Aug 2022 11:20:36 +0200 Message-Id: <20220811092036.3689983-1-s.trumtrar@pengutronix.de> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: str@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220811_022043_759479_B1CA5DC5 X-CRM114-Status: GOOD ( 10.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The driver and binding for the Zynq QSPI is already present in the kernel. The node is not added to the zynq-7000.dtsi, however. Add it. Signed-off-by: Steffen Trumtrar --- arch/arm/boot/dts/zynq-7000.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index c193264a86ff..dab6ffa89002 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -252,6 +252,19 @@ gem1: ethernet@e000c000 { #size-cells = <0>; }; + qspi: spi@e000d000 { + compatible = "xlnx,zynq-qspi-1.0"; + reg = <0xe000d000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <0 19 4>; + clocks = <&clkc 10>, <&clkc 43>; + clock-names = "ref_clk", "pclk"; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; + smcc: memory-controller@e000e000 { compatible = "arm,pl353-smc-r2p1", "arm,primecell"; reg = <0xe000e000 0x0001000>;