From patchwork Fri Aug 12 16:41:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35B28C25B0E for ; Fri, 12 Aug 2022 16:38:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238443AbiHLQiB (ORCPT ); Fri, 12 Aug 2022 12:38:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232082AbiHLQiA (ORCPT ); Fri, 12 Aug 2022 12:38:00 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A893F9C20D; Fri, 12 Aug 2022 09:37:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322279; x=1691858279; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=HvI6boGRdVfrzeJXmAydZnr5c6dZ+E7yhgQL2sf4XGE=; b=LuQ2uDIzlGD1IYd0PCvC4xQQ1Q6ZqybeUK9ndR2lP6rwfM7uOsrHQmC4 bVAF3qTi/G8XdLsf7hyDbjXO5RYkDTIZvT6gRj+9ueXcPjEjrK7lo3Fav z12w2Uhhbgt2wIs/ki126YruZrgcwVTAtVqFt57NUrsBVoMkSDOpEcDrP wzgCBPAbBs6bYi5sGQcpV5K0XljmKm0E4Rdt2n+EOHWIzdIHaRH3AABuY Gp46fgw58QS7LtN+mlUsqIraSIw+Uams6P3xKxERBxx1vVqMdPZs1m9CB ltJz3mF0a23+hOW4JeTjTG61wKCZIZLhMVD30qeWr+kcgWEbJjCzWdYKF A==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921568" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921568" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:37:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012274" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:37:56 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 1/7] x86/topology: Fix multiple packages shown on a single-package system Date: Sat, 13 Aug 2022 00:41:38 +0800 Message-Id: <20220812164144.30829-2-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org CPUID.1F/B does not emumerate Package level explicitly, instead, all the APICID bits above the enumerated levels are assumed to be package id bits. Current code gets package id by shifting out all the APICID bits that Linux supports, rather than shifting out all the APICID bits that CPUID.1F enumerates. This introduces problems when CPUID.1F enumerates a level that Linux does not support. For example, on an AlderLake-N platform, there are 2 Ecore Modules, which has 4 atom cores in each module, in a single package. Linux does not support Module level and interprets the Module id bits as package id and erroneously reports a multi module system as a multi-package system. Fix this by using APICID bits above all the CPUID.1F enumerated levels as package id. Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index 132a2de44d2f..f7592814e5d5 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -96,6 +96,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) unsigned int ht_mask_width, core_plus_mask_width, die_plus_mask_width; unsigned int core_select_mask, core_level_siblings; unsigned int die_select_mask, die_level_siblings; + unsigned int pkg_mask_width; bool die_level_present = false; int leaf; @@ -111,10 +112,10 @@ int detect_extended_topology(struct cpuinfo_x86 *c) core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); - die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); sub_index = 1; - do { + while (true) { cpuid_count(leaf, sub_index, &eax, &ebx, &ecx, &edx); /* @@ -132,8 +133,13 @@ int detect_extended_topology(struct cpuinfo_x86 *c) die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } + if (LEAFB_SUBTYPE(ecx) != INVALID_TYPE) + pkg_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + else + break; + sub_index++; - } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE); + } core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; die_select_mask = (~(-1 << die_plus_mask_width)) >> @@ -148,7 +154,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) } c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, - die_plus_mask_width); + pkg_mask_width); /* * Reinit the apicid, now that we have extended initial_apicid. */ From patchwork Fri Aug 12 16:41:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC85BC00140 for ; Fri, 12 Aug 2022 16:38:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238838AbiHLQiL (ORCPT ); Fri, 12 Aug 2022 12:38:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232082AbiHLQiG (ORCPT ); Fri, 12 Aug 2022 12:38:06 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E0DBAE9E1; Fri, 12 Aug 2022 09:38:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322283; x=1691858283; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=xVfLDJHbNxdB43zszcy1iXYlCNPm2m2mul/ubrZges4=; b=Z5vJtLNh+f3kPBi62HFtyDLCowWzl252ueTqPLRCKehMUiASRk21oD9q nrcx6cQdcnbpGPkoccLlMou+LFVnhFDLxVjP73eJ95Qi8KzqkV8vmCY0a 6m2ln07Tt2vOIe8Mv3Z/hzaaAAatU5d6JBiIUc+/Utp4Gj0cn0Ir3LcLt eBzfZpztdHfZgPEi/rBg6vou5Tl9+Q/kUQkpwj2q0+G7CmNodVPCmuaCy m6+Y1/h8AhAkBBaIWGWsJm2CoYHwgbkeX6rdbFVa6ur133sqb7eP8vP8I 0349E7Sw7kz3wMfV9eig+vvwM4Bo56JauFEMRO6VfoWpGb6Ji6opCyzly w==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921582" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921582" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:38:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012287" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:37:59 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 2/7] x86/topology: Fix duplicated core_id within a package Date: Sat, 13 Aug 2022 00:41:39 +0800 Message-Id: <20220812164144.30829-3-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Today, core_id is assumed to be unique within each package. But an AlderLake-N platform adds a Module level between core and package, Linux excludes the unknown modules bits from the core_id, resulting in duplicate core_id's. To keep core_id unique within a package, Linux must include all APIC-id bits for known or un-known levels above the core and below the package in the core_id. It is important to understand that core_id's have always come directly from the APIC-id encoding, which comes from the BIOS. Thus there is no guarantee that they start at 0, or that they are contiguous. As such, using them for array indexes can be problematic. Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index f7592814e5d5..5e868b62a7c4 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -141,7 +141,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) sub_index++; } - core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; + core_select_mask = (~(-1 << pkg_mask_width)) >> ht_mask_width; die_select_mask = (~(-1 << die_plus_mask_width)) >> core_plus_mask_width; From patchwork Fri Aug 12 16:41:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B83FFC25B0E for ; Fri, 12 Aug 2022 16:38:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232082AbiHLQiO (ORCPT ); Fri, 12 Aug 2022 12:38:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238656AbiHLQiI (ORCPT ); Fri, 12 Aug 2022 12:38:08 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D551AABF2A; Fri, 12 Aug 2022 09:38:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322286; x=1691858286; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=NUyQpSQ+bGRYNVMYb0DJKJiMv8VBcicLoCZ/INNs+rE=; b=EH+3kezdI0bVzq4z2chqDwwmF3SzvzgjdxFfqxAXmHHEHAI3lQwoMWIZ 9jdEfz69UnKmXrGLr5aiuf9TdgIMDL9n7zc36IXJhuWAH4KsHJh3Fgny3 1kq3qVawFaJKMkrWesf8e80neR50EYiqqNZQUJx47D3AuoQucWMaTb3G4 qFVXoPCgIbTcv2gqL3dl9FVUgdbVZSfIh0YlR0bOpcc0BLpJ3ecqV30ny XfuXxxUc7qsD9fEvaGugBKCpj9HQ87ufkVoxGs37k4lJXJbK+FH3uZ3OZ onkcLg85FEdmKj50BLpdLv6cZWXtQBrpGJueZmRD7WOpjeZlcFyo3p4Uc w==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921603" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921603" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:38:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012297" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:38:03 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 3/7] hwmon/coretemp: Handle large core id value Date: Sat, 13 Aug 2022 00:41:40 +0800 Message-Id: <20220812164144.30829-4-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The coretemp driver supports up to a hard-coded limit of 128 cores. Today, the driver can not support a core with an id above that limit. Yet, the encoding of core_id's is arbitrary (BIOS APIC-id) and so they may be sparse and they may be large. Update the driver to map arbitrary core_id numbers into appropriate array indexes so that 128 cores can be supported, no matter the encoding of core_ids's. Acked-by: Len Brown Signed-off-by: Zhang Rui Acked-by: Guenter Roeck --- drivers/hwmon/coretemp.c | 55 +++++++++++++++++++++++++++++----------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index ccf0af5b988a..3f0f7d7612ae 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -46,9 +46,6 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) -#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) -#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) - #ifdef CONFIG_SMP #define for_each_sibling(i, cpu) \ for_each_cpu(i, topology_sibling_cpumask(cpu)) @@ -91,6 +88,8 @@ struct temp_data { struct platform_data { struct device *hwmon_dev; u16 pkg_id; + u16 cpu_map[NUM_REAL_CORES]; + struct ida ida; struct cpumask cpumask; struct temp_data *core_data[MAX_CORE_DATA]; struct device_attribute name_attr; @@ -441,7 +440,7 @@ static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) MSR_IA32_THERM_STATUS; tdata->is_pkg_data = pkg_flag; tdata->cpu = cpu; - tdata->cpu_core_id = TO_CORE_ID(cpu); + tdata->cpu_core_id = topology_core_id(cpu); tdata->attr_size = MAX_CORE_ATTRS; mutex_init(&tdata->update_lock); return tdata; @@ -454,7 +453,7 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, struct platform_data *pdata = platform_get_drvdata(pdev); struct cpuinfo_x86 *c = &cpu_data(cpu); u32 eax, edx; - int err, attr_no; + int err, index, attr_no; /* * Find attr number for sysfs: @@ -462,14 +461,26 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, * The attr number is always core id + 2 * The Pkgtemp will always show up as temp1_*, if available */ - attr_no = pkg_flag ? PKG_SYSFS_ATTR_NO : TO_ATTR_NO(cpu); + if (pkg_flag) + attr_no = PKG_SYSFS_ATTR_NO; + else { + index = ida_alloc(&pdata->ida, GFP_KERNEL); + if (index < 0) + return index; + pdata->cpu_map[index] = topology_core_id(cpu); + attr_no = index + BASE_SYSFS_ATTR_NO; + } - if (attr_no > MAX_CORE_DATA - 1) - return -ERANGE; + if (attr_no > MAX_CORE_DATA - 1) { + err = -ERANGE; + goto ida_free; + } tdata = init_temp_data(cpu, pkg_flag); - if (!tdata) - return -ENOMEM; + if (!tdata) { + err = -ENOMEM; + goto ida_free; + } /* Test if we can access the status register */ err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); @@ -505,6 +516,9 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, exit_free: pdata->core_data[attr_no] = NULL; kfree(tdata); +ida_free: + if (!pkg_flag) + ida_free(&pdata->ida, index); return err; } @@ -524,6 +538,8 @@ static void coretemp_remove_core(struct platform_data *pdata, int indx) kfree(pdata->core_data[indx]); pdata->core_data[indx] = NULL; + + ida_free(&pdata->ida, indx - BASE_SYSFS_ATTR_NO); } static int coretemp_probe(struct platform_device *pdev) @@ -537,6 +553,7 @@ static int coretemp_probe(struct platform_device *pdev) return -ENOMEM; pdata->pkg_id = pdev->id; + ida_init(&pdata->ida); platform_set_drvdata(pdev, pdata); pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME, @@ -553,6 +570,7 @@ static int coretemp_remove(struct platform_device *pdev) if (pdata->core_data[i]) coretemp_remove_core(pdata, i); + ida_destroy(&pdata->ida); return 0; } @@ -647,7 +665,7 @@ static int coretemp_cpu_offline(unsigned int cpu) struct platform_device *pdev = coretemp_get_pdev(cpu); struct platform_data *pd; struct temp_data *tdata; - int indx, target; + int i, indx = -1, target; /* * Don't execute this on suspend as the device remove locks @@ -660,12 +678,19 @@ static int coretemp_cpu_offline(unsigned int cpu) if (!pdev) return 0; - /* The core id is too big, just return */ - indx = TO_ATTR_NO(cpu); - if (indx > MAX_CORE_DATA - 1) + pd = platform_get_drvdata(pdev); + + for (i = 0; i < NUM_REAL_CORES; i++) { + if (pd->cpu_map[i] == topology_core_id(cpu)) { + indx = i + BASE_SYSFS_ATTR_NO; + break; + } + } + + /* Too many cores and this core is not pupolated, just return */ + if (indx < 0) return 0; - pd = platform_get_drvdata(pdev); tdata = pd->core_data[indx]; cpumask_clear_cpu(cpu, &pd->cpumask); From patchwork Fri Aug 12 16:41:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32194C282E7 for ; Fri, 12 Aug 2022 16:38:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239362AbiHLQiT (ORCPT ); Fri, 12 Aug 2022 12:38:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238686AbiHLQiM (ORCPT ); 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12 Aug 2022 09:38:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012306" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:38:06 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 4/7] x86/topology: Fix max_siblings calculation Date: Sat, 13 Aug 2022 00:41:41 +0800 Message-Id: <20220812164144.30829-5-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The max siblings value returned by CPUID.1F SMT level EBX differs among CPUs on Intel Hybrid platforms like ADL-S/P. It returns 2 for Pcore CPUs which have HT sibling and 1 for Ecore CPUs which do not. Today, CPUID SMT level EBX sets the global variable smp_num_siblings. Thus, smp_num_siblings is overridden to different values based on the CPU Pcore/Ecore enumeration order. For example, [ 0.201005] detect_extended_topology: CPU APICID 0x0, smp_num_siblings 2, x86_max_cores 10 [ 0.201117] start_kernel->check_bugs->cpu_smt_check_topology: smp_num_siblings 2 ... [ 0.010146] detect_extended_topology: CPU APICID 0x8, smp_num_siblings 2, x86_max_cores 10 ... [ 0.010146] detect_extended_topology: CPU APICID 0x39, smp_num_siblings 2, x86_max_cores 10 [ 0.010146] detect_extended_topology: CPU APICID 0x48, smp_num_siblings 1, x86_max_cores 20 ... [ 0.010146] detect_extended_topology: CPU APICID 0x4e, smp_num_siblings 1, x86_max_cores 20 [ 2.583800] sched_set_itmt_core_prio: smp_num_siblings 1 This inconsistency brings several potential issues: 1. some kernel configuration like cpu_smt_control, as set in start_kernel()->check_bugs()->cpu_smt_check_topology(), depends on smp_num_siblings set by cpu0. It is pure luck that all the current hybrid platforms use Pcore as cpu0 and hide this problem. 2. some per CPU data like cpuinfo_x86.x86_max_cores that depends on smp_num_siblings becomes inconsistent and bogus. 3. the final smp_num_siblings value after boot depends on the last CPU enumerated, which could either be Pcore or Ecore CPU. The solution is to use CPUID EAX bits_shift to get the maximum number of addressable logical processors, and use this to determin max siblings. Because: 1. the CPUID EAX bits_shift values are consistent among CPUs as far as observed. 2. some code already uses smp_num_siblings value to isolate the SMT ID bits in APIC-ID, like apic_id_is_primary_thread(). Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index 5e868b62a7c4..2a88f2fa5756 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -23,7 +23,12 @@ #define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff) #define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f) -#define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff) + +/* + * Use EAX bit_shift to calculate the maximum number of addressable logical + * processors sharing the current level. + */ +#define LEVEL_MAX_SIBLINGS(eax) (1 << BITS_SHIFT_NEXT_LEVEL(eax)) unsigned int __max_die_per_package __read_mostly = 1; EXPORT_SYMBOL(__max_die_per_package); @@ -79,7 +84,7 @@ int detect_extended_topology_early(struct cpuinfo_x86 *c) * initial apic id, which also represents 32-bit extended x2apic id. */ c->initial_apicid = edx; - smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); + smp_num_siblings = LEVEL_MAX_SIBLINGS(eax); #endif return 0; } @@ -109,9 +114,9 @@ int detect_extended_topology(struct cpuinfo_x86 *c) */ cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx); c->initial_apicid = edx; - core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); + core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(eax); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); - die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + die_level_siblings = LEVEL_MAX_SIBLINGS(eax); pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); sub_index = 1; @@ -122,14 +127,14 @@ int detect_extended_topology(struct cpuinfo_x86 *c) * Check for the Core type in the implemented sub leaves. */ if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) { - core_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + core_level_siblings = LEVEL_MAX_SIBLINGS(eax); core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); die_level_siblings = core_level_siblings; die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } if (LEAFB_SUBTYPE(ecx) == DIE_TYPE) { die_level_present = true; - die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + die_level_siblings = LEVEL_MAX_SIBLINGS(eax); die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } From patchwork Fri Aug 12 16:41:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942382 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9B3CC00140 for ; Fri, 12 Aug 2022 16:38:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239389AbiHLQif (ORCPT ); Fri, 12 Aug 2022 12:38:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238779AbiHLQiP (ORCPT ); Fri, 12 Aug 2022 12:38:15 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D0279DFAB; Fri, 12 Aug 2022 09:38:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322294; x=1691858294; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Rnn+p5zNuCdgUOlK8NEqTpgcBtst3TdKIhIXK5G2ySY=; b=Ij0576mHBPEywaTvgy+OoMFVP8n7G0pzFt7U5aVmugZHD1Fvsr/cznDG sAPJ8VqdKv9H1qcYsoX74zMjgijoXK6FcGMijYZuNrue7nMeHfX4H4ru9 AqWbJmqwDHlbnHPDHxMV8mqxo2KMGSum/mDsiMoywABUyYpR4/7o0KPZp yIUKlGERN3FBH8gXQOEMEtkitKYZpVkWltt8+Q7RCuop/+JrYvabZXFJT du/qizPGiE0X5WUIh72TwVheTTPXBUXh9SKuUjo7qed2XuErE84G65+9+ 80ikc91usZ/5FMf13CdWGjnfNLrCFbynZHItjtpblQVHpMQCckP/qJLyi A==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921624" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921624" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:38:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012316" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:38:10 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 5/7] Documentation: x86: Update smp_num_siblings/x86_max_cores description Date: Sat, 13 Aug 2022 00:41:42 +0800 Message-Id: <20220812164144.30829-6-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org smp_num_siblings/cpuinfo_x86.x86_max_cores are retrieved via CPUID EAX bit_shift value, and they represent the maximum possible number of threads in a core, and the maximum possible number of cores in a package. Update the smp_num_siblings/cpuinfo_x86.x86_max_cores description in the documentation. Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- Documentation/x86/topology.rst | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Documentation/x86/topology.rst b/Documentation/x86/topology.rst index 7f58010ea86a..c5eb5bc42380 100644 --- a/Documentation/x86/topology.rst +++ b/Documentation/x86/topology.rst @@ -49,7 +49,8 @@ AMD nomenclature for package is 'Node'. - cpuinfo_x86.x86_max_cores: - The number of cores in a package. This information is retrieved via CPUID. + The maximum possible number of cores in a package. This information is + retrieved via CPUID. - cpuinfo_x86.x86_max_dies: @@ -102,10 +103,10 @@ AMDs nomenclature for a CMT core is "Compute Unit". The kernel always uses - smp_num_siblings: - The number of threads in a core. The number of threads in a package can be - calculated by:: + The maximum possible number of threads in a core. The maximum possible + number of threads in a package can be calculated by:: - threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings + maximum_threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings Threads From patchwork Fri Aug 12 16:41:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942383 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22709C00140 for ; Fri, 12 Aug 2022 16:38:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239405AbiHLQii (ORCPT ); Fri, 12 Aug 2022 12:38:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239356AbiHLQiS (ORCPT ); Fri, 12 Aug 2022 12:38:18 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B902AFAFD; Fri, 12 Aug 2022 09:38:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322297; x=1691858297; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=8+jqmugnVsH0frOupwOifNzvz5V3RPADMrdmswfiq3o=; b=Z/B+n6ExC8T0RbUzYPAZpQNGYsTKcefwvSsg3tWzlVj/+55TudWuWnbi 1/D3ockSH4Bc8L2x4H72V8fJj+IWg0ac4DVD7PcetCjpv9JDv3fWsCWse DS+kBvWlBPvgkUE+0E/PEojVYLXR/S3+rWPBfzIWs1/TO3OwzwpZDbJLb sRTZ2I51KYgq92jz8vdJ6eswYvSv3AO10qrF1QiFxeeTXaLfWw8Qn07/f 7Nrj99h7ZYkZcuvHJSQxd5D2OJ1JuPk7G+sNNWbQrzqHzxtZekMarZ+4U QfBh0rHhzNaTCMwX1jL0WYJFinmm8+UTU3HO70Dmyr6TZCzm1Ft5vl0jA g==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921641" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921641" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:38:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012321" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:38:13 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 6/7] Documentation: x86: Remove obsolete x86_max_dies description Date: Sat, 13 Aug 2022 00:41:43 +0800 Message-Id: <20220812164144.30829-7-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org cpuinfo_x86.x86_max_dies is introduced in commit 7745f03eb395 ("x86/topology: Add CPUID.1F multi-die/package support") and then removed in commit 14d96d6c06b5 ("x86/topology: Create topology_max_die_per_package()"). Remove the obsolete cpuinfo_x86.x86_max_dies description. Fixes: 14d96d6c06b5 ("x86/topology: Create topology_max_die_per_package()") Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- Documentation/x86/topology.rst | 4 ---- 1 file changed, 4 deletions(-) diff --git a/Documentation/x86/topology.rst b/Documentation/x86/topology.rst index c5eb5bc42380..fbef91b1ee5e 100644 --- a/Documentation/x86/topology.rst +++ b/Documentation/x86/topology.rst @@ -52,10 +52,6 @@ AMD nomenclature for package is 'Node'. The maximum possible number of cores in a package. This information is retrieved via CPUID. - - cpuinfo_x86.x86_max_dies: - - The number of dies in a package. This information is retrieved via CPUID. - - cpuinfo_x86.cpu_die_id: The physical ID of the die. This information is retrieved via CPUID. From patchwork Fri Aug 12 16:41:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12942384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78621C25B0F for ; Fri, 12 Aug 2022 16:39:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238560AbiHLQjL (ORCPT ); Fri, 12 Aug 2022 12:39:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37996 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238771AbiHLQiy (ORCPT ); Fri, 12 Aug 2022 12:38:54 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3BC1EB0291; Fri, 12 Aug 2022 09:38:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660322322; x=1691858322; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jsbnr8NWVw7uTCz6Xky1YALZ+oPpAzM2h50U5eFhHsw=; b=QB3D5zMkyJK0E+2aXtOVgc7GBUbT3un2iaIE2shWIl1u+YuYniqNBhFF 0+QA7ywxQtKA5YPdGyiSwzyRvBxlLBdAAH6I5Em37KAVAXWf3LUhL110c XafcysWH9wCEwnFcPmibwCz98beNZFabY8MtZtdWSeVXkxxfvEsJ3FJ2l zyzmHHjVcnj5TdYli6z2nN4nm2yzPwh670SmFHHnFXnVQmpEhd9f6HZDh V0pdgAKayJ1oku44bDbucOrhGZGnUQxI3hnFd0d4HGsh5SeXdrFhKQDcU nd01ke62csCn7rOcKIy7rdx9z4tyIdDCDi410UujjFEpJAiI8lqRiTuWz g==; X-IronPort-AV: E=McAfee;i="6400,9594,10437"; a="377921655" X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="377921655" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Aug 2022 09:38:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,233,1654585200"; d="scan'208";a="782012345" Received: from power-sh.sh.intel.com ([10.239.183.122]) by orsmga005.jf.intel.com with ESMTP; 12 Aug 2022 09:38:17 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH 7/7] perf/x86/intel/P4: Fix smp_num_siblings usage Date: Sat, 13 Aug 2022 00:41:44 +0800 Message-Id: <20220812164144.30829-8-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220812164144.30829-1-rui.zhang@intel.com> References: <20220812164144.30829-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org smp_num_siblings can be larger than 2. Any value larger than 1 suggests HT is supported. Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/include/asm/perf_event_p4.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index 94de1a05aeba..b14e9a20a7c0 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h @@ -189,7 +189,7 @@ static inline int p4_ht_active(void) static inline int p4_ht_thread(int cpu) { #ifdef CONFIG_SMP - if (smp_num_siblings == 2) + if (smp_num_siblings > 1) return cpu != cpumask_first(this_cpu_cpumask_var_ptr(cpu_sibling_map)); #endif return 0;