From patchwork Mon Aug 15 15:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943742 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DECCEC25B0D for ; Mon, 15 Aug 2022 15:31:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231993AbiHOPbr (ORCPT ); Mon, 15 Aug 2022 11:31:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231598AbiHOPbn (ORCPT ); Mon, 15 Aug 2022 11:31:43 -0400 Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83395F59F; Mon, 15 Aug 2022 08:31:42 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 75EE23200901; Mon, 15 Aug 2022 11:31:40 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Mon, 15 Aug 2022 11:31:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to; s=fm3; t=1660577499; x= 1660663899; bh=9dG/S1pIlNaiOU2NNri/uFIjS8EJ6UrvnFIXQZMn4ZM=; b=t WNbA+C7CLgVfKWZuOHmDlSZA+ZoqJ0ADtOuXI3AV3q/ZY0GejbNRgdFY7J3NVdvi 0OeDpFQECF4L4P8uGEuURbf/o+XHzV5IHBg0D8mXXiW35Gcv4S6q6EiYxc0+NlNp xBbKQP1rkhBx1dCo5MTWJEJN/nVscYjACyXF69KMDJAeJRTavrBNNVfIduU8TN4r efshu9EKHwvJPGLdE4u6Q3j5iALZDhEJ5twreLgEUAg07+I9rostn/oShK3dl1D3 DudbQDgFck4+GHz9eNcmiLCHfCNbdajcsqZY/AzddKScra14VSda7FDzubS3YGh4 GLtEN3eYQgBnR7iCh5nhQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:sender:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm1; t=1660577499; x= 1660663899; bh=9dG/S1pIlNaiOU2NNri/uFIjS8EJ6UrvnFIXQZMn4ZM=; b=j jUJbHv4fPj1HbmuAOnId7hZ7RyNFFl2vBRjicgOwqga/yNMh8sOEIdFEDfTYwgRB 4Vc6jtFrvnEf/dZYAHPrfWG3dsWIDmmHFwf8UVsOP4uHR5IDfH1QOwJ9cJ5JoJup gswGbb42zToDHvRELyd4D5LLTDlRh1IHMwPWw+jrE//YNzCPTZqE9osz6UEZ4Zti Pbep3ksGm9gew9TBBjAbHFDxpVQvdJ97qnyDIWoBL+4G59ZV+zUGjbSnZVTfx+Rh WMtN1D54+c/UY7ZSUl6ZVQoenuMqxh04uI1b+kd82LcUWYMpQY9TclCEnNINMbE/ /UhwOYZilz/efW7Vg4f2g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvfedrvdehvddgledtucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhggtgfogfesthekredtredtjeenucfhrhhomhepofgr gihimhgvucftihhprghrugcuoehmrgigihhmvgestggvrhhnohdrthgvtghhqeenucggtf frrghtthgvrhhnpefgfffgteffuddulefhveeiffffudelvefggeekueetgfffjeehleel keejfefhjeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpehmrgigihhmvgestggvrhhnohdrthgvtghh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 15 Aug 2022 11:31:38 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/7] clk: bcm: rpi: Create helper to retrieve private data Date: Mon, 15 Aug 2022 17:31:23 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-1-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=2528; i=maxime@cerno.tech; h=from:subject:message-id; bh=b1A3H6B5SyJxK91Z0ejNFKXqhHgsxCKS0Y2xe7ueH/k=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k6o/djEuqNf0iFXvySh9T+f7pwG//S9VqzhKs6y6y/o n+/vKGVhEONikBVTZIkRNl8Sd2rW6042vnkwc1iZQIYwcHEKwET+RTEynD8WwawTknH7RwrH3uel9z n0J4U3PT7mqJFpvVL7y07ReIb/xea/vy6Um5eizKsSU+fEvnjD4xtstSuWHbo5aSX365Q5DAA= X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The RaspberryPi firmware clocks driver uses in several instances a container_of to retrieve the struct raspberrypi_clk_data from a pointer to struct clk_hw. Let's create a small function to avoid duplicating it all over the place. Signed-off-by: Maxime Ripard diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 73518009a0f2..6c0a0fd6cd79 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -73,6 +73,12 @@ struct raspberrypi_clk_data { struct raspberrypi_clk *rpi; }; +static inline +const struct raspberrypi_clk_data *clk_hw_to_data(const struct clk_hw *hw) +{ + return container_of(hw, struct raspberrypi_clk_data, hw); +} + struct raspberrypi_clk_variant { bool export; char *clkdev; @@ -176,8 +182,7 @@ static int raspberrypi_clock_property(struct rpi_firmware *firmware, static int raspberrypi_fw_is_prepared(struct clk_hw *hw) { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); + const struct raspberrypi_clk_data *data = clk_hw_to_data(hw); struct raspberrypi_clk *rpi = data->rpi; u32 val = 0; int ret; @@ -194,8 +199,7 @@ static int raspberrypi_fw_is_prepared(struct clk_hw *hw) static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw, unsigned long parent_rate) { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); + const struct raspberrypi_clk_data *data = clk_hw_to_data(hw); struct raspberrypi_clk *rpi = data->rpi; u32 val = 0; int ret; @@ -211,8 +215,7 @@ static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw, static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); + const struct raspberrypi_clk_data *data = clk_hw_to_data(hw); struct raspberrypi_clk *rpi = data->rpi; u32 _rate = rate; int ret; @@ -229,8 +232,7 @@ static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate, static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) { - struct raspberrypi_clk_data *data = - container_of(hw, struct raspberrypi_clk_data, hw); + const struct raspberrypi_clk_data *data = clk_hw_to_data(hw); struct raspberrypi_clk_variant *variant = data->variant; /* From patchwork Mon Aug 15 15:31:24 2022 Content-Type: text/plain; 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Mon, 15 Aug 2022 11:31:43 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/7] clk: bcm: rpi: Add a function to retrieve the maximum Date: Mon, 15 Aug 2022 17:31:24 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-2-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=3364; i=maxime@cerno.tech; h=from:subject:message-id; bh=wAQVJMgLbRnifaGUTCUy+ZporTuJb2HjcXq358WgEfw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k7k61kV2XhfO/8gQ3a536KV+bJHJz7kVePKS7D+65rp vnRjRykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACZSa8nwT3+X3d6Zs7ROP5R9FyL55V S78UeNhIDPbod21As5/7y0eQrDP3tL2XNdthnvfvzqbnsgqinNciNZLOZGStfU/5sTJzTrsQEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The RaspberryPi firmware can be configured by the end user using the config.txt file. Some of these options will affect the kernel capabilities, and we thus need to be able to detect it to operate reliably. One of such parameters is the hdmi_enable_4kp60 parameter that will setup the clocks in a way that is suitable to reach the pixel frequencies required by the 4k at 60Hz and higher modes. If the user forgot to enable it, then those modes will simply not work but are still likely to be picked up by the userspace, which is a poor user-experience. The kernel can't access the config.txt file directly, but one of the effect that parameter has is that the core clock frequency maximum will be much higher. Thus we can infer whether it was enabled or not by querying the firmware for that maximum, and if it isn't prevent any of the modes that wouldn't work. The HDMI driver is already doing this, but was relying on a behaviour of clk_round_rate() that got changed recently, and doesn't return the result we would like anymore. We also considered introducing a CCF function to access the maximum of a given struct clk, but that wouldn't work if the clock is further constrained by another user. It was thus suggested to create a small, ad-hoc function to query the RaspberryPi firmware for the maximum rate a given clock has. Suggested-by: Stephen Boyd Signed-off-by: Maxime Ripard diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 6c0a0fd6cd79..182e8817eac2 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -16,6 +16,7 @@ #include #include +#include #include enum rpi_firmware_clk_id { @@ -254,6 +255,33 @@ static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw, return 0; } +unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk) +{ + const struct raspberrypi_clk_data *data; + struct raspberrypi_clk *rpi; + struct clk_hw *hw; + u32 max_rate; + int ret; + + if (!clk) + return 0; + + hw = __clk_get_hw(clk); + if (!hw) + return 0; + + data = clk_hw_to_data(hw); + rpi = data->rpi; + ret = raspberrypi_clock_property(rpi->firmware, data, + RPI_FIRMWARE_GET_MAX_CLOCK_RATE, + &max_rate); + if (ret) + return 0; + + return max_rate; +} +EXPORT_SYMBOL_GPL(rpi_firmware_clk_get_max_rate); + static const struct clk_ops raspberrypi_firmware_clk_ops = { .is_prepared = raspberrypi_fw_is_prepared, .recalc_rate = raspberrypi_fw_get_rate, diff --git a/include/soc/bcm2835/raspberrypi-clocks.h b/include/soc/bcm2835/raspberrypi-clocks.h new file mode 100644 index 000000000000..ff0b608b51a8 --- /dev/null +++ b/include/soc/bcm2835/raspberrypi-clocks.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __SOC_RASPBERRY_CLOCKS_H__ +#define __SOC_RASPBERRY_CLOCKS_H__ + +#if IS_ENABLED(CONFIG_CLK_RASPBERRYPI) +unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk); +#else +static inline unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk) +{ + return ULONG_MAX; +} +#endif + +#endif /* __SOC_RASPBERRY_CLOCKS_H__ */ From patchwork Mon Aug 15 15:31:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943744 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8300C00140 for ; Mon, 15 Aug 2022 15:32:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231622AbiHOPcJ (ORCPT ); Mon, 15 Aug 2022 11:32:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232327AbiHOPbx (ORCPT ); Mon, 15 Aug 2022 11:31:53 -0400 Received: from wout2-smtp.messagingengine.com (wout2-smtp.messagingengine.com [64.147.123.25]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBB59167E2; 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Mon, 15 Aug 2022 11:31:49 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/7] clk: bcm: rpi: Add a function to retrieve the minimum Date: Mon, 15 Aug 2022 17:31:25 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-3-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=2926; i=maxime@cerno.tech; h=from:subject:message-id; bh=G3fWEKQi3f54XxrlPgabVz9v9R9wr1SUhSPhe0bvlgw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k605p6aNW1Kn0mO0c0wnpXmJtGO1//sMbHvW6XBvVvS wPZORykLgxgXg6yYIkuMsPmSuFOzXney8c2DmcPKBDKEgYtTACYitZLhf3b+ltdrHxiefibZ36F0qr vepvigPnv9Q8nLHxdHrqjVmMHIsMlnxkZOh5ovH5YxJG+891R3yYsL6yM/TMu+ff/SdbkkaVYA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org The RaspberryPi firmware can be configured by the end user using the config.txt file. Some of these options will affect the kernel capabilities, and we thus need to be able to detect it to operate reliably. One of such parameters is the core_clock parameter that allows users to setup the clocks in a way that is suitable to reach the pixel frequencies required by the 4096x2016 resolution at 60Hz and higher modes. If the user misconfigured it, then those modes will simply not work but are still likely to be picked up by the userspace, which is a poor user-experience. The kernel can't access the config.txt file directly, but one of the effect that parameter has is that the core clock frequency minimum will be raised. Thus we can infer its setup by querying the firmware for that minimum, and if it isn't ignore any of the modes that wouldn't work. We had in the past a discussion for the maximum and it was suggested to create a small, ad-hoc function to query the RaspberryPi firmware for the minimum rate a given clock has, so let's do the same here. Signed-off-by: Maxime Ripard diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c index 182e8817eac2..b81da5b1dd1e 100644 --- a/drivers/clk/bcm/clk-raspberrypi.c +++ b/drivers/clk/bcm/clk-raspberrypi.c @@ -282,6 +282,33 @@ unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk) } EXPORT_SYMBOL_GPL(rpi_firmware_clk_get_max_rate); +unsigned long rpi_firmware_clk_get_min_rate(struct clk *clk) +{ + const struct raspberrypi_clk_data *data; + struct raspberrypi_clk *rpi; + struct clk_hw *hw; + u32 min_rate; + int ret; + + if (!clk) + return 0; + + hw = __clk_get_hw(clk); + if (!hw) + return 0; + + data = clk_hw_to_data(hw); + rpi = data->rpi; + ret = raspberrypi_clock_property(rpi->firmware, data, + RPI_FIRMWARE_GET_MIN_CLOCK_RATE, + &min_rate); + if (ret) + return 0; + + return min_rate; +} +EXPORT_SYMBOL_GPL(rpi_firmware_clk_get_min_rate); + static const struct clk_ops raspberrypi_firmware_clk_ops = { .is_prepared = raspberrypi_fw_is_prepared, .recalc_rate = raspberrypi_fw_get_rate, diff --git a/include/soc/bcm2835/raspberrypi-clocks.h b/include/soc/bcm2835/raspberrypi-clocks.h index ff0b608b51a8..627535877964 100644 --- a/include/soc/bcm2835/raspberrypi-clocks.h +++ b/include/soc/bcm2835/raspberrypi-clocks.h @@ -5,11 +5,17 @@ #if IS_ENABLED(CONFIG_CLK_RASPBERRYPI) unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk); +unsigned long rpi_firmware_clk_get_min_rate(struct clk *clk); #else static inline unsigned long rpi_firmware_clk_get_max_rate(struct clk *clk) { return ULONG_MAX; } + +static inline unsigned long rpi_firmware_clk_get_min_rate(struct clk *clk) +{ + return 0; +} #endif #endif /* __SOC_RASPBERRY_CLOCKS_H__ */ From patchwork Mon Aug 15 15:31:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943745 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8720C25B0D for ; Mon, 15 Aug 2022 15:32:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232940AbiHOPcM (ORCPT ); Mon, 15 Aug 2022 11:32:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231875AbiHOPcJ (ORCPT ); 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Mon, 15 Aug 2022 11:31:54 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/7] drm/vc4: hdmi: Fix hdmi_enable_4kp60 detection Date: Mon, 15 Aug 2022 17:31:26 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-4-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=1818; i=maxime@cerno.tech; h=from:subject:message-id; bh=0XTcURUE3scuqpvcocFWLSNEWe2VrFtmV9qgTsz3u18=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k4cTT3wx+IJm2tUxjNuLr1Hqz3mnnQ4H3Fx86zign/1 R+UEOkpZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCRFRaMDBdLyjbcyuJRf7vuXpv1qw 8JgT+f28zTU/QPV2C2dLk0SYORYUX5DLmJhc0rVc6l9JpWXfzssnTJwxnbn6atuLoh+9R2CzYA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org In order to support higher HDMI frequencies, users have to set the hdmi_enable_4kp60 parameter in their config.txt file. We were detecting this so far by calling clk_round_rate() on the core clock with the frequency we're supposed to run at when one of those modes is enabled. Whether or not the parameter was enabled could then be inferred by the returned rate since the maximum clock rate reported by the firmware was one of the side effect of setting that parameter. However, the recent clock rework we did changed what clk_round_rate() was returning to always return the minimum allowed, and thus this test wasn't reliable anymore. Let's use the new clk_get_max_rate() function to reliably determine the maximum rate allowed on that clock and fix the 4k@60Hz output. Fixes: e9d6cea2af1c ("clk: bcm: rpi: Run some clocks at the minimum rate allowed") Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 592c3b5d03e6..aa3ebda55e04 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -46,6 +46,7 @@ #include #include #include +#include #include #include #include @@ -2966,7 +2967,7 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) if (variant->max_pixel_clock == 600000000) { struct vc4_dev *vc4 = to_vc4_dev(drm); - long max_rate = clk_round_rate(vc4->hvs->core_clk, 550000000); + unsigned long max_rate = rpi_firmware_clk_get_max_rate(vc4->hvs->core_clk); if (max_rate < 550000000) vc4_hdmi->disable_4kp60 = true; From patchwork Mon Aug 15 15:31:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943746 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC24DC00140 for ; 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Mon, 15 Aug 2022 11:31:59 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 5/7] drm/vc4: hdmi: Rework hdmi_enable_4kp60 detection code Date: Mon, 15 Aug 2022 17:31:27 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-5-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=5106; i=maxime@cerno.tech; h=from:subject:message-id; bh=2OFfhn+YR/EOSwLn+smsOxwFt7ryFbFluOVjjlHJZXw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k5E9EusuzlH6L/tgS03j3qw+6Vszd7pLx4kpcDns6P/ SPXmjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEyE3YiR4Y7LrPmmd8T4n1uweht+7R Z6dPx8vMK139mrpH/c/p7JOJnhv0vWjJaV908vu67+VPnRpRVzzgYlXRIOsa+0uW+9sS3LhgUA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org In order to support higher HDMI frequencies, users have to set the hdmi_enable_4kp60 parameter in their config.txt file. This will have the side-effect of raising the maximum of the core clock, tied to the HVS, and managed by the HVS driver. However, we are querying this in the HDMI driver by poking into the HVS structure to get our struct clk handle. Let's make this part of the HVS bind implementation to have all the core clock related setup in the same place. Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index 1beb96b77b8c..d48ef302af42 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -339,6 +339,14 @@ struct vc4_hvs { struct drm_mm_node mitchell_netravali_filter; struct debugfs_regset32 regset; + + /* + * Even if HDMI0 on the RPi4 can output modes requiring a pixel + * rate higher than 297MHz, it needs some adjustments in the + * config.txt file to be able to do so and thus won't always be + * available. + */ + bool vc5_hdmi_enable_scrambling; }; struct vc4_plane { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index aa3ebda55e04..371fbc05bf5a 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -46,7 +46,6 @@ #include #include #include -#include #include #include #include @@ -277,6 +276,7 @@ static void vc4_hdmi_connector_destroy(struct drm_connector *connector) static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) { struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector); + struct vc4_dev *vc4 = to_vc4_dev(connector->dev); int ret = 0; struct edid *edid; @@ -293,7 +293,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) ret = drm_add_edid_modes(connector, edid); kfree(edid); - if (vc4_hdmi->disable_4kp60) { + if (!vc4->hvs->vc5_hdmi_enable_scrambling) { struct drm_device *drm = connector->dev; struct drm_display_mode *mode; @@ -1480,11 +1480,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, { const struct drm_connector *connector = &vc4_hdmi->connector; const struct drm_display_info *info = &connector->display_info; + struct vc4_dev *vc4 = to_vc4_dev(connector->dev); if (clock > vc4_hdmi->variant->max_pixel_clock) return MODE_CLOCK_HIGH; - if (vc4_hdmi->disable_4kp60 && clock > HDMI_14_MAX_TMDS_CLK) + if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK) return MODE_CLOCK_HIGH; if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) @@ -2965,14 +2966,6 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) vc4_hdmi->disable_wifi_frequencies = of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence"); - if (variant->max_pixel_clock == 600000000) { - struct vc4_dev *vc4 = to_vc4_dev(drm); - unsigned long max_rate = rpi_firmware_clk_get_max_rate(vc4->hvs->core_clk); - - if (max_rate < 550000000) - vc4_hdmi->disable_4kp60 = true; - } - /* * We need to have the device powered up at this point to call * our reset hook and for the CEC init. diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h index c3ed2b07df23..7506943050cf 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h @@ -155,14 +155,6 @@ struct vc4_hdmi { */ bool disable_wifi_frequencies; - /* - * Even if HDMI0 on the RPi4 can output modes requiring a pixel - * rate higher than 297MHz, it needs some adjustments in the - * config.txt file to be able to do so and thus won't always be - * available. - */ - bool disable_4kp60; - struct cec_adapter *cec_adap; struct cec_msg cec_rx_msg; bool cec_tx_ok; diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index fbaa741dda5f..3fdd2c4356f6 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -27,6 +27,8 @@ #include #include +#include + #include "vc4_drv.h" #include "vc4_regs.h" @@ -671,12 +673,18 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) hvs->regset.nregs = ARRAY_SIZE(hvs_regs); if (vc4->is_vc5) { + unsigned long max_rate; + hvs->core_clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(hvs->core_clk)) { dev_err(&pdev->dev, "Couldn't get core clock\n"); return PTR_ERR(hvs->core_clk); } + max_rate = rpi_firmware_clk_get_max_rate(hvs->core_clk); + if (max_rate >= 550000000) + hvs->vc5_hdmi_enable_scrambling = true; + ret = clk_prepare_enable(hvs->core_clk); if (ret) { dev_err(&pdev->dev, "Couldn't enable the core clock\n"); From patchwork Mon Aug 15 15:31:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37A09C25B0E for ; Mon, 15 Aug 2022 15:32:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232935AbiHOPce (ORCPT ); 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Mon, 15 Aug 2022 11:32:04 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 6/7] drm/vc4: hdmi: Add more checks for 4k resolutions Date: Mon, 15 Aug 2022 17:31:28 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-6-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=3642; i=maxime@cerno.tech; h=from:subject:message-id; bh=/B3+T5b5gJ8/wE/uR7uFJRjlugXjIMN1lxOXg37WzDw=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k7MUlT2i3UQvRNz7UKqzj8J6zn9Z0MWPZkXUMJZtP3y enOrjlIWBjEuBlkxRZYYYfMlcadmve5k45sHM4eVCWQIAxenAEzE4S4jw8OJfTF/SgTCVs1+aZQRdL nFgtOB6+pG3sgKMefWNa8CLjAyvHl4YZp5f6thgcSaosiVc36b6Z/9lvJOhE/C8f2hCSduMgEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Dom Cobley At least the 4096x2160@60Hz mode requires some overclocking that isn't available by default, even if hdmi_enable_4kp60 is enabled. Let's add some logic to detect whether we can satisfy the core clock requirements for that mode, and prevent it from being used otherwise. Signed-off-by: Dom Cobley Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index d48ef302af42..e05f62a7eed6 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -347,6 +347,12 @@ struct vc4_hvs { * available. */ bool vc5_hdmi_enable_scrambling; + + /* + * 4096x2160@60 requires a core overclock to work, so register + * whether that is sufficient. + */ + bool vc5_hdmi_enable_4096by2160; }; struct vc4_plane { diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 371fbc05bf5a..5abbb2fe41ac 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -1476,6 +1476,7 @@ vc4_hdmi_sink_supports_format_bpc(const struct vc4_hdmi *vc4_hdmi, static enum drm_mode_status vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, + const struct drm_display_mode *mode, unsigned long long clock) { const struct drm_connector *connector = &vc4_hdmi->connector; @@ -1488,6 +1489,12 @@ vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi, if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK) return MODE_CLOCK_HIGH; + /* 4096x2160@60 is not reliable without overclocking core */ + if (!vc4->hvs->vc5_hdmi_enable_4096by2160 && + mode->hdisplay > 3840 && mode->vdisplay >= 2160 && + drm_mode_vrefresh(mode) >= 50) + return MODE_CLOCK_HIGH; + if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) return MODE_CLOCK_HIGH; @@ -1522,7 +1529,7 @@ vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi, unsigned long long clock; clock = vc4_hdmi_encoder_compute_mode_clock(mode, bpc, fmt); - if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK) + if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, clock) != MODE_OK) return -EINVAL; vc4_state->tmds_char_rate = clock; @@ -1685,7 +1692,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_encoder *encoder, (mode->hsync_end % 2) || (mode->htotal % 2))) return MODE_H_ILLEGAL; - return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode->clock * 1000); + return vc4_hdmi_encoder_clock_valid(vc4_hdmi, mode, mode->clock * 1000); } static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = { diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c index 3fdd2c4356f6..6cfc1a4e7161 100644 --- a/drivers/gpu/drm/vc4/vc4_hvs.c +++ b/drivers/gpu/drm/vc4/vc4_hvs.c @@ -673,6 +673,7 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) hvs->regset.nregs = ARRAY_SIZE(hvs_regs); if (vc4->is_vc5) { + unsigned long min_rate; unsigned long max_rate; hvs->core_clk = devm_clk_get(&pdev->dev, NULL); @@ -685,6 +686,10 @@ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data) if (max_rate >= 550000000) hvs->vc5_hdmi_enable_scrambling = true; + min_rate = rpi_firmware_clk_get_min_rate(hvs->core_clk); + if (min_rate >= 600000000) + hvs->vc5_hdmi_enable_4096by2160 = true; + ret = clk_prepare_enable(hvs->core_clk); if (ret) { dev_err(&pdev->dev, "Couldn't enable the core clock\n"); From patchwork Mon Aug 15 15:31:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 12943748 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A02AC00140 for ; Mon, 15 Aug 2022 15:32:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233088AbiHOPcv (ORCPT ); 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Mon, 15 Aug 2022 11:32:09 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 7/7] drm/vc4: Make sure we don't end up with a core clock too high Date: Mon, 15 Aug 2022 17:31:29 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-7-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=2484; i=maxime@cerno.tech; h=from:subject:message-id; bh=5xL8zqAbx64ymg/R2TZazkdU4kRqZkVFXJuXP1IVv7A=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k5YZt2yOnqh5LT2jrYtu/bzGz9g4Aq+HREa9zL+wjHv nWvsO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCR5ixGhu2p88p/tNU+SEpdLytQWJ 6RpddvzDMjOW3znZtihvwzixgZTrJItM8969r9Q2jjhHlvv/Td2bTt4hPV9F9ZXMd7bqnE8QEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Following the clock rate range improvements to the clock framework, trying to set a disjoint range on a clock will now result in an error. Thus, we can't set a minimum rate higher than the maximum reported by the firmware, or clk_set_min_rate() will fail. Thus we need to clamp the rate we are about to ask for to the maximum rate possible on that clock. Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index b45dcdfd7306..4794e7235bb0 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c @@ -22,6 +22,8 @@ #include #include +#include + #include "vc4_drv.h" #include "vc4_regs.h" @@ -354,6 +356,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) struct vc4_hvs_state *new_hvs_state; struct drm_crtc *crtc; struct vc4_hvs_state *old_hvs_state; + unsigned long max_clock_rate; unsigned int channel; int i; @@ -394,11 +397,12 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) old_hvs_state->fifo_state[channel].pending_commit = NULL; } + max_clock_rate = rpi_firmware_clk_get_max_rate(hvs->core_clk); if (vc4->is_vc5) { unsigned long state_rate = max(old_hvs_state->core_clock_rate, new_hvs_state->core_clock_rate); - unsigned long core_rate = max_t(unsigned long, - 500000000, state_rate); + unsigned long core_rate = clamp_t(unsigned long, state_rate, + 500000000, max_clock_rate); drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate); @@ -432,14 +436,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) drm_atomic_helper_cleanup_planes(dev, state); if (vc4->is_vc5) { - drm_dbg(dev, "Running the core clock at %lu Hz\n", - new_hvs_state->core_clock_rate); + unsigned long core_rate = min_t(unsigned long, + max_clock_rate, + new_hvs_state->core_clock_rate); + + drm_dbg(dev, "Running the core clock at %lu Hz\n", core_rate); /* * Request a clock rate based on the current HVS * requirements. */ - WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate)); + WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); drm_dbg(dev, "Core clock actual rate: %lu Hz\n", clk_get_rate(hvs->core_clk));