From patchwork Mon Aug 15 18:14:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12943935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0B341C25B0E for ; Mon, 15 Aug 2022 18:17:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239699AbiHOSRK (ORCPT ); Mon, 15 Aug 2022 14:17:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239461AbiHOSQd (ORCPT ); Mon, 15 Aug 2022 14:16:33 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1242E2B191; Mon, 15 Aug 2022 11:14:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Q/OJAhF2xpsKnJRO+Z5+X4q3n1iyccisPiJkfEPv9oJcEE+PrX8x4EZ70qluBFO3GNUOvHp95xCg1/KauoE7YaaRKn0cVv9bQUKGuHTYtNXqYGVJj9r3sgV4tIg1n2OpGBjJ9QfhuUJjZUu86S8h/2KX+k3P3JuzNF6IVfNAq4LzgcY1m+t5JJP3qj8YLny/CAPP16zNOd2ArecX87QqJ6+Q42q9LL4m+fnhPZtKjICULWRLZciCJFL4MopHL92lf0zM5YWQKDETLHnpINIBj3X2TQK7jH8EV7zFHI6/LrMrxtFS4TKjBKusCl+Yk/V6Dpj/1CLfj6lC/JvnP4q8uQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dfuIw8r2VprovpFieVxl3HwAyp4VFvyCxXd9MG/xlT8=; b=BKQnujqpNl0qY/1Q7I+Tqm1wcrNKn6337eK+wFge1FHywCL4wpBSAG20YRKs3Kykmkeod8AYpi1SN/TVmDkdhbLtKwgJW5B/i101tVbdcSkq16HNNzL0xfla7RvITukd4qlfnjnx4IkMStKjVesk5D87CIWAczO7BFNhXPB7lqmOyb9TZpDcZBIzvLyTWgLexkNvbLwwFRjhx1pf7tTsdosZOsMNmC+L5pToJnl6BJxgFM2vRcK2TiYeZGWbFcbcjvd5URRMSNx1ghJg/80MUywwymCew8Lk4QQGXujZ777tpLeOWoOLtK1L/DiU+Hj2zmmmyPT+BjG8EdUZjnMJFA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=rosenzweig.io smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dfuIw8r2VprovpFieVxl3HwAyp4VFvyCxXd9MG/xlT8=; b=aNq02Vi7ApzOKILgUyL1JCumiPISeaC+t6jH2IjDXMy7Vj/dBRpAohiFvL8HNjbEtzTtuTIta+vSgVlDBS5T5K9csTIeHAg8iaPwqj2aWRS08sqiMEEIhzuFEBj2gsHrsNpzeyVMGyAxCBy7U20lXnO/mjYeiCVB1CnTZcSiNDYDVHo3FAHXjaB7zrEitK9JhaQrYrgS0JaFEN4Qmr18ZeHls9u7qSETWsHz4tGwyUg/OPE+YkWauObM3FDiClJ67mHGVOqinyi+2rypPJg7ma/h1H2IZ4rdSBEi5TV2a32HNwRJ1RiVbTgVrQpKPGjL6svPMaHpfNha4eXW8PKgZw== Received: from BN8PR15CA0056.namprd15.prod.outlook.com (2603:10b6:408:80::33) by BL1PR12MB5270.namprd12.prod.outlook.com (2603:10b6:208:31e::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5525.11; Mon, 15 Aug 2022 18:14:49 +0000 Received: from BN8NAM11FT066.eop-nam11.prod.protection.outlook.com (2603:10b6:408:80:cafe::12) by BN8PR15CA0056.outlook.office365.com (2603:10b6:408:80::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5482.12 via Frontend Transport; Mon, 15 Aug 2022 18:14:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.236) by BN8NAM11FT066.mail.protection.outlook.com (10.13.177.138) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5525.11 via Frontend Transport; Mon, 15 Aug 2022 18:14:48 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Mon, 15 Aug 2022 18:14:47 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 15 Aug 2022 11:14:47 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 15 Aug 2022 11:14:46 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 1/5] iommu: Return -EMEDIUMTYPE for incompatible domain and device/group Date: Mon, 15 Aug 2022 11:14:33 -0700 Message-ID: <20220815181437.28127-2-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220815181437.28127-1-nicolinc@nvidia.com> References: <20220815181437.28127-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2794b503-8b13-4f9e-01af-08da7eea0a83 X-MS-TrafficTypeDiagnostic: BL1PR12MB5270:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Df6JL2AdNs2b/gPU45ctyeBfbQyhpEnRbkF1EWi+GpzvZ9gNaQaOaPE8Muv9rl3hUVMmtw6pHiL4gZQaBpKVN+nPjdMVJKQlEgjzXb4zGAYVWexlv3kwbX2gdZTJyM+GBDP8FvAUpc66BK5UrEWh8PTNOC1oQNMoCaGirjOzJ0zT8gj5BEaUq0lbm08+a3BkW2Q/eK8MiVaAPSh/3mstMXKIBK1vRjKeNBF/kqdFpi9kBagtH8Ge1sVHGVZaDKFoEYqLbv0PptRZIBnbzvZomlyqAcJ1NzPI7EdaPvBq0UMy9kJi8VTKagJy6xggPHIRIef71Fkj4OFoHpeh2Rt81HJnq18q72J6GPozJZssTgPTOg9hjDOtw+6reDGpdPv1p8NbNJnVjB6+C+D2yDeQQuYRxpwEbUK9bb6ZVjoX1nI8cQyzxr5tIsf4YEp+iFbajHoPs1iZ2LBpC2lEo8mjuAK29yitXDr5YRsV8PbNxYsaQllIGT/dY4XnlqBGYxOZzjCO7vcVW/GeDp5SFZL/RWPFTaC0fF27o1vGtxO0Lr+7hqZ04LuFTneQSu2BshzXkwmzkHBNIv6RMGYrvVAxW4PyWtCxxGNlJ/X9ZFYrooOoGLxGp7bmuPnQsD0a33Qi4H9iDqQDWWOgJ+83dueSz+gvmCl1YNMCCrAHBBH5qTKWnjUxbQSgsh68zJdNDwE4v1yGxov4Zm5thsN6syHYR6NmTABWIjJhk/VOCgxfV/iu/qQKB2ZtdgnoYtXd2wSGj5p0PBLqTr9jCy+rh9Eb46x1DCmzOEFfz9kC3xTXk/rnhC9zi0k+0exAkdeA/rNnHXQxI3dPKXrMvraK3BkFtRVKQI3gKfVtWKLaf48Q5rClrmMuFdU0NGTcrOW5GDPOspnqXXBf/sSlJBkPyG7XzA== X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(396003)(376002)(39860400002)(346002)(136003)(46966006)(40470700004)(36840700001)(7406005)(7416002)(40460700003)(1076003)(5660300002)(8936002)(40480700001)(2906002)(26005)(356005)(86362001)(30864003)(81166007)(82310400005)(41300700001)(426003)(186003)(7696005)(36860700001)(6666004)(2616005)(336012)(47076005)(83380400001)(478600001)(4326008)(8676002)(316002)(82740400003)(70206006)(54906003)(110136005)(70586007)(36756003)(334744004)(36900700001)(473944003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Aug 2022 18:14:48.7651 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2794b503-8b13-4f9e-01af-08da7eea0a83 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5270 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Cases like VFIO wish to attach a device to an existing domain that was not allocated specifically from the device. This raises a condition where the IOMMU driver can fail the domain attach because the domain and device are incompatible with each other. This is a soft failure that can be resolved by using a different domain. Provide a dedicated errno from the IOMMU driver during attach that the reason attached failed is because of domain incompatability. EMEDIUMTYPE is chosen because it is never used within the iommu subsystem today and evokes a sense that the 'medium' aka the domain is incompatible. VFIO can use this to know attach is a soft failure and it should continue searching. Otherwise the attach will be a hard failure and VFIO will return the code to userspace. Update all drivers to return EMEDIUMTYPE in their failure paths that are related to domain incompatability. Also remove adjacent error prints for these soft failures, to prevent a kernel log spam, since -EMEDIUMTYPE is clear enough to indicate an incompatability error. Add kdocs describing this behavior. Suggested-by: Jason Gunthorpe Reviewed-by: Kevin Tian Reviewed-by: Lu Baolu Reviewed-by: Jason Gunthorpe Cc: Joerg Roedel Cc: Will Deacon Cc: Robin Murphy Signed-off-by: Nicolin Chen --- drivers/iommu/amd/iommu.c | 2 +- drivers/iommu/apple-dart.c | 4 +-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 15 +++-------- drivers/iommu/arm/arm-smmu/arm-smmu.c | 5 +--- drivers/iommu/arm/arm-smmu/qcom_iommu.c | 9 ++----- drivers/iommu/intel/iommu.c | 10 +++----- drivers/iommu/iommu.c | 28 +++++++++++++++++++++ drivers/iommu/ipmmu-vmsa.c | 4 +-- drivers/iommu/omap-iommu.c | 3 +-- drivers/iommu/s390-iommu.c | 2 +- drivers/iommu/sprd-iommu.c | 6 ++--- drivers/iommu/tegra-gart.c | 2 +- drivers/iommu/virtio-iommu.c | 3 +-- 13 files changed, 47 insertions(+), 46 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 65b8e4fd8217..6a5bd0cfc06a 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -1755,7 +1755,7 @@ static int attach_device(struct device *dev, if (domain->flags & PD_IOMMUV2_MASK) { struct iommu_domain *def_domain = iommu_get_dma_domain(dev); - ret = -EINVAL; + ret = -EMEDIUMTYPE; if (def_domain->type != IOMMU_DOMAIN_IDENTITY) goto out; diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index 1b1725759262..87f1829d24ea 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -495,10 +495,10 @@ static int apple_dart_attach_dev(struct iommu_domain *domain, if (cfg->stream_maps[0].dart->force_bypass && domain->type != IOMMU_DOMAIN_IDENTITY) - return -EINVAL; + return -EMEDIUMTYPE; if (!cfg->stream_maps[0].dart->supports_bypass && domain->type == IOMMU_DOMAIN_IDENTITY) - return -EINVAL; + return -EMEDIUMTYPE; ret = apple_dart_finalize_domain(domain, cfg); if (ret) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index d32b02336411..a3717961d248 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2429,24 +2429,15 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) goto out_unlock; } } else if (smmu_domain->smmu != smmu) { - dev_err(dev, - "cannot attach to SMMU %s (upstream of %s)\n", - dev_name(smmu_domain->smmu->dev), - dev_name(smmu->dev)); - ret = -ENXIO; + ret = -EMEDIUMTYPE; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && master->ssid_bits != smmu_domain->s1_cfg.s1cdmax) { - dev_err(dev, - "cannot attach to incompatible domain (%u SSID bits != %u)\n", - smmu_domain->s1_cfg.s1cdmax, master->ssid_bits); - ret = -EINVAL; + ret = -EMEDIUMTYPE; goto out_unlock; } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 && smmu_domain->stall_enabled != master->stall_enabled) { - dev_err(dev, "cannot attach to stall-%s domain\n", - smmu_domain->stall_enabled ? "enabled" : "disabled"); - ret = -EINVAL; + ret = -EMEDIUMTYPE; goto out_unlock; } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index dfa82df00342..26af6d923321 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1167,10 +1167,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) * different SMMUs. */ if (smmu_domain->smmu != smmu) { - dev_err(dev, - "cannot attach to SMMU %s whilst already attached to domain on SMMU %s\n", - dev_name(smmu_domain->smmu->dev), dev_name(smmu->dev)); - ret = -EINVAL; + ret = -EMEDIUMTYPE; goto rpm_put; } diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c index 17235116d3bb..0daee6d8d993 100644 --- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c +++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c @@ -381,13 +381,8 @@ static int qcom_iommu_attach_dev(struct iommu_domain *domain, struct device *dev * Sanity check the domain. We don't support domains across * different IOMMUs. */ - if (qcom_domain->iommu != qcom_iommu) { - dev_err(dev, "cannot attach to IOMMU %s while already " - "attached to domain on IOMMU %s\n", - dev_name(qcom_domain->iommu->dev), - dev_name(qcom_iommu->dev)); - return -EINVAL; - } + if (qcom_domain->iommu != qcom_iommu) + return -EMEDIUMTYPE; return 0; } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 7cca030a508e..560d2c3e9304 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4174,19 +4174,15 @@ static int prepare_domain_attach_device(struct iommu_domain *domain, return -ENODEV; if (dmar_domain->force_snooping && !ecap_sc_support(iommu->ecap)) - return -EOPNOTSUPP; + return -EMEDIUMTYPE; /* check if this iommu agaw is sufficient for max mapped address */ addr_width = agaw_to_width(iommu->agaw); if (addr_width > cap_mgaw(iommu->cap)) addr_width = cap_mgaw(iommu->cap); - if (dmar_domain->max_addr > (1LL << addr_width)) { - dev_err(dev, "%s: iommu width (%d) is not " - "sufficient for the mapped address (%llx)\n", - __func__, addr_width, dmar_domain->max_addr); - return -EFAULT; - } + if (dmar_domain->max_addr > (1LL << addr_width)) + return -EMEDIUMTYPE; dmar_domain->gaw = addr_width; /* diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 780fb7071577..d7416f6d9bab 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1975,6 +1975,20 @@ static int __iommu_attach_device(struct iommu_domain *domain, return ret; } +/** + * iommu_attach_device - Attach a device to an IOMMU domain + * @domain: IOMMU domain to attach + * @dev: Device that will be attached + * + * Returns 0 on success and error code on failure + * + * Specifically, -EMEDIUMTYPE is returned as a soft failure if the domain and + * the device are incompatible in some way. This indicates that a caller should + * try another existing IOMMU domain or allocate a new one. And note that it's + * recommended to keep kernel print free when reporting -EMEDIUMTYPE error, as + * this function can be called to test compatibility with domains that will fail + * the test, which will result in a kernel log spam. + */ int iommu_attach_device(struct iommu_domain *domain, struct device *dev) { struct iommu_group *group; @@ -2101,6 +2115,20 @@ static int __iommu_attach_group(struct iommu_domain *domain, return ret; } +/** + * iommu_attach_group - Attach an IOMMU group to an IOMMU domain + * @domain: IOMMU domain to attach + * @group: IOMMU group that will be attached + * + * Returns 0 on success and error code on failure + * + * Specifically, -EMEDIUMTYPE is returned as a soft failure if the domain and + * the device are incompatible in some way. This indicates that a caller should + * try another existing IOMMU domain or allocate a new one. And note that it's + * recommended to keep kernel print free when reporting -EMEDIUMTYPE error, as + * this function can be called to test compatibility with domains that will fail + * the test, which will result in a kernel log spam. + */ int iommu_attach_group(struct iommu_domain *domain, struct iommu_group *group) { int ret; diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 1d42084d0276..0103480648cb 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -628,9 +628,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain, * Something is wrong, we can't attach two devices using * different IOMMUs to the same domain. */ - dev_err(dev, "Can't attach IPMMU %s to domain on IPMMU %s\n", - dev_name(mmu->dev), dev_name(domain->mmu->dev)); - ret = -EINVAL; + ret = -EMEDIUMTYPE; } else dev_info(dev, "Reusing IPMMU context %u\n", domain->context_id); diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index d9cf2820c02e..6bc8925726bf 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1471,8 +1471,7 @@ omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev) /* only a single client device can be attached to a domain */ if (omap_domain->dev) { - dev_err(dev, "iommu domain is already attached\n"); - ret = -EBUSY; + ret = -EMEDIUMTYPE; goto out; } diff --git a/drivers/iommu/s390-iommu.c b/drivers/iommu/s390-iommu.c index c898bcbbce11..ddcb78b284bb 100644 --- a/drivers/iommu/s390-iommu.c +++ b/drivers/iommu/s390-iommu.c @@ -127,7 +127,7 @@ static int s390_iommu_attach_device(struct iommu_domain *domain, /* Allow only devices with identical DMA range limits */ } else if (domain->geometry.aperture_start != zdev->start_dma || domain->geometry.aperture_end != zdev->end_dma) { - rc = -EINVAL; + rc = -EMEDIUMTYPE; spin_unlock_irqrestore(&s390_domain->list_lock, flags); goto out_restore; } diff --git a/drivers/iommu/sprd-iommu.c b/drivers/iommu/sprd-iommu.c index 511959c8a14d..2bc1d34981cc 100644 --- a/drivers/iommu/sprd-iommu.c +++ b/drivers/iommu/sprd-iommu.c @@ -237,10 +237,8 @@ static int sprd_iommu_attach_device(struct iommu_domain *domain, struct sprd_iommu_domain *dom = to_sprd_domain(domain); size_t pgt_size = sprd_iommu_pgt_size(domain); - if (dom->sdev) { - pr_err("There's already a device attached to this domain.\n"); - return -EINVAL; - } + if (dom->sdev) + return -EMEDIUMTYPE; dom->pgt_va = dma_alloc_coherent(sdev->dev, pgt_size, &dom->pgt_pa, GFP_KERNEL); if (!dom->pgt_va) diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index e5ca3cf1a949..9d81cc467651 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -112,7 +112,7 @@ static int gart_iommu_attach_dev(struct iommu_domain *domain, spin_lock(&gart->dom_lock); if (gart->active_domain && gart->active_domain != domain) { - ret = -EBUSY; + ret = -EMEDIUMTYPE; } else if (dev_iommu_priv_get(dev) != domain) { dev_iommu_priv_set(dev, domain); gart->active_domain = domain; diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 08eeafc9529f..6172763c69b8 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -733,8 +733,7 @@ static int viommu_attach_dev(struct iommu_domain *domain, struct device *dev) */ ret = viommu_domain_finalise(vdev, domain); } else if (vdomain->viommu != vdev->viommu) { - dev_err(dev, "cannot attach to foreign vIOMMU\n"); - ret = -EXDEV; + ret = -EMEDIUMTYPE; } mutex_unlock(&vdomain->mutex); From patchwork Mon Aug 15 18:14:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12943939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02EE7C00140 for ; Mon, 15 Aug 2022 18:21:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239398AbiHOSVC (ORCPT ); Mon, 15 Aug 2022 14:21:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240497AbiHOSUT (ORCPT ); Mon, 15 Aug 2022 14:20:19 -0400 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2066.outbound.protection.outlook.com [40.107.244.66]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4A642A730; Mon, 15 Aug 2022 11:16:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=IZXH9zGhmkKxoilZHg/Lc/WPfJ7cgwqCALMm3Fkb52iFAhvCW2Z2lOcmw6etPB7WYcFQVL3SaU+ElCmGOFp06ldGwUeax0S8oRWuoHikBi8jvMT3feaTwssofSxHstBuYr+X9uA9cQTDZomaGmxnWTLG/iKjRI3aLs2F4prOHBCoiS+XAIud1wyzhxvaMSa7uoRrdua9BVqwnCZ7uJWrVZb4NsjTq18agv3wow+sTEBgBOUiFE0RnH8a24f2AXC1pHGj8mCGW7/rLTMPG6oznh3XYZTQmPJgeal0D6pUoclkFK9eQtJmsc+t06doDHwytFUZSI3/54XFBfB4C7w53Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=cz4dKs4M8LotOQ3mq+dlLOExrZWEEoncspj4cooOucQ=; b=me366VbprlsdIZhGvTeoqn/GkuMk4KmaIs0EsM+kIWGbwD+eUO/8pkrAftWuN9WpPmeVVbFrrIFB5B2LcG8kh5UYu+Wqfzbu5N8a4BV5E4VTVa4Y6trK9gIvcKr4+TB1vmzhNzwSqxPh7cTatf/45mHo5U5I51C3fY1Aq0frM+IkeCRqghtsrfBrLjFRbb5BvcOptddDyW5PxFCpcVy8AO9a7ugRP+rBzCMyY65/BB7im+6OcydnEW9SGzq+sR5zVqw3XnOVvf53dN2ZlwN5cgvRFf4uMMsGNb5X+CcCFYUz0u31/nvu/bxmTFz9xdsCg2HtTyUb+L7FhXeulQXDEA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.235) smtp.rcpttodomain=rosenzweig.io smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cz4dKs4M8LotOQ3mq+dlLOExrZWEEoncspj4cooOucQ=; b=Z+ptxr4EzfSet2jHjIK+WjlqVuc8ofzvOy23a1L0CCnrB2f+mjxCBxFqHH/EiHMqQvBsqRwei5id/zqSLvfQUOKt4rwIIn9RYaVLwP2z8ZQZMDyZ9xMRvHnmZ8+HWz7PbJR44ctEwoGq8PsXMc3KDGx98ivrkXK6ViKW7sSJfFyXPpR9BqG1R62Qr/E2nm38SzMpSqCggraxNqN9G/JSueju/wa0V86sqTFPh1GjzE3ogILIwJe9xxAqhW0/SmgJPn9vpW3i6MYp+PB4E6SX/b9d0mHyHZ5hszZFfUkmnanA3VsUAElXneUJZb8peZc3o1EkgKzFoQWoh2Fdx3GQ4A== Received: from DM6PR12CA0022.namprd12.prod.outlook.com (2603:10b6:5:1c0::35) by MN2PR12MB3453.namprd12.prod.outlook.com (2603:10b6:208:c3::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.16; Mon, 15 Aug 2022 18:16:37 +0000 Received: from DM6NAM11FT113.eop-nam11.prod.protection.outlook.com (2603:10b6:5:1c0:cafe::d2) by DM6PR12CA0022.outlook.office365.com (2603:10b6:5:1c0::35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.16 via Frontend Transport; Mon, 15 Aug 2022 18:16:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.235) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.235 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.235; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.235) by DM6NAM11FT113.mail.protection.outlook.com (10.13.173.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5546.7 via Frontend Transport; Mon, 15 Aug 2022 18:16:37 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Mon, 15 Aug 2022 18:14:50 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 15 Aug 2022 11:14:49 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 15 Aug 2022 11:14:47 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 2/5] vfio/iommu_type1: Prefer to reuse domains vs match enforced cache coherency Date: Mon, 15 Aug 2022 11:14:34 -0700 Message-ID: <20220815181437.28127-3-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220815181437.28127-1-nicolinc@nvidia.com> References: <20220815181437.28127-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8a4977c7-0155-44d1-2b43-08da7eea4b0c X-MS-TrafficTypeDiagnostic: MN2PR12MB3453:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: P4jC+NffVH3HGayyE+Tj59H3BENIdafaISvO2y0WUe6Eq7lJ5oMDsQ5AvbTg5r11Yz74zSsJhHBbXjMEGfMDjwjeD5r160HkV8zN0aUen8VCc4ivNeJQVepZbv3Qu9RwYcIEJ2fR1cCSZ48ESkgcJul7jAqNFzNfjE5xHPlI3CR4z9sJ569dYb1E0N5rVgqzedtTf3XeEL7mPe+IUYNUYsOsLXgTlFeOw9tlaO6SsakVCDewitERWOl9gbBczPOzzypm0dOP+NZsAcoo51UQG0eAVdiK9iwq0b+RuP/iO9bS+40RogvjikNfPF1b86DRB9dyzmTPtx1AH4oFDBBmS1XhOAjfCbjSwYvqEEpDYPwN878gV8GV7lftOTiFBdsJfu1rCMgom3+ok8QVia1SJLclkEYlHece2mn1EoRpb413F939QF0xBHPhzhesZsFHoh2X3KASwQaVMAWyhqieb3l4NkC6PKVbTGNw6fkci+7gQqEKXOG7P85rUHqytlZAd0AwbbKmyG8f5NWFCXmMJvrxj75hNXr8OVjM1fDNg0ODBYDEkeu6q49yWafuBmaWSwGlUW/z5hd8PpEKbBfToffajljyYCv8ZESJ6Ek9v8phDi4u2n/VIXpBlBrNlmWmtXiCb1UVGvmYAS04AlAJQs7DPP0jdHkB7ZiJpurVhS8c4sWreIbDAPjZax8Qt6JIeu0BunKk8Y3HyZiIqF/ZuRDt/Q0t1xViiA1fUEKpveTkx/L1V+SSPqGuLOlk3aD6RPYCOz3XgcsyDYBs18nErrNE4jNHsjNNT0MvtcZRjSTxZ+9a0LUMk+0djKfUTUjN+wp9kfTsduoZUKw3DPPr2Q== X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(39860400002)(376002)(346002)(136003)(396003)(36840700001)(40470700004)(46966006)(70586007)(7416002)(478600001)(4326008)(8936002)(2906002)(5660300002)(70206006)(356005)(82740400003)(7406005)(81166007)(40480700001)(6666004)(2616005)(1076003)(7696005)(26005)(186003)(41300700001)(40460700003)(36860700001)(336012)(426003)(8676002)(82310400005)(110136005)(54906003)(47076005)(86362001)(83380400001)(316002)(36756003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Aug 2022 18:16:37.1476 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a4977c7-0155-44d1-2b43-08da7eea4b0c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT113.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3453 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jason Gunthorpe The KVM mechanism for controlling wbinvd is based on OR of the coherency property of all devices attached to a guest, no matter whether those devices are attached to a single domain or multiple domains. On the other hand, the benefit to using separate domains was that those devices attached to domains supporting enforced cache coherency always mapped with the attributes necessary to provide that feature, therefore if a non-enforced domain was dropped, the associated group removal would re-trigger an evaluation by KVM. In practice however, the only known cases of such mixed domains included an Intel IGD device behind an IOMMU lacking snoop control, where such devices do not support hotplug, therefore this scenario lacks testing and is not considered sufficiently relevant to support. After all, KVM won't take advantage of trying to push a device that could do enforced cache coherency to a dedicated domain vs re-using an existing domain, which is non-coherent. Simplify this code and eliminate the test. This removes the only logic that needed to have a dummy domain attached prior to searching for a matching domain and simplifies the next patches. It's unclear whether we want to further optimize the Intel driver to update the domain coherency after a device is detached from it, at least not before KVM can be verified to handle such dynamics in related emulation paths (wbinvd, vcpu load, write_cr0, ept, etc.). In reality we don't see an usage requiring such optimization as the only device which imposes such non-coherency is Intel GPU which even doesn't support hotplug/hot remove. Signed-off-by: Jason Gunthorpe Reviewed-by: Kevin Tian Reviewed-by: Lu Baolu Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index db516c90a977..88ee6aaf1c88 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2296,9 +2296,7 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, * testing if they're on the same bus_type. */ list_for_each_entry(d, &iommu->domain_list, next) { - if (d->domain->ops == domain->domain->ops && - d->enforce_cache_coherency == - domain->enforce_cache_coherency) { + if (d->domain->ops == domain->domain->ops) { iommu_detach_group(domain->domain, group->iommu_group); if (!iommu_attach_group(d->domain, group->iommu_group)) { From patchwork Mon Aug 15 18:14:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12943936 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 245BFC282E7 for ; Mon, 15 Aug 2022 18:17:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239725AbiHOSRL (ORCPT ); Mon, 15 Aug 2022 14:17:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239469AbiHOSQi (ORCPT ); Mon, 15 Aug 2022 14:16:38 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2088.outbound.protection.outlook.com [40.107.220.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8EAF32A429; Mon, 15 Aug 2022 11:14:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=enbsh/gZhks53b2941Kv0NJjbaH6QaODQHh4I4xnuxxOfQnyrhl9VVAiYdSTRxz4/VElBBnI8isDLrMZYILteC/LAYYuVokHNZE55o/c3fxUzOKeKyqxk3/8O4qvoddN3ZhL4TJbmlQ8eAklje1sP8zVJG//jR9Sqm3Yx9AfynLeL6/HyzrVP6fAAa0h7ywTNQQWsMANGXbNsq9DrttsMkALRoNg/p0YX10XDjhylk2nMu2JP2LMWthEiFzynCEOXl8H7Crh/pBqnrHxDNiuCik09koBWLVIIERkyW4k6wtFPp8uolHiMA3ewV5ZW8GOvX28Bjm5h2eU4Vwir+0UrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=qpnpNwONrQeADt3Y29AcpqghT/neGKgKsz7BqqQHeHQ=; b=nl1OohM6GwU02CSXjqfMaup6eXUbiUmrjpKeuznBJJlVPixYKdP/Z+Ibg4P0DjaeC2uQpBWfI5oNxUNGAYyBi30X/z9FZ3mWNeOCT6Gge5Bnb+aJ7cUKl8zkyvXjW2E9lud8i4hLy8+QR7SMstDyHFILM25wQMgWpuYoQ4WaWfSU7nYVV0QSmAfBQo7C2mate9b7YE2X/dY2n9TxJa0VXqUkz/rh0YHzIPMqk9Aob+FGXgBWjMcluE9RI1dVxoIjcV+xlxi1HzOn4ggITNlOmjGyenTWmJqWkqubyxk0TiO7nWl2HkhYyxZ2zuYpbrilX5FJsRyGmdAGrKddV1RnUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=rosenzweig.io smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qpnpNwONrQeADt3Y29AcpqghT/neGKgKsz7BqqQHeHQ=; b=QT6tez7TV4kxYK52kJd6dJcr5R4Br9Twa4ltZt+kVrDwUCfDrjbh003sP4CZZSUekEWsBwCwd/seAlVY38ynxsRFXOUocLU4j2UibtxlBGF3HithMufjNuUnzRLQvkIcYI8COcWLQEQknussymfQL8vvdqD4idbYX7P3ZE4BVB4sPnMj2wSZ9lnL7EoPFsOZsEStKBym1+arMXBbNEHgmT8pBDKiJfwhrBZFvTd+5vVD8BcByAK7jo08iE2zc96IavqUsUrZMzbb6AoqU0wTFqio19IJHdloTWdAx+OPwBsZxjlEszEfaTxMhfIrz9Wato40nLgFyZOVJJe3p953Lw== Received: from BN6PR17CA0024.namprd17.prod.outlook.com (2603:10b6:404:65::34) by BN8PR12MB2849.namprd12.prod.outlook.com (2603:10b6:408:6e::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.17; Mon, 15 Aug 2022 18:14:53 +0000 Received: from BN8NAM11FT073.eop-nam11.prod.protection.outlook.com (2603:10b6:404:65:cafe::4b) by BN6PR17CA0024.outlook.office365.com (2603:10b6:404:65::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.17 via Frontend Transport; Mon, 15 Aug 2022 18:14:53 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.236) by BN8NAM11FT073.mail.protection.outlook.com (10.13.177.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5546.7 via Frontend Transport; Mon, 15 Aug 2022 18:14:52 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Mon, 15 Aug 2022 18:14:51 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 15 Aug 2022 11:14:51 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 15 Aug 2022 11:14:49 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 3/5] vfio/iommu_type1: Remove the domain->ops comparison Date: Mon, 15 Aug 2022 11:14:35 -0700 Message-ID: <20220815181437.28127-4-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220815181437.28127-1-nicolinc@nvidia.com> References: <20220815181437.28127-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 92de01a5-53b0-4d26-9bdd-08da7eea0cb6 X-MS-TrafficTypeDiagnostic: BN8PR12MB2849:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7XAL1soosE8cJlW4iZAxAZehDcxIR3gTd2K5bI9U4Xa2ZvNaUAl5+/lhsNJqrx1QtmJQzwx90OGql6Fh86FDwdj4llPPJBwI9iTj6JTdXtAu0wfFYE54cDZpRxoVJRUUqJDLc/t6f5V3uvXMVBMDMUMAAXclpb2EjE/FHvb4qztrIJwkqHhYewPUaRvQpIpN/sRjUZiw2SzskihTK7sz1BKcTbT5thuwZbwvv3dZM4A46pt6cI35RzB+aNW5wkGBYOgpBy1gNJCrh4CH3QOhYA8Hx70tqFXTNoB6LiAs8jVTMxUnrprzWO4BejPqAs2GFQm9wOwjkN8VdzARvuD6Ew+qTOaeU8dxCRVP/zlM8gARQ8MqVwIDEJrFfL3apUOp9iFrRoQXcsxxnJ/6UwvdEwiIAhZ4fGt1GMTuVc+lH6YIAD8NQNkSDlHSmk5H+M/DVa7OOsFN1AGjg78NB8vF/Klit9r1JjUo3xpNIsnmgFH6LFp6cfH2GMuSD28WwIO43oEIrXavyK6wPPrg58/RDpUxNMcwTdKH/mh1pyR0dhkG6N50TZ0z0B44FDJIMaIaFMnXvk3TP47BZ61adOkFMqNIZJjwTJYKtWrZBtPSlicAdQvrV7TGoFjuV96vPjEMAOFQjOlPCNttGFj+y9KQ7wq7xAA7fcw+a/I2ogFWlhADHlp7zN3d9JDk3UCXaGum5qKVrO4Lf8peBXqCQjJP/AW3c9Q9GMWAk2r+qVAFfUlWYNuuCvcR9kDRUDk0rfuXIuYFzyvusRehhVVHyTETvRjbLMEt6vGJPdBGmgzXVGdcAs6J7yxVGHZPupuVU2ZV1JfbCQvyK0x5EYYEDpvjmEKd8qGuQIWpCioNQ+VduQjTYeXsKjcSYVcf7Pd/RfbS+EaMYe5o5Qa4ia6e5TDrYdo8DNhwAKCK6wYpYIlGzUV9wkcxeo7Lz7Le7Q2FOx3lPWNBWgpiee8T6Zh65P+B2Q== X-Forefront-Antispam-Report: CIP:12.22.5.236;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(396003)(39860400002)(376002)(346002)(136003)(46966006)(36840700001)(40470700004)(70586007)(8676002)(4326008)(40460700003)(316002)(54906003)(110136005)(40480700001)(82310400005)(5660300002)(7416002)(7406005)(8936002)(82740400003)(81166007)(70206006)(36860700001)(356005)(36756003)(2906002)(478600001)(41300700001)(7696005)(6666004)(86362001)(26005)(83380400001)(966005)(2616005)(1076003)(426003)(47076005)(336012)(186003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Aug 2022 18:14:52.5368 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 92de01a5-53b0-4d26-9bdd-08da7eea0cb6 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.236];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT073.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB2849 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The domain->ops validation was added, as a precaution, for mixed-driver systems. Per Robin's remarks, * While bus_set_iommu() still exists, the core code prevents multiple drivers from registering, so we can't really run into a situation of having a mixed-driver system: https://lore.kernel.org/kvm/6e1280c5-4b22-ebb3-3912-6c72bc169982@arm.com/ * And there's plenty more significant problems than this to fix; in future when many can be permitted, we will rely on the IOMMU core code to check the domain->ops: https://lore.kernel.org/kvm/6575de6d-94ba-c427-5b1e-967750ddff23@arm.com/ So remove the check in VFIO for simplicity. Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 32 +++++++++++--------------------- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 88ee6aaf1c88..523927d61aac 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2288,29 +2288,19 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, domain->domain->ops->enforce_cache_coherency( domain->domain); - /* - * Try to match an existing compatible domain. We don't want to - * preclude an IOMMU driver supporting multiple bus_types and being - * able to include different bus_types in the same IOMMU domain, so - * we test whether the domains use the same iommu_ops rather than - * testing if they're on the same bus_type. - */ + /* Try to match an existing compatible domain */ list_for_each_entry(d, &iommu->domain_list, next) { - if (d->domain->ops == domain->domain->ops) { - iommu_detach_group(domain->domain, group->iommu_group); - if (!iommu_attach_group(d->domain, - group->iommu_group)) { - list_add(&group->next, &d->group_list); - iommu_domain_free(domain->domain); - kfree(domain); - goto done; - } - - ret = iommu_attach_group(domain->domain, - group->iommu_group); - if (ret) - goto out_domain; + iommu_detach_group(domain->domain, group->iommu_group); + if (!iommu_attach_group(d->domain, group->iommu_group)) { + list_add(&group->next, &d->group_list); + iommu_domain_free(domain->domain); + kfree(domain); + goto done; } + + ret = iommu_attach_group(domain->domain, group->iommu_group); + if (ret) + goto out_domain; } vfio_test_domain_fgsp(domain); From patchwork Mon Aug 15 18:14:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12943938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C959BC25B0E for ; Mon, 15 Aug 2022 18:21:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232119AbiHOSVA (ORCPT ); Mon, 15 Aug 2022 14:21:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240495AbiHOSUT (ORCPT ); Mon, 15 Aug 2022 14:20:19 -0400 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2045.outbound.protection.outlook.com [40.107.220.45]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 734932A719; Mon, 15 Aug 2022 11:16:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=hLMzVn2yMkrkIfEZ/eE4cLdbNQZLUdKpUDkYIeVtjLHq0vs/idtfpkTh0uCbpjX89Mq2cvx+Dl11zGG6H8LmovVmLKxZXpIe9POpb64KQ95c3RHdgmK8wXQ6M41JhGsf7s6YQ0rpRwyLBqrUw4sERW/rOQ/a4Aw+SCELbQ9tq5Ypp7+0Dkz0j5/4WRGqNA/i1mGb9TIAq2/j01p85oQiXM3qUmK/XRAryi5AGkHGOAzRCD8G/+2CAKFiC+RTPNG8zQc4e+tXjn+PbzMr25O8fTKu0y60QKmmqB2rCF/MPe1Y1c2Y5c31lXDNVXtUntfo6yuwJ/U1FpY41s5v559r2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=wcakuXyxFswuCTVAy8lc/1Px7kpmxatALTQ0BFKkvrg=; b=XlqIUei/fOa5PQFz2yu+5qWO3WF6ctlYoBeOeEqWDeW/qYEoSAppVgkCRet7PRocQSI4RhyRhacZ+ubhpyPhdmSpD3NiQvnSE1fJ5C7dKzJ3G0T4eHILUB5iUKRJ1tYW2uT8NTy5brultLyrn2r528XbRBP5tRW31Mlz/T/kiCaIOOtuawZSW+LqjZWri9vvl1hvxhLAKSGiqonch+ScFGJ+SrAHKq8J3UkU9F0XIOLOBTjiQVYtdYJNfn2ECnQ9aJEJbnml2ZeN+qUNq60TzvQmQBD0rGmnINzOoTGg6/beUlnT6SFlUT3rtnc5//EiyXRMIQbVpr7EBuUGqWc8Xg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.235) smtp.rcpttodomain=rosenzweig.io smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=wcakuXyxFswuCTVAy8lc/1Px7kpmxatALTQ0BFKkvrg=; b=RdMjUVsib/EQeYoY0hAPyk/lD8ZNhuvqMhoDOJAmzOGgGlBIjb4EkXFiCaBiaEKm6HF50/WTJu4647/0G4B/so4c6sCXbpO9A0F89Z3vyVRquiaULLxs56EKszhZpxB2Aj8tAGDiHwfRTQTcWpjyPTADZOU2djSHKeFcnLD/2OaZVmgIyX8r11vV5K+HIlob0yJrNYH9a1PunZEGS6616nbV8lW9WZ8NK4HqYORPfO6aP8yvBbMHIjZrL1qwEyRWJk4mvkipfRB1WuurFGZpO1m/+vpwdm2FDILJkbcpcrbxyZuO7+9iI4dLZu63eFH6/ilcVjZJVzVlIr0FMEnnXA== Received: from DM6PR12CA0010.namprd12.prod.outlook.com (2603:10b6:5:1c0::23) by PH8PR12MB6721.namprd12.prod.outlook.com (2603:10b6:510:1cc::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.15; Mon, 15 Aug 2022 18:16:38 +0000 Received: from DM6NAM11FT113.eop-nam11.prod.protection.outlook.com (2603:10b6:5:1c0:cafe::54) by DM6PR12CA0010.outlook.office365.com (2603:10b6:5:1c0::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.16 via Frontend Transport; Mon, 15 Aug 2022 18:16:38 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.235) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.235 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.235; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.235) by DM6NAM11FT113.mail.protection.outlook.com (10.13.173.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5546.7 via Frontend Transport; Mon, 15 Aug 2022 18:16:38 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Mon, 15 Aug 2022 18:14:53 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 15 Aug 2022 11:14:53 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 15 Aug 2022 11:14:51 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 4/5] vfio/iommu_type1: Clean up update_dirty_scope in detach_group() Date: Mon, 15 Aug 2022 11:14:36 -0700 Message-ID: <20220815181437.28127-5-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220815181437.28127-1-nicolinc@nvidia.com> References: <20220815181437.28127-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a9b34f92-e9f9-4975-5d64-08da7eea4ba2 X-MS-TrafficTypeDiagnostic: PH8PR12MB6721:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9ExOFm/y6kqAJyyXyMEHI5xa77a/BkOIt+blXUTjRUVi06Zd+p7EjYkBbHhVjHsPaSuVUp/oRq1Bjf5ewy/+7BvDY1VtcjsKj7lvYhdAhoBRL05ze0NM4RHM4ZcOSewvAqjB09QLMl18F/zPxR47s4sSqisXXuJQQjZXfsxE9xsQxW8XJXYNi4+XvxUFKvxYGY0VqtdwdMD4PL0C80HMQsIRUCT2hiXIxFZt0qauDTBANjy2UqqKmbqRUeNP5U77xgUaRlhbwfagAHTwr2ZJShhMdT52VABJgONqmcuDL+osDY26zRjQVAw+C77YGKEBOcz07NQxUeNjH37AZ/04I9jQuEUyKim2tduR9cb5RBH1/ulkD1/QUiDNBLAaFuO3Z59WnN38fcq868EA9HhMkn5OhB9sZbopJNGSQ38S6DJpFdWZQVt/MkEJZnPq2jqYkRvsU3bb+KD2gtTACzioU208kR/O/sjuNkhJRw6XMVaLNVTbCc1Iza3dUWYFe2O19/yZb/Fq41qLdiUMFn0qqn3SFSgpLuIUb/nGlNIOeXAM21QPS5OeuNt6H/a5UBYqHB1ZLgVkoS09Vxo0h6yUQD3/cXUER/GxJqqmC2tjYD3fiHySghk0+O7n0OGE2AYSyYOUOGbafdM8dHyaik6rtaynbQ0emh+sYL7pHZ7X3qlDw07/BLW4GltxcSBoDgAncX6JOGL7dcCFdMl2AtYKkGCGGC0TSNJjkiIiW4NpKmcwO7jkVkMIh2sXEDMVmSWrn5W4zTkvrzKiv3UB9ThjasB5qKf73tf1i312M+A3DdQDbVbKeXGbxSMv8mCqa6eu+YqtcXccKufwILAhXhcIiXDCpSV7H9/ZLon7Jo8kfyk= X-Forefront-Antispam-Report: CIP:12.22.5.235;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(346002)(39860400002)(136003)(396003)(376002)(36840700001)(40470700004)(46966006)(478600001)(36756003)(6666004)(7696005)(86362001)(2616005)(26005)(186003)(1076003)(41300700001)(336012)(426003)(47076005)(83380400001)(82310400005)(40480700001)(5660300002)(70586007)(8676002)(4326008)(54906003)(110136005)(316002)(40460700003)(70206006)(81166007)(356005)(36860700001)(8936002)(7406005)(7416002)(82740400003)(2906002)(15650500001)(14143004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Aug 2022 18:16:38.1319 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a9b34f92-e9f9-4975-5d64-08da7eea4ba2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.235];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT113.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6721 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org All devices in emulated_iommu_groups have pinned_page_dirty_scope set, so the update_dirty_scope in the first list_for_each_entry is always false. Clean it up, and move the "if update_dirty_scope" part from the detach_group_done routine to the domain_list part. Suggested-by: Jason Gunthorpe Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 523927d61aac..3b63a5a237c9 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2464,14 +2464,12 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, struct vfio_iommu *iommu = iommu_data; struct vfio_domain *domain; struct vfio_iommu_group *group; - bool update_dirty_scope = false; LIST_HEAD(iova_copy); mutex_lock(&iommu->lock); list_for_each_entry(group, &iommu->emulated_iommu_groups, next) { if (group->iommu_group != iommu_group) continue; - update_dirty_scope = !group->pinned_page_dirty_scope; list_del(&group->next); kfree(group); @@ -2480,7 +2478,8 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, WARN_ON(!list_empty(&iommu->device_list)); vfio_iommu_unmap_unpin_all(iommu); } - goto detach_group_done; + mutex_unlock(&iommu->lock); + return; } /* @@ -2496,9 +2495,7 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, continue; iommu_detach_group(domain->domain, group->iommu_group); - update_dirty_scope = !group->pinned_page_dirty_scope; list_del(&group->next); - kfree(group); /* * Group ownership provides privilege, if the group list is * empty, the domain goes away. If it's the last domain with @@ -2522,6 +2519,16 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, vfio_iommu_aper_expand(iommu, &iova_copy); vfio_update_pgsize_bitmap(iommu); } + /* + * Removal of a group without dirty tracking may allow + * the iommu scope to be promoted. + */ + if (!group->pinned_page_dirty_scope) { + iommu->num_non_pinned_groups--; + if (iommu->dirty_page_tracking) + vfio_iommu_populate_bitmap_full(iommu); + } + kfree(group); break; } @@ -2530,16 +2537,6 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, else vfio_iommu_iova_free(&iova_copy); -detach_group_done: - /* - * Removal of a group without dirty tracking may allow the iommu scope - * to be promoted. - */ - if (update_dirty_scope) { - iommu->num_non_pinned_groups--; - if (iommu->dirty_page_tracking) - vfio_iommu_populate_bitmap_full(iommu); - } mutex_unlock(&iommu->lock); } From patchwork Mon Aug 15 18:14:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 12943937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DC76C25B0E for ; Mon, 15 Aug 2022 18:17:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239773AbiHOSRX (ORCPT ); Mon, 15 Aug 2022 14:17:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238496AbiHOSQl (ORCPT ); Mon, 15 Aug 2022 14:16:41 -0400 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4859C2B196; Mon, 15 Aug 2022 11:15:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jnJct5glXxuRsqPHx+SNxpbuG6vmrvJ1vu1AFPa/s0t3rKsHAxvovTZ/OabojbM50CLzRHLkh4o9TSQltlbfwlDqfSJ7UCtexlBYM3L3NR/UTB8YN9FF7p/CQDo/8ktrgK3Hs40NaZgeCCIp++Nx5bMJtJ9eYxXKGYE+UiNt5VVIlNqlwmJJioh15eUHoBcWonee65qUCmKos0dY7f3KzDGiMfn9mUFd1qZnZsaTkdbzzYsEi7ITjLF1DJXyuQlEJEGoiVRTDNcc9kq+vMUNwz/2RuLLD7HWWaVqNzkVXcZk9HS32b5zK6loesszLfZQ+8GqK3K2+taMUyAsVLvedA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3fC522AkfGkzCZT2al4Vn8EClV5JuJDQb66exOspkjU=; b=gB6UgN3VerLFg0QCHVF1hXKBBplW3WxEGtDMKnQCnsDPlxX4bwnFmvoooxmGpzPTnhskm/j4CSwL4R2/snboi3wtJ3zteq5tgfIAfC8r4PwMERfHvitvsFMRTVRKH6RX1H6GVhYzDYSC+LaHENYYortVDVJ5St9+CqQ94tOY4pMyRPpx4rZpbngIHle4rZKtxPOrLldQc1x0js7YUej97eAvUKaZ/UNNCY1aWjr+L13Fkak/x57ldJN2MVZHjYyh+kPQjlWZT29Tnlq7IMfiQKqM/ohyj8oiXOkEQgFInqr8tkcJmg3KujzsHujsTf2B3pO3V+uk+Pr6e2PeMljhpA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.238) smtp.rcpttodomain=rosenzweig.io smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=3fC522AkfGkzCZT2al4Vn8EClV5JuJDQb66exOspkjU=; b=H6YN4pj8wBy7Cue7x/VU0jH3UYqJDL5SYV5ucv80ZwRNmv1f54ElM96F652PgKIIv7kFrJkbPCDVSwLY7xb2/oUGJKPQb3AfKLj8jUUZksC04eg9Gs6fWtXgy1H2A1RbI9OpD37PncopcHMKmEA+OCtt1euf7L8oWqdgWivkRVkjDERRgCkt9hJN5f9Puxw1IpqWzi7Lnn1qEd8a8KMzEenLj06r8K+ZZjXrZS+qpPZ29u3m0xQw56wTViBPsxdOMLzei8/9y3b2YBq505CgSE/PEN1zlA5Ct1fJuTEoNL93HC32DZ31/ZcgAndBzLdGzur32U11plxy6lHziUmiTQ== Received: from DM6PR06CA0062.namprd06.prod.outlook.com (2603:10b6:5:54::39) by CY5PR12MB6178.namprd12.prod.outlook.com (2603:10b6:930:25::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.28; Mon, 15 Aug 2022 18:14:57 +0000 Received: from DM6NAM11FT109.eop-nam11.prod.protection.outlook.com (2603:10b6:5:54:cafe::ff) by DM6PR06CA0062.outlook.office365.com (2603:10b6:5:54::39) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5504.18 via Frontend Transport; Mon, 15 Aug 2022 18:14:56 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.238) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.238) by DM6NAM11FT109.mail.protection.outlook.com (10.13.173.178) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5546.7 via Frontend Transport; Mon, 15 Aug 2022 18:14:56 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.38; Mon, 15 Aug 2022 18:14:56 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 15 Aug 2022 11:14:55 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.29 via Frontend Transport; Mon, 15 Aug 2022 11:14:53 -0700 From: Nicolin Chen To: , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v6 5/5] vfio/iommu_type1: Simplify group attachment Date: Mon, 15 Aug 2022 11:14:37 -0700 Message-ID: <20220815181437.28127-6-nicolinc@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220815181437.28127-1-nicolinc@nvidia.com> References: <20220815181437.28127-1-nicolinc@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d9d7b7eb-2a52-43ca-5210-08da7eea0f18 X-MS-TrafficTypeDiagnostic: CY5PR12MB6178:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5+DUxYDIoCX8R+jqbhG5h0fC4jw+7cj80r7fcVyBwPejMEN3fh9fQGP+3eJ5yrrjT7WAQ6n6Dl/DwRzUnGD1zzNu+SCZSOu8mnlMU+7zlsT+OWWCZzoCTLBvnqm97dnOtdUANfy7iNNYsZ+FsTp9OqkI/BVHYttXWjbQCt2M1uCQXx59qxO/TFhpbvZtt0TGC8Cp0YC7RkFG1jEAeUD5g7cdZyyKYRK0QvimCb9tr3rF0gkSunQ02iAKcJX0iHxazTiyNI4mMw39ArjcKJQ7tf5uQSDNjNnNHhCM8iLa6OQyq90hOVgxAifOLv9++WlFe4H6I1m4/vrdGFTSfIdi6ykfgV/F6Baw2E1ba5K3QscWljUtuH/pdq/u6xkFKGQEl8sEzQ5YJ/kgwuOESC3FaHUNWuF5sdpIx4ozo/fTYE21RAmUyVpwONNTDTitn4EzGj2ozGAYftukQz64VP9ujE2CxWEKMOs9XrpyGpu0V27CRWbl3i+f8+uY6+/k1k8V4bXnoyqn9NFnfyOdNv+/+9BzXFsXXWce69D0sOFxKap/qoESwzKKbu4wAwTWz9c9K+Gxqd7onW6va0G1XQt8I+D4I+UlZIve5jaUORU9Zsa2kAvecIBYyOTnBaY/DrKweZEa14Ft2O7WkgFQucgPzyETo2hW6kL6Qv9KUAHy5bElVu0sc1gJyA+siLHKvkBka9nA+tLgxE3gmW3azV7ALU0Xm75ZcYEJY/H6eFAEwcBrg8T+qKWhzF3xvZjlrbZAzW52MIUE+SBDLSEOuFZDMDrPnYnCXmRzzcq7gp0eSAxQt81Q13y7Ea+tmCpoGTcOzIZvvZB1gf2vpSYJ74/0RQ== X-Forefront-Antispam-Report: CIP:12.22.5.238;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230016)(4636009)(396003)(346002)(136003)(39860400002)(376002)(46966006)(36840700001)(40470700004)(356005)(81166007)(86362001)(8676002)(36860700001)(336012)(186003)(426003)(2616005)(47076005)(40460700003)(82740400003)(83380400001)(70206006)(70586007)(36756003)(4326008)(1076003)(316002)(82310400005)(2906002)(30864003)(8936002)(5660300002)(7416002)(7406005)(41300700001)(478600001)(6666004)(7696005)(40480700001)(54906003)(110136005)(26005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Aug 2022 18:14:56.5483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9d7b7eb-2a52-43ca-5210-08da7eea0f18 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.238];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT109.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6178 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Un-inline the domain specific logic from the attach/detach_group ops into two paired functions vfio_iommu_alloc_attach_domain() and vfio_iommu_detach_destroy_domain() that strictly deal with creating and destroying struct vfio_domains. Add the logic to check for EMEDIUMTYPE return code of iommu_attach_group() and avoid the extra domain allocations and attach/detach sequences of the old code. This allows properly detecting an actual attach error, like -ENOMEM, vs treating all attach errors as an incompatible domain. Reviewed-by: Kevin Tian Co-developed-by: Jason Gunthorpe Signed-off-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/vfio/vfio_iommu_type1.c | 334 +++++++++++++++++--------------- 1 file changed, 180 insertions(+), 154 deletions(-) diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 3b63a5a237c9..51d29b8780cd 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -2163,14 +2163,179 @@ static int vfio_iommu_domain_alloc(struct device *dev, void *data) return 1; /* Don't iterate */ } +static struct vfio_domain * +vfio_iommu_alloc_attach_domain(struct vfio_iommu *iommu, + struct vfio_iommu_group *group, + struct list_head *group_resv_regions) +{ + struct iommu_domain *new_domain; + struct vfio_domain *domain; + phys_addr_t resv_msi_base; + int ret = 0; + + /* Try to match an existing compatible domain */ + list_for_each_entry (domain, &iommu->domain_list, next) { + ret = iommu_attach_group(domain->domain, group->iommu_group); + /* -EMEDIUMTYPE means an incompatible domain, so try next one */ + if (ret == -EMEDIUMTYPE) + continue; + if (ret) + return ERR_PTR(ret); + goto done; + } + + /* + * Going via the iommu_group iterator avoids races, and trivially gives + * us a representative device for the IOMMU API call. We don't actually + * want to iterate beyond the first device (if any). + */ + iommu_group_for_each_dev(group->iommu_group, &new_domain, + vfio_iommu_domain_alloc); + if (!new_domain) + return ERR_PTR(-EIO); + + if (iommu->nesting) { + ret = iommu_enable_nesting(new_domain); + if (ret) + goto out_free_iommu_domain; + } + + ret = iommu_attach_group(new_domain, group->iommu_group); + if (ret) + goto out_free_iommu_domain; + + domain = kzalloc(sizeof(*domain), GFP_KERNEL); + if (!domain) { + ret = -ENOMEM; + goto out_detach; + } + + domain->domain = new_domain; + vfio_test_domain_fgsp(domain); + + /* + * If the IOMMU can block non-coherent operations (ie PCIe TLPs with + * no-snoop set) then VFIO always turns this feature on because on Intel + * platforms it optimizes KVM to disable wbinvd emulation. + */ + if (new_domain->ops->enforce_cache_coherency) + domain->enforce_cache_coherency = + new_domain->ops->enforce_cache_coherency(new_domain); + + /* replay mappings on new domains */ + ret = vfio_iommu_replay(iommu, domain); + if (ret) + goto out_free_domain; + + if (vfio_iommu_has_sw_msi(group_resv_regions, &resv_msi_base)) { + ret = iommu_get_msi_cookie(domain->domain, resv_msi_base); + if (ret && ret != -ENODEV) + goto out_free_domain; + } + + INIT_LIST_HEAD(&domain->group_list); + list_add(&domain->next, &iommu->domain_list); + vfio_update_pgsize_bitmap(iommu); + +done: + list_add(&group->next, &domain->group_list); + + /* + * An iommu backed group can dirty memory directly and therefore + * demotes the iommu scope until it declares itself dirty tracking + * capable via the page pinning interface. + */ + iommu->num_non_pinned_groups++; + + return domain; + +out_free_domain: + kfree(domain); +out_detach: + iommu_detach_group(new_domain, group->iommu_group); +out_free_iommu_domain: + iommu_domain_free(new_domain); + return ERR_PTR(ret); +} + +static void vfio_iommu_unmap_unpin_all(struct vfio_iommu *iommu) +{ + struct rb_node *node; + + while ((node = rb_first(&iommu->dma_list))) + vfio_remove_dma(iommu, rb_entry(node, struct vfio_dma, node)); +} + +static void vfio_iommu_unmap_unpin_reaccount(struct vfio_iommu *iommu) +{ + struct rb_node *n, *p; + + n = rb_first(&iommu->dma_list); + for (; n; n = rb_next(n)) { + struct vfio_dma *dma; + long locked = 0, unlocked = 0; + + dma = rb_entry(n, struct vfio_dma, node); + unlocked += vfio_unmap_unpin(iommu, dma, false); + p = rb_first(&dma->pfn_list); + for (; p; p = rb_next(p)) { + struct vfio_pfn *vpfn = rb_entry(p, struct vfio_pfn, + node); + + if (!is_invalid_reserved_pfn(vpfn->pfn)) + locked++; + } + vfio_lock_acct(dma, locked - unlocked, true); + } +} + +static void vfio_iommu_detach_destroy_domain(struct vfio_domain *domain, + struct vfio_iommu *iommu, + struct vfio_iommu_group *group) +{ + iommu_detach_group(domain->domain, group->iommu_group); + list_del(&group->next); + if (!list_empty(&domain->group_list)) + goto out_dirty; + + /* + * Group ownership provides privilege, if the group list is empty, the + * domain goes away. If it's the last domain with iommu and external + * domain doesn't exist, then all the mappings go away too. If it's the + * last domain with iommu and external domain exist, update accounting + */ + if (list_is_singular(&iommu->domain_list)) { + if (list_empty(&iommu->emulated_iommu_groups)) { + WARN_ON(!list_empty(&iommu->device_list)); + vfio_iommu_unmap_unpin_all(iommu); + } else { + vfio_iommu_unmap_unpin_reaccount(iommu); + } + } + iommu_domain_free(domain->domain); + list_del(&domain->next); + kfree(domain); + vfio_update_pgsize_bitmap(iommu); + +out_dirty: + /* + * Removal of a group without dirty tracking may allow the iommu scope + * to be promoted. + */ + if (!group->pinned_page_dirty_scope) { + iommu->num_non_pinned_groups--; + if (iommu->dirty_page_tracking) + vfio_iommu_populate_bitmap_full(iommu); + } +} + static int vfio_iommu_type1_attach_group(void *iommu_data, struct iommu_group *iommu_group, enum vfio_group_type type) { struct vfio_iommu *iommu = iommu_data; struct vfio_iommu_group *group; - struct vfio_domain *domain, *d; - bool resv_msi, msi_remap; - phys_addr_t resv_msi_base = 0; + struct vfio_domain *domain; + bool msi_remap; struct iommu_domain_geometry *geo; LIST_HEAD(iova_copy); LIST_HEAD(group_resv_regions); @@ -2201,32 +2366,17 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, goto out_unlock; } - ret = -ENOMEM; - domain = kzalloc(sizeof(*domain), GFP_KERNEL); - if (!domain) + ret = iommu_get_group_resv_regions(iommu_group, &group_resv_regions); + if (ret) goto out_free_group; - /* - * Going via the iommu_group iterator avoids races, and trivially gives - * us a representative device for the IOMMU API call. We don't actually - * want to iterate beyond the first device (if any). - */ - ret = -EIO; - iommu_group_for_each_dev(iommu_group, &domain->domain, - vfio_iommu_domain_alloc); - if (!domain->domain) - goto out_free_domain; - - if (iommu->nesting) { - ret = iommu_enable_nesting(domain->domain); - if (ret) - goto out_domain; + domain = vfio_iommu_alloc_attach_domain(iommu, group, + &group_resv_regions); + if (IS_ERR(domain)) { + ret = PTR_ERR(domain); + goto out_free_group; } - ret = iommu_attach_group(domain->domain, group->iommu_group); - if (ret) - goto out_domain; - /* Get aperture info */ geo = &domain->domain->geometry; if (vfio_iommu_aper_conflict(iommu, geo->aperture_start, @@ -2235,10 +2385,6 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, goto out_detach; } - ret = iommu_get_group_resv_regions(iommu_group, &group_resv_regions); - if (ret) - goto out_detach; - if (vfio_iommu_resv_conflict(iommu, &group_resv_regions)) { ret = -EINVAL; goto out_detach; @@ -2262,11 +2408,6 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, if (ret) goto out_detach; - resv_msi = vfio_iommu_has_sw_msi(&group_resv_regions, &resv_msi_base); - - INIT_LIST_HEAD(&domain->group_list); - list_add(&group->next, &domain->group_list); - msi_remap = irq_domain_check_msi_remap() || iommu_group_for_each_dev(iommu_group, (void *)IOMMU_CAP_INTR_REMAP, vfio_iommu_device_capable); @@ -2278,107 +2419,25 @@ static int vfio_iommu_type1_attach_group(void *iommu_data, goto out_detach; } - /* - * If the IOMMU can block non-coherent operations (ie PCIe TLPs with - * no-snoop set) then VFIO always turns this feature on because on Intel - * platforms it optimizes KVM to disable wbinvd emulation. - */ - if (domain->domain->ops->enforce_cache_coherency) - domain->enforce_cache_coherency = - domain->domain->ops->enforce_cache_coherency( - domain->domain); - - /* Try to match an existing compatible domain */ - list_for_each_entry(d, &iommu->domain_list, next) { - iommu_detach_group(domain->domain, group->iommu_group); - if (!iommu_attach_group(d->domain, group->iommu_group)) { - list_add(&group->next, &d->group_list); - iommu_domain_free(domain->domain); - kfree(domain); - goto done; - } - - ret = iommu_attach_group(domain->domain, group->iommu_group); - if (ret) - goto out_domain; - } - - vfio_test_domain_fgsp(domain); - - /* replay mappings on new domains */ - ret = vfio_iommu_replay(iommu, domain); - if (ret) - goto out_detach; - - if (resv_msi) { - ret = iommu_get_msi_cookie(domain->domain, resv_msi_base); - if (ret && ret != -ENODEV) - goto out_detach; - } - - list_add(&domain->next, &iommu->domain_list); - vfio_update_pgsize_bitmap(iommu); -done: /* Delete the old one and insert new iova list */ vfio_iommu_iova_insert_copy(iommu, &iova_copy); - /* - * An iommu backed group can dirty memory directly and therefore - * demotes the iommu scope until it declares itself dirty tracking - * capable via the page pinning interface. - */ - iommu->num_non_pinned_groups++; mutex_unlock(&iommu->lock); vfio_iommu_resv_free(&group_resv_regions); return 0; out_detach: - iommu_detach_group(domain->domain, group->iommu_group); -out_domain: - iommu_domain_free(domain->domain); - vfio_iommu_iova_free(&iova_copy); - vfio_iommu_resv_free(&group_resv_regions); -out_free_domain: - kfree(domain); + vfio_iommu_detach_destroy_domain(domain, iommu, group); out_free_group: kfree(group); out_unlock: mutex_unlock(&iommu->lock); + vfio_iommu_iova_free(&iova_copy); + vfio_iommu_resv_free(&group_resv_regions); return ret; } -static void vfio_iommu_unmap_unpin_all(struct vfio_iommu *iommu) -{ - struct rb_node *node; - - while ((node = rb_first(&iommu->dma_list))) - vfio_remove_dma(iommu, rb_entry(node, struct vfio_dma, node)); -} - -static void vfio_iommu_unmap_unpin_reaccount(struct vfio_iommu *iommu) -{ - struct rb_node *n, *p; - - n = rb_first(&iommu->dma_list); - for (; n; n = rb_next(n)) { - struct vfio_dma *dma; - long locked = 0, unlocked = 0; - - dma = rb_entry(n, struct vfio_dma, node); - unlocked += vfio_unmap_unpin(iommu, dma, false); - p = rb_first(&dma->pfn_list); - for (; p; p = rb_next(p)) { - struct vfio_pfn *vpfn = rb_entry(p, struct vfio_pfn, - node); - - if (!is_invalid_reserved_pfn(vpfn->pfn)) - locked++; - } - vfio_lock_acct(dma, locked - unlocked, true); - } -} - /* * Called when a domain is removed in detach. It is possible that * the removed domain decided the iova aperture window. Modify the @@ -2493,45 +2552,12 @@ static void vfio_iommu_type1_detach_group(void *iommu_data, group = find_iommu_group(domain, iommu_group); if (!group) continue; - - iommu_detach_group(domain->domain, group->iommu_group); - list_del(&group->next); - /* - * Group ownership provides privilege, if the group list is - * empty, the domain goes away. If it's the last domain with - * iommu and external domain doesn't exist, then all the - * mappings go away too. If it's the last domain with iommu and - * external domain exist, update accounting - */ - if (list_empty(&domain->group_list)) { - if (list_is_singular(&iommu->domain_list)) { - if (list_empty(&iommu->emulated_iommu_groups)) { - WARN_ON(!list_empty( - &iommu->device_list)); - vfio_iommu_unmap_unpin_all(iommu); - } else { - vfio_iommu_unmap_unpin_reaccount(iommu); - } - } - iommu_domain_free(domain->domain); - list_del(&domain->next); - kfree(domain); - vfio_iommu_aper_expand(iommu, &iova_copy); - vfio_update_pgsize_bitmap(iommu); - } - /* - * Removal of a group without dirty tracking may allow - * the iommu scope to be promoted. - */ - if (!group->pinned_page_dirty_scope) { - iommu->num_non_pinned_groups--; - if (iommu->dirty_page_tracking) - vfio_iommu_populate_bitmap_full(iommu); - } + vfio_iommu_detach_destroy_domain(domain, iommu, group); kfree(group); break; } + vfio_iommu_aper_expand(iommu, &iova_copy); if (!vfio_iommu_resv_refresh(iommu, &iova_copy)) vfio_iommu_iova_insert_copy(iommu, &iova_copy); else