From patchwork Tue Aug 16 05:16:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 778C9C32789 for ; Tue, 16 Aug 2022 07:57:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230199AbiHPH5a (ORCPT ); Tue, 16 Aug 2022 03:57:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231319AbiHPH4m (ORCPT ); Tue, 16 Aug 2022 03:56:42 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B670E5280E; Mon, 15 Aug 2022 22:12:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626771; x=1692162771; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=FboYUogSe9ihPrbF4l07tSAlrq3YvoBAcJ7puMFHbZ4=; b=bAmqzXqcik+rK5YlAyd0LsdTfjCmBZBrkisKsYhvR7xMSztAkkzU77w3 ryE0LP1RnFhphyzdi6GjP/BcSsMiDn9mAAnOeMgYZEiP/8ydg9DSAJ5P9 8lQ0ERfOxeB70R0eP50e6rcHJvjKz4Nm7BIbWb4mWDo4kvnyZOWppzx4P FIJsiA7m+YYca+oJUlLuVsR8/y9LhsaLvCOCRuXS93jkr1BIWf8UXHpfI WalHZ8ecdZZmJF7eQ8m3JzJKf1hP3AK/dyDt6A0TP7tw0Q+cmAaP0eOzm 0NYy3smc5DEjqUSQSk9xkB/NnM5usuXX+Z8uih13Wq2t1cM+MMpFEzmXK g==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130129" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130129" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:12:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953450" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:12:48 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 1/8] perf/x86/intel/P4: Fix smp_num_siblings usage Date: Tue, 16 Aug 2022 13:16:26 +0800 Message-Id: <20220816051633.17775-2-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org smp_num_siblings can be larger than 2. Any value larger than 1 suggests HT is supported. Reviewed-by: Len Brown Signed-off-by: Zhang Rui Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/include/asm/perf_event_p4.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h index 94de1a05aeba..b14e9a20a7c0 100644 --- a/arch/x86/include/asm/perf_event_p4.h +++ b/arch/x86/include/asm/perf_event_p4.h @@ -189,7 +189,7 @@ static inline int p4_ht_active(void) static inline int p4_ht_thread(int cpu) { #ifdef CONFIG_SMP - if (smp_num_siblings == 2) + if (smp_num_siblings > 1) return cpu != cpumask_first(this_cpu_cpumask_var_ptr(cpu_sibling_map)); #endif return 0; From patchwork Tue Aug 16 05:16:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 078E1C32771 for ; Tue, 16 Aug 2022 07:57:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230004AbiHPH53 (ORCPT ); Tue, 16 Aug 2022 03:57:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47624 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232064AbiHPH4n (ORCPT ); Tue, 16 Aug 2022 03:56:43 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A35E6DB7ED; Mon, 15 Aug 2022 22:12:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626774; x=1692162774; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=uNmyJGFQ0sIPiZsSeZdd651qCRfEeR1fmTyxguCl9bY=; b=WiU607FOLSw+SPGbfyQBWNdhaazxcoHui9/vt7osQprx1JV7i/HVlPxJ 6oAD+JdHutU8YMzk/jQZ1UfFC7b0CZuIUtnqElS5cjU3DFcR5qgVhi4It htG2RZvNr/mrT6AlBBFZgv5Ydot/T3SR6zFo/8BAHViT75gPuHpdL9Rdv 6lVw3407NGFaoyTr48Cp+7tmz4PlXSZX7+x/tF07A1l6o6wOEUqyPYg8b gMkgd3/469TAslPRhou0Nviak8GJ2uFOx3voyZqk+ROFBd0LDdhXDz/+6 teXCP8QWvmiu5U2LRT1BKkOKKc+L3hmeYrwxU7hbVYTN4mERHyAOcQYnc g==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130141" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130141" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:12:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953455" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:12:51 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 2/8] hwmon/coretemp: Rename indx to index Date: Tue, 16 Aug 2022 13:16:27 +0800 Message-Id: <20220816051633.17775-3-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Use variable name 'index' instead of 'indx' for the index in the core_data[] array. Suggested-by: Ingo Molnar Signed-off-by: Zhang Rui --- drivers/hwmon/coretemp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index ccf0af5b988a..bfdcfe8ccb34 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -515,15 +515,15 @@ coretemp_add_core(struct platform_device *pdev, unsigned int cpu, int pkg_flag) dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); } -static void coretemp_remove_core(struct platform_data *pdata, int indx) +static void coretemp_remove_core(struct platform_data *pdata, int index) { - struct temp_data *tdata = pdata->core_data[indx]; + struct temp_data *tdata = pdata->core_data[index]; /* Remove the sysfs attributes */ sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group); - kfree(pdata->core_data[indx]); - pdata->core_data[indx] = NULL; + kfree(pdata->core_data[index]); + pdata->core_data[index] = NULL; } static int coretemp_probe(struct platform_device *pdev) @@ -647,7 +647,7 @@ static int coretemp_cpu_offline(unsigned int cpu) struct platform_device *pdev = coretemp_get_pdev(cpu); struct platform_data *pd; struct temp_data *tdata; - int indx, target; + int index, target; /* * Don't execute this on suspend as the device remove locks @@ -661,12 +661,12 @@ static int coretemp_cpu_offline(unsigned int cpu) return 0; /* The core id is too big, just return */ - indx = TO_ATTR_NO(cpu); - if (indx > MAX_CORE_DATA - 1) + index = TO_ATTR_NO(cpu); + if (index > MAX_CORE_DATA - 1) return 0; pd = platform_get_drvdata(pdev); - tdata = pd->core_data[indx]; + tdata = pd->core_data[index]; cpumask_clear_cpu(cpu, &pd->cpumask); @@ -677,7 +677,7 @@ static int coretemp_cpu_offline(unsigned int cpu) */ target = cpumask_any_and(&pd->cpumask, topology_sibling_cpumask(cpu)); if (target >= nr_cpu_ids) { - coretemp_remove_core(pd, indx); + coretemp_remove_core(pd, index); } else if (tdata && tdata->cpu == cpu) { mutex_lock(&tdata->update_lock); tdata->cpu = target; From patchwork Tue Aug 16 05:16:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944424 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38D85C32773 for ; Tue, 16 Aug 2022 07:57:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229999AbiHPH5V (ORCPT ); Tue, 16 Aug 2022 03:57:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229585AbiHPH4m (ORCPT ); Tue, 16 Aug 2022 03:56:42 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4106DEA5F; Mon, 15 Aug 2022 22:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626777; x=1692162777; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=izKx2i2YnCzZigJqPxNJZEiqz/oZMoOAlgtG1yN62lw=; b=Izg9Tw+JoCEGCexUmzYxTF41KV2iSrCwtoDdyr3HqbK9ziHAqA5yhBwV eCchMJhqJqgz5owOg3DWOeE/xT3zrOzsw5WrC3MInTebXkcjhw5Pl7YQ2 Vq0BogENj9tTk0Ge755cdK4j/r2Mq9gt47lu8M/S9fEZzuMzjkiVaGR8q 3b448CcIdzjcPcJWPvBhZ767xpBmrbkhRiGHhFm3PAemia8Zoh4iZI9GG +gWSpFiNLs09LERS5T1vZt/PNdm5ByptlgesyHOEtWJm8qExA/fl2gdBV urgpiIM1XjLAAJTfSmWfq+uyI5LNM3xVxaBzar0WgXVA0/4+Vw3I1T6YS g==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130150" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130150" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:12:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953462" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:12:54 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 3/8] hwmon/coretemp: Handle large core ID value Date: Tue, 16 Aug 2022 13:16:28 +0800 Message-Id: <20220816051633.17775-4-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The coretemp driver supports up to a hard-coded limit of 128 cores. Today, the driver can not support a core with an ID above that limit. Yet, the encoding of core ID's is arbitrary (BIOS APIC-ID) and so they may be sparse and they may be large. Update the driver to map arbitrary core ID numbers into appropriate array indexes so that 128 cores can be supported, no matter the encoding of core ID's. Acked-by: Len Brown Signed-off-by: Zhang Rui Acked-by: Guenter Roeck --- drivers/hwmon/coretemp.c | 56 +++++++++++++++++++++++++++++----------- 1 file changed, 41 insertions(+), 15 deletions(-) diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index bfdcfe8ccb34..291566aeb703 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -46,9 +46,6 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) -#define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) -#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) - #ifdef CONFIG_SMP #define for_each_sibling(i, cpu) \ for_each_cpu(i, topology_sibling_cpumask(cpu)) @@ -91,6 +88,8 @@ struct temp_data { struct platform_data { struct device *hwmon_dev; u16 pkg_id; + u16 cpu_map[NUM_REAL_CORES]; + struct ida ida; struct cpumask cpumask; struct temp_data *core_data[MAX_CORE_DATA]; struct device_attribute name_attr; @@ -441,7 +440,7 @@ static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) MSR_IA32_THERM_STATUS; tdata->is_pkg_data = pkg_flag; tdata->cpu = cpu; - tdata->cpu_core_id = TO_CORE_ID(cpu); + tdata->cpu_core_id = topology_core_id(cpu); tdata->attr_size = MAX_CORE_ATTRS; mutex_init(&tdata->update_lock); return tdata; @@ -454,7 +453,7 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, struct platform_data *pdata = platform_get_drvdata(pdev); struct cpuinfo_x86 *c = &cpu_data(cpu); u32 eax, edx; - int err, attr_no; + int err, index, attr_no; /* * Find attr number for sysfs: @@ -462,14 +461,26 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, * The attr number is always core id + 2 * The Pkgtemp will always show up as temp1_*, if available */ - attr_no = pkg_flag ? PKG_SYSFS_ATTR_NO : TO_ATTR_NO(cpu); + if (pkg_flag) { + attr_no = PKG_SYSFS_ATTR_NO; + } else { + index = ida_alloc(&pdata->ida, GFP_KERNEL); + if (index < 0) + return index; + pdata->cpu_map[index] = topology_core_id(cpu); + attr_no = index + BASE_SYSFS_ATTR_NO; + } - if (attr_no > MAX_CORE_DATA - 1) - return -ERANGE; + if (attr_no > MAX_CORE_DATA - 1) { + err = -ERANGE; + goto ida_free; + } tdata = init_temp_data(cpu, pkg_flag); - if (!tdata) - return -ENOMEM; + if (!tdata) { + err = -ENOMEM; + goto ida_free; + } /* Test if we can access the status register */ err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); @@ -505,6 +516,9 @@ static int create_core_data(struct platform_device *pdev, unsigned int cpu, exit_free: pdata->core_data[attr_no] = NULL; kfree(tdata); +ida_free: + if (!pkg_flag) + ida_free(&pdata->ida, index); return err; } @@ -524,6 +538,9 @@ static void coretemp_remove_core(struct platform_data *pdata, int index) kfree(pdata->core_data[index]); pdata->core_data[index] = NULL; + + if (index >= BASE_SYSFS_ATTR_NO) + ida_free(&pdata->ida, index - BASE_SYSFS_ATTR_NO); } static int coretemp_probe(struct platform_device *pdev) @@ -537,6 +554,7 @@ static int coretemp_probe(struct platform_device *pdev) return -ENOMEM; pdata->pkg_id = pdev->id; + ida_init(&pdata->ida); platform_set_drvdata(pdev, pdata); pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME, @@ -553,6 +571,7 @@ static int coretemp_remove(struct platform_device *pdev) if (pdata->core_data[i]) coretemp_remove_core(pdata, i); + ida_destroy(&pdata->ida); return 0; } @@ -647,7 +666,7 @@ static int coretemp_cpu_offline(unsigned int cpu) struct platform_device *pdev = coretemp_get_pdev(cpu); struct platform_data *pd; struct temp_data *tdata; - int index, target; + int i, index = -1, target; /* * Don't execute this on suspend as the device remove locks @@ -660,12 +679,19 @@ static int coretemp_cpu_offline(unsigned int cpu) if (!pdev) return 0; - /* The core id is too big, just return */ - index = TO_ATTR_NO(cpu); - if (index > MAX_CORE_DATA - 1) + pd = platform_get_drvdata(pdev); + + for (i = 0; i < NUM_REAL_CORES; i++) { + if (pd->cpu_map[i] == topology_core_id(cpu)) { + index = i + BASE_SYSFS_ATTR_NO; + break; + } + } + + /* Too many cores and this core is not populated, just return */ + if (index < 0) return 0; - pd = platform_get_drvdata(pdev); tdata = pd->core_data[index]; cpumask_clear_cpu(cpu, &pd->cpumask); From patchwork Tue Aug 16 05:16:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5861EC32771 for ; Tue, 16 Aug 2022 07:57:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229635AbiHPH50 (ORCPT ); Tue, 16 Aug 2022 03:57:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229982AbiHPH4n (ORCPT ); Tue, 16 Aug 2022 03:56:43 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A486E5881; Mon, 15 Aug 2022 22:13:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626781; x=1692162781; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=MSrdbnyHwDKJWzacOswQdOazPsUhPsZ/gQdv7Bzjyis=; b=XVArvnoM/ajPDEcgD93O0atoQ5tz3o0UXl8v98D6MIkd+jiG+Gp2dsmj tErOhJNSL6lY+mCZ5MGsWYBJ/URLfKfKLiFhAMVKz8aSR1eC1CJsNrey5 RMWThfpDDX7fyyDK1qcJQhZm/ydevz0MunDZcWMUCIFXtFm0oQIBSS3KA CyIdSoLzex7cvWmnatvf+iriRkOvkGr4D9qgpUt2eNyUEDIp4Vw4KySL0 Qubh6f90uomLrLpiM/diyR8sKQ4CD7uFAW4ErkR7bQEjyPQVOU12SicBM MQtn1/8mXmR+d/r4DLWdHVTeN7fRnX6WfolX1LCIpwmqMjC211uCOkURi Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130163" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130163" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:13:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953473" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:12:57 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 4/8] x86/topology: Fix multiple packages shown on a single-package system Date: Tue, 16 Aug 2022 13:16:29 +0800 Message-Id: <20220816051633.17775-5-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org CPUID.1F/B does not emumerate Package level explicitly, instead, all the APIC-ID bits above the enumerated levels are assumed to be package ID bits. Current code gets package ID by shifting out all the APIC-ID bits that Linux supports, rather than shifting out all the APIC-ID bits that CPUID.1F enumerates. This introduces problems when CPUID.1F enumerates a level that Linux does not support. For example, on an AlderLake-N platform, there are 2 Ecore Modules, which has 4 atom cores in each module, in a single package. Linux does not support Module level and interprets the Module ID bits as package ID and erroneously reports a multi module system as a multi-package system. Fix this by using APIC-ID bits above all the CPUID.1F enumerated levels as package ID. Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index 132a2de44d2f..f7592814e5d5 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -96,6 +96,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) unsigned int ht_mask_width, core_plus_mask_width, die_plus_mask_width; unsigned int core_select_mask, core_level_siblings; unsigned int die_select_mask, die_level_siblings; + unsigned int pkg_mask_width; bool die_level_present = false; int leaf; @@ -111,10 +112,10 @@ int detect_extended_topology(struct cpuinfo_x86 *c) core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); - die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); sub_index = 1; - do { + while (true) { cpuid_count(leaf, sub_index, &eax, &ebx, &ecx, &edx); /* @@ -132,8 +133,13 @@ int detect_extended_topology(struct cpuinfo_x86 *c) die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } + if (LEAFB_SUBTYPE(ecx) != INVALID_TYPE) + pkg_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + else + break; + sub_index++; - } while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE); + } core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; die_select_mask = (~(-1 << die_plus_mask_width)) >> @@ -148,7 +154,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) } c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, - die_plus_mask_width); + pkg_mask_width); /* * Reinit the apicid, now that we have extended initial_apicid. */ From patchwork Tue Aug 16 05:16:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEA1FC2BB41 for ; Tue, 16 Aug 2022 07:57:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229515AbiHPH5X (ORCPT ); Tue, 16 Aug 2022 03:57:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229952AbiHPH4o (ORCPT ); Tue, 16 Aug 2022 03:56:44 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA86BF2D5F; Mon, 15 Aug 2022 22:13:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626783; x=1692162783; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=CABcsF1/F0hwqX7jp/Kocn9gec4fIegnf5bdop8i6qc=; b=W+rBLXm4Zp5CDkGCfqU8udb9fAG5xzKxyALBkESEdJ6Q8DE10Ori4dbF Y7Q3ckJjZr3xKtMt10KYb6JaXIalky1lQr40XrxPtuforLycZ+/BynF/V d60jwzs7Z7AWCVsGzHkYZ+egjVNIgkcUsFYKvQqxnBfEFTfMaPVc96hdO X4dkI6KOeJ0/LWo14qCg7ly8rUUI3s7qNy9k1FgA04onhf6paCIQhhIie 9EUaFQXthm1+Lhsb6fFwFtAmV2/r6cmC0/V9vOdhA4PVzQzeqi8XW/Z5i Xzviw5WeCXutt505F7m7k0C47IM+RR67dehV6QApmU0BIiR31XvZezMGM Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130168" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130168" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:13:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953488" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:13:00 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 5/8] x86/topology: Fix duplicated core ID within a package Date: Tue, 16 Aug 2022 13:16:30 +0800 Message-Id: <20220816051633.17775-6-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Today, core ID is assumed to be unique within each package. But an AlderLake-N platform adds a Module level between core and package, Linux excludes the unknown modules bits from the core ID, resulting in duplicate core ID's. To keep core ID unique within a package, Linux must include all APIC-ID bits for known or un-known levels above the core and below the package in the core ID. It is important to understand that core ID's have always come directly from the APIC-ID encoding, which comes from the BIOS. Thus there is no guarantee that they start at 0, or that they are contiguous. As such, naively using them for array indexes can be problematic. Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index f7592814e5d5..5e868b62a7c4 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -141,7 +141,7 @@ int detect_extended_topology(struct cpuinfo_x86 *c) sub_index++; } - core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width; + core_select_mask = (~(-1 << pkg_mask_width)) >> ht_mask_width; die_select_mask = (~(-1 << die_plus_mask_width)) >> core_plus_mask_width; From patchwork Tue Aug 16 05:16:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87013C32774 for ; Tue, 16 Aug 2022 07:57:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229929AbiHPH53 (ORCPT ); Tue, 16 Aug 2022 03:57:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229772AbiHPH4p (ORCPT ); Tue, 16 Aug 2022 03:56:45 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B025D119862; Mon, 15 Aug 2022 22:13:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626787; x=1692162787; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=7nu5UaOkh101GWA0xrXJbyB81JiIDTjN5u61jUDVgko=; b=RsZKqWgtieYyYOtOzyMpyVudol/bWznAcPdwBPW3A52zlE4kWRkdEh6B +SnKCkDEudk0NkK87+dcdZ7NtOwwG9T1jUop3/7/sSpNRWlBMA1xrgOLD neJ84kt8XQ+AjvWsc5c9Wiu2UXiBAg1rS7Ku9d4nb/m4mvIDVeXTBqBF7 vre+Bk06yUSZDx7WNbGMgYJcpa6wC87Q986nuzxH+wshi4/bRATZ99slu cPwVaIOVBxEpovqdw9+NW/RBVc7z+ykgAyv9G40OOSHpccfAOqJsQh7gw qHrwOTCJRENg5Mur6ASOfnKxCG8mQriB7Wi0Ev1butF9KsEPrgUDPBpki A==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130175" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130175" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:13:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953503" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:13:03 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 6/8] x86/topology: Fix max_siblings calculation Date: Tue, 16 Aug 2022 13:16:31 +0800 Message-Id: <20220816051633.17775-7-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org The max siblings value returned by CPUID.1F SMT level EBX differs among CPUs on Intel Hybrid platforms like ADL-S/P. It returns 2 for Pcore CPUs which have HT sibling and 1 for Ecore CPUs which do not. Today, CPUID SMT level EBX sets the global variable smp_num_siblings. Thus, smp_num_siblings is overridden to different values based on the CPU Pcore/Ecore enumeration order. For example, [ 0.201005] detect_extended_topology: CPU APICID 0x0, smp_num_siblings 2, x86_max_cores 10 [ 0.201117] start_kernel->check_bugs->cpu_smt_check_topology: smp_num_siblings 2 ... [ 0.010146] detect_extended_topology: CPU APICID 0x8, smp_num_siblings 2, x86_max_cores 10 ... [ 0.010146] detect_extended_topology: CPU APICID 0x39, smp_num_siblings 2, x86_max_cores 10 [ 0.010146] detect_extended_topology: CPU APICID 0x48, smp_num_siblings 1, x86_max_cores 20 ... [ 0.010146] detect_extended_topology: CPU APICID 0x4e, smp_num_siblings 1, x86_max_cores 20 [ 2.583800] sched_set_itmt_core_prio: smp_num_siblings 1 This inconsistency brings several potential issues: 1. some kernel configuration like cpu_smt_control, as set in start_kernel()->check_bugs()->cpu_smt_check_topology(), depends on smp_num_siblings set by cpu0. It is pure luck that all the current hybrid platforms use Pcore as cpu0 and hide this problem. 2. some per CPU data like cpuinfo_x86.x86_max_cores that depends on smp_num_siblings becomes inconsistent and bogus. 3. the final smp_num_siblings value after boot depends on the last CPU enumerated, which could either be Pcore or Ecore CPU. The solution is to use CPUID EAX bits_shift to get the maximum number of addressable logical processors, and use this to determin max siblings. Because: 1. the CPUID EAX bits_shift values are consistent among CPUs as far as observed. 2. some code already uses smp_num_siblings value to isolate the SMT ID bits in APIC-ID, like apic_id_is_primary_thread(). Suggested-and-reviewed-by: Len Brown Signed-off-by: Zhang Rui --- arch/x86/kernel/cpu/topology.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c index 5e868b62a7c4..2a88f2fa5756 100644 --- a/arch/x86/kernel/cpu/topology.c +++ b/arch/x86/kernel/cpu/topology.c @@ -23,7 +23,12 @@ #define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff) #define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f) -#define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff) + +/* + * Use EAX bit_shift to calculate the maximum number of addressable logical + * processors sharing the current level. + */ +#define LEVEL_MAX_SIBLINGS(eax) (1 << BITS_SHIFT_NEXT_LEVEL(eax)) unsigned int __max_die_per_package __read_mostly = 1; EXPORT_SYMBOL(__max_die_per_package); @@ -79,7 +84,7 @@ int detect_extended_topology_early(struct cpuinfo_x86 *c) * initial apic id, which also represents 32-bit extended x2apic id. */ c->initial_apicid = edx; - smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); + smp_num_siblings = LEVEL_MAX_SIBLINGS(eax); #endif return 0; } @@ -109,9 +114,9 @@ int detect_extended_topology(struct cpuinfo_x86 *c) */ cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx); c->initial_apicid = edx; - core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx); + core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(eax); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); - die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + die_level_siblings = LEVEL_MAX_SIBLINGS(eax); pkg_mask_width = die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); sub_index = 1; @@ -122,14 +127,14 @@ int detect_extended_topology(struct cpuinfo_x86 *c) * Check for the Core type in the implemented sub leaves. */ if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) { - core_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + core_level_siblings = LEVEL_MAX_SIBLINGS(eax); core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); die_level_siblings = core_level_siblings; die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } if (LEAFB_SUBTYPE(ecx) == DIE_TYPE) { die_level_present = true; - die_level_siblings = LEVEL_MAX_SIBLINGS(ebx); + die_level_siblings = LEVEL_MAX_SIBLINGS(eax); die_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); } From patchwork Tue Aug 16 05:16:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9CECC32772 for ; Tue, 16 Aug 2022 07:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229627AbiHPH5b (ORCPT ); Tue, 16 Aug 2022 03:57:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230383AbiHPH4w (ORCPT ); Tue, 16 Aug 2022 03:56:52 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 427ACF47E4; Mon, 15 Aug 2022 22:13:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626790; x=1692162790; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=u+ZvcOj9M2zkdP1mQyjcoYw0fYKI0r1gp+/88xhN1yA=; b=Srm1zOzumwswv84gJwzNYsGXTvNptIFlqkj+tpZjD2fbTALrwfk6/HVj iUWEIMZXDesgcj//0wG2Fq1HDWzE6CeuitPyMtWSHMsZZycBrz5rM09ay u/iG/J7CFHV0Rj6t4WrZLdlxS0mXXQOSkZWX4N75dwVxFRAeNlGpqr9gS tBjGjaoTUZ5LIFsbO3zT/3vAupUl8FCtJHdl2xtKXqK71c6y3it3/u8F/ l/rqZivoIJVM6ede+PdvNQMVZro7xz3DxFW2RZm2llOB9WKuU2nqNUfHu hL9XiKtKLNYreLDbgfIARFD9gbvZ4cKb9cP4626mx3LZfUpTKpxxPSX0u g==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130180" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130180" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:13:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953525" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:13:07 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 7/8] Documentation: x86: Update smp_num_siblings/x86_max_cores description Date: Tue, 16 Aug 2022 13:16:32 +0800 Message-Id: <20220816051633.17775-8-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org smp_num_siblings/cpuinfo_x86.x86_max_cores are retrieved via CPUID EAX bit_shift value, and they represent the maximum possible number of threads in a core, and the maximum possible number of cores in a package. Update the smp_num_siblings/cpuinfo_x86.x86_max_cores description in the documentation. Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- Documentation/x86/topology.rst | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Documentation/x86/topology.rst b/Documentation/x86/topology.rst index 7f58010ea86a..c5eb5bc42380 100644 --- a/Documentation/x86/topology.rst +++ b/Documentation/x86/topology.rst @@ -49,7 +49,8 @@ AMD nomenclature for package is 'Node'. - cpuinfo_x86.x86_max_cores: - The number of cores in a package. This information is retrieved via CPUID. + The maximum possible number of cores in a package. This information is + retrieved via CPUID. - cpuinfo_x86.x86_max_dies: @@ -102,10 +103,10 @@ AMDs nomenclature for a CMT core is "Compute Unit". The kernel always uses - smp_num_siblings: - The number of threads in a core. The number of threads in a package can be - calculated by:: + The maximum possible number of threads in a core. The maximum possible + number of threads in a package can be calculated by:: - threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings + maximum_threads_per_package = cpuinfo_x86.x86_max_cores * smp_num_siblings Threads From patchwork Tue Aug 16 05:16:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Rui" X-Patchwork-Id: 12944427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 111C2C32773 for ; Tue, 16 Aug 2022 07:57:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229694AbiHPH52 (ORCPT ); Tue, 16 Aug 2022 03:57:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231429AbiHPH4w (ORCPT ); Tue, 16 Aug 2022 03:56:52 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D03C2F47F2; Mon, 15 Aug 2022 22:13:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660626793; x=1692162793; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=hbLNyRcLgu/3RSFiCT5I9SBJfhTGwgIQFfI74KmSZMA=; b=LA8HKEpvMZzMPi9SqqTCewX2qz7PIIVnsBTvgeJr3TCVlpCzkc98ycon apLuVN4y0NZSQgJ/FouF41YVuECHnDeFRaAX2tCIpfkyhxkO3FQq3KwAh gfmXJjc0GixpELQFj7mzW4rLypBa1mO8obZvUUeBpr7L06/t34BUeb+XS GuCXhJAiuReKl5Yc+0kTvuPaoDPzSQHjtslsnTnWuCFC3185aT2RCGqy7 oNG6mfj/eulbDVvnSNtS8QbozTmaumValQXnkdEnsAvZ53N23lJbp2cU/ 8cIN3VdJmyiEiW6kJjtCSDxcHHCrgmaY5txsDki8tYekWolw+exBlSWE/ A==; X-IronPort-AV: E=McAfee;i="6400,9594,10440"; a="356130194" X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="356130194" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Aug 2022 22:13:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,240,1654585200"; d="scan'208";a="666953551" Received: from power-sh.sh.intel.com ([10.239.183.122]) by fmsmga008.fm.intel.com with ESMTP; 15 Aug 2022 22:13:10 -0700 From: Zhang Rui To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-hwmon@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, corbet@lwn.net, fenghua.yu@intel.com, jdelvare@suse.com, linux@roeck-us.net, len.brown@intel.com, rui.zhang@intel.com Subject: [PATCH V2 8/8] Documentation: x86: Remove obsolete x86_max_dies description Date: Tue, 16 Aug 2022 13:16:33 +0800 Message-Id: <20220816051633.17775-9-rui.zhang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220816051633.17775-1-rui.zhang@intel.com> References: <20220816051633.17775-1-rui.zhang@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org cpuinfo_x86.x86_max_dies is introduced in commit 7745f03eb395 ("x86/topology: Add CPUID.1F multi-die/package support") and then removed in commit 14d96d6c06b5 ("x86/topology: Create topology_max_die_per_package()"). Remove the obsolete cpuinfo_x86.x86_max_dies description. Fixes: 14d96d6c06b5 ("x86/topology: Create topology_max_die_per_package()") Reviewed-by: Len Brown Signed-off-by: Zhang Rui --- Documentation/x86/topology.rst | 4 ---- 1 file changed, 4 deletions(-) diff --git a/Documentation/x86/topology.rst b/Documentation/x86/topology.rst index c5eb5bc42380..fbef91b1ee5e 100644 --- a/Documentation/x86/topology.rst +++ b/Documentation/x86/topology.rst @@ -52,10 +52,6 @@ AMD nomenclature for package is 'Node'. The maximum possible number of cores in a package. This information is retrieved via CPUID. - - cpuinfo_x86.x86_max_dies: - - The number of dies in a package. This information is retrieved via CPUID. - - cpuinfo_x86.cpu_die_id: The physical ID of the die. This information is retrieved via CPUID.