From patchwork Wed Aug 17 16:57:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Mateus Martins Araujo e Castro X-Patchwork-Id: 12946260 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B806BC25B08 for ; Wed, 17 Aug 2022 16:59:25 +0000 (UTC) Received: from localhost ([::1]:49204 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oOMO4-0002Ep-G4 for qemu-devel@archiver.kernel.org; Wed, 17 Aug 2022 12:59:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59598) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oOMMZ-0000wf-4e; Wed, 17 Aug 2022 12:57:51 -0400 Received: from [200.168.210.66] (port=1414 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oOMMX-0006aP-Bj; Wed, 17 Aug 2022 12:57:50 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Wed, 17 Aug 2022 13:57:43 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id F135C800134; Wed, 17 Aug 2022 13:57:42 -0300 (-03) From: "Lucas Mateus Castro(alqotel)" To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, danielhb413@gmail.com, "Lucas Mateus Castro (alqotel)" Subject: [PATCH 1/2] tests/tcg/ppc64le: Added an overflow with OE=1 test Date: Wed, 17 Aug 2022 13:57:03 -0300 Message-Id: <20220817165704.165291-1-lucas.araujo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-OriginalArrivalTime: 17 Aug 2022 16:57:43.0377 (UTC) FILETIME=[77C72410:01D8B25A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 200.168.210.66 (failed) Received-SPF: pass client-ip=200.168.210.66; envelope-from=lucas.araujo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Added a test to see if the adjustment is being made correctly when an overflow occurs and OE is set. Signed-off-by: Lucas Mateus Castro (alqotel) --- The prctl patch is not ready yet, so this patch does as Richard Henderson suggested and check the fp register in the signal handler This patch will fail without the overflow with OE set bugfix Message-Id:<20220805141522.412864-3-lucas.araujo@eldorado.org.br> --- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/oe_excp.c | 54 +++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) create mode 100644 tests/tcg/ppc64le/oe_excp.c diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target index 331fae628e..43958ad87b 100644 --- a/tests/tcg/ppc64/Makefile.target +++ b/tests/tcg/ppc64/Makefile.target @@ -29,5 +29,6 @@ run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10 PPC64_TESTS += signal_save_restore_xer PPC64_TESTS += xxspltw +PPC64_TESTS += oe_excp TESTS += $(PPC64_TESTS) diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target index 6ca3003f02..8d11ac731d 100644 --- a/tests/tcg/ppc64le/Makefile.target +++ b/tests/tcg/ppc64le/Makefile.target @@ -27,5 +27,6 @@ PPC64LE_TESTS += mtfsf PPC64LE_TESTS += mffsce PPC64LE_TESTS += signal_save_restore_xer PPC64LE_TESTS += xxspltw +PPC64LE_TESTS += oe_excp TESTS += $(PPC64LE_TESTS) diff --git a/tests/tcg/ppc64le/oe_excp.c b/tests/tcg/ppc64le/oe_excp.c new file mode 100644 index 0000000000..cfc364f5ed --- /dev/null +++ b/tests/tcg/ppc64le/oe_excp.c @@ -0,0 +1,54 @@ +#include +#include +#include +#include +#include + +#define FP_OE (1ull << 6) +#define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB)) + +void sigfpe_handler(int sig, siginfo_t *si, void *ucontext) +{ + uint64_t t; + uint64_t ch = 0x5fcfffe4965a17e0ull; + asm ( + "stfd 2, %0\n\t" + : "=m"(t) + : + : "memory", "fr2" + ); + if (t == ch) { + exit(0); + } + fprintf(stderr, "expected result: %lx\n result: %lx\n", ch, t); + exit(1); +} + +int main() +{ + uint64_t fpscr; + uint64_t a = 0x7fdfffe816d77b00ull; + uint64_t b = 0x7fdfffFC7F7FFF00ull; + + struct sigaction sa = { + .sa_sigaction = sigfpe_handler, + .sa_flags = SA_SIGINFO + }; + + prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE); + sigaction(SIGFPE, &sa, NULL); + + fpscr = FP_OE; + MTFSF(0b11111111, fpscr); + + asm ( + "lfd 0, %0\n\t" + "lfd 1, %1\n\t" + "fmul 2, 0, 1\n\t" + : + : "m"(a), "m"(b) + : "memory", "fr0", "fr1", "fr2" + ); + + return -1; +} From patchwork Wed Aug 17 16:57:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Mateus Martins Araujo e Castro X-Patchwork-Id: 12946261 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4462C25B08 for ; Wed, 17 Aug 2022 16:59:38 +0000 (UTC) Received: from localhost ([::1]:38648 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oOMOH-0002Uj-Ou for qemu-devel@archiver.kernel.org; Wed, 17 Aug 2022 12:59:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59600) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oOMMc-0000zI-T8; Wed, 17 Aug 2022 12:57:54 -0400 Received: from [200.168.210.66] (port=1414 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oOMMa-0006aP-MZ; Wed, 17 Aug 2022 12:57:54 -0400 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Wed, 17 Aug 2022 13:57:43 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 361BC8003A9; Wed, 17 Aug 2022 13:57:43 -0300 (-03) From: "Lucas Mateus Castro(alqotel)" To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, danielhb413@gmail.com, "Lucas Mateus Castro (alqotel)" Subject: [PATCH 2/2] tests/tcg/ppc64le: Added an underflow with UE=1 test Date: Wed, 17 Aug 2022 13:57:04 -0300 Message-Id: <20220817165704.165291-2-lucas.araujo@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817165704.165291-1-lucas.araujo@eldorado.org.br> References: <20220817165704.165291-1-lucas.araujo@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 17 Aug 2022 16:57:43.0549 (UTC) FILETIME=[77E162D0:01D8B25A] X-Host-Lookup-Failed: Reverse DNS lookup failed for 200.168.210.66 (failed) Received-SPF: pass client-ip=200.168.210.66; envelope-from=lucas.araujo@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -4 X-Spam_score: -0.5 X-Spam_bar: / X-Spam_report: (-0.5 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.659, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Added a test to see if the adjustment is being made correctly when an underflow occurs and UE is set. Signed-off-by: Lucas Mateus Castro (alqotel) --- This patch will also fail without the underflow with UE set bugfix Message-Id:<20220805141522.412864-3-lucas.araujo@eldorado.org.br> --- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/ue_excp.c | 54 +++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) create mode 100644 tests/tcg/ppc64le/ue_excp.c diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target index 43958ad87b..583677031b 100644 --- a/tests/tcg/ppc64/Makefile.target +++ b/tests/tcg/ppc64/Makefile.target @@ -30,5 +30,6 @@ run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10 PPC64_TESTS += signal_save_restore_xer PPC64_TESTS += xxspltw PPC64_TESTS += oe_excp +PPC64_TESTS += ue_excp TESTS += $(PPC64_TESTS) diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target index 8d11ac731d..b9e689c582 100644 --- a/tests/tcg/ppc64le/Makefile.target +++ b/tests/tcg/ppc64le/Makefile.target @@ -28,5 +28,6 @@ PPC64LE_TESTS += mffsce PPC64LE_TESTS += signal_save_restore_xer PPC64LE_TESTS += xxspltw PPC64LE_TESTS += oe_excp +PPC64LE_TESTS += ue_excp TESTS += $(PPC64LE_TESTS) diff --git a/tests/tcg/ppc64le/ue_excp.c b/tests/tcg/ppc64le/ue_excp.c new file mode 100644 index 0000000000..b25ba1f803 --- /dev/null +++ b/tests/tcg/ppc64le/ue_excp.c @@ -0,0 +1,54 @@ +#include +#include +#include +#include +#include + +#define FP_UE (1ull << 5) +#define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB)) + +void sigfpe_handler(int sig, siginfo_t *si, void *ucontext) +{ + uint64_t t; + uint64_t ch = 0x1b64f1c1b0000000ull; + asm ( + "stfd 2, %0\n\t" + : "=m"(t) + : + : "memory", "fr2" + ); + if (t == ch) { + exit(0); + } + fprintf(stderr, "expected result: %lx\n result: %lx\n", ch, t); + exit(1); +} + +int main() +{ + uint64_t fpscr; + uint64_t a = 0x00005ca8ull; + uint64_t b = 0x00001cefull; + + struct sigaction sa = { + .sa_sigaction = sigfpe_handler, + .sa_flags = SA_SIGINFO + }; + + prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE); + sigaction(SIGFPE, &sa, NULL); + + fpscr = FP_UE; + MTFSF(0b11111111, fpscr); + + asm ( + "lfd 0, %0\n\t" + "lfd 1, %1\n\t" + "fmul 2, 0, 1\n\t" + : + : "m"(a), "m"(b) + : "memory", "fr0", "fr1", "fr2" + ); + + return -1; +}