From patchwork Thu Aug 18 07:02:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946817 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E6ACC00140 for ; Thu, 18 Aug 2022 07:21:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3YzkzFtpK/irAErjk02adYl2u4FiV3X+wWNI9FBJjwI=; b=cViAlPWov5Zdsl 3k6YWhsoRuUXC0+ucOKQSKWzn382wQqBTtoER16Tgnn9xFhFpxdbq2b993wH+sOqcZHmBdyRxybJf Dz7RGzpFX1BSokbu9PSy4zlG2AVjD44di6BAmi8B/CSlSD1YXQe13GN3auIxGld81wM2X7/Zex3H2 RJ0525lNDtiM8oFFsm9okGpegGwaLbORjVamXfaVfqqJ7ie3MoDiK95XroYmQJNBlYHrCOO7nSS+H pm5hODXF3r5cKoXzM4Ent+vfI81IzHVS7L3djEDUyjtT06eRgdVHQ5ALKU25wpym+YUlQlgn3vJDG L56ZsRYKpt65EOs5+yww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZpE-00HaRE-Gw; Thu, 18 Aug 2022 07:20:20 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZod-00HZpu-8h; Thu, 18 Aug 2022 07:19:44 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 577EC1A0675; Thu, 18 Aug 2022 09:19:37 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 21A3A1A0673; Thu, 18 Aug 2022 09:19:37 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 3AE001820F59; Thu, 18 Aug 2022 15:19:35 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST support Date: Thu, 18 Aug 2022 15:02:28 +0800 Message-Id: <1660806153-29001-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001943_460622_98C73EA3 X-CRM114-Status: UNSURE ( 7.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3) of SRC_PCIEPHY_RCR is 1b'1. But i.MX8MP has one inversed default value 1b'0 of PERST bit. And the PERST bit should be kept 1b'1 after power and clocks are stable. So add the i.MX8MP PCIe PHY PERST support here. Signed-off-by: Richard Zhu Reviewed-by: Philipp Zabel --- drivers/reset/reset-imx7.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c index 185a333df66c..d2408725eb2c 100644 --- a/drivers/reset/reset-imx7.c +++ b/drivers/reset/reset-imx7.c @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct reset_controller_dev *rcdev, break; case IMX8MP_RESET_PCIE_CTRL_APPS_EN: + case IMX8MP_RESET_PCIEPHY_PERST: value = assert ? 0 : bit; break; } From patchwork Thu Aug 18 07:02:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946815 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82E78C00140 for ; Thu, 18 Aug 2022 07:21:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0TbTyzE4jba7Rd1zoE4qe+/RbkbAAmgyM5TO0+X0gAw=; b=Qdqas9Bya+FLmE P1aDgvuX3Q4O20BspuPTVo67cWU2p9n2YEFCz3qV2p918qjJGWZuaCptTO3IH+FtMLnlNi1YrJg9F G/vVZbjyxv/37x/vP91lTAMoRmJnyl5L1YbldiALkO3ZtOwck5y4F4KsxvwIvCjlVV7g0H+L8NmwK uHkp7X8CvGnVkTE5GxfrOWnL5PqaTToloKS4RUyhwdKRrj7Qq3OkIboKLt+zZDP9jjfOQ0R30UB+t rAZ8DomCRIR7sVq3gIOzyS+RckkkwzMYUWA8QzHb/w2ykKH+TYmAVaGhOrH5rPDfQ39+G+HzP+mk6 VrlyOJd3g3UaOtamOtMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZow-00HaDg-9r; Thu, 18 Aug 2022 07:20:02 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZob-00HZqr-Ss; Thu, 18 Aug 2022 07:19:44 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B9F4A202EE7; Thu, 18 Aug 2022 09:19:38 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 839002006AF; Thu, 18 Aug 2022 09:19:38 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id A65121820F56; Thu, 18 Aug 2022 15:19:36 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding Date: Thu, 18 Aug 2022 15:02:29 +0800 Message-Id: <1660806153-29001-3-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001942_111463_F808D7C3 X-CRM114-Status: UNSURE ( 7.30 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add i.MX8MP PCIe PHY binding. Signed-off-by: Richard Zhu --- .../bindings/phy/fsl,imx8-pcie-phy.yaml | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml index b6421eedece3..692783c7fd69 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml @@ -16,6 +16,7 @@ properties: compatible: enum: - fsl,imx8mm-pcie-phy + - fsl,imx8mp-pcie-phy reg: maxItems: 1 @@ -28,11 +29,16 @@ properties: - const: ref resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: - items: - - const: pciephy + oneOf: + - items: # for iMX8MM + - const: pciephy + - items: # for IMX8MP + - const: pciephy + - const: perst fsl,refclk-pad-mode: description: | @@ -60,6 +66,10 @@ properties: description: A boolean property indicating the CLKREQ# signal is not supported in the board design (optional) + power-domains: + description: PCIe PHY power domain (optional). + maxItems: 1 + required: - "#phy-cells" - compatible From patchwork Thu Aug 18 07:02:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946814 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED31CC25B0E for ; Thu, 18 Aug 2022 07:20:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=J5SP7oxyTmtkicPIsRkGUm+A338TDadHpISnCZIHFQE=; b=LWgE6O1X467uNC MaXuJIpL00w3CEyTD2a3es/4ognBWECpqyHwah2SAzzr8pmQd6fjlE3nL1pYDPqxoMy07YkCx4Yem Ggds48kgk6mUfqgLY4q/zSTQKx53AViwnSSCjX/Ok8Ej7YydD/QDntVJ2rs2rTTK3UjAIkDMYkA9O SYLiV4SmdzFYHEUgyuM9g/aVEqmwxs2mcTbMydLUZ0Z7fAJjZde6WuVUjH3UuDF1sUPF2Vh47bH6D 9M0VpDA5XOrmXC3BKJq7puwWNMdkJ/90RKHQjlQYHHx7o4oZKClc+6U3ZUNZcg73FgHefpkI7oPs1 RZMpeY8s0GoDNOiIsE6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZon-00Ha7a-Iu; Thu, 18 Aug 2022 07:19:53 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZob-00HZsB-Gp; Thu, 18 Aug 2022 07:19:43 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 520542006BA; Thu, 18 Aug 2022 09:19:40 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id E632F2006AF; Thu, 18 Aug 2022 09:19:39 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 149BE1820F57; Thu, 18 Aug 2022 15:19:38 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 3/6] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY support Date: Thu, 18 Aug 2022 15:02:30 +0800 Message-Id: <1660806153-29001-4-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001941_879587_FA0D0883 X-CRM114-Status: GOOD ( 18.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the i.MX8MP PCIe PHY support Signed-off-by: Richard Zhu --- drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 150 ++++++++++++++------- 1 file changed, 104 insertions(+), 46 deletions(-) diff --git a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c index ad7d2edfc414..3463b4299f2f 100644 --- a/drivers/phy/freescale/phy-fsl-imx8m-pcie.c +++ b/drivers/phy/freescale/phy-fsl-imx8m-pcie.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include #include #include @@ -31,12 +33,10 @@ #define IMX8MM_PCIE_PHY_CMN_REG065 0x194 #define ANA_AUX_RX_TERM (BIT(7) | BIT(4)) #define ANA_AUX_TX_LVL GENMASK(3, 0) -#define IMX8MM_PCIE_PHY_CMN_REG75 0x1D4 -#define PCIE_PHY_CMN_REG75_PLL_DONE 0x3 +#define IMX8MM_PCIE_PHY_CMN_REG075 0x1D4 +#define ANA_PLL_DONE 0x3 #define PCIE_PHY_TRSV_REG5 0x414 -#define PCIE_PHY_TRSV_REG5_GEN1_DEEMP 0x2D #define PCIE_PHY_TRSV_REG6 0x418 -#define PCIE_PHY_TRSV_REG6_GEN2_DEEMP 0xF #define IMX8MM_GPR_PCIE_REF_CLK_SEL GENMASK(25, 24) #define IMX8MM_GPR_PCIE_REF_CLK_PLL FIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 0x3) @@ -47,16 +47,29 @@ #define IMX8MM_GPR_PCIE_SSC_EN BIT(16) #define IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE BIT(9) +#define IMX8MP_GPR_REG0 0x0 +#define IMX8MP_GPR_PHY_APB_RST BIT(4) +#define IMX8MP_GPR_PHY_INIT_RST BIT(5) + +enum imx8_pcie_phy_type { + IMX8MM, + IMX8MP, +}; + struct imx8_pcie_phy { void __iomem *base; + struct device *dev; struct clk *clk; struct phy *phy; + struct regmap *hsio_blk_ctrl; struct regmap *iomuxc_gpr; struct reset_control *reset; + struct reset_control *perst; u32 refclk_pad_mode; u32 tx_deemph_gen1; u32 tx_deemph_gen2; bool clkreq_unused; + enum imx8_pcie_phy_type variant; }; static int imx8_pcie_phy_init(struct phy *phy) @@ -68,31 +81,27 @@ static int imx8_pcie_phy_init(struct phy *phy) reset_control_assert(imx8_phy->reset); pad_mode = imx8_phy->refclk_pad_mode; - /* Set AUX_EN_OVERRIDE 1'b0, when the CLKREQ# isn't hooked */ - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE, - imx8_phy->clkreq_unused ? - 0 : IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE); - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_AUX_EN, - IMX8MM_GPR_PCIE_AUX_EN); - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_POWER_OFF, 0); - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_SSC_EN, 0); - - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_REF_CLK_SEL, - pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ? - IMX8MM_GPR_PCIE_REF_CLK_EXT : - IMX8MM_GPR_PCIE_REF_CLK_PLL); - usleep_range(100, 200); - - /* Do the PHY common block reset */ - regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, - IMX8MM_GPR_PCIE_CMN_RST, - IMX8MM_GPR_PCIE_CMN_RST); - usleep_range(200, 500); + switch (imx8_phy->variant) { + case IMX8MM: + /* Tune PHY de-emphasis setting to pass PCIe compliance. */ + if (imx8_phy->tx_deemph_gen1) + writel(imx8_phy->tx_deemph_gen1, + imx8_phy->base + PCIE_PHY_TRSV_REG5); + if (imx8_phy->tx_deemph_gen2) + writel(imx8_phy->tx_deemph_gen2, + imx8_phy->base + PCIE_PHY_TRSV_REG6); + break; + case IMX8MP: + reset_control_assert(imx8_phy->perst); + + /* release pcie_phy_apb_reset and pcie_phy_init_resetn */ + regmap_update_bits(imx8_phy->hsio_blk_ctrl, IMX8MP_GPR_REG0, + IMX8MP_GPR_PHY_APB_RST | + IMX8MP_GPR_PHY_INIT_RST, + IMX8MP_GPR_PHY_APB_RST | + IMX8MP_GPR_PHY_INIT_RST); + break; + } if (pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT || pad_mode == IMX8_PCIE_REFCLK_PAD_UNUSED) { @@ -120,20 +129,44 @@ static int imx8_pcie_phy_init(struct phy *phy) imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG065); } - /* Tune PHY de-emphasis setting to pass PCIe compliance. */ - if (imx8_phy->tx_deemph_gen1) - writel(imx8_phy->tx_deemph_gen1, - imx8_phy->base + PCIE_PHY_TRSV_REG5); - if (imx8_phy->tx_deemph_gen2) - writel(imx8_phy->tx_deemph_gen2, - imx8_phy->base + PCIE_PHY_TRSV_REG6); + /* Set AUX_EN_OVERRIDE 1'b0, when the CLKREQ# isn't hooked */ + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE, + imx8_phy->clkreq_unused ? + 0 : IMX8MM_GPR_PCIE_AUX_EN_OVERRIDE); + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_AUX_EN, + IMX8MM_GPR_PCIE_AUX_EN); + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_POWER_OFF, 0); + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_SSC_EN, 0); + + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_REF_CLK_SEL, + pad_mode == IMX8_PCIE_REFCLK_PAD_INPUT ? + IMX8MM_GPR_PCIE_REF_CLK_EXT : + IMX8MM_GPR_PCIE_REF_CLK_PLL); + usleep_range(100, 200); - reset_control_deassert(imx8_phy->reset); + /* Do the PHY common block reset */ + regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, + IMX8MM_GPR_PCIE_CMN_RST, + IMX8MM_GPR_PCIE_CMN_RST); + + switch (imx8_phy->variant) { + case IMX8MP: + reset_control_deassert(imx8_phy->perst); + fallthrough; + case IMX8MM: + reset_control_deassert(imx8_phy->reset); + usleep_range(200, 500); + break; + } /* Polling to check the phy is ready or not. */ - ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG75, - val, val == PCIE_PHY_CMN_REG75_PLL_DONE, - 10, 20000); + ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075, + val, val == ANA_PLL_DONE, 10, 20000); return ret; } @@ -160,18 +193,33 @@ static const struct phy_ops imx8_pcie_phy_ops = { .owner = THIS_MODULE, }; +static const struct of_device_id imx8_pcie_phy_of_match[] = { + {.compatible = "fsl,imx8mm-pcie-phy", .data = (void *)IMX8MM}, + {.compatible = "fsl,imx8mp-pcie-phy", .data = (void *)IMX8MP}, + { }, +}; +MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match); + static int imx8_pcie_phy_probe(struct platform_device *pdev) { struct phy_provider *phy_provider; struct device *dev = &pdev->dev; + const struct of_device_id *of_id; struct device_node *np = dev->of_node; struct imx8_pcie_phy *imx8_phy; struct resource *res; + of_id = of_match_device(imx8_pcie_phy_of_match, dev); + if (!of_id) + return -EINVAL; + imx8_phy = devm_kzalloc(dev, sizeof(*imx8_phy), GFP_KERNEL); if (!imx8_phy) return -ENOMEM; + imx8_phy->dev = dev; + imx8_phy->variant = (enum imx8_pcie_phy_type)of_id->data; + /* get PHY refclk pad mode */ of_property_read_u32(np, "fsl,refclk-pad-mode", &imx8_phy->refclk_pad_mode); @@ -208,6 +256,22 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev) dev_err(dev, "Failed to get PCIEPHY reset control\n"); return PTR_ERR(imx8_phy->reset); } + if (imx8_phy->variant == IMX8MP) { + /* Grab HSIO MIX config register range */ + imx8_phy->hsio_blk_ctrl = + syscon_regmap_lookup_by_compatible("fsl,imx8mp-hsio-blk-ctrl"); + if (IS_ERR(imx8_phy->hsio_blk_ctrl)) { + dev_err(dev, "Unable to find HSIO MIX registers\n"); + return PTR_ERR(imx8_phy->hsio_blk_ctrl); + } + + imx8_phy->perst = + devm_reset_control_get_exclusive(dev, "perst"); + if (IS_ERR(imx8_phy->perst)) { + dev_err(dev, "Failed to get PCIE PHY PERST control\n"); + return PTR_ERR(imx8_phy->perst); + } + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); imx8_phy->base = devm_ioremap_resource(dev, res); @@ -225,12 +289,6 @@ static int imx8_pcie_phy_probe(struct platform_device *pdev) return PTR_ERR_OR_ZERO(phy_provider); } -static const struct of_device_id imx8_pcie_phy_of_match[] = { - {.compatible = "fsl,imx8mm-pcie-phy",}, - { }, -}; -MODULE_DEVICE_TABLE(of, imx8_pcie_phy_of_match); - static struct platform_driver imx8_pcie_phy_driver = { .probe = imx8_pcie_phy_probe, .driver = { From patchwork Thu Aug 18 07:02:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946816 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08B2FC00140 for ; Thu, 18 Aug 2022 07:21:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Jc0g2zy4yuQAMkoSOmjUH/wOx95cZEGo2/QoEwz8dp4=; b=qbgmavJ30EKC4t Bc0GQKX50tZdzBPB3l5jWMuHi1LZ9e7ueXs9sZ1lGJugGWF+rIXzL/G1XlsCyn03dyFkfjaa+lgi6 OUp7kVivzwtuhKycMDHnBmw35UkyZRPWBw8UPSxKIk/3IraXNHmO8Sr9FtnlD8kcQuhqZuIr+liRT 3LBJYkj7xWRgtiz77NdhV3JoemBGWA6e1JSeID5Ln20oDX2PSyF+N59T0QCcMWUFPHOP0aSvv4EXI xZ+PtVfGp0gELWSKkzoavvrKIAfD4oRAr8o/8VeQqdT2YvDSuEnUs8v63uD4EXq0kYi1XKYeT+HFq LgSgqV2fYW5s/vhH5DXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZp5-00HaLS-Lq; Thu, 18 Aug 2022 07:20:11 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZoc-00HZui-US; Thu, 18 Aug 2022 07:19:44 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B52E7202EEB; Thu, 18 Aug 2022 09:19:41 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 551062006AF; Thu, 18 Aug 2022 09:19:41 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 77BB61820F56; Thu, 18 Aug 2022 15:19:39 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 4/6] arm64: dts: imx8mp: add the iMX8MP PCIe support Date: Thu, 18 Aug 2022 15:02:31 +0800 Message-Id: <1660806153-29001-5-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001943_318271_32A47761 X-CRM114-Status: UNSURE ( 9.68 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the i.MX8MP PCIe support. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 46 ++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index fe178b7d063c..a6ba351c4927 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -410,7 +411,8 @@ iomuxc: pinctrl@30330000 { }; gpr: iomuxc-gpr@30340000 { - compatible = "fsl,imx8mp-iomuxc-gpr", "syscon"; + compatible = "fsl,imx8mp-iomuxc-gpr", + "fsl,imx6q-iomuxc-gpr", "syscon"; reg = <0x30340000 0x10000>; }; @@ -1084,6 +1086,17 @@ media_blk_ctrl: blk-ctrl@32ec0000 { #power-domain-cells = <1>; }; + pcie_phy: pcie-phy@32f00000 { + compatible = "fsl,imx8mp-pcie-phy"; + reg = <0x32f00000 0x10000>; + resets = <&src IMX8MP_RESET_PCIEPHY>, + <&src IMX8MP_RESET_PCIEPHY_PERST>; + reset-names = "pciephy", "perst"; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE_PHY>; + #phy-cells = <0>; + status = "disabled"; + }; + hsio_blk_ctrl: blk-ctrl@32f10000 { compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon"; reg = <0x32f10000 0x24>; @@ -1099,6 +1112,37 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { }; }; + pcie: pcie@33800000 { + compatible = "fsl,imx8mp-pcie"; + reg = <0x33800000 0x400000>, <0x1ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ + 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + num-viewport = <4>; + interrupts = ; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + fsl,max-link-speed = <3>; + linux,pci-domain = <0>; + power-domains = <&hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE>; + resets = <&src IMX8MP_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "apps", "turnoff"; + phys = <&pcie_phy>; + phy-names = "pcie-phy"; + status = "disabled"; + }; + gpu3d: gpu@38000000 { compatible = "vivante,gc"; reg = <0x38000000 0x8000>; From patchwork Thu Aug 18 07:02:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C82DC00140 for ; Thu, 18 Aug 2022 07:21:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=8iSEG6p8NHmGTZcR4odM82oI/1NJNLQ3iL4wUlObeII=; b=denxX0VaGECUj5 SEbSU434+LvW39yqoRM9No29/Wg9AZhXwZUREewwLPHfPOZpz+1pvlwO9fRRPQ7+wVGH0DEBUyZFL mu2YFLnWIljeQA1JPWuxjXRgVWjWMgP9Rm/qpx37Fj5wPJYyatHlGaUBzp/vF44or46i9wW3xS4N0 vvqaD309Ojg2vzcl6Hy2i0cFbkGscdeV0ORTr9H7aN2+v/I0os+STCeBXNCEUmsN1y7f7Z3fkTEZ0 Vp2JsPebDPoQyynGWkGmsyhAKB+uMXjZOk+QszyLZi3QbDcSOsLsDek5r4rAiqvpBXkLpFv+bQKvy 7HV4LN/MDVnQU295ngwg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZpQ-00Habd-1R; Thu, 18 Aug 2022 07:20:32 +0000 Received: from inva021.nxp.com ([92.121.34.21]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZoe-00HZwz-6n; Thu, 18 Aug 2022 07:19:45 +0000 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id ED77C202EEE; Thu, 18 Aug 2022 09:19:42 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B788A2006AF; Thu, 18 Aug 2022 09:19:42 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id DA0D31820F57; Thu, 18 Aug 2022 15:19:40 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 5/6] arm64: dts: imx8mp-evk: Add PCIe support Date: Thu, 18 Aug 2022 15:02:32 +0800 Message-Id: <1660806153-29001-6-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001944_566660_09B530AB X-CRM114-Status: UNSURE ( 8.28 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PCIe support on i.MX8MP EVK board. Signed-off-by: Richard Zhu --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 53 ++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index f6b017ab5f53..defc92a8bb60 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include "imx8mp.dtsi" / { @@ -33,6 +34,12 @@ memory@40000000 { <0x1 0x00000000 0 0xc0000000>; }; + pcie0_refclk: pcie0-refclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + reg_can1_stby: regulator-can1-stby { compatible = "regulator-fixed"; regulator-name = "can1-stby"; @@ -55,6 +62,17 @@ reg_can2_stby: regulator-can2-stby { enable-active-high; }; + reg_pcie0: regulator-pcie { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0_reg>; + regulator-name = "MPCIE_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -350,6 +368,28 @@ &i2c5 { */ }; +&pcie_phy { + fsl,refclk-pad-mode = ; + clocks = <&pcie0_refclk>; + clock-names = "ref"; + status = "okay"; +}; + +&pcie{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie0>; + reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>; + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + <&clk IMX8MP_CLK_PCIE_ROOT>, + <&clk IMX8MP_CLK_HSIO_AXI>; + clock-names = "pcie", "pcie_aux", "pcie_bus"; + assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>; + assigned-clock-rates = <10000000>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>; + vpcie-supply = <®_pcie0>; + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; @@ -502,6 +542,19 @@ MX8MP_IOMUXC_SPDIF_TX__I2C5_SCL 0x400001c2 >; }; + pinctrl_pcie0: pcie0grp { + fsl,pins = < + MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x61 /* open drain, pull up */ + MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x41 + >; + }; + + pinctrl_pcie0_reg: pcie0reggrp { + fsl,pins = < + MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x41 + >; + }; + pinctrl_pmic: pmicgrp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x000001c0 From patchwork Thu Aug 18 07:02:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 12946828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26299C00140 for ; Thu, 18 Aug 2022 07:22:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dNUZTWB/7MAvd4PUPeIKE0Zkf+sPKxXyqkbCpRmADMw=; b=Cc8b95YwlijAhz czcL5VyN2wioF4ejvW05lLAwQXyXEoPo8aQVVLmzM3fclVCO6mVnmI1rffs0JEG6sy2d4IyzLxsrz FE4D96eCetEVtD/eu7pxEUGTf/q0VlMt2JFzTmJ7XWUv3HO5uLLQWFL6Cf7vMjdwc64VAXJSrb7Eq rMKHCw2k5GBPVsj7dY2FnzD/0dI8d5ndGrj7ptY7jn9ouAiFCy01KYf27ZGhUL9nixWM+2nfucFcS YVhz6GAYg9JNix5XJCBBnN3pu4frkOKwa7VC2lVNMuRKuKbFJGyo7iYCh/kQvnJ4aGJZWMwSH7YO2 orb/GyC/xtHxK7ng/LTQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZpb-00HajE-7w; Thu, 18 Aug 2022 07:20:43 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oOZof-00HZzT-Ou; Thu, 18 Aug 2022 07:19:47 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 87A481A0673; Thu, 18 Aug 2022 09:19:44 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 275F81A0669; Thu, 18 Aug 2022 09:19:44 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 48B101820F56; Thu, 18 Aug 2022 15:19:42 +0800 (+08) From: Richard Zhu To: p.zabel@pengutronix.de, l.stach@pengutronix.de, bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org, shawnguo@kernel.org, vkoul@kernel.org, alexander.stein@ew.tq-group.com, marex@denx.de Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com, Richard Zhu Subject: [PATCH v3 6/6] PCI: imx6: Add the iMX8MP PCIe support Date: Thu, 18 Aug 2022 15:02:33 +0800 Message-Id: <1660806153-29001-7-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_001946_150292_834D2FF8 X-CRM114-Status: GOOD ( 12.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the i.MX8MP PCIe support. Signed-off-by: Richard Zhu --- drivers/pci/controller/dwc/pci-imx6.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 6e5debdbc55b..786f5737ca6a 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -51,6 +51,7 @@ enum imx6_pcie_variants { IMX7D, IMX8MQ, IMX8MM, + IMX8MP, }; #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) @@ -150,7 +151,8 @@ struct imx6_pcie { static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie) { WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && - imx6_pcie->drvdata->variant != IMX8MM); + imx6_pcie->drvdata->variant != IMX8MM && + imx6_pcie->drvdata->variant != IMX8MP); return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14; } @@ -301,6 +303,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie) { switch (imx6_pcie->drvdata->variant) { case IMX8MM: + case IMX8MP: /* * The PHY initialization had been done in the PHY * driver, break here directly. @@ -558,6 +561,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) break; case IMX8MM: case IMX8MQ: + case IMX8MP: ret = clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { dev_err(dev, "unable to enable pcie_aux clock\n"); @@ -602,6 +606,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie) break; case IMX8MM: case IMX8MQ: + case IMX8MP: clk_disable_unprepare(imx6_pcie->pcie_aux); break; default: @@ -669,6 +674,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie) reset_control_assert(imx6_pcie->pciephy_reset); fallthrough; case IMX8MM: + case IMX8MP: reset_control_assert(imx6_pcie->apps_reset); break; case IMX6SX: @@ -744,6 +750,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) break; case IMX6Q: /* Nothing to do */ case IMX8MM: + case IMX8MP: break; } @@ -793,6 +800,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev) case IMX7D: case IMX8MQ: case IMX8MM: + case IMX8MP: reset_control_deassert(imx6_pcie->apps_reset); break; } @@ -812,6 +820,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev) case IMX7D: case IMX8MQ: case IMX8MM: + case IMX8MP: reset_control_assert(imx6_pcie->apps_reset); break; } @@ -1179,6 +1188,7 @@ static int imx6_pcie_probe(struct platform_device *pdev) } break; case IMX8MM: + case IMX8MP: imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); if (IS_ERR(imx6_pcie->pcie_aux)) return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux), @@ -1320,6 +1330,10 @@ static const struct imx6_pcie_drvdata drvdata[] = { .variant = IMX8MM, .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, }, + [IMX8MP] = { + .variant = IMX8MP, + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, + }, }; static const struct of_device_id imx6_pcie_of_match[] = { @@ -1329,6 +1343,7 @@ static const struct of_device_id imx6_pcie_of_match[] = { { .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], }, { .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], }, { .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], }, + { .compatible = "fsl,imx8mp-pcie", .data = &drvdata[IMX8MP], }, {}, };