From patchwork Wed Aug 8 21:07:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Denis V. Lunev\" via" X-Patchwork-Id: 10560491 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9EFE013BB for ; Wed, 8 Aug 2018 21:10:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D6752AF4D for ; Wed, 8 Aug 2018 21:10:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F31E2AF75; Wed, 8 Aug 2018 21:10:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9CF6A2AF4D for ; Wed, 8 Aug 2018 21:10:03 +0000 (UTC) Received: from localhost ([::1]:45470 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnViU-0003CK-TZ for patchwork-qemu-devel@patchwork.kernel.org; Wed, 08 Aug 2018 17:10:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49794) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVhV-0003B4-U6 for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnVhT-0006f4-RQ for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:01 -0400 Received: from smtp20.mail.ru ([94.100.179.251]:33076) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fnVhT-0006eW-Ex for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:08:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=26t1yNzDhVGsxNJYhTTs4MHl2by/gKXHkyBiGHOvfAw=; b=J/akznkIRtp/C+ho9itQKsCHw/Bkn2wGJNG7XEg4D6eBVxcin4bo/xjotUk8jeJw8eLGFLDM9LdRm86W8PvjTDjwSeQZ0ERalWcscQZL5sNy86ktTWVyQIFN0m+I+d2X71W4dXWrSM+gXmxWCnygLyOuGOdtSEKa4NQ2DaKXP7g=; Received: by smtp20.mail.ru with esmtpa (envelope-from ) id 1fnVhR-0002Hh-PG; Thu, 09 Aug 2018 00:08:58 +0300 To: qemu-devel@nongnu.org Date: Thu, 9 Aug 2018 00:07:47 +0300 Message-Id: <20180808210750.3915-2-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180808210750.3915-1-jusual@mail.ru> References: <20180808210750.3915-1-jusual@mail.ru> Authentication-Results: smtp20.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-7FA49CB5: 0D63561A33F958A56497D1FDAB22E17E6D2E4307B80EE54E76FD4FDDEEC6D0388941B15DA834481F8AA50765F7900637F3E38EE449E3E2AE389733CBF5DBD5E9B5C8C57E37DE458B4DA2F55E57A558BE49FD398EE364050F9647ADFADE5905B1BA3038C0950A5D36B5C8C57E37DE458B4C7702A67D5C33162DBA43225CD8A89F9FFED5BD9FB41755B17FB8E9DB15B15533F23D3737DF6B5143847C11F186F3C5E7DDDDC251EA7DABCC89B49CDF41148F458B267F216095A92623479134186CDE6BA297DBC24807EABDAD6C7F3747799A X-Mailru-Sender: 7766D515518070DE138AAC7428EA760DBC15EF0841EA5D579F0A7FEAAEF15370EAEC386BEEE43C4F7C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.179.251 Subject: [Qemu-devel] [PATCH v2 1/4] hw/char: Implement nRF51 SoC UART X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Julia Suvorova via Qemu-devel From: "Denis V. Lunev\" via" Reply-To: Julia Suvorova Cc: Peter Maydell , Jim Mussared , =?utf-8?q?Steffen_G=C3=B6rtz?= , Stefan Hajnoczi , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Not implemented: CTS/NCTS, PSEL*. Signed-off-by: Julia Suvorova --- hw/char/Makefile.objs | 1 + hw/char/nrf51_uart.c | 329 +++++++++++++++++++++++++++++++++++ hw/char/trace-events | 4 + include/hw/char/nrf51_uart.h | 78 +++++++++ 4 files changed, 412 insertions(+) create mode 100644 hw/char/nrf51_uart.c create mode 100644 include/hw/char/nrf51_uart.h diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs index b570531291..c4947d7ae7 100644 --- a/hw/char/Makefile.objs +++ b/hw/char/Makefile.objs @@ -1,5 +1,6 @@ common-obj-$(CONFIG_IPACK) += ipoctal232.o common-obj-$(CONFIG_ESCC) += escc.o +common-obj-$(CONFIG_NRF51_SOC) += nrf51_uart.o common-obj-$(CONFIG_PARALLEL) += parallel.o common-obj-$(CONFIG_PARALLEL) += parallel-isa.o common-obj-$(CONFIG_PL011) += pl011.o diff --git a/hw/char/nrf51_uart.c b/hw/char/nrf51_uart.c new file mode 100644 index 0000000000..55404e8f37 --- /dev/null +++ b/hw/char/nrf51_uart.c @@ -0,0 +1,329 @@ +/* + * nRF51 SoC UART emulation + * + * See nRF51 Series Reference Manual, "29 Universal Asynchronous + * Receiver/Transmitter" for hardware specifications: + * http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf + * + * Copyright (c) 2018 Julia Suvorova + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "hw/char/nrf51_uart.h" +#include "trace.h" + +static void nrf51_uart_update_irq(NRF51UARTState *s) +{ + bool irq = false; + + irq |= (s->reg[R_UART_RXDRDY] && + (s->reg[R_UART_INTEN] & R_UART_INTEN_RXDRDY_MASK)); + irq |= (s->reg[R_UART_TXDRDY] && + (s->reg[R_UART_INTEN] & R_UART_INTEN_TXDRDY_MASK)); + irq |= (s->reg[R_UART_ERROR] && + (s->reg[R_UART_INTEN] & R_UART_INTEN_ERROR_MASK)); + irq |= (s->reg[R_UART_RXTO] && + (s->reg[R_UART_INTEN] & R_UART_INTEN_RXTO_MASK)); + + qemu_set_irq(s->irq, irq); +} + +static uint64_t uart_read(void *opaque, hwaddr addr, unsigned int size) +{ + NRF51UARTState *s = NRF51_UART(opaque); + uint64_t r; + + if (!s->enabled) { + return 0; + } + + switch (addr) { + case A_UART_RXD: + r = s->rx_fifo[s->rx_fifo_pos]; + if (s->rx_started && s->rx_fifo_len) { + qemu_chr_fe_accept_input(&s->chr); + s->rx_fifo_pos = (s->rx_fifo_pos + 1) % UART_FIFO_LENGTH; + s->rx_fifo_len--; + if (s->rx_fifo_len) { + s->reg[R_UART_RXDRDY] = 1; + nrf51_uart_update_irq(s); + } + } + break; + case A_UART_INTENSET: + case A_UART_INTENCLR: + case A_UART_INTEN: + r = s->reg[R_UART_INTEN]; + break; + default: + r = s->reg[addr / 4]; + break; + } + + trace_nrf51_uart_read(addr, r, size); + + return r; +} + +static gboolean uart_transmit(GIOChannel *chan, GIOCondition cond, void *opaque) +{ + NRF51UARTState *s = NRF51_UART(opaque); + int r; + uint8_t c = s->reg[R_UART_TXD]; + + s->watch_tag = 0; + + r = qemu_chr_fe_write(&s->chr, &c, 1); + if (r <= 0) { + s->watch_tag = qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, + uart_transmit, s); + if (!s->watch_tag) { + /* The hardware has no transmit error reporting, + * so silently drop the byte + */ + goto buffer_drained; + } + return FALSE; + } + +buffer_drained: + s->reg[R_UART_TXDRDY] = 1; + s->pending_tx_byte = false; + return FALSE; +} + +static void uart_cancel_transmit(NRF51UARTState *s) +{ + if (s->watch_tag) { + g_source_remove(s->watch_tag); + s->watch_tag = 0; + } +} + +static void uart_write(void *opaque, hwaddr addr, + uint64_t value, unsigned int size) +{ + NRF51UARTState *s = NRF51_UART(opaque); + + trace_nrf51_uart_write(addr, value, size); + + if (!s->enabled && (addr != A_UART_ENABLE)) { + return; + } + + switch (addr) { + case A_UART_TXD: + if (!s->pending_tx_byte && s->tx_started) { + s->reg[R_UART_TXD] = value; + s->pending_tx_byte = true; + uart_transmit(NULL, G_IO_OUT, s); + } + break; + case A_UART_INTEN: + s->reg[R_UART_INTEN] = value; + break; + case A_UART_INTENSET: + s->reg[R_UART_INTEN] |= value; + break; + case A_UART_INTENCLR: + s->reg[R_UART_INTEN] &= ~value; + break; + case A_UART_TXDRDY ... A_UART_RXTO: + s->reg[addr / 4] = value; + break; + case A_UART_ERRORSRC: + s->reg[addr / 4] &= ~value; + break; + case A_UART_RXD: + break; + case A_UART_RXDRDY: + if (value == 0) { + s->reg[R_UART_RXDRDY] = 0; + } + break; + case A_UART_STARTTX: + if (value == 1) { + s->tx_started = true; + } + break; + case A_UART_STARTRX: + if (value == 1) { + s->rx_started = true; + } + break; + case A_UART_ENABLE: + if (value) { + if (value == 4) { + s->enabled = true; + } + break; + } + s->enabled = false; + value = 1; + /* fall through */ + case A_UART_SUSPEND: + case A_UART_STOPTX: + if (value == 1) { + s->tx_started = false; + } + case A_UART_STOPRX: + if (addr != A_UART_STOPTX && value == 1) { + s->rx_started = false; + s->reg[R_UART_RXTO] = 1; + } + break; + default: + s->reg[addr / 4] = value; + break; + } + nrf51_uart_update_irq(s); +} + +static const MemoryRegionOps uart_ops = { + .read = uart_read, + .write = uart_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static void nrf51_uart_reset(DeviceState *dev) +{ + NRF51UARTState *s = NRF51_UART(dev); + + s->pending_tx_byte = 0; + + uart_cancel_transmit(s); + + memset(s->reg, 0, sizeof(s->reg)); + + s->reg[R_UART_PSELRTS] = 0xFFFFFFFF; + s->reg[R_UART_PSELTXD] = 0xFFFFFFFF; + s->reg[R_UART_PSELCTS] = 0xFFFFFFFF; + s->reg[R_UART_PSELRXD] = 0xFFFFFFFF; + s->reg[R_UART_BAUDRATE] = 0x4000000; + + s->rx_fifo_len = 0; + s->rx_fifo_pos = 0; + s->rx_started = false; + s->tx_started = false; + s->enabled = false; +} + +static void uart_receive(void *opaque, const uint8_t *buf, int size) +{ + + NRF51UARTState *s = NRF51_UART(opaque); + int i; + + if (size == 0 || s->rx_fifo_len >= UART_FIFO_LENGTH) { + return; + } + + for (i = 0; i < size; i++) { + uint32_t pos = (s->rx_fifo_pos + s->rx_fifo_len) % UART_FIFO_LENGTH; + s->rx_fifo[pos] = buf[i]; + s->rx_fifo_len++; + } + + s->reg[R_UART_RXDRDY] = 1; + nrf51_uart_update_irq(s); +} + +static int uart_can_receive(void *opaque) +{ + NRF51UARTState *s = NRF51_UART(opaque); + + return s->rx_started ? (UART_FIFO_LENGTH - s->rx_fifo_len) : 0; +} + +static void uart_event(void *opaque, int event) +{ + NRF51UARTState *s = NRF51_UART(opaque); + + if (event == CHR_EVENT_BREAK) { + s->reg[R_UART_ERRORSRC] |= 3; + s->reg[R_UART_ERROR] = 1; + nrf51_uart_update_irq(s); + } +} + +static void nrf51_uart_realize(DeviceState *dev, Error **errp) +{ + NRF51UARTState *s = NRF51_UART(dev); + + qemu_chr_fe_set_handlers(&s->chr, uart_can_receive, uart_receive, + uart_event, NULL, s, NULL, true); +} + +static void nrf51_uart_init(Object *obj) +{ + NRF51UARTState *s = NRF51_UART(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->iomem, obj, &uart_ops, s, + "nrf51_soc.uart", UART_SIZE); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq); +} + +static int nrf51_uart_post_load(void *opaque, int version_id) +{ + NRF51UARTState *s = NRF51_UART(opaque); + + if (s->pending_tx_byte) { + s->watch_tag = qemu_chr_fe_add_watch(&s->chr, G_IO_OUT | G_IO_HUP, + uart_transmit, s); + } + + return 0; +} + +static const VMStateDescription nrf51_uart_vmstate = { + .name = "nrf51_soc.uart", + .post_load = nrf51_uart_post_load, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(reg, NRF51UARTState, 0x56C), + VMSTATE_UINT8_ARRAY(rx_fifo, NRF51UARTState, UART_FIFO_LENGTH), + VMSTATE_UINT32(rx_fifo_pos, NRF51UARTState), + VMSTATE_UINT32(rx_fifo_len, NRF51UARTState), + VMSTATE_BOOL(rx_started, NRF51UARTState), + VMSTATE_BOOL(tx_started, NRF51UARTState), + VMSTATE_BOOL(pending_tx_byte, NRF51UARTState), + VMSTATE_BOOL(enabled, NRF51UARTState), + VMSTATE_END_OF_LIST() + } +}; + +static Property nrf51_uart_properties[] = { + DEFINE_PROP_CHR("chardev", NRF51UARTState, chr), + DEFINE_PROP_END_OF_LIST(), +}; + +static void nrf51_uart_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = nrf51_uart_reset; + dc->realize = nrf51_uart_realize; + dc->props = nrf51_uart_properties; + dc->vmsd = &nrf51_uart_vmstate; +} + +static const TypeInfo nrf51_uart_info = { + .name = TYPE_NRF51_UART, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(NRF51UARTState), + .instance_init = nrf51_uart_init, + .class_init = nrf51_uart_class_init +}; + +static void nrf51_uart_register_types(void) +{ + type_register_static(&nrf51_uart_info); +} + +type_init(nrf51_uart_register_types) diff --git a/hw/char/trace-events b/hw/char/trace-events index b64213d4dd..de34a74399 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -73,3 +73,7 @@ cmsdk_apb_uart_receive(uint8_t c) "CMSDK APB UART: got character 0x%x from backe cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pending" cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend" cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1" + +# hw/char/nrf51_uart.c +nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" +nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" diff --git a/include/hw/char/nrf51_uart.h b/include/hw/char/nrf51_uart.h new file mode 100644 index 0000000000..1d49b53da7 --- /dev/null +++ b/include/hw/char/nrf51_uart.h @@ -0,0 +1,78 @@ +/* + * nRF51 SoC UART emulation + * + * Copyright (c) 2018 Julia Suvorova + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#ifndef NRF51_UART_H +#define NRF51_UART_H + +#include "hw/sysbus.h" +#include "chardev/char-fe.h" +#include "hw/registerfields.h" + +#define UART_FIFO_LENGTH 6 +#define UART_BASE 0x40002000 +#define UART_SIZE 0x1000 + +#define TYPE_NRF51_UART "nrf51_soc.uart" +#define NRF51_UART(obj) OBJECT_CHECK(NRF51UARTState, (obj), TYPE_NRF51_UART) + +REG32(UART_STARTRX, 0x000) +REG32(UART_STOPRX, 0x004) +REG32(UART_STARTTX, 0x008) +REG32(UART_STOPTX, 0x00C) +REG32(UART_SUSPEND, 0x01C) + +REG32(UART_CTS, 0x100) +REG32(UART_NCTS, 0x104) +REG32(UART_RXDRDY, 0x108) +REG32(UART_TXDRDY, 0x11C) +REG32(UART_ERROR, 0x124) +REG32(UART_RXTO, 0x144) + +REG32(UART_INTEN, 0x300) + FIELD(UART_INTEN, CTS, 0, 1) + FIELD(UART_INTEN, NCTS, 1, 1) + FIELD(UART_INTEN, RXDRDY, 2, 1) + FIELD(UART_INTEN, TXDRDY, 7, 1) + FIELD(UART_INTEN, ERROR, 9, 1) + FIELD(UART_INTEN, RXTO, 17, 1) +REG32(UART_INTENSET, 0x304) +REG32(UART_INTENCLR, 0x308) +REG32(UART_ERRORSRC, 0x480) +REG32(UART_ENABLE, 0x500) +REG32(UART_PSELRTS, 0x508) +REG32(UART_PSELTXD, 0x50C) +REG32(UART_PSELCTS, 0x510) +REG32(UART_PSELRXD, 0x514) +REG32(UART_RXD, 0x518) +REG32(UART_TXD, 0x51C) +REG32(UART_BAUDRATE, 0x524) +REG32(UART_CONFIG, 0x56C) + +typedef struct NRF51UARTState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + CharBackend chr; + qemu_irq irq; + guint watch_tag; + + uint8_t rx_fifo[UART_FIFO_LENGTH]; + unsigned int rx_fifo_pos; + unsigned int rx_fifo_len; + + uint32_t reg[0x56C]; + + bool rx_started; + bool tx_started; + bool pending_tx_byte; + bool enabled; +} NRF51UARTState; + +#endif From patchwork Wed Aug 8 21:07:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Denis V. Lunev\" via" X-Patchwork-Id: 10560493 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4CB5913BB for ; Wed, 8 Aug 2018 21:12:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 301212AF4D for ; Wed, 8 Aug 2018 21:12:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 225052AF81; Wed, 8 Aug 2018 21:12:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A5EF92AF4D for ; Wed, 8 Aug 2018 21:12:08 +0000 (UTC) Received: from localhost ([::1]:45486 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVkV-00068x-TQ for patchwork-qemu-devel@patchwork.kernel.org; Wed, 08 Aug 2018 17:12:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49833) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVhd-0003Ek-Fy for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnVhY-0006iV-Qu for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:09 -0400 Received: from smtp20.mail.ru ([94.100.179.251]:39456) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fnVhY-0006gu-IM for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=19D29lTyZ9YX5J8aRDYGXlSKwBspP7+Enqqzwn1MUE4=; b=Rcanuoo6/gXmCeE+cUt7RKtdns35sWMzD6u6w8fNKNiGx18dttrZySBJZfQQ0YGaXl5ggEcvyToizh0vdCbzRGJZb9MECZ0xOgJmWS3M1OnE9q5KqvmwhfOgrSHzPsxONZbwNiYWRgy/JOM4sHYoq57YjtvH4S/XuY37YhkGp6U=; Received: by smtp20.mail.ru with esmtpa (envelope-from ) id 1fnVhW-0002Hh-K2; Thu, 09 Aug 2018 00:09:02 +0300 To: qemu-devel@nongnu.org Date: Thu, 9 Aug 2018 00:07:48 +0300 Message-Id: <20180808210750.3915-3-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180808210750.3915-1-jusual@mail.ru> References: <20180808210750.3915-1-jusual@mail.ru> Authentication-Results: smtp20.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-7FA49CB5: 0D63561A33F958A54C8B9A410F8C7A2D6D2E4307B80EE54E534F12A45EB2B8BA8941B15DA834481F8AA50765F7900637F6B57BC7E6449061A352F6E88A58FB866BA297DBC24807EA76E601842F6C81A127C277FBC8AE2E8BCA3E976C47030043D81D268191BDAD3D4E70A05D1297E1BB35872C767BF85DA227C277FBC8AE2E8B927CE0747365AA1D43DD3BDA1FFE7EB935872C767BF85DA2F004C906525384306FED454B719173D6462275124DF8B9C910FF24F588AC80D2BD9CCCA9EDD067B1EDA766A37F9254B7 X-Mailru-Sender: 7766D515518070DE138AAC7428EA760DBD9DE7C51E58D0066436CADAF6F1FC5F06F49D926679B5B77C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.179.251 Subject: [Qemu-devel] [PATCH v2 2/4] hw/arm/nrf51_soc: Connect UART to nRF51 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Julia Suvorova via Qemu-devel From: "Denis V. Lunev\" via" Reply-To: Julia Suvorova Cc: Peter Maydell , Jim Mussared , =?utf-8?q?Steffen_G=C3=B6rtz?= , Stefan Hajnoczi , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Wire up nRF51 UART in the corresponding SoC using in-place init/realize. Based-on: <20180803052137.10602-1-joel@jms.id.au> Signed-off-by: Julia Suvorova --- hw/arm/nrf51_soc.c | 20 ++++++++++++++++++++ include/hw/arm/nrf51_soc.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 9f9649c780..8b5602f363 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -38,9 +38,12 @@ #define NRF51822_FLASH_SIZE (256 * 1024) #define NRF51822_SRAM_SIZE (16 * 1024) +#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F) + static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) { NRF51State *s = NRF51_SOC(dev_soc); + MemoryRegion *mr = NULL; Error *err = NULL; if (!s->board_memory) { @@ -70,6 +73,19 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) } memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram); + /* UART */ + qdev_prop_set_chr(DEVICE(&s->uart), "chardev", serial_hd(0)); + object_property_set_bool(OBJECT(&s->uart), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0); + memory_region_add_subregion_overlap(&s->container, UART_BASE, mr, 0); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0, + qdev_get_gpio_in(DEVICE(&s->cpu), + BASE_TO_IRQ(UART_BASE))); + create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE); create_unimplemented_device("nrf51_soc.private", 0xF0000000, 0x10000000); @@ -86,6 +102,10 @@ static void nrf51_soc_init(Object *obj) qdev_set_parent_bus(DEVICE(&s->cpu), sysbus_get_default()); qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type", ARM_CPU_TYPE_NAME("cortex-m0")); qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 32); + + object_initialize(&s->uart, sizeof(s->uart), TYPE_NRF51_UART); + object_property_add_child(obj, "uart", OBJECT(&s->uart), &error_abort); + qdev_set_parent_bus(DEVICE(&s->uart), sysbus_get_default()); } static Property nrf51_soc_properties[] = { diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index e380ec26b8..46a1c1a66c 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/arm/armv7m.h" +#include "hw/char/nrf51_uart.h" #define TYPE_NRF51_SOC "nrf51-soc" #define NRF51_SOC(obj) \ @@ -25,6 +26,8 @@ typedef struct NRF51State { /*< public >*/ ARMv7MState cpu; + NRF51UARTState uart; + MemoryRegion iomem; MemoryRegion sram; MemoryRegion flash; From patchwork Wed Aug 8 21:07:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Denis V. Lunev\" via" X-Patchwork-Id: 10560497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D867713BB for ; Wed, 8 Aug 2018 21:13:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C8B2A28668 for ; Wed, 8 Aug 2018 21:13:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BCCCD290D4; Wed, 8 Aug 2018 21:13:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6DBE428668 for ; Wed, 8 Aug 2018 21:13:36 +0000 (UTC) Received: from localhost ([::1]:45490 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVlv-00079W-MR for patchwork-qemu-devel@patchwork.kernel.org; Wed, 08 Aug 2018 17:13:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49841) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVhe-0003F5-0v for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnVhd-0006mt-97 for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:09 -0400 Received: from smtp20.mail.ru ([94.100.179.251]:45760) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fnVhd-0006lA-0k for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=UnTbdmFnBSxSodzDp1KCLxQCoqjPBOWccaQPmwHK860=; b=lqcporTeHPUZrYV7YHwhgR4FjRSDIB3ZYIawMyNPzNC7R3I0WRbcoBOF0TYwgEQjpaa2LRngLC2FTZ/1Foh8veG2Qx4bN7N2+u6u7X3TWoERQgvbR1mq4yQU7mYtDzjpUi33d5VVyNpvKn+lS1BsSsRdRebZShlxVRanNQwwU84=; Received: by smtp20.mail.ru with esmtpa (envelope-from ) id 1fnVhb-0002Hh-0Z; Thu, 09 Aug 2018 00:09:07 +0300 To: qemu-devel@nongnu.org Date: Thu, 9 Aug 2018 00:07:49 +0300 Message-Id: <20180808210750.3915-4-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180808210750.3915-1-jusual@mail.ru> References: <20180808210750.3915-1-jusual@mail.ru> Authentication-Results: smtp20.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-7FA49CB5: 0D63561A33F958A5BBDFA0C8E728AE496D2E4307B80EE54E973DA8DB24CDD2A58941B15DA834481F8AA50765F790063783E00425F71A4181389733CBF5DBD5E9B5C8C57E37DE458B4DA2F55E57A558BE49FD398EE364050FD76C6ED7039589DE302FCEF25BFAB345C4224003CC836476C0CAF46E325F83A522CA9DD8327EE4930A3850AC1BE2E7354E16373E78FDEB4BEB0029008D61F0D4731C566533BA786A40A5AABA2AD371193C9F3DD0FB1AF5EB1248E41960EB3BA62623479134186CDE6BA297DBC24807EABDAD6C7F3747799A X-Mailru-Sender: 7766D515518070DE138AAC7428EA760DBD6C2CB8C3F3766D4BDBBC06CAE16D6626865B315CAACA777C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.179.251 Subject: [Qemu-devel] [PATCH v2 3/4] tests/boot-serial-test: Add microbit board testcase X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Julia Suvorova via Qemu-devel From: "Denis V. Lunev\" via" Reply-To: Julia Suvorova Cc: Peter Maydell , Jim Mussared , =?utf-8?q?Steffen_G=C3=B6rtz?= , Stefan Hajnoczi , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP New mini-kernel test for nRF51 SoC UART. Signed-off-by: Julia Suvorova Acked-by: Thomas Huth Reviewed-by: Stefan Hajnoczi --- tests/boot-serial-test.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c index 952a2e7ead..19714c3f87 100644 --- a/tests/boot-serial-test.c +++ b/tests/boot-serial-test.c @@ -62,6 +62,24 @@ static const uint8_t kernel_aarch64[] = { 0xfd, 0xff, 0xff, 0x17, /* b -12 (loop) */ }; +static const uint8_t kernel_nrf51[] = { + 0x00, 0x00, 0x00, 0x00, /* Stack top address */ + 0x09, 0x00, 0x00, 0x00, /* Reset handler address */ + 0x04, 0x4a, /* ldr r2, [pc, #16] Get ENABLE */ + 0x04, 0x21, /* movs r1, #4 */ + 0x11, 0x60, /* str r1, [r2] */ + 0x04, 0x4a, /* ldr r2, [pc, #16] Get STARTTX */ + 0x01, 0x21, /* movs r1, #1 */ + 0x11, 0x60, /* str r1, [r2] */ + 0x03, 0x4a, /* ldr r2, [pc, #12] Get TXD */ + 0x54, 0x21, /* movs r1, 'T' */ + 0x11, 0x60, /* str r1, [r2] */ + 0xfe, 0xe7, /* b . */ + 0x00, 0x25, 0x00, 0x40, /* 0x40002500 = UART ENABLE */ + 0x08, 0x20, 0x00, 0x40, /* 0x40002008 = UART STARTTX */ + 0x1c, 0x25, 0x00, 0x40 /* 0x4000251c = UART TXD */ +}; + typedef struct testdef { const char *arch; /* Target architecture */ const char *machine; /* Name of the machine */ @@ -107,6 +125,7 @@ static testdef_t tests[] = { { "hppa", "hppa", "", "SeaBIOS wants SYSTEM HALT" }, { "aarch64", "virt", "-cpu cortex-a57", "TT", sizeof(kernel_aarch64), kernel_aarch64 }, + { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 }, { NULL } }; From patchwork Wed Aug 8 21:07:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Denis V. Lunev\" via" X-Patchwork-Id: 10560495 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3161613BB for ; Wed, 8 Aug 2018 21:12:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1F5762AF4D for ; Wed, 8 Aug 2018 21:12:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 12DAA2AF81; Wed, 8 Aug 2018 21:12:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8D7FA2AF4D for ; Wed, 8 Aug 2018 21:12:16 +0000 (UTC) Received: from localhost ([::1]:45488 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVkd-0006Eg-Qi for patchwork-qemu-devel@patchwork.kernel.org; Wed, 08 Aug 2018 17:12:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fnVhi-0003IS-Dq for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fnVhh-0006qN-CW for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:14 -0400 Received: from smtp20.mail.ru ([94.100.179.251]:45898) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fnVhh-0006pX-48 for qemu-devel@nongnu.org; Wed, 08 Aug 2018 17:09:13 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail2; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=Sr7MXCx2LEmWiHk5j1JicfIaLOE31DflgrBb5ds6PTY=; b=He3ms7soGvkqRapMJnHCpOtkd81xQnkrDKHjJyvjQM/ruueNOZl590Oyc7K7AocxHE3cpM1yqVn7sB4wihCSmYRrVS07iVtQ4v3siPmuEIRsmlnLl0+bLUQOG5Y0d7K/liKC4Wwn7JPApRy0s2hJp92POXrdJjOSPbqWGSsWikw=; Received: by smtp20.mail.ru with esmtpa (envelope-from ) id 1fnVhf-0002Hh-Fd; Thu, 09 Aug 2018 00:09:11 +0300 To: qemu-devel@nongnu.org Date: Thu, 9 Aug 2018 00:07:50 +0300 Message-Id: <20180808210750.3915-5-jusual@mail.ru> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180808210750.3915-1-jusual@mail.ru> References: <20180808210750.3915-1-jusual@mail.ru> Authentication-Results: smtp20.mail.ru; auth=pass smtp.auth=jusual@mail.ru smtp.mailfrom=jusual@mail.ru X-7FA49CB5: 0D63561A33F958A5F91DD0F7588CEEF16D2E4307B80EE54E321589DF743CA5A78941B15DA834481F8AA50765F7900637DCE3DBD6F8E38AFD389733CBF5DBD5E9B5C8C57E37DE458B4DA2F55E57A558BE49FD398EE364050F9647ADFADE5905B1BA3038C0950A5D36B5C8C57E37DE458B4C7702A67D5C33162DBA43225CD8A89FD2A95C73FD1EFF4533EC5F1D65593A419BD042E35019D45F43847C11F186F3C5E7DDDDC251EA7DABCC89B49CDF41148FFC2B27DE93B9EBF03B503F486389A921A5CC5B56E945C8DA X-Mailru-Sender: 7766D515518070DE138AAC7428EA760DF0CA256A8E08CE045EEB9165E073A771AD86B2CDA8E0145D7C4160E8B47E48163DDE9B364B0DF2898CB68AF7A628805D594FB4C9F0DBF412AE208404248635DF X-Mras: OK X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 94.100.179.251 Subject: [Qemu-devel] [PATCH v2 4/4] tests/microbit-test: Check nRF51 UART functionality X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Julia Suvorova via Qemu-devel From: "Denis V. Lunev\" via" Reply-To: Julia Suvorova Cc: Peter Maydell , Jim Mussared , =?utf-8?q?Steffen_G=C3=B6rtz?= , Stefan Hajnoczi , Joel Stanley , Stefan Hajnoczi , Paolo Bonzini , Julia Suvorova Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Some functional tests for: Basic reception/transmittion Suspending INTEN* registers Based-on: <20180806100114.21410-6-contrib@steffen-goertz.de> Signed-off-by: Julia Suvorova --- tests/microbit-test.c | 106 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 103 insertions(+), 3 deletions(-) diff --git a/tests/microbit-test.c b/tests/microbit-test.c index 08e2210916..8b69d83684 100644 --- a/tests/microbit-test.c +++ b/tests/microbit-test.c @@ -17,7 +17,10 @@ #include "qemu/osdep.h" #include "exec/hwaddr.h" #include "libqtest.h" +#include "hw/char/nrf51_uart.h" +#include +#include #define PAGE_SIZE 1024 #define FLASH_SIZE (256 * PAGE_SIZE) @@ -48,7 +51,6 @@ #define GPIO_PULLDOWN 1 #define GPIO_PULLUP 3 - static void fill_and_erase(hwaddr base, hwaddr size, uint32_t address_reg) { /* Fill memory */ @@ -204,19 +206,117 @@ static void test_nrf51_gpio(void) g_assert_false(true); } +static bool wait_for_event(uint32_t event_addr) +{ + int i; + + for (i = 0; i < 1000; i++) { + if (readl(event_addr) == 1) { + writel(event_addr, 0x00); + return true; + } + g_usleep(10000); + } + + return false; +} + +static void rw_to_rxd(int sock_fd, const char *in, char *out) +{ + int i; + + g_assert(write(sock_fd, in, strlen(in)) == strlen(in)); + for (i = 0; i < strlen(in); i++) { + g_assert(wait_for_event(UART_BASE + A_UART_RXDRDY)); + out[i] = readl(UART_BASE + A_UART_RXD); + } + out[i] = '\0'; +} + +static void w_to_txd(const char *in) +{ + int i; + + for (i = 0; i < strlen(in); i++) { + writel(UART_BASE + A_UART_TXD, in[i]); + g_assert(wait_for_event(UART_BASE + A_UART_TXDRDY)); + } +} + +static void test_nrf51_uart(const void *data) +{ + int sock_fd = *((const int *) data); + char s[10]; + + g_assert(write(sock_fd, "c", 1) == 1); + g_assert(readl(UART_BASE + A_UART_RXD) == 0); + + writel(UART_BASE + A_UART_ENABLE, 0x04); + writel(UART_BASE + A_UART_STARTRX, 0x01); + + g_assert(wait_for_event(UART_BASE + A_UART_RXDRDY)); + writel(UART_BASE + A_UART_RXDRDY, 0x00); + g_assert(readl(UART_BASE + A_UART_RXD) == 'c'); + + writel(UART_BASE + A_UART_INTENSET, 0x04); + g_assert(readl(UART_BASE + A_UART_INTEN) == 0x04); + writel(UART_BASE + A_UART_INTENCLR, 0x04); + g_assert(readl(UART_BASE + A_UART_INTEN) == 0x00); + + rw_to_rxd(sock_fd, "hello", s); + g_assert(strcmp(s, "hello") == 0); + + writel(UART_BASE + A_UART_STARTTX, 0x01); + w_to_txd("d"); + g_assert(read(sock_fd, s, 10) == 1); + g_assert(s[0] == 'd'); + + writel(UART_BASE + A_UART_SUSPEND, 0x01); + writel(UART_BASE + A_UART_TXD, 'h'); + writel(UART_BASE + A_UART_STARTTX, 0x01); + w_to_txd("world"); + g_assert(read(sock_fd, s, 10) == 5); + g_assert(strcmp(s, "world") == 0); +} + int main(int argc, char **argv) { int ret; + char serialtmpdir[] = "/tmp/qtest-microbit-serial-sXXXXXX"; + char serialtmp[40]; + int sock_fd; + struct sockaddr_un addr; + + g_assert(mkdtemp(serialtmpdir)); + sprintf(serialtmp, "%s/sock", serialtmpdir); + + sock_fd = socket(AF_UNIX, SOCK_STREAM, 0); + g_assert(sock_fd != -1); + + memset(&addr, 0, sizeof(struct sockaddr_un)); + + addr.sun_family = AF_UNIX; + strncpy(addr.sun_path, serialtmp, sizeof(addr.sun_path) - 1); g_test_init(&argc, &argv, NULL); - global_qtest = qtest_startf("-machine microbit"); + global_qtest = qtest_startf("-machine microbit " + "-chardev socket,id=s0,path=%s,server,nowait " + "-no-shutdown -serial chardev:s0", + serialtmp); + + g_assert(connect(sock_fd, (const struct sockaddr *) &addr, + sizeof(struct sockaddr_un)) != -1); qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc); qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio); - + qtest_add_data_func("/microbit/nrf51/uart", &sock_fd, test_nrf51_uart); ret = g_test_run(); qtest_quit(global_qtest); + + close(sock_fd); + rmdir(serialtmpdir); + return ret; }