From patchwork Thu Aug 25 05:08:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6A3FC04AA5 for ; Thu, 25 Aug 2022 05:10:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233220AbiHYFKF (ORCPT ); Thu, 25 Aug 2022 01:10:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232972AbiHYFKD (ORCPT ); Thu, 25 Aug 2022 01:10:03 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 046F94F198 for ; Wed, 24 Aug 2022 22:10:00 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-33580e26058so325502557b3.4 for ; Wed, 24 Aug 2022 22:09:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc; bh=Q3hjf8MS4AzzCWp5/oCSzOsoQ1ZbyBHYLyXOhMM4IQU=; b=VcczpBcdz/1D305XYzhC6q4QuudDMoUbJqkU5dHnorb9t4TPC3YwLgmqsMEgbahnh2 +hfdMdra6lWeBABxnmLdId4Ay0ymjcNv5EE4jwqvZ2EibwlPZAZAz6kqcHdQR+jrui9V 3Y90iiBnvUuscRTb5mNg1fDqOSXTCsWuDQ83fJ5FSRid5MLS6CNxBUG7Iy/V95SQ3Tng 5nGiaioEr1PWX94QrqMYngmxniCLA0gWbZ7FG+9v0DlrN7P/DkVhTT8u3leAUgc7zos2 MW4e0TWfavCUFfS++lbscSG4VwEa4ERsBnaAV3U678vU7DDvmy6klM5GBI/dJBos8c/p OXqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc; bh=Q3hjf8MS4AzzCWp5/oCSzOsoQ1ZbyBHYLyXOhMM4IQU=; b=Cf69InOOd8g4XQxIPKivVp++Y8Ohf3ZBu1xhhRjbg2/2Pd8znKbECtgc9X+s9gPZqj hg0RYhj3aajkAYZ038C7Xjy8wlB0MF5Ukp4FXa6Z3GTHKHUbx+MpUjR5jjCpD8f9HXIA L/T8t4nIVHoYTfAvD0pWbY/SHTx/ax/aE893GUS6xg6h+90ps/A0wVzmCWIulHmrk+5o arD1j2Nv2HnNFwg8McTbpGhuSrRE2rtog1c2ZtxY3WZaIerCV1ZR+kdkphfceznWZtxx RZ29m04JxVDvYDd8ayNvXlb/izN9J+SCcIM06gArNyP/UAGK9zPVwweqjTHnkaMe85pI 2s1Q== X-Gm-Message-State: ACgBeo3iTd+434pqeeBOow8YDhmxh40ZEnWMFPPn/aznpOkPQozEzJGT 6CoLQ8rZTCazlobn6ANwLkFNu8M0OK0= X-Google-Smtp-Source: AA6agR58GZbl6co9b3RXWIjzW0YOxe8HSUhxD7OeeygT/Iu7A8ou68w797ekVXhGcdByFqk3CBisadep1EQ= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a25:6d88:0:b0:695:9728:f253 with SMTP id i130-20020a256d88000000b006959728f253mr2035825ybc.39.1661404199334; Wed, 24 Aug 2022 22:09:59 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:38 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-2-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 1/9] KVM: arm64: selftests: Add helpers to extract a field of an ID register From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Introduce helpers to extract a field of an ID register. Subsequent patches will use those helpers. Signed-off-by: Reiji Watanabe --- .../selftests/kvm/include/aarch64/processor.h | 2 ++ .../testing/selftests/kvm/lib/aarch64/processor.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/tools/testing/selftests/kvm/include/aarch64/processor.h b/tools/testing/selftests/kvm/include/aarch64/processor.h index a8124f9dd68a..a9b4b4e0e592 100644 --- a/tools/testing/selftests/kvm/include/aarch64/processor.h +++ b/tools/testing/selftests/kvm/include/aarch64/processor.h @@ -193,4 +193,6 @@ void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1, uint32_t guest_get_vcpuid(void); +int cpuid_get_sfield(uint64_t val, int field_shift); +unsigned int cpuid_get_ufield(uint64_t val, int field_shift); #endif /* SELFTEST_KVM_PROCESSOR_H */ diff --git a/tools/testing/selftests/kvm/lib/aarch64/processor.c b/tools/testing/selftests/kvm/lib/aarch64/processor.c index 6f5551368944..0b2ad46e7ff5 100644 --- a/tools/testing/selftests/kvm/lib/aarch64/processor.c +++ b/tools/testing/selftests/kvm/lib/aarch64/processor.c @@ -528,3 +528,18 @@ void smccc_hvc(uint32_t function_id, uint64_t arg0, uint64_t arg1, [arg4] "r"(arg4), [arg5] "r"(arg5), [arg6] "r"(arg6) : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7"); } + +/* Helpers to get a signed/unsigned feature field from ID register value */ +int cpuid_get_sfield(uint64_t val, int field_shift) +{ + int width = 4; + + return (int64_t)(val << (64 - width - field_shift)) >> (64 - width); +} + +unsigned int cpuid_get_ufield(uint64_t val, int field_shift) +{ + int width = 4; + + return (uint64_t)(val << (64 - width - field_shift)) >> (64 - width); +} From patchwork Thu Aug 25 05:08:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 923CCC04AA5 for ; Thu, 25 Aug 2022 05:10:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233276AbiHYFKQ (ORCPT ); Thu, 25 Aug 2022 01:10:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232450AbiHYFKN (ORCPT ); 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Those helpers will be useful for test cases that will be added to the test in subsequent patches. Signed-off-by: Reiji Watanabe Reviewed-by: Ricardo Koller --- .../selftests/kvm/aarch64/debug-exceptions.c | 72 +++++++++++++++++-- 1 file changed, 68 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 2ee35cf9801e..51047e6b8db3 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -28,6 +28,69 @@ static volatile uint64_t svc_addr; static volatile uint64_t ss_addr[4], ss_idx; #define PC(v) ((uint64_t)&(v)) +#define GEN_DEBUG_WRITE_REG(reg_name) \ +static void write_##reg_name(int num, uint64_t val) \ +{ \ + switch (num) { \ + case 0: \ + write_sysreg(val, reg_name##0_el1); \ + break; \ + case 1: \ + write_sysreg(val, reg_name##1_el1); \ + break; \ + case 2: \ + write_sysreg(val, reg_name##2_el1); \ + break; \ + case 3: \ + write_sysreg(val, reg_name##3_el1); \ + break; \ + case 4: \ + write_sysreg(val, reg_name##4_el1); \ + break; \ + case 5: \ + write_sysreg(val, reg_name##5_el1); \ + break; \ + case 6: \ + write_sysreg(val, reg_name##6_el1); \ + break; \ + case 7: \ + write_sysreg(val, reg_name##7_el1); \ + break; \ + case 8: \ + write_sysreg(val, reg_name##8_el1); \ + break; \ + case 9: \ + write_sysreg(val, reg_name##9_el1); \ + break; \ + case 10: \ + write_sysreg(val, reg_name##10_el1); \ + break; \ + case 11: \ + write_sysreg(val, reg_name##11_el1); \ + break; \ + case 12: \ + write_sysreg(val, reg_name##12_el1); \ + break; \ + case 13: \ + write_sysreg(val, reg_name##13_el1); \ + break; \ + case 14: \ + write_sysreg(val, reg_name##14_el1); \ + break; \ + case 15: \ + write_sysreg(val, reg_name##15_el1); \ + break; \ + default: \ + GUEST_ASSERT(0); \ + } \ +} + +/* Define write_dbgbcr()/write_dbgbvr()/write_dbgwcr()/write_dbgwvr() */ +GEN_DEBUG_WRITE_REG(dbgbcr) +GEN_DEBUG_WRITE_REG(dbgbvr) +GEN_DEBUG_WRITE_REG(dbgwcr) +GEN_DEBUG_WRITE_REG(dbgwvr) + static void reset_debug_state(void) { asm volatile("msr daifset, #8"); @@ -59,8 +122,9 @@ static void install_wp(uint64_t addr) uint32_t mdscr; wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E; - write_sysreg(wcr, dbgwcr0_el1); - write_sysreg(addr, dbgwvr0_el1); + write_dbgwcr(0, wcr); + write_dbgwvr(0, addr); + isb(); asm volatile("msr daifclr, #8"); @@ -76,8 +140,8 @@ static void install_hw_bp(uint64_t addr) uint32_t mdscr; bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E; - write_sysreg(bcr, dbgbcr0_el1); - write_sysreg(addr, dbgbvr0_el1); + write_dbgbcr(0, bcr); + write_dbgbvr(0, addr); isb(); asm volatile("msr daifclr, #8"); From patchwork Thu Aug 25 05:08:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6884C32774 for ; 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Wed, 24 Aug 2022 22:10:14 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:40 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-4-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 3/9] KVM: arm64: selftests: Remove the hard-coded {b,w}pn#0 from debug-exceptions From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Remove the hard-coded {break,watch}point #0 from the guest_code() in debug-exceptions to allow {break,watch}point number to be specified. Subsequent patches will add test cases for non-zero {break,watch}points. Signed-off-by: Reiji Watanabe Reviewed-by: Ricardo Koller --- .../selftests/kvm/aarch64/debug-exceptions.c | 50 ++++++++++++------- 1 file changed, 32 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 51047e6b8db3..183ee16acb7d 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -93,6 +93,9 @@ GEN_DEBUG_WRITE_REG(dbgwvr) static void reset_debug_state(void) { + uint8_t brps, wrps, i; + uint64_t dfr0; + asm volatile("msr daifset, #8"); write_sysreg(0, osdlr_el1); @@ -100,11 +103,20 @@ static void reset_debug_state(void) isb(); write_sysreg(0, mdscr_el1); - /* This test only uses the first bp and wp slot. */ - write_sysreg(0, dbgbvr0_el1); - write_sysreg(0, dbgbcr0_el1); - write_sysreg(0, dbgwcr0_el1); - write_sysreg(0, dbgwvr0_el1); + + /* Reset all bcr/bvr/wcr/wvr registers */ + dfr0 = read_sysreg(id_aa64dfr0_el1); + brps = cpuid_get_ufield(dfr0, ID_AA64DFR0_BRPS_SHIFT); + for (i = 0; i <= brps; i++) { + write_dbgbcr(i, 0); + write_dbgbvr(i, 0); + } + wrps = cpuid_get_ufield(dfr0, ID_AA64DFR0_WRPS_SHIFT); + for (i = 0; i <= wrps; i++) { + write_dbgwcr(i, 0); + write_dbgwvr(i, 0); + } + isb(); } @@ -116,14 +128,14 @@ static void enable_os_lock(void) GUEST_ASSERT(read_sysreg(oslsr_el1) & 2); } -static void install_wp(uint64_t addr) +static void install_wp(uint8_t wpn, uint64_t addr) { uint32_t wcr; uint32_t mdscr; wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E; - write_dbgwcr(0, wcr); - write_dbgwvr(0, addr); + write_dbgwcr(wpn, wcr); + write_dbgwvr(wpn, addr); isb(); @@ -134,14 +146,14 @@ static void install_wp(uint64_t addr) isb(); } -static void install_hw_bp(uint64_t addr) +static void install_hw_bp(uint8_t bpn, uint64_t addr) { uint32_t bcr; uint32_t mdscr; bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E; - write_dbgbcr(0, bcr); - write_dbgbvr(0, addr); + write_dbgbcr(bpn, bcr); + write_dbgbvr(bpn, addr); isb(); asm volatile("msr daifclr, #8"); @@ -164,7 +176,7 @@ static void install_ss(void) static volatile char write_data; -static void guest_code(void) +static void guest_code(uint8_t bpn, uint8_t wpn) { GUEST_SYNC(0); @@ -177,7 +189,7 @@ static void guest_code(void) /* Hardware-breakpoint */ reset_debug_state(); - install_hw_bp(PC(hw_bp)); + install_hw_bp(bpn, PC(hw_bp)); asm volatile("hw_bp: nop"); GUEST_ASSERT_EQ(hw_bp_addr, PC(hw_bp)); @@ -185,7 +197,7 @@ static void guest_code(void) /* Hardware-breakpoint + svc */ reset_debug_state(); - install_hw_bp(PC(bp_svc)); + install_hw_bp(bpn, PC(bp_svc)); asm volatile("bp_svc: svc #0"); GUEST_ASSERT_EQ(hw_bp_addr, PC(bp_svc)); GUEST_ASSERT_EQ(svc_addr, PC(bp_svc) + 4); @@ -194,7 +206,7 @@ static void guest_code(void) /* Hardware-breakpoint + software-breakpoint */ reset_debug_state(); - install_hw_bp(PC(bp_brk)); + install_hw_bp(bpn, PC(bp_brk)); asm volatile("bp_brk: brk #0"); GUEST_ASSERT_EQ(sw_bp_addr, PC(bp_brk)); GUEST_ASSERT_EQ(hw_bp_addr, PC(bp_brk)); @@ -203,7 +215,7 @@ static void guest_code(void) /* Watchpoint */ reset_debug_state(); - install_wp(PC(write_data)); + install_wp(wpn, PC(write_data)); write_data = 'x'; GUEST_ASSERT_EQ(write_data, 'x'); GUEST_ASSERT_EQ(wp_data_addr, PC(write_data)); @@ -237,7 +249,7 @@ static void guest_code(void) /* OS Lock blocking hardware-breakpoint */ reset_debug_state(); enable_os_lock(); - install_hw_bp(PC(hw_bp2)); + install_hw_bp(bpn, PC(hw_bp2)); hw_bp_addr = 0; asm volatile("hw_bp2: nop"); GUEST_ASSERT_EQ(hw_bp_addr, 0); @@ -249,7 +261,7 @@ static void guest_code(void) enable_os_lock(); write_data = '\0'; wp_data_addr = 0; - install_wp(PC(write_data)); + install_wp(wpn, PC(write_data)); write_data = 'x'; GUEST_ASSERT_EQ(write_data, 'x'); GUEST_ASSERT_EQ(wp_data_addr, 0); @@ -337,6 +349,8 @@ int main(int argc, char *argv[]) vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, ESR_EC_SVC64, guest_svc_handler); + /* Run tests with breakpoint#0 and watchpoint#0. */ + vcpu_args_set(vcpu, 2, 0, 0); for (stage = 0; stage < 11; stage++) { vcpu_run(vcpu); From patchwork Thu Aug 25 05:08:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D97E6C04AA5 for ; Thu, 25 Aug 2022 05:10:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233403AbiHYFKV (ORCPT ); Thu, 25 Aug 2022 01:10:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233294AbiHYFKS (ORCPT ); Thu, 25 Aug 2022 01:10:18 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E9ACE9A6B5 for ; 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Wed, 24 Aug 2022 22:10:16 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:41 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-5-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 4/9] KVM: arm64: selftests: Add helpers to enable debug exceptions From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add helpers to enable breakpoint and watchpoint exceptions. Signed-off-by: Reiji Watanabe Reviewed-by: Oliver Upton Reviewed-by: Ricardo Koller --- .../selftests/kvm/aarch64/debug-exceptions.c | 25 ++++++++++--------- 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 183ee16acb7d..713c7240b680 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -128,10 +128,20 @@ static void enable_os_lock(void) GUEST_ASSERT(read_sysreg(oslsr_el1) & 2); } +static void enable_debug_bwp_exception(void) +{ + uint32_t mdscr; + + asm volatile("msr daifclr, #8"); + + mdscr = read_sysreg(mdscr_el1) | MDSCR_KDE | MDSCR_MDE; + write_sysreg(mdscr, mdscr_el1); + isb(); +} + static void install_wp(uint8_t wpn, uint64_t addr) { uint32_t wcr; - uint32_t mdscr; wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E; write_dbgwcr(wpn, wcr); @@ -139,28 +149,19 @@ static void install_wp(uint8_t wpn, uint64_t addr) isb(); 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Wed, 24 Aug 2022 22:10:18 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:42 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-6-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 5/9] KVM: arm64: selftests: Have debug_version() use cpuid_get_ufield() helper From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Change debug_version() to use cpuid_get_ufield() to extract DebugVer field from the AA64DFR0_EL1 register value. Signed-off-by: Reiji Watanabe --- tools/testing/selftests/kvm/aarch64/debug-exceptions.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 713c7240b680..17b17359ac41 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -320,7 +320,7 @@ static int debug_version(struct kvm_vcpu *vcpu) uint64_t id_aa64dfr0; vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &id_aa64dfr0); - return id_aa64dfr0 & 0xf; + return cpuid_get_ufield(id_aa64dfr0, ID_AA64DFR0_DEBUGVER_SHIFT); } int main(int argc, char *argv[]) From patchwork Thu Aug 25 05:08:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77895C28D13 for ; Thu, 25 Aug 2022 05:10:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233467AbiHYFK1 (ORCPT ); Thu, 25 Aug 2022 01:10:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233371AbiHYFKY (ORCPT ); Thu, 25 Aug 2022 01:10:24 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AFB180F7B for ; Wed, 24 Aug 2022 22:10:21 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-33da75a471cso59064257b3.20 for ; Wed, 24 Aug 2022 22:10:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc; bh=EmnP6URNfHv6I0nbxGmg1XJ0KHdi317moIKFVeeAsc8=; b=odzh+413GPIsjI66IJBEHSOJ1TAozjY8/5h10hAgbwXYR+m8+Bq098asyIJO31M6XX FG6XQOp4j4ukN2HsJ06YJmmH7orlAaws2A+dvnD8GzU49lsEM59llnl7vYysAlJjgJkB Z9sSIQCG/bNvPvmJkwVn3TuSSS3HX7RGRbtoLkCPKctFswbbcSHV14tjLpeVjQWTS/3U 74fuO1j9abX4bH4TwtyH1divYl7Kc0o51RcxSyPowqEfdSqwcMMuUC8p7UUGhR3wso3K bgUqyEQlUfxjPBGEj9/3GzXGK/Y/DNJHWiAHHQS6DuztTtwkFMrAa/O5D1XFFaAaC9wU XO+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc; bh=EmnP6URNfHv6I0nbxGmg1XJ0KHdi317moIKFVeeAsc8=; b=2wfJV2AO6kUATxLmLyU/UTje4kBkFNW8CsH9qJBxbpCV1T6zMN01XXeOw0aREcuICc ovfmqPIdYBW962KPtR10/vWX8puIxRiqXidT4IFFUeOGDzVWce01niU+tVTA4P3qfr/7 jJaspKMuOqHNiw8hF0COOCKOr6sHkq/jdc4OmdWwqn7cpyKX5wIs2jcKPhkjrTI14qB6 EcenBGNUK7dQCm4rjceaDqJ+fk/c7CLNaLjdH97N3E+YGAHixrdkp7QuNHvmkYFi2qeB mstjV5f2GJbHLcLZlFl8c3+Xr0iankEklbefJ1HsC0E+VTAgjKeIA8S7WYJohz48KwM0 mWLw== X-Gm-Message-State: ACgBeo1+D2GSlJAspAYKxSFLmHEWaKvEdLVol87KodmDQam+odatwVyC dJi4xbJS7eYl5MtOueU8dcyJxyrgytE= X-Google-Smtp-Source: AA6agR4ONormzDuDs7YpdVMH6kwTbayc6AXSuIT5cwIOH9liK5R8puxixgYLfHyko+rG1K4Ic3X2+t6qTmc= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a5b:dd2:0:b0:695:7965:1747 with SMTP id t18-20020a5b0dd2000000b0069579651747mr1981297ybr.415.1661404221149; Wed, 24 Aug 2022 22:10:21 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:43 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-7-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 6/9] KVM: arm64: selftests: Change debug_version() to take ID_AA64DFR0_EL1 From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Change debug_version() to take the ID_AA64DFR0_EL1 value instead of vcpu as an argument, and change its callsite to read ID_AA64DFR0_EL1 (and pass it to debug_version()). Subsequent patches will reuse the register value in the callsite. Signed-off-by: Reiji Watanabe --- tools/testing/selftests/kvm/aarch64/debug-exceptions.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 17b17359ac41..ab8860e3a9fa 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -315,11 +315,8 @@ static void guest_svc_handler(struct ex_regs *regs) svc_addr = regs->pc; } -static int debug_version(struct kvm_vcpu *vcpu) +static int debug_version(uint64_t id_aa64dfr0) { - uint64_t id_aa64dfr0; - - vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &id_aa64dfr0); return cpuid_get_ufield(id_aa64dfr0, ID_AA64DFR0_DEBUGVER_SHIFT); } @@ -329,6 +326,7 @@ int main(int argc, char *argv[]) struct kvm_vm *vm; struct ucall uc; int stage; + uint64_t aa64dfr0; vm = vm_create_with_one_vcpu(&vcpu, guest_code); ucall_init(vm, NULL); @@ -336,7 +334,8 @@ int main(int argc, char *argv[]) vm_init_descriptor_tables(vm); vcpu_init_descriptor_tables(vcpu); - __TEST_REQUIRE(debug_version(vcpu) >= 6, + vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &aa64dfr0); + __TEST_REQUIRE(debug_version(aa64dfr0) >= 6, "Armv8 debug architecture not supported."); vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, From patchwork Thu Aug 25 05:08:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DDE3C28D13 for ; Thu, 25 Aug 2022 05:10:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233324AbiHYFKb (ORCPT ); Thu, 25 Aug 2022 01:10:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233348AbiHYFK2 (ORCPT ); Thu, 25 Aug 2022 01:10:28 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 61FB09E699 for ; Wed, 24 Aug 2022 22:10:23 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-33580e26058so325518627b3.4 for ; Wed, 24 Aug 2022 22:10:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc; bh=kxLW5pptbGK2qbSRXgRbfDO7jFprojIfxGB+rGiWcTI=; b=TTmEHdzamfoOJUzNzm8Oy4Aow3rD92Al5+1R2DqMO26AK3Iz4grwp1RtDbumrf8xkW vsT7LLxK98H4odQgelDUKsgICKCya5ytR7QT6h/NtaLeuyjITnTzHzt1i7NCa/YrNPg+ XOGQ4TkDWJSNJDvJEFcTNGBVtFVRbuCzwm8V//Hgy1+FwzbTR0JjN5lBhfwJZ8sr7qKF H1IErCcBG3gH3cAIkMekez3RKhqDctBKkPP2XKe3uhDpz1NVml3OXTukWPqrUW/W0iaC 8ZTIMJwuOP2mnGj/aKyLUV7FldBwW0xDJY5oWw07wg9ObBsK9Mqahy5glh4Z3NcIMECO tEBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc; bh=kxLW5pptbGK2qbSRXgRbfDO7jFprojIfxGB+rGiWcTI=; b=zbbTHqr6sF4ulELVZ1dJQIyb6dwUcNrF3OZ0R1yNAqoZc40sUSBgQlwJ99FZqKnF+H I9UntiXk+008ABIaO9maO5ek+dhCfKlKFJNN0vIKuq8n4ngE1SCV3Y5BxbhCC7oW88yf 7Em/R2wnSL3QZ6pyLZG8c5kg0nNR8Th1sTWfM4eax7YBzbZ80AUL/sPfGKwlwmQVoges xFbu0vkYDDxGHdMA1I1NB0C3fv6xoC50W8qoE606sb7wDYZbTGJ4qnXwdGvvWb06W7In 7yUBtXGv8UBM/sWHqmte2iBA24+2qca9f4Cp3VeDtt7oNWwhdORNvR8YY2WUfd9Kw0D+ km4g== X-Gm-Message-State: ACgBeo1bPvZBAlICcUQ0ol5IxQAtPUGXzOyBItOzyUqS9A7/o4ukwpkz 5dQ4GyRyPsrzVBz///Srssch5wEUDiM= X-Google-Smtp-Source: AA6agR4v58RhDrq7Qj6EPYCwT6qLMkj11qqXbbiW+fQsLer7Qtwo+aBr5+w+lCO4r/ZJHQlHtnOL8Wya50c= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a81:349:0:b0:324:d932:1362 with SMTP id 70-20020a810349000000b00324d9321362mr2226472ywd.281.1661404223276; Wed, 24 Aug 2022 22:10:23 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:44 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-8-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 7/9] KVM: arm64: selftests: Add a test case for a linked breakpoint From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Currently, the debug-exceptions test doesn't have a test case for a linked breakpoint. Add a test case for the linked breakpoint to the test. Signed-off-by: Reiji Watanabe --- .../selftests/kvm/aarch64/debug-exceptions.c | 59 +++++++++++++++++-- 1 file changed, 55 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index ab8860e3a9fa..9fccfeebccd3 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -11,6 +11,10 @@ #define DBGBCR_EXEC (0x0 << 3) #define DBGBCR_EL1 (0x1 << 1) #define DBGBCR_E (0x1 << 0) +#define DBGBCR_LBN_SHIFT 16 +#define DBGBCR_BT_SHIFT 20 +#define DBGBCR_BT_ADDR_LINK_CTX (0x1 << DBGBCR_BT_SHIFT) +#define DBGBCR_BT_CTX_LINK (0x3 << DBGBCR_BT_SHIFT) #define DBGWCR_LEN8 (0xff << 5) #define DBGWCR_RD (0x1 << 3) @@ -21,7 +25,7 @@ #define SPSR_D (1 << 9) #define SPSR_SS (1 << 21) -extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start; +extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start, hw_bp_ctx; static volatile uint64_t sw_bp_addr, hw_bp_addr; static volatile uint64_t wp_addr, wp_data_addr; static volatile uint64_t svc_addr; @@ -103,6 +107,7 @@ static void reset_debug_state(void) isb(); write_sysreg(0, mdscr_el1); + write_sysreg(0, contextidr_el1); /* Reset all bcr/bvr/wcr/wvr registers */ dfr0 = read_sysreg(id_aa64dfr0_el1); @@ -164,6 +169,28 @@ static void install_hw_bp(uint8_t bpn, uint64_t addr) enable_debug_bwp_exception(); } +void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp, uint64_t addr, + uint64_t ctx) +{ + uint32_t addr_bcr, ctx_bcr; + + /* Setup a context-aware breakpoint */ + ctx_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E | + DBGBCR_BT_CTX_LINK; + write_dbgbcr(ctx_bp, ctx_bcr); + write_dbgbvr(ctx_bp, ctx); + + /* Setup a linked breakpoint (linked to the context-aware breakpoint) */ + addr_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E | + DBGBCR_BT_ADDR_LINK_CTX | + ((uint32_t)ctx_bp << DBGBCR_LBN_SHIFT); + write_dbgbcr(addr_bp, addr_bcr); + write_dbgbvr(addr_bp, addr); + isb(); + + enable_debug_bwp_exception(); +} + static void install_ss(void) { uint32_t mdscr; @@ -177,8 +204,10 @@ static void install_ss(void) static volatile char write_data; -static void guest_code(uint8_t bpn, uint8_t wpn) +static void guest_code(uint8_t bpn, uint8_t wpn, uint8_t ctx_bpn) { + uint64_t ctx = 0x1; /* a random context number */ + GUEST_SYNC(0); /* Software-breakpoint */ @@ -281,6 +310,19 @@ static void guest_code(uint8_t bpn, uint8_t wpn) : : : "x0"); GUEST_ASSERT_EQ(ss_addr[0], 0); + /* Linked hardware-breakpoint */ + hw_bp_addr = 0; + reset_debug_state(); + install_hw_bp_ctx(bpn, ctx_bpn, PC(hw_bp_ctx), ctx); + /* Set context id */ + write_sysreg(ctx, contextidr_el1); + isb(); + asm volatile("hw_bp_ctx: nop"); + write_sysreg(0, contextidr_el1); + GUEST_ASSERT_EQ(hw_bp_addr, PC(hw_bp_ctx)); + + GUEST_SYNC(10); + GUEST_DONE(); } @@ -327,6 +369,7 @@ int main(int argc, char *argv[]) struct ucall uc; int stage; uint64_t aa64dfr0; + uint8_t brps; vm = vm_create_with_one_vcpu(&vcpu, guest_code); ucall_init(vm, NULL); @@ -349,8 +392,16 @@ int main(int argc, char *argv[]) vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, ESR_EC_SVC64, guest_svc_handler); - /* Run tests with breakpoint#0 and watchpoint#0. */ - vcpu_args_set(vcpu, 2, 0, 0); + /* Number of breakpoints, minus 1 */ + brps = cpuid_get_ufield(aa64dfr0, ID_AA64DFR0_BRPS_SHIFT); + __TEST_REQUIRE(brps > 0, "At least two breakpoints are required"); + + /* + * Run tests with breakpoint#0 and watchpoint#0, and the higiest + * numbered (context-aware) breakpoint. + */ + vcpu_args_set(vcpu, 3, 0, 0, brps); + for (stage = 0; stage < 11; stage++) { vcpu_run(vcpu); From patchwork Thu Aug 25 05:08:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AED5AC04AA5 for ; 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Wed, 24 Aug 2022 22:10:25 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:45 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-9-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 8/9] KVM: arm64: selftests: Add a test case for a linked watchpoint From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Currently, the debug-exceptions test doesn't have a test case for a linked watchpoint. Add a test case for the linked watchpoint to the test. Signed-off-by: Reiji Watanabe --- .../selftests/kvm/aarch64/debug-exceptions.c | 35 +++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index 9fccfeebccd3..dc94c85bb383 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -21,6 +21,9 @@ #define DBGWCR_WR (0x2 << 3) #define DBGWCR_EL1 (0x1 << 1) #define DBGWCR_E (0x1 << 0) +#define DBGWCR_LBN_SHIFT 16 +#define DBGWCR_WT_SHIFT 20 +#define DBGWCR_WT_LINK (0x1 << DBGWCR_WT_SHIFT) #define SPSR_D (1 << 9) #define SPSR_SS (1 << 21) @@ -169,6 +172,28 @@ static void install_hw_bp(uint8_t bpn, uint64_t addr) enable_debug_bwp_exception(); } +static void install_wp_ctx(uint8_t addr_wp, uint8_t ctx_bp, uint64_t addr, + uint64_t ctx) +{ + uint32_t wcr; + uint64_t ctx_bcr; + + /* Setup a context-aware breakpoint */ + ctx_bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E | + DBGBCR_BT_CTX_LINK; + write_dbgbcr(ctx_bp, ctx_bcr); + write_dbgbvr(ctx_bp, ctx); + + /* Setup a linked watchpoint (linked to the context-aware breakpoint) */ + wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E | + DBGWCR_WT_LINK | ((uint32_t)ctx_bp << DBGWCR_LBN_SHIFT); + write_dbgwcr(addr_wp, wcr); + write_dbgwvr(addr_wp, addr); + isb(); + + enable_debug_bwp_exception(); +} + void install_hw_bp_ctx(uint8_t addr_bp, uint8_t ctx_bp, uint64_t addr, uint64_t ctx) { @@ -323,6 +348,16 @@ static void guest_code(uint8_t bpn, uint8_t wpn, uint8_t ctx_bpn) GUEST_SYNC(10); + /* Linked watchpoint */ + reset_debug_state(); + install_wp_ctx(wpn, ctx_bpn, PC(write_data), ctx); + /* Set context id */ + write_sysreg(ctx, contextidr_el1); + isb(); + write_data = 'x'; + GUEST_ASSERT_EQ(write_data, 'x'); + GUEST_ASSERT_EQ(wp_data_addr, PC(write_data)); + GUEST_DONE(); } From patchwork Thu Aug 25 05:08:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12954204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A274C04AA5 for ; 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Wed, 24 Aug 2022 22:10:27 -0700 (PDT) Date: Wed, 24 Aug 2022 22:08:46 -0700 In-Reply-To: <20220825050846.3418868-1-reijiw@google.com> Message-Id: <20220825050846.3418868-10-reijiw@google.com> Mime-Version: 1.0 References: <20220825050846.3418868-1-reijiw@google.com> X-Mailer: git-send-email 2.37.1.595.g718a3a8f04-goog Subject: [PATCH 9/9] KVM: arm64: selftests: Test with every breakpoint/watchpoint From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Andrew Jones , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Currently, the debug-exceptions test always uses only {break,watch}point#0 and the highest numbered context-aware breakpoint. Modify the test to use all {break,watch}points and context-aware breakpoints supported on the system. Signed-off-by: Reiji Watanabe --- .../selftests/kvm/aarch64/debug-exceptions.c | 77 +++++++++++++++---- 1 file changed, 61 insertions(+), 16 deletions(-) diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c index dc94c85bb383..7aeab6ae887a 100644 --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c @@ -397,14 +397,12 @@ static int debug_version(uint64_t id_aa64dfr0) return cpuid_get_ufield(id_aa64dfr0, ID_AA64DFR0_DEBUGVER_SHIFT); } -int main(int argc, char *argv[]) +void run_test(uint8_t bpn, uint8_t wpn, uint8_t ctx_bpn) { struct kvm_vcpu *vcpu; struct kvm_vm *vm; struct ucall uc; int stage; - uint64_t aa64dfr0; - uint8_t brps; vm = vm_create_with_one_vcpu(&vcpu, guest_code); ucall_init(vm, NULL); @@ -412,10 +410,6 @@ int main(int argc, char *argv[]) vm_init_descriptor_tables(vm); vcpu_init_descriptor_tables(vcpu); - vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &aa64dfr0); - __TEST_REQUIRE(debug_version(aa64dfr0) >= 6, - "Armv8 debug architecture not supported."); - vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, ESR_EC_BRK_INS, guest_sw_bp_handler); vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, @@ -427,15 +421,9 @@ int main(int argc, char *argv[]) vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT, ESR_EC_SVC64, guest_svc_handler); - /* Number of breakpoints, minus 1 */ - brps = cpuid_get_ufield(aa64dfr0, ID_AA64DFR0_BRPS_SHIFT); - __TEST_REQUIRE(brps > 0, "At least two breakpoints are required"); - - /* - * Run tests with breakpoint#0 and watchpoint#0, and the higiest - * numbered (context-aware) breakpoint. - */ - vcpu_args_set(vcpu, 3, 0, 0, brps); + /* Specify bpn/wpn/ctx_bpn to be tested */ + vcpu_args_set(vcpu, 3, bpn, wpn, ctx_bpn); + pr_debug("Use bpn#%d, wpn#%d and ctx_bpn#%d\n", bpn, wpn, ctx_bpn); for (stage = 0; stage < 11; stage++) { vcpu_run(vcpu); @@ -458,5 +446,62 @@ int main(int argc, char *argv[]) done: kvm_vm_free(vm); +} + +/* + * Run debug testing using the various breakpoint#, watchpoint# and + * context-aware breakpoint# with the given ID_AA64DFR0_EL1 configuration. + */ +void test_debug(uint64_t aa64dfr0) +{ + uint8_t brps, wrps, ctx_cmps; + uint8_t normal_brp_num, wrp_num, ctx_brp_base, ctx_brp_num; + int b, w, c; + + brps = cpuid_get_ufield(aa64dfr0, ID_AA64DFR0_BRPS_SHIFT); + __TEST_REQUIRE(brps > 0, "At least two breakpoints are required"); + + wrps = cpuid_get_ufield(aa64dfr0, ID_AA64DFR0_WRPS_SHIFT); + ctx_cmps = cpuid_get_ufield(aa64dfr0, ID_AA64DFR0_CTX_CMPS_SHIFT); + + pr_debug("%s brps:%d, wrps:%d, ctx_cmps:%d\n", __func__, + brps, wrps, ctx_cmps); + + /* Number of normal (non-context aware) breakpoints */ + normal_brp_num = brps - ctx_cmps; + + /* Number of watchpoints */ + wrp_num = wrps + 1; + + /* Number of context aware breakpoints */ + ctx_brp_num = ctx_cmps + 1; + + /* Lowest context aware breakpoint number */ + ctx_brp_base = normal_brp_num; + + /* Run tests with all supported breakpoints/watchpoints */ + for (c = ctx_brp_base; c < ctx_brp_base + ctx_brp_num; c++) { + for (b = 0; b < normal_brp_num; b++) { + for (w = 0; w < wrp_num; w++) + run_test(b, w, c); + } + } +} + +int main(int argc, char *argv[]) +{ + struct kvm_vm *vm; + struct kvm_vcpu *vcpu; + uint64_t aa64dfr0; + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(SYS_ID_AA64DFR0_EL1), &aa64dfr0); + kvm_vm_free(vm); + + __TEST_REQUIRE(debug_version(aa64dfr0) >= 6, + "Armv8 debug architecture not supported."); + + /* Run debug tests with the default configuration */ + test_debug(aa64dfr0); return 0; }