From patchwork Thu Aug 25 22:23:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Vivi X-Patchwork-Id: 12955304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06C26ECAAA2 for ; Thu, 25 Aug 2022 22:23:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5859410E45E; Thu, 25 Aug 2022 22:23:25 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9E8D610E45E for ; Thu, 25 Aug 2022 22:23:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661466201; x=1693002201; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=SDrdVMWltYjFRRFjn280JB0mDUab4rgzNaEH4GgLR9E=; b=mVfwAKl10Pv3p+1c4Yc62TaSDgqPwklnXiEhSaAB0UIioVNLE7tRaS6T vvN1hW6YU+1DNJfrkTlEPgZI3EfG7yCSNaHbkrpJ/O61W/fVqGmt/0e4E UD0+x26wk1pH/KjL+CDHpIET3dAzTtfpn/UQYKOcRUHRI3Vgzbb7gclmI Jfv+3lLixelWRCY4LwiyuvPPAEe2cJbI7NsGYWlN3VquhNg96FX3zCtRo cryOToNHdmJs2AHbxoV1F0S//AZRpLsgHnlX4K08bpQYrR7WJLSR0P3Hr wcfuGBd3aE7DD0+2KnofKJLtzPTrfAAvGNHUkXPGyqUMa7N5y5NgqaPn1 g==; X-IronPort-AV: E=McAfee;i="6500,9779,10450"; a="358338021" X-IronPort-AV: E=Sophos;i="5.93,264,1654585200"; d="scan'208";a="358338021" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2022 15:23:19 -0700 X-IronPort-AV: E=Sophos;i="5.93,264,1654585200"; d="scan'208";a="639795608" Received: from swoodal-mobl.amr.corp.intel.com (HELO rdvivi-mobl4.intel.com) ([10.255.36.162]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2022 15:23:16 -0700 From: Rodrigo Vivi To: intel-gfx@lists.freedesktop.org Date: Thu, 25 Aug 2022 18:23:15 -0400 Message-Id: <20220825222315.58696-1-rodrigo.vivi@intel.com> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/slpc: Set rps' min and max frequencies even with SLPC. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sushma Venkatesh Reddy , Rodrigo Vivi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We need to inform PCODE of a desired ring frequencies so PCODE update the memory frequencies to us. rps->min_freq and rps->max_freq are the frequencies used in that request. However they were unset when SLPC was enabled and PCODE never updated the memory freq. Let's at least for now get these freq set up so we can inform PCODE. Cc: Ashutosh Dixit Tested-by: Sushma Venkatesh Reddy Signed-off-by: Rodrigo Vivi Tested-by: Sushma Venkatesh Reddy > Signed-off-by: Rodrigo Vivi > --- drivers/gpu/drm/i915/gt/intel_rps.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 8c289a032103..58a82978d5df 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -1128,6 +1128,20 @@ void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *c } } +static void rps_basic_init_for_slpc(struct intel_rps *rps) +{ + struct intel_rps_freq_caps caps; + + /* + * Even with SLPC we need to initialize at least a basic min and max + * frequency so we can inform pcode a desired IA ring frequency in + * gen6_update_ring_freq + */ + gen6_rps_get_freq_caps(rps, &caps); + rps->min_freq = caps.min_freq; + rps->max_freq = caps.rp0_freq; +} + static void gen6_rps_init(struct intel_rps *rps) { struct drm_i915_private *i915 = rps_to_i915(rps); @@ -1970,8 +1984,10 @@ void intel_rps_init(struct intel_rps *rps) { struct drm_i915_private *i915 = rps_to_i915(rps); - if (rps_uses_slpc(rps)) + if (rps_uses_slpc(rps)) { + rps_basic_init_for_slpc(rps); return; + } if (IS_CHERRYVIEW(i915)) chv_rps_init(rps);