From patchwork Mon Aug 29 20:35:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AD17ECAAD4 for ; Mon, 29 Aug 2022 20:35:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229717AbiH2Ufy (ORCPT ); Mon, 29 Aug 2022 16:35:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229909AbiH2Ufv (ORCPT ); Mon, 29 Aug 2022 16:35:51 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66B0589CE8; Mon, 29 Aug 2022 13:35:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805349; x=1693341349; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AOMv2D9+eNmOX++emb4GyqenMsZwfkFPdGhI0iTjL7U=; b=ludMlkdE77C5fO4b7H3WtupCqVOHfnASJ+k3wowzg0un4vsP1m5AxzFr IPKncRqJ+CEWkFUBlUKer310K34T+zi1m8xIZrOzBDMBQuc9mLUj5tYDm xJqMG8DGJk4yLJ+KUeBCddjzHef2r7Mh5PvjbjLS9IWU13x82uTvWRGZn dTTDRVaXT8L0fS+xznDLobW1zxGGIglcfpsOeCFUkVmGI2+5KOui6vDH3 deBvnwJ2WFdxOKT6QkAAJKNfjuGBtYZLVMr4g3y0YcqVxsBuw28y/dMnD WWW9IreNxeA8Y1VzpInJMryaVMR8hyGLkpR0snMJugvOVhQdfi1tZLQ1b w==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="381291978" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="381291978" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:35:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344248" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:35:47 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/7] dmaengine: Remove dma_async_is_complete from client API Date: Mon, 29 Aug 2022 13:35:31 -0700 Message-Id: <20220829203537.30676-2-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is never actually used by any existing DMA clients. It is only used, via dma_cookie_status, by providers. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 5 ++-- drivers/dma/dmaengine.h | 10 ++++++- include/linux/dmaengine.h | 28 ++----------------- 3 files changed, 14 insertions(+), 29 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index bfd057b21a000..85ecec2c40005 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -346,9 +346,8 @@ Further APIs the documentation in include/linux/dmaengine.h for a more complete description of this API. - This can be used in conjunction with dma_async_is_complete() and - the cookie returned from dmaengine_submit() to check for - completion of a specific DMA transaction. + This can be used with the cookie returned from dmaengine_submit() + to check for completion of a specific DMA transaction. .. note:: diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index 53f16d3f00294..a2ce377e9ed0f 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -79,7 +79,15 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, state->residue = 0; state->in_flight_bytes = 0; } - return dma_async_is_complete(cookie, complete, used); + + if (complete <= used) { + if ((cookie <= complete) || (cookie > used)) + return DMA_COMPLETE; + } else { + if ((cookie <= complete) && (cookie > used)) + return DMA_COMPLETE; + } + return DMA_IN_PROGRESS; } static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index c923f4e60f240..c55dcae7dc620 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1426,9 +1426,9 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * - * If @last and @used are passed in, upon return they reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. + * If @last and @used are passed in, upon return they reflect the most + * recently submitted (used) cookie and the most recently completed + * cookie. */ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) @@ -1444,28 +1444,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -/** - * dma_async_is_complete - test a cookie against chan state - * @cookie: transaction identifier to test status of - * @last_complete: last know completed transaction - * @last_used: last cookie value handed out - * - * dma_async_is_complete() is used in dma_async_is_tx_complete() - * the test logic is separated for lightweight testing of multiple cookies - */ -static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, - dma_cookie_t last_complete, dma_cookie_t last_used) -{ - if (last_complete <= last_used) { - if ((cookie <= last_complete) || (cookie > last_used)) - return DMA_COMPLETE; - } else { - if ((cookie <= last_complete) && (cookie > last_used)) - return DMA_COMPLETE; - } - return DMA_IN_PROGRESS; -} - static inline void dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) { From patchwork Mon Aug 29 20:35:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADC30ECAAD2 for ; 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X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="358958403" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="358958403" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344320" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:04 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/7] dmaengine: Move dma_set_tx_state to the provider API header Date: Mon, 29 Aug 2022 13:35:32 -0700 Message-Id: <20220829203537.30676-3-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is only used by DMA providers, not DMA clients. Move it next to the other cookie utility functions. Signed-off-by: Ben Walker --- drivers/dma/dmaengine.h | 11 +++++++++++ include/linux/dmaengine.h | 11 ----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/dma/dmaengine.h b/drivers/dma/dmaengine.h index a2ce377e9ed0f..e72876a512a39 100644 --- a/drivers/dma/dmaengine.h +++ b/drivers/dma/dmaengine.h @@ -90,6 +90,17 @@ static inline enum dma_status dma_cookie_status(struct dma_chan *chan, return DMA_IN_PROGRESS; } +static inline void dma_set_tx_state(struct dma_tx_state *st, + dma_cookie_t last, dma_cookie_t used, u32 residue) +{ + if (!st) + return; + + st->last = last; + st->used = used; + st->residue = residue; +} + static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) { if (state) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index c55dcae7dc620..5ae881729b620 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1444,17 +1444,6 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } -static inline void -dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->last = last; - st->used = used; - st->residue = residue; -} - #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Mon Aug 29 20:35:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECEC9ECAAD8 for ; Mon, 29 Aug 2022 20:36:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229916AbiH2UgN (ORCPT ); Mon, 29 Aug 2022 16:36:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229595AbiH2UgK (ORCPT ); Mon, 29 Aug 2022 16:36:10 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 289478A7D7; Mon, 29 Aug 2022 13:36:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805369; x=1693341369; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ey9ESHItUX+aFxTTPPXJK8bEONO6TSPqV2uRxm95yfw=; b=XpYg3r/qdeVthC/Y24E6yIK5hrnjH3eqwIIiKhtXboRgDe1x48mN8u3w YRYFDU0UEPpfz4I7DYQehEKEPQZ2lukgS6wQkG4dXj7MdWsl45t4MNvLq QHDOzbJdjMXsBL9Oob2jc1JU3sZOjBmNEdrKeoUCGQz7rLqQE8WdKV9co jSWIN9a9rS8Qpf2dCE8wLeFnEWPUL8fqfXPqtLzuXllTA39ZhDRyGXKq6 AJCFUTQPUE0VNURkfEcwJjHNOzJa1dQVSM8zy5qib6BfIUuHObmWT5iKW SHN/v8n699n1IwBcaz+WoO+g5Nz4KlyzHnRqm9973KuA65ewA86lgZMLN g==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="358958413" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="358958413" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344328" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:07 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/7] dmaengine: Add dmaengine_async_is_tx_complete Date: Mon, 29 Aug 2022 13:35:33 -0700 Message-Id: <20220829203537.30676-4-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is the replacement for dma_async_is_tx_complete with two changes: 1) The name prefix is 'dmaengine' as per convention 2) It no longer reports the 'last' or 'used' cookie Drivers should convert to using dmaengine_async_is_tx_complete. Signed-off-by: Ben Walker --- Documentation/driver-api/dmaengine/client.rst | 19 ++++--------------- .../driver-api/dmaengine/provider.rst | 6 +++--- drivers/dma/dmaengine.c | 2 +- drivers/dma/dmatest.c | 3 +-- include/linux/dmaengine.h | 16 ++++++++++++++++ 5 files changed, 25 insertions(+), 21 deletions(-) diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst index 85ecec2c40005..9ae489a4ca97f 100644 --- a/Documentation/driver-api/dmaengine/client.rst +++ b/Documentation/driver-api/dmaengine/client.rst @@ -259,8 +259,8 @@ The details of these operations are: dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) - This returns a cookie can be used to check the progress of DMA engine - activity via other DMA engine calls not covered in this document. + This returns a cookie that can be used to check the progress of a transaction + via dmaengine_async_is_tx_complete(). dmaengine_submit() will not start the DMA operation, it merely adds it to the pending queue. For this, see step 5, dma_async_issue_pending. @@ -339,23 +339,12 @@ Further APIs .. code-block:: c - enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) - - This can be used to check the status of the channel. Please see - the documentation in include/linux/dmaengine.h for a more complete - description of this API. + enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) This can be used with the cookie returned from dmaengine_submit() to check for completion of a specific DMA transaction. - .. note:: - - Not all DMA engine drivers can return reliable information for - a running DMA channel. It is recommended that DMA engine users - pause or stop (via dmaengine_terminate_all()) the channel before - using this API. - 5. Synchronize termination API .. code-block:: c diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index ceac2a300e328..1d0da2777921d 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -539,10 +539,10 @@ where to put them) dma_cookie_t -- it's a DMA transaction ID that will increment over time. +- it's a DMA transaction ID. -- Not really relevant any more since the introduction of ``virt-dma`` - that abstracts it away. +- The value can be chosen by the provider, or use the helper APIs + such as dma_cookie_assign() and dma_cookie_complete(). DMA_CTRL_ACK diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index c741b6431958c..2816b8f492dab 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -523,7 +523,7 @@ enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) dma_async_issue_pending(chan); do { - status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); if (time_after_eq(jiffies, dma_sync_wait_timeout)) { dev_err(chan->device->dev, "%s: timeout!\n", __func__); return DMA_ERROR; diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index 9fe2ae7943169..dde7b9b626336 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -831,8 +831,7 @@ static int dmatest_func(void *data) done->done, msecs_to_jiffies(params->timeout)); - status = dma_async_is_tx_complete(chan, cookie, NULL, - NULL); + status = dmaengine_async_is_tx_complete(chan, cookie); } if (!done->done) { diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 5ae881729b620..0ee21887b3924 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -1426,6 +1426,8 @@ static inline void dma_async_issue_pending(struct dma_chan *chan) * @last: returns last completed cookie, can be NULL * @used: returns last issued cookie, can be NULL * + * Note: This is deprecated. Use dmaengine_async_is_tx_complete instead. + * * If @last and @used are passed in, upon return they reflect the most * recently submitted (used) cookie and the most recently completed * cookie. @@ -1444,6 +1446,20 @@ static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, return status; } +/** + * dmaengine_async_is_tx_complete - poll for transaction completion + * @chan: DMA channel + * @cookie: transaction identifier to check status of + * + */ +static inline enum dma_status dmaengine_async_is_tx_complete(struct dma_chan *chan, + dma_cookie_t cookie) +{ + struct dma_tx_state state; + + return chan->device->device_tx_status(chan, cookie, &state); +} + #ifdef CONFIG_DMA_ENGINE struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); From patchwork Mon Aug 29 20:35:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958397 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4FB8ECAAD4 for ; Mon, 29 Aug 2022 20:36:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229943AbiH2UgN (ORCPT ); Mon, 29 Aug 2022 16:36:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229847AbiH2UgL (ORCPT ); Mon, 29 Aug 2022 16:36:11 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69CC886C15; Mon, 29 Aug 2022 13:36:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805370; x=1693341370; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zm0cSjM3YIXr3tYin2nPtyem0FnSC/v3TJOFRW6jOaI=; b=Ffp4EfiqGyEcZ/qJzvCMj2ryViOuQ70VTxjGa92oMGTtns5qM8zWvWk4 gPYqJsxmnFfZnHMhVn/4dGAY8fV+d60+0UoIWYxvJdY9Zfp4cwbDDSU7W FX+P0c+Wt6CdlQWU8qWBbWoW2HYCGxec7QXp6AiuU2Y34/q0BHpIe6jWg mVR3+LRPrcy+09cncAPUAzr74oGkrTlOrZtU5TuJvhnpUB8HtwCmwuWf1 SzgtPqzH6xJKC+9hn4TIKj4HpA8RMcEYuVEmNdeeXjAxPiAFv/CoA5+jZ fte5d/VP0LjIbwfaD4twuQQDjrUw+6goiR5v2J/p7pIXpHgjjq0LuU8hz Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="358958428" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="358958428" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344333" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:09 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 4/7] dmaengine: Add provider documentation on cookie assignment Date: Mon, 29 Aug 2022 13:35:34 -0700 Message-Id: <20220829203537.30676-5-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Clarify the rules on assigning cookies to DMA transactions. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 45 +++++++++++++++---- 1 file changed, 37 insertions(+), 8 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index 1d0da2777921d..a5539f816d125 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -417,7 +417,9 @@ supported. - tx_submit: A pointer to a function you have to implement, that is supposed to push the current transaction descriptor to a - pending queue, waiting for issue_pending to be called. + pending queue, waiting for issue_pending to be called. Each + descriptor is given a cookie to identify it. See the section + "Cookie Management" below. - In this structure the function pointer callback_result can be initialized in order for the submitter to be notified that a @@ -522,6 +524,40 @@ supported. - May sleep. +Cookie Management +------------------ + +When a transaction is queued for submission via tx_submit(), the provider +must assign that transaction a cookie (dma_cookie_t) to uniquely identify it. +The provider is allowed to perform this assignment however it wants, but for +convenience the following utility functions are available to create +monotonically increasing cookies + + .. code-block:: c + + void dma_cookie_init(struct dma_chan *chan); + + Called once at channel creation + + .. code-block:: c + + dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx); + + Assign a cookie to the given descriptor + + .. code-block:: c + + void dma_cookie_complete(struct dma_async_tx_descriptor *tx); + + Mark the descriptor as complete and invalidate the cookie + + .. code-block:: c + + enum dma_status dma_cookie_status(struct dma_chan *chan, + dma_cookie_t cookie, struct dma_tx_state *state); + + Report the status of the cookie and filling in state, if not NULL. + Misc notes ========== @@ -537,13 +573,6 @@ where to put them) - Makes sure that dependent operations are run before marking it as complete. -dma_cookie_t - -- it's a DMA transaction ID. - -- The value can be chosen by the provider, or use the helper APIs - such as dma_cookie_assign() and dma_cookie_complete(). - DMA_CTRL_ACK - If clear, the descriptor cannot be reused by provider until the From patchwork Mon Aug 29 20:35:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958396 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2C77C0502C for ; Mon, 29 Aug 2022 20:36:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229892AbiH2UgP (ORCPT ); Mon, 29 Aug 2022 16:36:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58008 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229593AbiH2UgO (ORCPT ); Mon, 29 Aug 2022 16:36:14 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B297478BD0; Mon, 29 Aug 2022 13:36:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805373; x=1693341373; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SsDUgyJnKFU1wjSCmT6NcnZ6nhHM03n8RmHcmSLP/IU=; b=X353sxB1AMVI0xzqPWwoi5W02ais5m9sqnuRTkpBlAILtn8FJ6cq9Z35 pLJoEeYjcVQb1v4phlAh0nYvmPmNT0CA3HIELYe8gQQIEik/BdzjbSFWv VDQ0FGBGQSoRz/1TsPtblh/JEFjlCd+lylqgeXt2OiorHane6UxvmzFsC msD5DhlromLeOA/5jzDzthobMDEglI8zDo5th2whXuv3U3X85en9+fd9D mZtyABxAzYy/0CsAOqxBLO8o7ppAlDzCamj4+bZ49uZNoCPVHtE8Hj+Lq HxxdYpYEFTHsDhaJ76K/2XvEpA4QxwhWEVwGlURysDpVnBzc18u4ew2JP w==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="358958437" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="358958437" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344344" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:13 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Jiang , Fenghua Yu Subject: [PATCH v5 5/7] dmaengine: idxd: idxd_desc.id is now a u16 Date: Mon, 29 Aug 2022 13:35:35 -0700 Message-Id: <20220829203537.30676-6-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This is going to be packed into the cookie. It does not need to be negative or larger than u16. Cc: Dave Jiang Cc: Fenghua Yu Signed-off-by: Ben Walker --- drivers/dma/idxd/idxd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index fed0dfc1eaa83..bd93ada32c89d 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -325,7 +325,7 @@ struct idxd_desc { struct dma_async_tx_descriptor txd; struct llist_node llnode; struct list_head list; - int id; + u16 id; int cpu; struct idxd_wq *wq; }; From patchwork Mon Aug 29 20:35:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C461ECAAD2 for ; Mon, 29 Aug 2022 20:36:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229972AbiH2UgS (ORCPT ); Mon, 29 Aug 2022 16:36:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230002AbiH2UgR (ORCPT ); Mon, 29 Aug 2022 16:36:17 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5A898A7D7; Mon, 29 Aug 2022 13:36:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805375; x=1693341375; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wAYgeWwf1MVzON+Zrf/o0qrFHPifM1BKjxXrkt3lSmA=; b=DxCac/Cwobm+uWNcseF4K2aJ1cXrwGhQydaUUHntMa6AJ0pdyUjurD0E ADfh4tRf4X6AxkZtMJ1ld9z6/tHJQ+qekPyvu1CRAJsJvUjgHXg7CLtNQ 9Gbq4QuEhfqHfO0R5a3ys3j1l/wQeUrWLktqDBao1f++HB8iz75gBIsSi Pay2si68UEylFPYPFqe946XWi0rmpByouKkOT+U6jCUxcFKHUMx5I63er oGpZ4eTgzvm3BzMQXEfFve/dol2zg1y8wrF3mYLeMa9pCp564UdbFMfHC 39spgYjwc5uUotFWvyW31L7u4uIwa4g7uy6G3sgi3r1eZyl76Cs5Kmd/x Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="358958446" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="358958446" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344350" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:15 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Dave Jiang , Fenghua Yu Subject: [PATCH v5 6/7] dmaengine: idxd: Support device_tx_status Date: Mon, 29 Aug 2022 13:35:36 -0700 Message-Id: <20220829203537.30676-7-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This can now be supported even for devices that complete operations out of order. Add support for directly polling transactions. Cc: Dave Jiang Cc: Fenghua Yu Signed-off-by: Ben Walker --- drivers/dma/idxd/device.c | 1 + drivers/dma/idxd/dma.c | 85 ++++++++++++++++++++++++++++++++++++++- drivers/dma/idxd/idxd.h | 1 + 3 files changed, 85 insertions(+), 2 deletions(-) diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c index 5a8cc52c1abfd..752544bef4551 100644 --- a/drivers/dma/idxd/device.c +++ b/drivers/dma/idxd/device.c @@ -148,6 +148,7 @@ int idxd_wq_alloc_resources(struct idxd_wq *wq) desc->iax_completion = &wq->iax_compls[i]; desc->compl_dma = wq->compls_addr + idxd->data->compl_size * i; desc->id = i; + desc->gen = 1; desc->wq = wq; desc->cpu = -1; } diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index e0874cb4721c8..dda5342d273f4 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -12,6 +12,23 @@ #include "registers.h" #include "idxd.h" + +#define DMA_COOKIE_BITS (sizeof(dma_cookie_t) * 8) +/* + * The descriptor id takes the lower 16 bits of the cookie. + */ +#define DESC_ID_BITS 16 +#define DESC_ID_MASK ((1 << DESC_ID_BITS) - 1) +/* + * The 'generation' is in the upper half of the cookie. But dma_cookie_t + * is signed, so we leave the upper-most bit for the sign. Further, we + * need to flag whether a cookie corresponds to an operation that is + * being completed via interrupt to avoid polling it, which takes + * the second most upper bit. So we subtract two bits from the upper half. + */ +#define DESC_GEN_MAX ((1 << (DMA_COOKIE_BITS - DESC_ID_BITS - 2)) - 1) +#define DESC_INTERRUPT_FLAG (1 << (DMA_COOKIE_BITS - 2)) + static inline struct idxd_wq *to_idxd_wq(struct dma_chan *c) { struct idxd_dma_chan *idxd_chan; @@ -158,13 +175,67 @@ static void idxd_dma_free_chan_resources(struct dma_chan *chan) idxd_wq_refcount(wq)); } + static enum dma_status idxd_dma_tx_status(struct dma_chan *dma_chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { - return DMA_OUT_OF_ORDER; + u8 status; + struct idxd_wq *wq; + struct idxd_desc *desc; + u32 idx; + + memset(txstate, 0, sizeof(*txstate)); + + if (dma_submit_error(cookie)) + return DMA_ERROR; + + wq = to_idxd_wq(dma_chan); + + idx = cookie & DESC_ID_MASK; + if (idx >= wq->num_descs) + return DMA_ERROR; + + desc = wq->descs[idx]; + + if (desc->txd.cookie != cookie) { + /* + * The user asked about an old transaction + */ + return DMA_COMPLETE; + } + + /* + * For descriptors completed via interrupt, we can't go + * look at the completion status directly because it races + * with the IRQ handler recyling the descriptor. However, + * since in this case we can rely on the interrupt handler + * to invalidate the cookie when the command completes we + * know that if we get here, the command is still in + * progress. + */ + if ((cookie & DESC_INTERRUPT_FLAG) != 0) + return DMA_IN_PROGRESS; + + status = desc->completion->status & DSA_COMP_STATUS_MASK; + + if (status) { + /* + * Check against the original status as ABORT is software defined + * and 0xff, which DSA_COMP_STATUS_MASK can mask out. + */ + if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) + idxd_dma_complete_txd(desc, IDXD_COMPLETE_ABORT, true); + else + idxd_dma_complete_txd(desc, IDXD_COMPLETE_NORMAL, true); + + return DMA_COMPLETE; + } + + return DMA_IN_PROGRESS; } + /* * issue_pending() does not need to do anything since tx_submit() does the job * already. @@ -181,7 +252,17 @@ static dma_cookie_t idxd_dma_tx_submit(struct dma_async_tx_descriptor *tx) int rc; struct idxd_desc *desc = container_of(tx, struct idxd_desc, txd); - cookie = dma_cookie_assign(tx); + cookie = (desc->gen << DESC_ID_BITS) | (desc->id & DESC_ID_MASK); + + if ((desc->hw->flags & IDXD_OP_FLAG_RCI) != 0) + cookie |= DESC_INTERRUPT_FLAG; + + if (desc->gen == DESC_GEN_MAX) + desc->gen = 1; + else + desc->gen++; + + tx->cookie = cookie; rc = idxd_submit_desc(wq, desc); if (rc < 0) { diff --git a/drivers/dma/idxd/idxd.h b/drivers/dma/idxd/idxd.h index bd93ada32c89d..d4f0227895075 100644 --- a/drivers/dma/idxd/idxd.h +++ b/drivers/dma/idxd/idxd.h @@ -326,6 +326,7 @@ struct idxd_desc { struct llist_node llnode; struct list_head list; u16 id; + u16 gen; int cpu; struct idxd_wq *wq; }; From patchwork Mon Aug 29 20:35:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Walker X-Patchwork-Id: 12958399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2569ECAAD4 for ; Mon, 29 Aug 2022 20:36:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230193AbiH2Ugt (ORCPT ); Mon, 29 Aug 2022 16:36:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230144AbiH2Ugk (ORCPT ); Mon, 29 Aug 2022 16:36:40 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B87C8C02B; Mon, 29 Aug 2022 13:36:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1661805388; x=1693341388; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jycDPCjkbeirrCGksiw9H7cDx+q6rA7Kgq23B7N3h/I=; b=dX7LkYRgVz8+Y93SArV+e/v+eBxTrCBrAJcOBJInC0mmJpDGcKVSH7XJ BSFNwiw2YOtOhR51N6DUj8uTrKmR7mUgB6rrr+9WFVrcIyaYwvB4m6sWq luvIReUwEX6Jngg7msi/cA7IZndTSZXICLQIyYjQ9aWOLv+yIyBepiICA zIQZpS8ffBLRigY2WIFO1A6roTIaKxrPQLXFEA7XWexBbnEfQOMp5o/+g 2TB6A9900jZtrCC0i6qlxL44/gWvv2CtBJYJPmsZ5dx/rqMpZjgU3z+C5 kNA/Yd7v3aTqoOMbYK0NUKHQ4PahVp7Xif+sBqflp1qfGGBIUZd4Kyovb w==; X-IronPort-AV: E=McAfee;i="6500,9779,10454"; a="381292062" X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="381292062" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2022 13:36:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,273,1654585200"; d="scan'208";a="614344387" Received: from bwalker-desk.ch.intel.com ([143.182.136.162]) by fmsmga007.fm.intel.com with ESMTP; 29 Aug 2022 13:36:26 -0700 From: Ben Walker To: vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 7/7] dmaengine: Revert "cookie bypass for out of order completion" Date: Mon, 29 Aug 2022 13:35:37 -0700 Message-Id: <20220829203537.30676-8-benjamin.walker@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220829203537.30676-1-benjamin.walker@intel.com> References: <20220622193753.3044206-1-benjamin.walker@intel.com> <20220829203537.30676-1-benjamin.walker@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This reverts commit 47ec7f09bc107720905c96bc37771e4ed1ff0aed. This is no longer necessary now that all assumptions about the order of completions have been removed from the dmaengine client API. Signed-off-by: Ben Walker --- .../driver-api/dmaengine/provider.rst | 19 ------------------- drivers/dma/dmatest.c | 11 +---------- drivers/dma/idxd/dma.c | 1 - include/linux/dmaengine.h | 2 -- 4 files changed, 1 insertion(+), 32 deletions(-) diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst index a5539f816d125..8d1510c8cb66f 100644 --- a/Documentation/driver-api/dmaengine/provider.rst +++ b/Documentation/driver-api/dmaengine/provider.rst @@ -258,22 +258,6 @@ Currently, the types available are: want to transfer a portion of uncompressed data directly to the display to print it -- DMA_COMPLETION_NO_ORDER - - - The device does not support in order completion. - - - The driver should return DMA_OUT_OF_ORDER for device_tx_status if - the device is setting this capability. - - - All cookie tracking and checking API should be treated as invalid if - the device exports this capability. - - - At this point, this is incompatible with polling option for dmatest. - - - If this cap is set, the user is recommended to provide an unique - identifier for each descriptor sent to the DMA device in order to - properly track the completion. - - DMA_REPEAT - The device supports repeated transfers. A repeated transfer, indicated by @@ -457,9 +441,6 @@ supported. - In the case of a cyclic transfer, it should only take into account the total size of the cyclic buffer. - - Should return DMA_OUT_OF_ORDER if the device does not support in order - completion and is completing the operation out of order. - - This function can be called in an interrupt context. - device_config diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c index dde7b9b626336..47db4748d3e51 100644 --- a/drivers/dma/dmatest.c +++ b/drivers/dma/dmatest.c @@ -838,10 +838,7 @@ static int dmatest_func(void *data) result("test timed out", total_tests, src->off, dst->off, len, 0); goto error_unmap_continue; - } else if (status != DMA_COMPLETE && - !(dma_has_cap(DMA_COMPLETION_NO_ORDER, - dev->cap_mask) && - status == DMA_OUT_OF_ORDER)) { + } else if (status != DMA_COMPLETE) { result(status == DMA_ERROR ? "completion error status" : "completion busy status", total_tests, src->off, @@ -1019,12 +1016,6 @@ static int dmatest_add_channel(struct dmatest_info *info, dtc->chan = chan; INIT_LIST_HEAD(&dtc->threads); - if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) && - info->params.polled) { - info->params.polled = false; - pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n"); - } - if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { if (dmatest == 0) { cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY); diff --git a/drivers/dma/idxd/dma.c b/drivers/dma/idxd/dma.c index dda5342d273f4..49e863abd50cd 100644 --- a/drivers/dma/idxd/dma.c +++ b/drivers/dma/idxd/dma.c @@ -297,7 +297,6 @@ int idxd_register_dma_device(struct idxd_device *idxd) dma_cap_set(DMA_INTERRUPT, dma->cap_mask); dma_cap_set(DMA_PRIVATE, dma->cap_mask); - dma_cap_set(DMA_COMPLETION_NO_ORDER, dma->cap_mask); dma->device_release = idxd_dma_release; dma->device_prep_dma_interrupt = idxd_dma_prep_interrupt; diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 0ee21887b3924..abaf24d953849 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -39,7 +39,6 @@ enum dma_status { DMA_IN_PROGRESS, DMA_PAUSED, DMA_ERROR, - DMA_OUT_OF_ORDER, }; /** @@ -62,7 +61,6 @@ enum dma_transaction_type { DMA_SLAVE, DMA_CYCLIC, DMA_INTERLEAVE, - DMA_COMPLETION_NO_ORDER, DMA_REPEAT, DMA_LOAD_EOT, /* last transaction type for creation of the capabilities mask */