From patchwork Wed Aug 31 11:18:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12960652 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBBA4C0502C for ; Wed, 31 Aug 2022 11:19:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231164AbiHaLTF (ORCPT ); Wed, 31 Aug 2022 07:19:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230332AbiHaLTE (ORCPT ); Wed, 31 Aug 2022 07:19:04 -0400 Received: from mail.3ffe.de (0001.3ffe.de [159.69.201.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FB2DCC315; Wed, 31 Aug 2022 04:19:03 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id DDB821D5D; Wed, 31 Aug 2022 13:19:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1661944741; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4RlgUh9Xq/X1yi5hKeInY74Q0LlpWB0jRvVBkQA3Or8=; b=rwDRn5aaQI6N2XT8v6ZFuPbUk5prBTWgegbiwMzZ99LAryF8LQbSk9OUtqU+iKqUvovIzF sSnmEqcJBZlvefx99vgAManeOdjPb9B6S/zwrIFLHjNgzKbn6ivHpqkaEF0yhUu5nYhqVs Spf4sQrESeuuYAm4ecd00+SKY7zYbummMeboSW4Jpf9b+Gma2UeuEWVYRo80RLeZT2zxLl HBTr5F+mPU0y8aXe+pPKboFFdr4BmIekweNxcVHIh3SShm8jdDh83SC93sX2AP015BeRbx ErCMAtGL/Kj7xfyiX8mx02DO1lpM3NwVhxPurn9ww1YtSNzoOr+kFhLRdP0J6Q== From: Michael Walle To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Horatiu Vultur Cc: UNGLinuxDriver@microchip.com, Philipp Zabel , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Walle , Krzysztof Kozlowski Subject: [PATCH net-next 1/2] dt-bindings: net: sparx5: don't require a reset line Date: Wed, 31 Aug 2022 13:18:54 +0200 Message-Id: <20220831111855.1749646-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831111855.1749646-1-michael@walle.cc> References: <20220831111855.1749646-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Make the reset line optional. It turns out, there is no dedicated reset for the switch. Instead, the reset which was used up until now, was kind of a global reset. This is now handled elsewhere, thus don't require a reset. Signed-off-by: Michael Walle Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/net/microchip,sparx5-switch.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml index 0807aa7a8f63..57ffeb8fc876 100644 --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml @@ -130,8 +130,6 @@ required: - reg-names - interrupts - interrupt-names - - resets - - reset-names - ethernet-ports additionalProperties: false From patchwork Wed Aug 31 11:18:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12960653 X-Patchwork-Delegate: kuba@kernel.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A253ECAAD5 for ; Wed, 31 Aug 2022 11:19:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231168AbiHaLTI (ORCPT ); Wed, 31 Aug 2022 07:19:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229697AbiHaLTG (ORCPT ); Wed, 31 Aug 2022 07:19:06 -0400 Received: from mail.3ffe.de (0001.3ffe.de [IPv6:2a01:4f8:c0c:9d57::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F38D9CC314; Wed, 31 Aug 2022 04:19:04 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mail.3ffe.de (Postfix) with ESMTPSA id A86F62010; Wed, 31 Aug 2022 13:19:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2022082101; t=1661944741; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=X7mCDy9QYi5qoq+ya8RweTlaPGnN3dnHkWi7lO6NuVg=; b=riWaNiacezQiSPxBD4dMmy8S0z9MNWArpj+CBWmynnbQCHyW+AGCq5gLggaqSQleGCedoW IdIpQHpSTnX3jZl6olZvcLLC7DMTZPAWOdZB99paYGglXZdPpjM+MRQI2okWBV/AG9oraX NT3N17ags2M7PvPtjgJLSl+2e9lilJk5aOFUQrtrSQooZuxmGfYytRbUnCTNurIJ0mwEOg IwzHTvCJ2zDs4/Z9TtUeb+rGE/Jyjlenrojnkwq+Ie8Cmn53B5cNOsqRLbzuLUiwRdKu90 Gdvq8DTkQrYXXDqoTzpWXzKLT52wI4DBiEsNcYbZi21liT/P1O1ZM1R0Cc6e5Q== From: Michael Walle To: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Horatiu Vultur Cc: UNGLinuxDriver@microchip.com, Philipp Zabel , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Walle Subject: [PATCH net-next 2/2] net: lan966x: make reset optional Date: Wed, 31 Aug 2022 13:18:55 +0200 Message-Id: <20220831111855.1749646-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220831111855.1749646-1-michael@walle.cc> References: <20220831111855.1749646-1-michael@walle.cc> MIME-Version: 1.0 X-Spam: Yes Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org There is no dedicated reset for just the switch core. The reset which is used up until now, is more of a global reset, resetting almost the whole SoC and cause spurious errors by doing so. Make it possible to handle the reset elsewhere and make the reset optional. Signed-off-by: Michael Walle --- drivers/net/ethernet/microchip/lan966x/lan966x_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c index 2ad078608c45..e2c77f954a3d 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c @@ -971,7 +971,8 @@ static int lan966x_reset_switch(struct lan966x *lan966x) int val = 0; int ret; - switch_reset = devm_reset_control_get_shared(lan966x->dev, "switch"); + switch_reset = devm_reset_control_get_optional_shared(lan966x->dev, + "switch"); if (IS_ERR(switch_reset)) return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset), "Could not obtain switch reset");