From patchwork Tue Sep 6 09:02:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 12967176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92370C38145 for ; Tue, 6 Sep 2022 09:40:23 +0000 (UTC) Received: from localhost ([::1]:36722 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oVV49-0007Xa-Ll for qemu-devel@archiver.kernel.org; Tue, 06 Sep 2022 05:40:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42554) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oVUTb-0001Vs-2f for qemu-devel@nongnu.org; Tue, 06 Sep 2022 05:02:37 -0400 Received: from mail-pf1-x42e.google.com ([2607:f8b0:4864:20::42e]:36366) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1oVUTY-00018C-8o for qemu-devel@nongnu.org; Tue, 06 Sep 2022 05:02:33 -0400 Received: by mail-pf1-x42e.google.com with SMTP id y136so5758956pfb.3 for ; Tue, 06 Sep 2022 02:02:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=CoMxwZHX/9EiivuuUW2OqImZQGfFO3k09FmvjtT1xzs=; b=NiaOW0wcjo0JUHHed3Tk80983yohLnoYzkymnzugUoj2+OSxu5AsbzImE/VnXhOoYX 0KymhsCMsphW4+MHKRY2gL8tkDQBOZS1K4ELcJdbgeZvBsTkeucYoocQOQbTw2owYutZ paBNeyxfglOxGO9UHiKlZziYiNR32YDHUCqlFuurQlGncixw4yWmwVdc3T8Jx4agPz8K zbAqwOiZpM5N1VsMGnJmwFWkPF/mcVCVw+YPDGTewKERtAmvf6Os/o3ouPMc3U+JDyym Rlz1sx15MNu92IyjZlXeeZQAex3q6WBX0YyB/qJosQFYVxuOdSWUyOt7zBv2Czw7qdQT uQ9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=CoMxwZHX/9EiivuuUW2OqImZQGfFO3k09FmvjtT1xzs=; b=KclKO5gO0n/ztqFpWFWkd3ipYAX7lNERHCucSM5kGuZ8nfF1o7wxTl08LB9xnCQNQl OGHnCcaz5r54yTMdmxg7XSXX/TTIiWT6g4rJkJi6ZKGVOr6tKPRrVBDvxYUTI+Xd8MSK g76MHrPyuvhQizRPM+dkpmm2Qhu/YfCcEaP8x5fVpP1geGOHlCDaXN2zAjQNkDElkcU8 8+ZMkPJqDM9Gmh9ldEPIfZ5CnoRdT1Q4GXlXfH3nUZBene//B7gjQVupTEQhc0pM8Dt0 PM3b74gYoLrBI/3NP7pw0D3Cfj3S+nVbIRKW3U0YDRXF67TYriC3y0kofXIaRKT/yP+i co3A== X-Gm-Message-State: ACgBeo3rm0zte7KaD/UJFerkK4EFG2+hCgnejpDy5VwDezfNJjlFc+4o 2vw8R6wup0KAZmIbyY9u+L61cA== X-Google-Smtp-Source: AA6agR5aWxamY+IP0rRMJ0nSq3sro4sAfJ5T45xc+9N4OCtshQcoRS7bRjp2EwulmBx9W7jwTHliiw== X-Received: by 2002:aa7:8551:0:b0:538:22ec:d965 with SMTP id y17-20020aa78551000000b0053822ecd965mr44387964pfn.16.1662454950920; Tue, 06 Sep 2022 02:02:30 -0700 (PDT) Received: from localhost.localdomain ([49.206.11.92]) by smtp.gmail.com with ESMTPSA id t2-20020a17090a2f8200b001fabcd994c1sm11987315pjd.9.2022.09.06.02.02.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 02:02:30 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Peter Maydell , Xiaojuan Yang , Song Gao , Gerd Hoffmann , Palmer Dabbelt , Alistair Francis , Bin Meng , Andrew Jones , Anup Patel , Atish Kumar Patra , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Sunil V L Subject: [PATCH V4 1/3] hw/arm, loongarch: Move load_image_to_fw_cfg() to common location Date: Tue, 6 Sep 2022 14:32:17 +0530 Message-Id: <20220906090219.412517-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906090219.412517-1-sunilvl@ventanamicro.com> References: <20220906090219.412517-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42e; envelope-from=sunilvl@ventanamicro.com; helo=mail-pf1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same function will be required by riscv too. So, it's time to refactor and move this function to a common path. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Reviewed-by: Song Gao --- hw/arm/boot.c | 49 --------------------------------------- hw/loongarch/virt.c | 33 -------------------------- hw/nvram/fw_cfg.c | 32 +++++++++++++++++++++++++ include/hw/nvram/fw_cfg.h | 21 +++++++++++++++++ 4 files changed, 53 insertions(+), 82 deletions(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index ada2717f76..704f368d9c 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -818,55 +818,6 @@ static void do_cpu_reset(void *opaque) } } -/** - * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified - * by key. - * @fw_cfg: The firmware config instance to store the data in. - * @size_key: The firmware config key to store the size of the loaded - * data under, with fw_cfg_add_i32(). - * @data_key: The firmware config key to store the loaded data under, - * with fw_cfg_add_bytes(). - * @image_name: The name of the image file to load. If it is NULL, the - * function returns without doing anything. - * @try_decompress: Whether the image should be decompressed (gunzipped) before - * adding it to fw_cfg. If decompression fails, the image is - * loaded as-is. - * - * In case of failure, the function prints an error message to stderr and the - * process exits with status 1. - */ -static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key, - uint16_t data_key, const char *image_name, - bool try_decompress) -{ - size_t size = -1; - uint8_t *data; - - if (image_name == NULL) { - return; - } - - if (try_decompress) { - size = load_image_gzipped_buffer(image_name, - LOAD_IMAGE_MAX_GUNZIP_BYTES, &data); - } - - if (size == (size_t)-1) { - gchar *contents; - gsize length; - - if (!g_file_get_contents(image_name, &contents, &length, NULL)) { - error_report("failed to load \"%s\"", image_name); - exit(1); - } - size = length; - data = (uint8_t *)contents; - } - - fw_cfg_add_i32(fw_cfg, size_key, size); - fw_cfg_add_bytes(fw_cfg, data_key, data, size); -} - static int do_arm_linux_init(Object *obj, void *opaque) { if (object_dynamic_cast(obj, TYPE_ARM_LINUX_BOOT_IF)) { diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 5cc0b05538..eee2c193c0 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -542,39 +542,6 @@ static void reset_load_elf(void *opaque) } } -/* Load an image file into an fw_cfg entry identified by key. */ -static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key, - uint16_t data_key, const char *image_name, - bool try_decompress) -{ - size_t size = -1; - uint8_t *data; - - if (image_name == NULL) { - return; - } - - if (try_decompress) { - size = load_image_gzipped_buffer(image_name, - LOAD_IMAGE_MAX_GUNZIP_BYTES, &data); - } - - if (size == (size_t)-1) { - gchar *contents; - gsize length; - - if (!g_file_get_contents(image_name, &contents, &length, NULL)) { - error_report("failed to load \"%s\"", image_name); - exit(1); - } - size = length; - data = (uint8_t *)contents; - } - - fw_cfg_add_i32(fw_cfg, size_key, size); - fw_cfg_add_bytes(fw_cfg, data_key, data, size); -} - static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg) { /* diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index d605f3f45a..371a45dfe2 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -41,6 +41,7 @@ #include "qapi/error.h" #include "hw/acpi/aml-build.h" #include "hw/pci/pci_bus.h" +#include "hw/loader.h" #define FW_CFG_FILE_SLOTS_DFLT 0x20 @@ -1221,6 +1222,37 @@ FWCfgState *fw_cfg_find(void) return FW_CFG(object_resolve_path_type("", TYPE_FW_CFG, NULL)); } +void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key, + uint16_t data_key, const char *image_name, + bool try_decompress) +{ + size_t size = -1; + uint8_t *data; + + if (image_name == NULL) { + return; + } + + if (try_decompress) { + size = load_image_gzipped_buffer(image_name, + LOAD_IMAGE_MAX_GUNZIP_BYTES, &data); + } + + if (size == (size_t)-1) { + gchar *contents; + gsize length; + + if (!g_file_get_contents(image_name, &contents, &length, NULL)) { + error_report("failed to load \"%s\"", image_name); + exit(1); + } + size = length; + data = (uint8_t *)contents; + } + + fw_cfg_add_i32(fw_cfg, size_key, size); + fw_cfg_add_bytes(fw_cfg, data_key, data, size); +} static void fw_cfg_class_init(ObjectClass *klass, void *data) { diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index 0e7a8bc7af..c1f81a5f13 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -342,4 +342,25 @@ bool fw_cfg_dma_enabled(void *opaque); */ const char *fw_cfg_arch_key_name(uint16_t key); +/** + * load_image_to_fw_cfg() - Load an image file into an fw_cfg entry identified + * by key. + * @fw_cfg: The firmware config instance to store the data in. + * @size_key: The firmware config key to store the size of the loaded + * data under, with fw_cfg_add_i32(). + * @data_key: The firmware config key to store the loaded data under, + * with fw_cfg_add_bytes(). + * @image_name: The name of the image file to load. If it is NULL, the + * function returns without doing anything. + * @try_decompress: Whether the image should be decompressed (gunzipped) before + * adding it to fw_cfg. If decompression fails, the image is + * loaded as-is. + * + * In case of failure, the function prints an error message to stderr and the + * process exits with status 1. + */ +void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key, + uint16_t data_key, const char *image_name, + bool try_decompress); + #endif From patchwork Tue Sep 6 09:02:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 12967185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA4CFECAAA1 for ; Tue, 6 Sep 2022 09:45:29 +0000 (UTC) Received: from localhost ([::1]:48612 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oVV96-00053e-IH for qemu-devel@archiver.kernel.org; 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Tue, 06 Sep 2022 02:02:34 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Peter Maydell , Xiaojuan Yang , Song Gao , Gerd Hoffmann , Palmer Dabbelt , Alistair Francis , Bin Meng , Andrew Jones , Anup Patel , Atish Kumar Patra , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Sunil V L Subject: [PATCH V4 2/3] hw/riscv: virt: Move create_fw_cfg() prior to loading kernel Date: Tue, 6 Sep 2022 14:32:18 +0530 Message-Id: <20220906090219.412517-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906090219.412517-1-sunilvl@ventanamicro.com> References: <20220906090219.412517-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::534; envelope-from=sunilvl@ventanamicro.com; helo=mail-pg1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To enable both -kernel and -pflash options, the fw_cfg needs to be created prior to loading the kernel. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones Reviewed-by: Alistair Francis --- hw/riscv/virt.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index ff8c0df5cd..b6bbf03f61 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1251,6 +1251,13 @@ static void virt_machine_done(Notifier *notifier, void *data) RISCV64_BIOS_BIN, start_addr, NULL); } + /* + * Init fw_cfg. Must be done before riscv_load_fdt, otherwise the device + * tree cannot be altered and we get FDT_ERR_NOSPACE. + */ + s->fw_cfg = create_fw_cfg(machine); + rom_set_fw(s->fw_cfg); + if (machine->kernel_filename) { kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0], firmware_end_addr); @@ -1284,13 +1291,6 @@ static void virt_machine_done(Notifier *notifier, void *data) start_addr = virt_memmap[VIRT_FLASH].base; } - /* - * Init fw_cfg. Must be done before riscv_load_fdt, otherwise the device - * tree cannot be altered and we get FDT_ERR_NOSPACE. - */ - s->fw_cfg = create_fw_cfg(machine); - rom_set_fw(s->fw_cfg); - /* Compute the fdt load address in dram */ fdt_load_addr = riscv_load_fdt(memmap[VIRT_DRAM].base, machine->ram_size, machine->fdt); From patchwork Tue Sep 6 09:02:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 12967183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45A4BC38145 for ; Tue, 6 Sep 2022 09:43:47 +0000 (UTC) Received: from localhost ([::1]:44010 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oVV7S-0002u6-5O for qemu-devel@archiver.kernel.org; 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Tue, 06 Sep 2022 02:02:38 -0700 (PDT) From: Sunil V L To: qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Peter Maydell , Xiaojuan Yang , Song Gao , Gerd Hoffmann , Palmer Dabbelt , Alistair Francis , Bin Meng , Andrew Jones , Anup Patel , Atish Kumar Patra , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Sunil V L Subject: [PATCH V4 3/3] hw/riscv: virt: Enable booting S-mode firmware from pflash Date: Tue, 6 Sep 2022 14:32:19 +0530 Message-Id: <20220906090219.412517-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220906090219.412517-1-sunilvl@ventanamicro.com> References: <20220906090219.412517-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=sunilvl@ventanamicro.com; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To boot S-mode firmware payload like EDK2 from persistent flash storage, qemu needs to pass the flash address as the next_addr in fw_dynamic_info to the opensbi. When both -kernel and -pflash options are provided in command line, the kernel (and initrd if -initrd) will be copied to fw_cfg table. The S-mode FW will load the kernel/initrd from fw_cfg table. If only pflash is given but not -kernel, then it is the job of of the S-mode firmware to locate and load the kernel. In either case, update the kernel_entry with the flash address so that the opensbi can jump to the entry point of the S-mode firmware. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones --- hw/riscv/boot.c | 29 +++++++++++++++++++++++++++++ hw/riscv/virt.c | 18 +++++++++++++++++- include/hw/riscv/boot.h | 1 + 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index 1ae7596873..fa8ad27da2 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -338,3 +338,32 @@ void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr) riscv_cpu->env.fdt_addr = fdt_addr; } } + +void riscv_setup_firmware_boot(MachineState *machine) +{ + if (machine->kernel_filename) { + FWCfgState *fw_cfg; + fw_cfg = fw_cfg_find(); + + assert(fw_cfg); + /* + * Expose the kernel, the command line, and the initrd in fw_cfg. + * We don't process them here at all, it's all left to the + * firmware. + */ + load_image_to_fw_cfg(fw_cfg, + FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA, + machine->kernel_filename, + true); + load_image_to_fw_cfg(fw_cfg, + FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA, + machine->initrd_filename, false); + + if (machine->kernel_cmdline) { + fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, + strlen(machine->kernel_cmdline) + 1); + fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, + machine->kernel_cmdline); + } + } +} diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index b6bbf03f61..40515a793d 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1258,7 +1258,23 @@ static void virt_machine_done(Notifier *notifier, void *data) s->fw_cfg = create_fw_cfg(machine); rom_set_fw(s->fw_cfg); - if (machine->kernel_filename) { + if (drive_get(IF_PFLASH, 0, 1)) { + /* + * S-mode FW like EDK2 will be kept in second plash (unit 1). + * When both kernel, initrd and pflash options are provided in the + * command line, the kernel and initrd will be copied to the fw_cfg + * table and opensbi will jump to the flash address which is the + * entry point of S-mode FW. It is the job of the S-mode FW to load + * the kernel and initrd using fw_cfg table. + * + * If only pflash is given but not -kernel, then it is the job of + * of the S-mode firmware to locate and load the kernel. + * In either case, the next_addr for opensbi will be the flash address. + */ + riscv_setup_firmware_boot(machine); + kernel_entry = virt_memmap[VIRT_FLASH].base + + virt_memmap[VIRT_FLASH].size / 2; + } else if (machine->kernel_filename) { kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0], firmware_end_addr); diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index a36f7618f5..93e5f8760d 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -57,5 +57,6 @@ void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base, uint32_t reset_vec_size, uint64_t kernel_entry); void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr); +void riscv_setup_firmware_boot(MachineState *machine); #endif /* RISCV_BOOT_H */