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Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063310epsmtip1f2ccff2a4d1df6e1e136b2f58e108160~SgGZ4Z_dU2638426384epsmtip1x; Wed, 7 Sep 2022 06:33:09 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 01/15] dt-bindings: media: s5p-mfc: Add new DT schema for MFC Date: Wed, 7 Sep 2022 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X-CMS-RootMailID: 20220907063313epcas5p114f793010fd0f2797e93bd83ed18a1d7 References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233536_816186_D1DDFE63 X-CRM114-Status: GOOD ( 25.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds DT schema for s5p-mfc in yaml format Signed-off-by: Aakarsh Jain Signed-off-by: Smitha T Murthy --- .../devicetree/bindings/media/s5p-mfc.txt | 77 +------------ .../bindings/media/samsung,s5p-mfc.yaml | 109 ++++++++++++++++++ 2 files changed, 110 insertions(+), 76 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index aa54c8159d9f..0b7c4dd40095 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -1,76 +1 @@ -* Samsung Multi Format Codec (MFC) - -Multi Format Codec (MFC) is the IP present in Samsung SoCs which -supports high resolution decoding and encoding functionalities. -The MFC device driver is a v4l2 driver which can encode/decode -video raw/elementary streams and has support for all popular -video codecs. - -Required properties: - - compatible : value should be either one among the following - (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs - (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs - (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC - (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC - (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC - (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC - - - reg : Physical base address of the IP registers and length of memory - mapped region. - - - interrupts : MFC interrupt number to the CPU. - - clocks : from common clock binding: handle to mfc clock. - - clock-names : from common clock binding: must contain "mfc", - corresponding to entry in the clocks property. - -Optional properties: - - power-domains : power-domain property defined with a phandle - to respective power domain. - - memory-region : from reserved memory binding: phandles to two reserved - memory regions, first is for "left" mfc memory bus interfaces, - second if for the "right" mfc memory bus, used when no SYSMMU - support is available; used only by MFC v5 present in Exynos4 SoCs - -Obsolete properties: - - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region - property instead - - -Example: -SoC specific DT entry: - -mfc: codec@13400000 { - compatible = "samsung,mfc-v5"; - reg = <0x13400000 0x10000>; - interrupts = <0 94 0>; - power-domains = <&pd_mfc>; - clocks = <&clock 273>; - clock-names = "mfc"; -}; - -Reserved memory specific DT entry for given board (see reserved memory binding -for more information): - -reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mfc_left: region@51000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0x51000000 0x800000>; - }; - - mfc_right: region@43000000 { - compatible = "shared-dma-pool"; - no-map; - reg = <0x43000000 0x800000>; - }; -}; - -Board specific DT entry: - -codec@13400000 { - memory-region = <&mfc_left>, <&mfc_right>; -}; +This file has moved to samsung,s5p-mfc.yaml diff --git a/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml new file mode 100644 index 000000000000..7cd26d4acbe4 --- /dev/null +++ b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/samsung,s5p-mfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung Exynos Multi Format Codec (MFC) + +maintainers: + - Marek Szyprowski + - Aakarsh Jain + +description: + Multi Format Codec (MFC) is the IP present in Samsung SoCs which + supports high resolution decoding and encoding functionalities. + +properties: + compatible: + enum: + - samsung,mfc-v5 # Exynos4 + - samsung,mfc-v6 # Exynos5 + - samsung,mfc-v7 # Exynos5420 + - samsung,mfc-v8 # Exynos5800 + - samsung,exynos5433-mfc # Exynos5433 + - samsung,mfc-v10 # Exynos7880 + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + + interrupts: + maxItems: 1 + + iommus: + maxItems: 2 + + iommu-names: + maxItems: 2 + + power-domains: + maxItems: 1 + + memory-region: + maxItems: 1 + +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,mfc-v5 + then: + properties: + memory-region: + maxItems: 2 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + +additionalProperties: false + +examples: + - | + # SoC specific DT entry + mfc: mfc@12880000 { + compatible = "samsung,fsd-mfc"; + reg = <0x0 0x12880000 0x0 0x10000>; + interrupts = ; + clock-names = "mfc"; + clocks = <&clock_mfc MFC_MFC_IPCLKPORT_ACLK>; + iommus = <&smmu_isp 0x1000 0x0>, <&smmu_isp 0x1400 0x0>; + iommu-names = "left", "right"; + power-domains = <&pd_mfc>; + memory-region = <&mfc_left>, <&mfc_right>; + }; + + - | + # Reserved memory specific DT entry for given board + # (see reserved memory binding for more information) + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mfc_left: region@84000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0x84000000 0x800000>; + }; + + mfc_right: region@a9000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0xa9000000 0x800000>; + }; + }; + From patchwork Wed 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Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063313epsmtip1182bbff493b3e7ce9004e51b69feac9f~SgGdOedXR2482924829epsmtip1y; Wed, 7 Sep 2022 06:33:13 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 02/15] dt-bindings: media: s5p-mfc: Add mfcv12 variant Date: Wed, 7 Sep 2022 12:17:02 +0530 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X-CMS-RootMailID: 20220907063318epcas5p2a395fc5da7576c3a53b6a55e3cc87911 References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233551_976196_DA6D93B3 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds DT schema for s5p-mfc with a new compatible string for mfcv12 variant. Signed-off-by: Aakarsh Jain Signed-off-by: Smitha T Murthy --- Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml index 7cd26d4acbe4..a806489a9edd 100644 --- a/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml +++ b/Documentation/devicetree/bindings/media/samsung,s5p-mfc.yaml @@ -23,6 +23,7 @@ properties: - samsung,mfc-v8 # Exynos5800 - samsung,exynos5433-mfc # Exynos5433 - samsung,mfc-v10 # Exynos7880 + - samsung,fsd-mfc # Tesla FSD reg: maxItems: 1 From patchwork Wed Sep 7 06:47:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FCE7C6FA86 for ; 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Wed, 7 Sep 2022 15:33:23 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063319epsmtip19a37f3b3c6ee9845a5d1ec6a33d283ea~SgGiqp9B02638126381epsmtip1A; Wed, 7 Sep 2022 06:33:19 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 03/15] media: s5p-mfc: Rename IS_MFCV10 macro Date: Wed, 7 Sep 2022 12:17:03 +0530 Message-Id: <20220907064715.55778-4-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTfVDTdRzH77uH3wY1/R1QfKGLdr8uT1Bwo218mUDcQfZL6eIuyJ4OWtsv IMZva79Nw4pWPKgTU1BTiQfjQU4elGDAlGE050kKdjznHRMQjSA7BoRHYtbYRv33+nw+78/3 8/D9fvlsvwksmJ9F6ykdrVATmC+n40ro5vAr26FSZFzE0D3LaS6arOzAUM3KDAtN1CxxkK2t nYfMw9+yUf21Hi6qst/kos4f73DQ97+5ogOnHRw0U3UeoNmy2xhqnR7loqm53WjoUjmGilva uajZ7uChurEBFjrb+oiFqtv/5KHCbjsPOawdABUU2VnxkGyqbAKkxVELyLHaRTZ5sczBI2us syyyteEgRo6PWjGyrfYLsvDqQw75tbkBkI+/quCRJvsYRi61hpDXl5d4yRveyY7JpBQqSiek aKVGlUVnxBK73khPSJfKROJwcTSKIoS0IoeKJRKTksN3ZKldayCEexRqg8uVrGAYYltcjE5j 0FPCTA2jjyUorUqtlWgjGEUOY6AzImhKLxeLRJFSl/D97MyF72rY2kfRn9y/IDMCp8gEfPgQ l8B/Jqd5a+yHdwHYMvuxCfi6eBFAc48NeIwHAFavHAPrGSs3nJgn0A2g6X4fy2Pks6B99KBb heFb4YP5G9gaB+BfAjh9QL8mYuP5HOjoW3UX9MfjYf/fZvYac/AX4LHFNneCAI+G+5tquJ5y z8HGlh63xgeXw4HjvV5/vg98fFLi4UR4ebyB5WF/OHfNzPNwMJw9UuTlDDixlO8dQQsrjGav /iXYM1zOMQG+q7lQeOHSNo/7WXji+nm3hI1vgIdX73rlAmipXGcCVvf1eo+HcOSPdm9rJGxe rmJ7lnIYwPnuLu5REFL2f4kzADSAIErL5GRQjFQbSVN7/7s0pSanFbhfethOC5iadEbYAIsP bADy2USAQGUJUPoJVIrcfZROk64zqCnGBqSu/ZWwg59SalxfhdaniyXRIolMJpNEvygTE4GC 41uA0g/PUOipbIrSUrr1PBbfJ9jIevK9kpyzGkrmhx+1bRcqUi6eG255InRLXLPvYKI87c13 r6bk6gxJzbXn7loXgyLlnGee/gU/Yy9wxoR8hKtRUmT8N8R+/9KZINvGuh3+sbn19wKSdCmn LK90LjQGb4oKaSyqit18+cMPwMuBsP/Ovp9PZuH95f3COCtHl8BLOyTa05kWduLt18rmpZ+W PBzZ9Xvqr5TeOPtqVi1denMr1ZtUGribLBgaKlnl3zpiNn1eutAZZTxQnPeDZrUwNW9uajA3 bWoF+ZTUdymFw5mpt6wF8kGBoTTF1llhmvTfSD+/HKVLcMrT/tpZNyK9Tb/+kyqPHJ9K3lte TLzlZMo+o3sJDpOpEIexdYziX/VyiqVyBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBIsWRmVeSWpSXmKPExsWy7bCSnK6xtUSywdQrQhZPd8xktXgwbxub xeIfz5ks7i/+zGJxaPNWdostV2YzWyw/foDVYv6Rc6wW2w8+YrHY+AIoe3HmXRaL5/PXMVq8 nHWPzWLT42usFg9fhVtc3jWHzaJnw1ZWi7VH7rJbLL1+kcli2aY/TBaLtn5ht2jde4Td4u6e bYwWLW1HmBwkPNbMW8PosePuEkaP60s+MXvsnHWX3WPxnpdMHptWdbJ53Lm2h81j85J6j9aj v1g8+rasYvT41zSX3aPryHU2j8+b5DxOff3MHsAXxWWTkpqTWZZapG+XwJXxceFi5oI/lhVv 1ps1MH4w6GLk5JAQMJH4cfoDWxcjF4eQwG5GiY3/lzJDJCQkVv6exAhhC0us/PecHaKokUmi f3MXO0iCTUBH4tv702DdIgKtjBLXV3YygTjMArNZJH5MOsAKUiUs4CBx9u8WsLEsAqoSkz9t ZgOxeQUsJdrXLGaFWCEvsXrDAbAaTgEriYtTToDFhYBqHs/Yxj6BkW8BI8MqRsnUguLc9Nxi wwLDvNRyveLE3OLSvHS95PzcTYzgyNPS3MG4fdUHvUOMTByMhxglOJiVRHhTdogkC/GmJFZW pRblxxeV5qQWH2KU5mBREue90HUyXkggPbEkNTs1tSC1CCbLxMEp1cDkL7K+6aqfFe+C+zpn ujofWrAJJvbXpr/7Y5N3VrExfivPp7JO25gSvWkfrgQ/YVhmm7KzRi3DestlqXJNHaYpVvkH 9l3I7us7rqbAe0XrUezEsMc8EvVfG+1r5lc3+3uqb7zWOH/LmcOfuf2qYn98uRqxqWrybd8M oVNxM7fm/fo0p7OgXfHt7UBL5erFIk+nNYrNOlJxvnidT1v9qVeRanlfmaeI/VCJ5bmos1xe vTnqyy4e9h+LnKSLVEJMHnVY5fmayjz/7X1D4Fv3+xn6CpyO2+9ODPg3KyH49VLv9SxPWlgW OzW/ytE6v1Kxd/tvmWXP+j5F87C3O/wNC6/z7Hy9yDdkY3/2/XlWm5VYijMSDbWYi4oTAdUh dhErAwAA X-CMS-MailID: 20220907063323epcas5p37b1a06b0c0ba5ac685284bf68b40a205 X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063323epcas5p37b1a06b0c0ba5ac685284bf68b40a205 References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233603_935210_CE9B0317 X-CRM114-Status: GOOD ( 21.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Renames macro IS_MFCV10 to IS_MFCV10_PLUS so that the MFCv10 code can be resued for MFCv12 support. Since some part of MFCv10 specific code holds good for MFCv12 also. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 10 +++---- .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c | 2 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 28 +++++++++---------- 3 files changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index 5304f42c8c72..e6ec4a43b290 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -771,11 +771,11 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \ (dev->variant->port_num ? 1 : 0) : 0) : 0) #define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0) -#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0) -#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0) -#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0) -#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0) -#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10(dev)) +#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60) +#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70) +#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80) +#define IS_MFCV10_PLUS(dev) (dev->variant->version >= 0xA0) +#define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev)) #define MFC_V5_BIT BIT(0) #define MFC_V6_BIT BIT(1) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c index 72d70984e99a..ffe9f7e79eca 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c @@ -236,7 +236,7 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev) else mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10); mfc_debug(2, "Will now wait for completion of firmware transfer\n"); diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 8227004f6746..728d255e65fc 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -72,9 +72,9 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->luma_size, ctx->chroma_size, ctx->mv_size); mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count); } else if (ctx->type == MFCINST_ENCODER) { - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) ctx->tmv_buffer_size = 0; - } else if (IS_MFCV8_PLUS(dev)) + else if (IS_MFCV8_PLUS(dev)) ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 * ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V8(mb_width, mb_height), S5P_FIMV_TMV_BUFFER_ALIGN_V6); @@ -82,7 +82,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 * ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height), S5P_FIMV_TMV_BUFFER_ALIGN_V6); - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width); lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height); if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) { @@ -133,7 +133,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) switch (ctx->codec_mode) { case S5P_MFC_CODEC_H264_DEC: case S5P_MFC_CODEC_H264_MVC_DEC: - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_debug(2, "Use min scratch buffer size\n"); else if (IS_MFCV8_PLUS(dev)) ctx->scratch_buf_size = @@ -152,7 +152,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) (ctx->mv_count * ctx->mv_size); break; case S5P_MFC_CODEC_MPEG4_DEC: - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_debug(2, "Use min scratch buffer size\n"); else if (IS_MFCV7_PLUS(dev)) { ctx->scratch_buf_size = @@ -172,7 +172,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) break; case S5P_MFC_CODEC_VC1RCV_DEC: case S5P_MFC_CODEC_VC1_DEC: - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_debug(2, "Use min scratch buffer size\n"); else ctx->scratch_buf_size = @@ -189,7 +189,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_H263_DEC: - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_debug(2, "Use min scratch buffer size\n"); else ctx->scratch_buf_size = @@ -201,7 +201,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank1.size = ctx->scratch_buf_size; break; case S5P_MFC_CODEC_VP8_DEC: - if (IS_MFCV10(dev)) + if (IS_MFCV10_PLUS(dev)) mfc_debug(2, "Use min scratch buffer size\n"); else if (IS_MFCV8_PLUS(dev)) ctx->scratch_buf_size = @@ -230,7 +230,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) DEC_VP9_STATIC_BUFFER_SIZE; break; case S5P_MFC_CODEC_H264_ENC: - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16); @@ -254,7 +254,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) break; case S5P_MFC_CODEC_MPEG4_ENC: case S5P_MFC_CODEC_H263_ENC: - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width, @@ -273,7 +273,7 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_VP8_ENC: - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height), @@ -452,7 +452,7 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx) if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) { - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width, ctx->img_height); } else { @@ -668,7 +668,7 @@ static int s5p_mfc_set_enc_ref_buffer_v6(struct s5p_mfc_ctx *ctx) mfc_debug(2, "Buf1: %p (%d)\n", (void *)buf_addr1, buf_size1); - if (IS_MFCV10(dev)) { + if (IS_MFCV10_PLUS(dev)) { /* start address of per buffer is aligned */ for (i = 0; i < ctx->pb_count; i++) { writel(buf_addr1, mfc_regs->e_luma_dpb + (4 * i)); @@ -2455,7 +2455,7 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8); R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8); - if (!IS_MFCV10(dev)) + if (!IS_MFCV10_PLUS(dev)) goto done; /* Initialize registers used in MFC v10 only. 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Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063323epsmtip140bf116fad99d198ae00ce133e08397a~SgGmWLZTY2432724327epsmtip1a; Wed, 7 Sep 2022 06:33:23 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 04/15] media: s5p-mfc: Add initial support for MFCv12 Date: Wed, 7 Sep 2022 12:17:04 +0530 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X-CMS-RootMailID: 20220907063328epcas5p12c01eb755e3ddfa4fdaee8e4c3bc9527 References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233607_629136_2D50C916 X-CRM114-Status: GOOD ( 30.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for MFCv12, with a new register file and necessary hw control, decoder, encoder and structural changes. Add luma dbp, chroma dpb and mv sizes for each codec as per the UM for MFCv12, along with appropriate alignment. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/regs-mfc-v12.h | 50 +++++++++++ .../media/platform/samsung/s5p-mfc/s5p_mfc.c | 30 +++++++ .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 13 ++- .../platform/samsung/s5p-mfc/s5p_mfc_ctrl.c | 2 +- .../platform/samsung/s5p-mfc/s5p_mfc_dec.c | 6 +- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 5 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr.h | 8 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 85 ++++++++++++++++--- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h | 6 +- 9 files changed, 175 insertions(+), 30 deletions(-) create mode 100644 drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h new file mode 100644 index 000000000000..6c68a45082d0 --- /dev/null +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Register definition file for Samsung MFC V12.x Interface (FIMV) driver + * + * Copyright (c) 2020 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + */ + +#ifndef _REGS_MFC_V12_H +#define _REGS_MFC_V12_H + +#include +#include "regs-mfc-v10.h" + +/* MFCv12 Context buffer sizes */ +#define MFC_CTX_BUF_SIZE_V12 (30 * SZ_1K) +#define MFC_H264_DEC_CTX_BUF_SIZE_V12 (2 * SZ_1M) +#define MFC_OTHER_DEC_CTX_BUF_SIZE_V12 (30 * SZ_1K) +#define MFC_H264_ENC_CTX_BUF_SIZE_V12 (100 * SZ_1K) +#define MFC_HEVC_ENC_CTX_BUF_SIZE_V12 (40 * SZ_1K) +#define MFC_OTHER_ENC_CTX_BUF_SIZE_V12 (25 * SZ_1K) + +/* MFCv12 variant defines */ +#define MAX_FW_SIZE_V12 (SZ_1M) +#define MAX_CPB_SIZE_V12 (7 * SZ_1M) +#define MFC_VERSION_V12 0xC0 +#define MFC_NUM_PORTS_V12 1 +#define S5P_FIMV_CODEC_VP9_ENC 27 + +/* Encoder buffer size for MFCv12 */ +#define ENC_V120_BASE_SIZE(x, y) \ + (((x + 3) * (y + 3) * 8) \ + + (((y * 64) + 2304) * (x + 7) / 8)) + +#define ENC_V120_H264_ME_SIZE(x, y) \ + ALIGN((ENC_V120_BASE_SIZE(x, y) \ + + (DIV_ROUND_UP(x * y, 64) * 32)), 256) + +#define ENC_V120_MPEG4_ME_SIZE(x, y) \ + ALIGN((ENC_V120_BASE_SIZE(x, y) \ + + (DIV_ROUND_UP(x * y, 128) * 16)), 256) + +#define ENC_V120_VP8_ME_SIZE(x, y) \ + ALIGN(ENC_V120_BASE_SIZE(x, y), 256) + +#define ENC_V120_HEVC_ME_SIZE(x, y) \ + ALIGN((((x + 3) * (y + 3) * 32) \ + + (((y * 128) + 2304) * (x + 3) / 4)), 256) + +#endif /*_REGS_MFC_V12_H*/ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c index 761341934925..c483a95d5e92 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c @@ -775,6 +775,8 @@ static int s5p_mfc_open(struct file *file) INIT_LIST_HEAD(&ctx->dst_queue); ctx->src_queue_cnt = 0; ctx->dst_queue_cnt = 0; + ctx->is_422 = 0; + ctx->is_10bit = 0; /* Get context number */ ctx->num = 0; while (dev->ctx[ctx->num]) { @@ -1638,6 +1640,31 @@ static struct s5p_mfc_variant mfc_drvdata_v10 = { .fw_name[0] = "s5p-mfc-v10.fw", }; +static struct s5p_mfc_buf_size_v6 mfc_buf_size_v12 = { + .dev_ctx = MFC_CTX_BUF_SIZE_V12, + .h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V12, + .other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V12, + .h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V12, + .hevc_enc_ctx = MFC_HEVC_ENC_CTX_BUF_SIZE_V12, + .other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V12, +}; + +static struct s5p_mfc_buf_size buf_size_v12 = { + .fw = MAX_FW_SIZE_V12, + .cpb = MAX_CPB_SIZE_V12, + .priv = &mfc_buf_size_v12, +}; + +static struct s5p_mfc_variant mfc_drvdata_v12 = { + .version = MFC_VERSION_V12, + .version_bit = MFC_V12_BIT, + .port_num = MFC_NUM_PORTS_V12, + .buf_size = &buf_size_v12, + .fw_name[0] = "s5p-mfc-v12.fw", + .clk_names = {"mfc"}, + .num_clocks = 1, +}; + static const struct of_device_id exynos_mfc_match[] = { { .compatible = "samsung,mfc-v5", @@ -1657,6 +1684,9 @@ static const struct of_device_id exynos_mfc_match[] = { }, { .compatible = "samsung,mfc-v10", .data = &mfc_drvdata_v10, + }, { + .compatible = "samsung,fsd-mfc", + .data = &mfc_drvdata_v12, }, {}, }; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index e6ec4a43b290..088fd1c96b96 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -19,7 +19,7 @@ #include #include #include "regs-mfc.h" -#include "regs-mfc-v10.h" +#include "regs-mfc-v12.h" #define S5P_MFC_NAME "s5p-mfc" @@ -720,6 +720,8 @@ struct s5p_mfc_ctx { struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS]; struct v4l2_ctrl_handler ctrl_handler; size_t scratch_buf_size; + int is_10bit; + int is_422; }; /* @@ -775,6 +777,7 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70) #define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80) #define IS_MFCV10_PLUS(dev) (dev->variant->version >= 0xA0) +#define IS_MFCV12(dev) (dev->variant->version >= 0xC0) #define FW_HAS_E_MIN_SCRATCH_BUF(dev) (IS_MFCV10_PLUS(dev)) #define MFC_V5_BIT BIT(0) @@ -782,11 +785,13 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); #define MFC_V7_BIT BIT(2) #define MFC_V8_BIT BIT(3) #define MFC_V10_BIT BIT(5) +#define MFC_V12_BIT BIT(7) #define MFC_V5PLUS_BITS (MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \ - MFC_V8_BIT | MFC_V10_BIT) + MFC_V8_BIT | MFC_V10_BIT | MFC_V12_BIT) #define MFC_V6PLUS_BITS (MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \ - MFC_V10_BIT) -#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT) + MFC_V10_BIT | MFC_V12_BIT) +#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT | \ + MFC_V12_BIT) #endif /* S5P_MFC_COMMON_H_ */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c index ffe9f7e79eca..877e5bceb75b 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c @@ -130,7 +130,7 @@ int s5p_mfc_reset(struct s5p_mfc_dev *dev) mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i*4)); /* check bus reset control before reset */ - if (dev->risc_on) + if (dev->risc_on && !IS_MFCV12(dev)) if (s5p_mfc_bus_reset(dev)) return -EIO; /* Reset diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c index 268ffe4da53c..411ca1e81a6f 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c @@ -146,7 +146,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_HEVC_DEC, .type = MFC_FMT_DEC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10_BIT | MFC_V12_BIT, .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM, }, @@ -155,7 +155,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_VP9_DEC, .type = MFC_FMT_DEC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10_BIT | MFC_V12_BIT, .flags = V4L2_FMT_FLAG_DYN_RESOLUTION, }, }; @@ -355,7 +355,7 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) pix_mp->width = ctx->buf_width; pix_mp->height = ctx->buf_height; pix_mp->field = V4L2_FIELD_NONE; - pix_mp->num_planes = 2; + pix_mp->num_planes = ctx->dst_fmt->num_planes; /* Set pixelformat to the format in which MFC outputs the decoded frame */ pix_mp->pixelformat = ctx->dst_fmt->fourcc; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index b65e506665af..26e3ed2e2b6f 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -92,7 +92,7 @@ static struct s5p_mfc_fmt formats[] = { .codec_mode = S5P_FIMV_CODEC_HEVC_ENC, .type = MFC_FMT_ENC, .num_planes = 1, - .versions = MFC_V10_BIT, + .versions = MFC_V10_BIT | MFC_V12_BIT, }, }; @@ -1179,7 +1179,8 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) { ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, get_e_min_scratch_buf_size, dev); - ctx->bank1.size += ctx->scratch_buf_size; + if (!IS_MFCV12(dev)) + ctx->bank1.size += ctx->scratch_buf_size; } ctx->state = MFCINST_HEAD_PRODUCED; } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h index b9831275f3ab..87ac56756a16 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h @@ -166,9 +166,9 @@ struct s5p_mfc_regs { void __iomem *d_decoded_third_addr;/* only v7 */ void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ - void __iomem *d_min_scratch_buffer_size; /* v10 */ - void __iomem *d_static_buffer_addr; /* v10 */ - void __iomem *d_static_buffer_size; /* v10 */ + void __iomem *d_min_scratch_buffer_size; /* v10 and v12 */ + void __iomem *d_static_buffer_addr; /* v10 and v12 */ + void __iomem *d_static_buffer_size; /* v10 and v12 */ /* encoder registers */ void __iomem *e_frame_width; @@ -268,7 +268,7 @@ struct s5p_mfc_regs { void __iomem *e_vp8_hierarchical_qp_layer0;/* v7 and v8 */ void __iomem *e_vp8_hierarchical_qp_layer1;/* v7 and v8 */ void __iomem *e_vp8_hierarchical_qp_layer2;/* v7 and v8 */ - void __iomem *e_min_scratch_buffer_size; /* v10 */ + void __iomem *e_min_scratch_buffer_size; /* v10 and v12 */ void __iomem *e_num_t_layer; /* v10 */ void __iomem *e_hier_qp_layer0; /* v10 */ void __iomem *e_hier_bit_rate_layer0; /* v10 */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 728d255e65fc..db8ecc2740d7 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -60,12 +60,14 @@ static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx) static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; - unsigned int mb_width, mb_height; + unsigned int mb_width, mb_height, width64, height32; unsigned int lcu_width = 0, lcu_height = 0; int ret; mb_width = MB_WIDTH(ctx->img_width); mb_height = MB_HEIGHT(ctx->img_height); + width64 = ALIGN(ctx->img_width, 64); + height32 = ALIGN(ctx->img_height, 32); if (ctx->type == MFCINST_DECODER) { mfc_debug(2, "Luma size:%d Chroma size:%d MV size:%d\n", @@ -82,7 +84,46 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->tmv_buffer_size = S5P_FIMV_NUM_TMV_BUFFERS_V6 * ALIGN(S5P_FIMV_TMV_BUFFER_SIZE_V6(mb_width, mb_height), S5P_FIMV_TMV_BUFFER_ALIGN_V6); - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width); + lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height); + if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC && + ctx->is_10bit) { + ctx->luma_dpb_size = + width64 * height32 + + ALIGN(DIV_ROUND_UP(lcu_width * 32, 4), + 16) * height32 + 128; + if (ctx->is_422) { + ctx->chroma_dpb_size = + ctx->luma_dpb_size; + } else { + ctx->chroma_dpb_size = + width64 * height32 / 2 + + ALIGN(DIV_ROUND_UP(lcu_width * + 32, 4), 16) * height32 / 2 + 128; + } + } else if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_ENC && + ctx->is_10bit) { + ctx->luma_dpb_size = + ALIGN(ctx->img_width * 2, 128) * + height32 + 64; + ctx->chroma_dpb_size = + ALIGN(ctx->img_width * 2, 128) * + height32 / 2 + 64; + } else { + ctx->luma_dpb_size = + width64 * height32 + 64; + if (ctx->is_422) { + ctx->chroma_dpb_size = + ctx->luma_dpb_size; + } else { + ctx->chroma_dpb_size = + width64 * height32 / 2 + 64; + } + } + ctx->luma_dpb_size = ALIGN(ctx->luma_dpb_size + 256, SZ_2K); + ctx->chroma_dpb_size = ALIGN(ctx->chroma_dpb_size + 256, SZ_2K); + } else if (IS_MFCV10_PLUS(dev)) { lcu_width = S5P_MFC_LCU_WIDTH(ctx->img_width); lcu_height = S5P_MFC_LCU_HEIGHT(ctx->img_height); if (ctx->codec_mode != S5P_FIMV_CODEC_HEVC_ENC) { @@ -230,7 +271,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) DEC_VP9_STATIC_BUFFER_SIZE; break; case S5P_MFC_CODEC_H264_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_H264_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_H264_ME_SIZE(mb_width, mb_height), 16); @@ -254,7 +299,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) break; case S5P_MFC_CODEC_MPEG4_ENC: case S5P_MFC_CODEC_H263_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_MPEG4_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_MPEG4_ME_SIZE(mb_width, @@ -273,7 +322,11 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_VP8_ENC: - if (IS_MFCV10_PLUS(dev)) { + if (IS_MFCV12(dev)) { + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ENC_V120_VP8_ME_SIZE(mb_width, mb_height); + } else if (IS_MFCV10_PLUS(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); ctx->me_buffer_size = ALIGN(ENC_V100_VP8_ME_SIZE(mb_width, mb_height), @@ -297,9 +350,14 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->bank2.size = 0; break; case S5P_MFC_CODEC_HEVC_ENC: + if (IS_MFCV12(dev)) + ctx->me_buffer_size = + ENC_V120_HEVC_ME_SIZE(lcu_width, lcu_height); + else + ctx->me_buffer_size = + ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, + lcu_height), 16); mfc_debug(2, "Use min scratch buffer size\n"); - ctx->me_buffer_size = - ALIGN(ENC_V100_HEVC_ME_SIZE(lcu_width, lcu_height), 16); ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256); ctx->bank1.size = ctx->scratch_buf_size + ctx->tmv_buffer_size + @@ -452,12 +510,15 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx) if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) { - if (IS_MFCV10_PLUS(dev)) { - ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width, - ctx->img_height); + if (IS_MFCV12(dev)) { + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 1024); + } else if (IS_MFCV10_PLUS(dev)) { + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 512); } else { - ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width, - ctx->img_height); + ctx->mv_size = S5P_MFC_DEC_MV_SIZE(ctx->img_width, + ctx->img_height, 128); } } else if (ctx->codec_mode == S5P_MFC_CODEC_HEVC_DEC) { ctx->mv_size = s5p_mfc_dec_hevc_mv_size(ctx->img_width, diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h index e4dd03c5454c..30269f3e68e8 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h @@ -19,10 +19,8 @@ #define MB_WIDTH(x_size) DIV_ROUND_UP(x_size, 16) #define MB_HEIGHT(y_size) DIV_ROUND_UP(y_size, 16) -#define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \ - (((MB_HEIGHT(y)+1)/2)*2) * 64 + 128) -#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \ - (((MB_HEIGHT(y)+1)/2)*2) * 64 + 512) +#define S5P_MFC_DEC_MV_SIZE(x, y, offset) (MB_WIDTH(x) * \ + (((MB_HEIGHT(y)+1)/2)*2) * 64 + offset) #define S5P_MFC_LCU_WIDTH(x_size) DIV_ROUND_UP(x_size, 32) #define S5P_MFC_LCU_HEIGHT(y_size) DIV_ROUND_UP(y_size, 32) From patchwork Wed Sep 7 06:47:05 2022 Content-Type: text/plain; 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Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../media/v4l/ext-ctrls-codec.rst | 167 ++++++++++++++++++ 1 file changed, 167 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 2a165ae063fb..2277d83a7cf0 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2187,6 +2187,16 @@ enum v4l2_mpeg_video_vp8_profile - * - ``V4L2_MPEG_VIDEO_VP8_PROFILE_3`` - Profile 3 +VP9 Control Reference +--------------------- + +The VP9 controls include controls for encoding parameters of VP9 video +codec. + +.. _vp9-control-id: + +VP9 Control IDs + .. _v4l2-mpeg-video-vp9-profile: ``V4L2_CID_MPEG_VIDEO_VP9_PROFILE`` @@ -2253,6 +2263,163 @@ enum v4l2_mpeg_video_vp9_level - * - ``V4L2_MPEG_VIDEO_VP9_LEVEL_6_2`` - Level 6.2 +``V4L2_CID_CODEC_VP9_I_FRAME_QP`` + Quantization parameter for an I frame for VP9. Valid range: from 1 to 255. + +``V4L2_CID_CODEC_VP9_P_FRAME_QP`` + Quantization parameter for an P frame for VP9. Valid range: from 1 to 255. + +``V4L2_CID_CODEC_VP9_MAX_QP`` + Maximum quantization parameter for VP9. Valid range: from 1 to 255. + Recommended range for MFC is from 230 to 255. + +``V4L2_CID_CODEC_VP9_MIN_QP`` + Minimum quantization parameter for VP9. Valid range: from 1 to 255. + Recommended range for MFC is from 1 to 24. + +``V4L2_CID_CODEC_VP9_RC_FRAME_RATE`` + Indicates the number of evenly spaced subintervals, called ticks, within + one second. This is a 16 bit unsigned integer and has a maximum value up to + 0xffff and a minimum value of 1. + +``V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD`` + Indicates the refresh period of the golden frame for VP9 encoder. + +.. _v4l2-vp9-golden-frame-sel: + +``V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL`` + (enum) + +enum v4l2_mpeg_vp9_golden_framesel - + Selects the golden frame for encoding. Valid when NUM_OF_REF is 2. + Possible values are: + +.. raw:: latex + + \footnotesize + +.. tabularcolumns:: |p{9.0cm}|p{8.0cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + + * - ``V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV`` + - Use the (n-2)th frame as a golden frame, current frame index being + 'n'. + * - ``V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD`` + - Use the previous specific frame indicated by + ``V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD`` as a + golden frame. + +.. raw:: latex + + \normalsize + + +``V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE`` + Allows host to specify the quantization parameter values for each + temporal layer through HIERARCHICAL_QP_LAYER. This is valid only + if HIERARCHICAL_CODING_LAYER is greater than 1. Setting the control + value to 1 enables setting of the QP values for the layers. + +.. _v4l2-vp9-ref-number-of-pframes: + +``V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES`` + (enum) + +enum v4l2_mpeg_vp9_ref_num_for_pframes - + Number of reference pictures for encoding P frames. + +.. raw:: latex + + \footnotesize + +.. tabularcolumns:: |p{9.0cm}|p{8.0cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + + * - ``V4L2_CID_CODEC_VP9_1_REF_PFRAME`` + - Indicates one reference frame, last encoded frame will be searched. + * - ``V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD`` + - Indicates 2 reference frames, last encoded frame and golden frame + will be searched. + +.. raw:: latex + + \normalsize + + +``V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER`` + Indicates the number of hierarchial coding layer. + In normal encoding (non-hierarchial coding), it should be zero. + VP9 has upto 3 layer of encoder. + +``V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE`` + Indicates enabling of bit rate for hierarchical coding layers VP9 encoder. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR`` + Indicates bit rate for hierarchical coding layer 0 for VP9 encoder. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR`` + Indicates bit rate for hierarchical coding layer 1 for VP9 encoder. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR`` + Indicates bit rate for hierarchical coding layer 2 for VP9 encoder. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP`` + Indicates quantization parameter for hierarchical coding layer 0. + Valid range: [V4L2_CID_CODEC_VP9_MIN_QP, + V4L2_CID_CODEC_VP9_MAX_QP]. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP`` + Indicates quantization parameter for hierarchical coding layer 1. + Valid range: [V4L2_CID_CODEC_VP9_MIN_QP, + V4L2_CID_CODEC_VP9_MAX_QP]. + +``V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP`` + Indicates quantization parameter for hierarchical coding layer 2. + Valid range: [V4L2_CID_CODEC_VP9_MIN_QP, + V4L2_CID_CODEC_VP9_MAX_QP]. + +.. _v4l2-vp9-max-partition-depth: + +``V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH`` + (enum) + +enum v4l2_mpeg_vp9_num_partitions - + Indicate maximum coding unit depth. + +.. raw:: latex + + \footnotesize + +.. tabularcolumns:: |p{9.0cm}|p{8.0cm}| + +.. flat-table:: + :header-rows: 0 + :stub-columns: 0 + + * - ``V4L2_CID_CODEC_VP9_0_PARTITION`` + - No coding unit partition depth. + * - ``V4L2_CID_CODEC_VP9_1_PARTITION`` + - Allows one coding unit partition depth. + +.. raw:: latex + + \normalsize + + +``V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT`` + Zero indicates enable intra NxN PU split. + One indicates disable intra NxN PU split. + +``V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER`` + Indicates IVF header generation. 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Date: Wed, 7 Sep 2022 12:17:06 +0530 Message-Id: <20220907064715.55778-7-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTa1ATVxTH5242m4Q2zBJQr3SkdFunQgkkNIGLgHZaxm7BD3T4QIc+6DbZ ASQkmWyordqCIKgpoMzQWkCgBUpnECFieAhBA/IyIi3y6oMoDx3EoeoYtRZbbEKw/fY75/zP Pff+771CnmSW8BdmaI2sQctoKMILb78YFCydiYYq2WmTBN3sLOej2ep2AtU9XsTQ9TonjvrO tgmQZaKSh34csvFRTf8oH3X0zuPozC1XdazcgaPFmmaAliquEah1YYqP5m4no/GukwQqMrfx 0el+hwD9MD2GoYbWvzFU2/ZAgAp6+gXIYW0H6FBhP/YGpJuqmwDd6agH9HT9fR59rsIhoOus Sxjd2niUoGemrAR9tj6HLhhYwekSSyOgV/OqBLSpf5qgna0BtP2hU5DonZIZk84yatYQyGpV OnWGNi2WSkhKfStVGSGTS+VRKJIK1DJZbCwVtztRuitD47KBCvyU0WS7UokMx1FhO2IMumwj G5iu44yxFKtXa/QKfSjHZHHZ2rRQLWvcLpfJwpUu4ceZ6Yvdq4S+RflZ90wRngvmQ01AJISk AvaWmoEJeAklZDeAl76/yfcE9wG8Yp8jPMEjAIsWDglMQLjW0uwI8+R7AFwYqFrvyMeg9eHP uHtdggyBj+5eJtzsRx50qY4Y3SIemY9Dx8gTgbvgS+6Gv1aOY27Gya1w4moTz81iMgouWqv5 ng2+CE+ZbWt5EbkdjpUNr02D5GERrOy+R3hEcfDauBN42BfeHrIIPOwPl44VrnMavO7MX9fo YVWuBfPwTmibOIm7j8Yjg2BLV5gnvQV+bW9ek/BIb1j85Ma6XAw7q58xBWtHhteXh3Dyjza+ xyEaXhj18phSDKBlJQ8/DgIq/p/wHQCNYDOr57LSWE6pD9eye/+7NZUuqxWsPfXg+E4wN3sv tA9gQtAHoJBH+YnVnX4qiVjNfL6PNehSDdkalusDSpd/pTz/DSqd669ojalyRZRMERERoYh6 PUJObRKXvQZUEjKNMbKZLKtnDc/6MKHIPxczPR+pzhsumS0uyz9x/u67K/s7NoFjtvMwv2aH z0u+x4sGQV324P4jkQlP+aDOm9sS949l21NZr2Wq/epHn1AXznwwMB80k/P7yC3lcLLwYqwg LOlDdcbGENnhaP6JkRfkxZPFK3ubG17dljR1oD4l9U55inbKNhZjXhyUdxcyX8SHv/ml/uXx b+1NzI2u594fXZVI98w1KLp+SpjcUzNUumvyldo75vjlS44l63LhL79JBh57PeA08hWwtaMh KeDolT/3OR3Lb2tbKjcuSOPe2RBtOnXZR1JAiert5m9qe0Rx56S2nBL6r4KD3mGi2rEqLOS9 r4rEEweSgu3TAe07xcmbfSicS2fkwTwDx/wLHI7zA3MEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAAzWRa0xSYRjHfQ/nJhN3BrTerKzILraimNVeu9jl02nZ1v26loRnRAGyA3ax Lc3SipiVK8s0tSQdalaYgElFREuzm+WkG3axQluti+ZcOUt0ffs/v9//2fPhoQXiM3gUrdGb OF6v1MpIIe64I4uetnAuVM04ejgGfXTlE+htkYNEpb1BDL0p7cKRt6aWQtdaCgSo/J6HQMW+ RwRy3n6Po6sdA7Y5P4CjYHE1QJ1n20hkb28l0LvP69Cz64UkslypJdAlX4BCF/3NGCqz92Ho Qm03hbJu+CgUcDsAOpjtwxZCtqqoCrCugBWwfutPAVt3NkCxpe5OjLVXHCHZ161ukq2xprNZ d3/jbM61CsD2Z56jWLPPT7Jd9mj2/q8uannkRuG8ZE6r2cnx0xOShNuC9f2k4fKs3fWvLXgG eC83A5qGzExYHZhuBkJazNQDuN//kzSD8AEOoe1PLhjKEmjrD1JDpf0YPFRTIAgJkpkKe741 kSEhZbIA9NuOYKFBwBTgsDfXQ4RaEiYRvih4hoUyzkyALU+rBrdFTDwMuouIoRNjYOUVzyAP Z+bA5pMNg1w80Gk/46COg8gSEFYBRnAGo06tMyoMCj23S25U6oyperVclaKzg8HnTYl1AWfF d7kXYDTwAkgLZFJRskuqEouSlXvSOD5lC5+q5YxeMJLGZcNFT8yNW8SMWmnidnCcgeP/W4wO j8rA4oikZalfyiZ3mwmNri0QG7FAestfh7fZ8sXZfQ9scTGZxcrOY6siA/pPbQkTx5rGjTaF XR31bd7xw64HN9SWkhb9S9HIXVmn5q8o7ADnV6ZeNAGwOm9J4fhXwtYDh7jKRb/og2NrMmyR CWUbL6lvzk5qODCx8K84ffXWJu+IeCt1Jw22O1WbmrR9c3MalzYqPmrjoyt/hPUMczi3atb/ SZfHd/FqQjdVsrQjiovrfvXWr3rxKRNfU71DcismJ4//kHjauiyiZLMmu9mpHWdPyyuxbMC3 y3smGRoS6mYqVob/lS6+l1u+VxXxvFzy1f2w57Fl7YlYfsy5fdW9nhSRR4YbtykVUwS8UfkP ZDkTTysDAAA= X-CMS-MailID: 20220907063336epcas5p3511dcc3393c7bd5fe44f37889dd754df X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063336epcas5p3511dcc3393c7bd5fe44f37889dd754df References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233619_987520_4F54C8AA X-CRM114-Status: GOOD ( 15.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add V4l2 controls for VP9 encoder Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- drivers/media/v4l2-core/v4l2-ctrls-defs.c | 44 +++++++++++++++++++++++ include/uapi/linux/v4l2-controls.h | 33 +++++++++++++++++ 2 files changed, 77 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index e22921e7ea61..2d92e93158bd 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -577,6 +577,21 @@ const char * const *v4l2_ctrl_get_menu(u32 id) "Cyclic", NULL, }; + static const char * const vp9_golden_framesel[] = { + "Use previous", + "Use refresh period", + NULL, + }; + static const char * const vp9_ref_num_for_pframes[] = { + "1", + "2", + NULL, + }; + static const char * const vp9_max_partition_depth[] = { + "No CU partition depth", + "Allow 1 CU partition depth", + NULL, + }; switch (id) { case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: @@ -708,6 +723,12 @@ const char * const *v4l2_ctrl_get_menu(u32 id) return hevc_decode_mode; case V4L2_CID_STATELESS_HEVC_START_CODE: return hevc_start_code; + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: + return vp9_golden_framesel; + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: + return vp9_ref_num_for_pframes; + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: + return vp9_max_partition_depth; case V4L2_CID_CAMERA_ORIENTATION: return camera_orientation; case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE: @@ -950,6 +971,26 @@ const char *v4l2_ctrl_get_name(u32 id) case V4L2_CID_MPEG_VIDEO_VP8_PROFILE: return "VP8 Profile"; case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: return "VP9 Profile"; case V4L2_CID_MPEG_VIDEO_VP9_LEVEL: return "VP9 Level"; + case V4L2_CID_CODEC_VP9_I_FRAME_QP: return "VP9 I Frame QP Value"; + case V4L2_CID_CODEC_VP9_P_FRAME_QP: return "VP9 P Frame QP Value"; + case V4L2_CID_CODEC_VP9_MAX_QP: return "VP9 Frame QP MAX Value"; + case V4L2_CID_CODEC_VP9_MIN_QP: return "VP9 Frame QP MIN Value"; + case V4L2_CID_CODEC_VP9_RC_FRAME_RATE: return "VP9 Frame Rate"; + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: return "VP9 Indication of Golden Frame"; + case V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD: return "VP9 Golden Frame Refresh Period"; + case V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE: return "VP9 Hierarchical QP Enable"; + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: return "VP9 Number of Reference Pictures"; + case V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER:return "VP9 Num of Hierarchical Layers"; + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: return "VP9 Maximum Coding Unit Depth"; + case V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT: return "VP9 Disable Intra PU Split"; + case V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE: return "VP9 Hierarchical BitRate Enable"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR: return "VP9 Hierarchical Layer 0 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR: return "VP9 Hierarchical Layer 1 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR: return "VP9 Hierarchical Layer 2 BitRate"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP: return "VP9 Layer0 QP Value"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP: return "VP9 Layer1 QP Value"; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP: return "VP9 Layer2 QP Value"; + case V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER: return "VP9 IVF header generation"; /* HEVC controls */ case V4L2_CID_MPEG_VIDEO_HEVC_I_FRAME_QP: return "HEVC I-Frame QP Value"; @@ -1366,6 +1407,9 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, case V4L2_CID_MPEG_VIDEO_HEVC_LOOP_FILTER_MODE: case V4L2_CID_STATELESS_HEVC_DECODE_MODE: case V4L2_CID_STATELESS_HEVC_START_CODE: + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: case V4L2_CID_STATELESS_H264_DECODE_MODE: case V4L2_CID_STATELESS_H264_START_CODE: case V4L2_CID_CAMERA_ORIENTATION: diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 5f46bf4a570c..eebd1b59cccc 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -716,6 +716,38 @@ enum v4l2_mpeg_video_vp9_level { V4L2_MPEG_VIDEO_VP9_LEVEL_6_1 = 12, V4L2_MPEG_VIDEO_VP9_LEVEL_6_2 = 13, }; +#define V4L2_CID_CODEC_VP9_RC_FRAME_RATE (V4L2_CID_CODEC_BASE+514) +#define V4L2_CID_CODEC_VP9_MIN_QP (V4L2_CID_CODEC_BASE+515) +#define V4L2_CID_CODEC_VP9_MAX_QP (V4L2_CID_CODEC_BASE+516) +#define V4L2_CID_CODEC_VP9_I_FRAME_QP (V4L2_CID_CODEC_BASE+517) +#define V4L2_CID_CODEC_VP9_P_FRAME_QP (V4L2_CID_CODEC_BASE+518) +#define V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL (V4L2_CID_CODEC_BASE+519) +enum v4l2_mpeg_vp9_golden_framesel { + V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV = 0, + V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD = 1, +}; +#define V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+520) +#define V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE (V4L2_CID_CODEC_BASE+521) +#define V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES (V4L2_CID_CODEC_BASE+522) +enum v4l2_mpeg_vp9_ref_num_for_pframes { + V4L2_CID_CODEC_VP9_1_REF_PFRAME = 0, + V4L2_CID_CODEC_VP9_2_REF_PFRAME = 1, +}; +#define V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER (V4L2_CID_CODEC_BASE+523) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR (V4L2_CID_CODEC_BASE+524) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR (V4L2_CID_CODEC_BASE+525) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR (V4L2_CID_CODEC_BASE+526) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP (V4L2_CID_CODEC_BASE+527) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP (V4L2_CID_CODEC_BASE+528) +#define V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP (V4L2_CID_CODEC_BASE+529) +#define V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH (V4L2_CID_CODEC_BASE+530) +enum v4l2_mpeg_vp9_num_partitions { + V4L2_CID_CODEC_VP9_0_PARTITION = 0, + V4L2_CID_CODEC_VP9_1_PARTITION = 1, +}; +#define V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT (V4L2_CID_CODEC_BASE+531) +#define V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER (V4L2_CID_CODEC_BASE+532) +#define V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE (V4L2_CID_CODEC_BASE+533) /* CIDs for HEVC encoding. */ @@ -826,6 +858,7 @@ enum v4l2_mpeg_video_frame_skip_mode { #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 653) #define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE (V4L2_CID_CODEC_BASE + 654) + /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ #define V4L2_CID_CODEC_CX2341X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000) #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_CODEC_CX2341X_BASE+0) From patchwork Wed Sep 7 06:47:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71AC9C38145 for ; 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Wed, 7 Sep 2022 15:33:40 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063336epsmtip12efc78b19c9eb3abde794aefe4a415f5~SgGyxT-s52432724327epsmtip1c; Wed, 7 Sep 2022 06:33:36 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 07/15] media: s5p-mfc: Add support for VP9 encoder. Date: Wed, 7 Sep 2022 12:17:07 +0530 Message-Id: <20220907064715.55778-8-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTe0xbVRzHPX3dstnlhocemjhJzRbBAS0r9ZTXdOByM/cA1C2bGHZtbwqh r/W2uDGMKK+NwB46ojAeCsURNsZWnk4wwKoFhgQmlEyoUJjyCK+tyogwY0uL/vf5/X7f3+P8 zjlcpredw+emqvWUTk0qBZxtrJZ7gUHB85FQJvzy2m70e1sJG01WtHBQ9doMA01UO1iou7EZ Q03D15jouqWTjSrNA2zU2jXFQndmndGhEhsLzVTeAmiu9DcOMk1b2cg+fxz9creMgwpvN7NR vdmGoZrRIQb61rTBQFXNf2Iot8OMIVt7C0A5eWbGG5C4WXETEG02IyBGjU+YxHelNoyobp9j EKa6Cxxi3NrOIRqNnxC5P/7NIi421QHin8/KMaLAPMohHKadRN9fDix+x8m0qBSKlFO6AEot 08hT1YpowdvvJMcmh0uEomCRFL0uCFCTKipaEHcoPvhAqtK5BkFAOqk0OF3xJE0LQmOidBqD ngpI0dD6aAGllSu1Ym0ITapog1oRoqb0ESKhMCzcKTyVljJlucTWPiwEZ3KtlVgWeEgXAC8u xMXw0VIXqwBs43rj3wN4wTqGuY0nAE46Vj3GKoD1pZOMrZS6jqccF3vjHU5VLnJzNgNOZ0e7 mIPvgavL9zc1vvinAE6f17sKMfFsFrT1r2OugA9+AJYvP94UsfBd8OLyAsvFPFwKxwprWe5m L8MbtzuZLvbCI+DQ1R62qxDE871gV7/JI4qDtZWLmJt94LylycN86Fjq4LhZAScc2cDNWlie 1eQ5zT7YOVzmrMN1ThcIG+6Gut0vweK+W5sSJr4DFq0/8sh5sK1iiwWwqr/H0wrCkcVmtpsJ WFM/y3BvrgjA3pw+5mWws/T/Fl8DUAf8KS2tUlB0uDZMTX3037XJNCoT2HzrQQfbgH1yJaQb MLigG0AuU+DLk7f5yrx5cvJsBqXTJOsMSoruBuHOBV5h8v1kGudnUeuTRWKpUCyRSMTSvRKR 4EXe1deAzBtXkHoqjaK0lG4rj8H14mcxYkSH2XmNqsj9K0TsgtEYmiSfW89/5VwCumKgn5/t UZ08Js0pCSOOhuMf2gPPB4wUf5N5/dT6q09B9pA1L8JnJqPsLUnLACnrbGrM+EnKbf8itlz+ a4L53YO89y+ZVh/U2ONm/UmuhWeI3bi3kVBlESUeOzEcEhrhM5L5s/+6bu1y5MSgOE/93oMT Z0taKxoOpXcl7m/8uGifbXuKIske+mx8Ip/I8D9T/XmmwSrsXTndYEpLWpIpnw3dqU98PLar wHj/cPzeqDfrb+TWbO89Z0kv+cprcHfq+B/8PTbMb2pBS6/xa6tK/XyLbV0vBLUeh8+d7phY PGIY+CG/ImbwA6QWsOgUUhTE1NHkv2gIrPl0BAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBIsWRmVeSWpSXmKPExsWy7bCSnK6LtUSywfJZohZPd8xktXgwbxub xeIfz5ks7i/+zGJxaPNWdostV2YzWyw/foDVYv6Rc6wW2w8+YrHY+AIoe3HmXRaL5/PXMVq8 nHWPzWLT42usFg9fhVtc3jWHzaJnw1ZWi7VH7rJbLL1+kcli2aY/TBaLtn5ht2jde4Td4u6e bYwWLW1HmBwkPNbMW8PosePuEkaP60s+MXvsnHWX3WPxnpdMHptWdbJ53Lm2h81j85J6j9aj v1g8+rasYvT41zSX3aPryHU2j8+b5DxOff3MHsAXxWWTkpqTWZZapG+XwJXx6Hg/a8HNHsaK 1mvz2RsYbxZ3MXJySAiYSKza+50NxBYS2M0o8eJcMkRcQmLl70mMELawxMp/z9khahqZJFrX mILYbAI6Et/enwbq5eIQEWhllLi+spMJxGEWmM0i8WPSAVaQKmEBN4m57z+CbWARUJXoe/+G BcTmFbCUuN2zggVig7zE6g0HmEFsTgEriYtTTrBCbLOUeDxjG/sERr4FjAyrGCVTC4pz03OL DQsM81LL9YoTc4tL89L1kvNzNzGCI09Lcwfj9lUf9A4xMnEwHmKU4GBWEuFN2SGSLMSbklhZ lVqUH19UmpNafIhRmoNFSZz3QtfJeCGB9MSS1OzU1ILUIpgsEwenVAOTrIzskwOn3B8sUp9n vHj6/Enm6ptvVtu9iZh8WMldfomYYceFGWETXP9mrH115YjIrJrwyEN+63b73fW6nGEQsCT/ /oEnBVbXlv25oJp7w29X+uy52w+f2ukYF/TyTP6pV6dW2nuoOkZUzJRvXqWjmyQn8tCsfqvv sRDTHeXB3/ZUviubd+030yH/exKzJOMKVb5aTpoyMypcKf7b2Qfnw1KNeT5HrtSKsfS407Pa 1XFlxeI19+6aT+I4cF4qt+lORcj0WMU9zzZcUu811nA7eG9JueKFyeuvbZpc6vjy5ULBk5Yn ee9ynnx2pKhUuOYo9/OZa6+ofFQI/ek0obJqiY7dpGjhyg7Ja6f9BTUT4pVYijMSDbWYi4oT AQtz3+wrAwAA X-CMS-MailID: 20220907063340epcas5p2d7eb2452918dfc593c47f48d05cfb83b X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063340epcas5p2d7eb2452918dfc593c47f48d05cfb83b References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233637_112082_634BC218 X-CRM114-Status: GOOD ( 24.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add VP9 encoder support and necessary registers, V4L2 CIDs, vp9 encoder parameters. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/regs-mfc-v12.h | 8 + .../platform/samsung/s5p-mfc/s5p_mfc_cmd_v6.c | 3 + .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 27 +- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 272 ++++++++++++++++++ .../platform/samsung/s5p-mfc/s5p_mfc_opr.h | 2 + .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 121 ++++++++ 6 files changed, 432 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h index 6c68a45082d0..7cb74a9cb769 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h @@ -12,6 +12,10 @@ #include #include "regs-mfc-v10.h" +/* MFCv12 register definitions*/ +#define S5P_FIMV_E_VP9_OPTION_V12 0xFD90 +#define S5P_FIMV_E_VP9_GOLDEN_FRAME_OPTION_V12 0xFD98 + /* MFCv12 Context buffer sizes */ #define MFC_CTX_BUF_SIZE_V12 (30 * SZ_1K) #define MFC_H264_DEC_CTX_BUF_SIZE_V12 (2 * SZ_1M) @@ -47,4 +51,8 @@ ALIGN((((x + 3) * (y + 3) * 32) \ + (((y * 128) + 2304) * (x + 3) / 4)), 256) +#define ENC_V120_VP9_ME_SIZE(x, y) \ + ((((x * 2) + 3) * ((y * 2) + 3) * 128) \ + + (((y * 256) + 2304) * (x + 1) / 2)) + #endif /*_REGS_MFC_V12_H*/ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v6.c index f8588e52dfc8..d524815cd38a 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_cmd_v6.c @@ -121,6 +121,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx) case S5P_MFC_CODEC_HEVC_ENC: codec_type = S5P_FIMV_CODEC_HEVC_ENC; break; + case S5P_MFC_CODEC_VP9_ENC: + codec_type = S5P_FIMV_CODEC_VP9_ENC; + break; default: codec_type = S5P_FIMV_CODEC_NONE_V6; } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index 088fd1c96b96..870d57bcf346 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -57,7 +57,7 @@ #define MFC_ENC_CAP_PLANE_COUNT 1 #define MFC_ENC_OUT_PLANE_COUNT 2 #define STUFF_BYTE 4 -#define MFC_MAX_CTRLS 128 +#define MFC_MAX_CTRLS 147 #define S5P_MFC_CODEC_NONE -1 #define S5P_MFC_CODEC_H264_DEC 0 @@ -77,6 +77,7 @@ #define S5P_MFC_CODEC_H263_ENC 23 #define S5P_MFC_CODEC_VP8_ENC 24 #define S5P_MFC_CODEC_HEVC_ENC 26 +#define S5P_MFC_CODEC_VP9_ENC 27 #define S5P_MFC_R2H_CMD_EMPTY 0 #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1 @@ -483,6 +484,29 @@ struct s5p_mfc_hevc_enc_params { u8 prepend_sps_pps_to_idr; }; +/** + * struct s5p_mfc_vp9_enc_params - encoding parameters for vp9 + */ +struct s5p_mfc_vp9_enc_params { + u32 rc_framerate; + u8 vp9_profile; + u8 rc_min_qp; + u8 rc_max_qp; + u8 rc_frame_qp; + u8 rc_p_frame_qp; + u8 vp9_goldenframesel; + u8 vp9_gfrefreshperiod; + u8 hier_qp_enable; + u8 hier_qp_layer[3]; + u8 hier_rc_enable; + u32 hier_bit_layer[3]; + u8 num_refs_for_p; + u8 num_hier_layer; + u8 max_partition_depth; + u8 intra_pu_split_disable; + u8 ivf_header; +}; + /* * struct s5p_mfc_enc_params - general encoding parameters */ @@ -521,6 +545,7 @@ struct s5p_mfc_enc_params { struct s5p_mfc_mpeg4_enc_params mpeg4; struct s5p_mfc_vp8_enc_params vp8; struct s5p_mfc_hevc_enc_params hevc; + struct s5p_mfc_vp9_enc_params vp9; } codec; }; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index 26e3ed2e2b6f..f15324e64aec 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -94,6 +94,13 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 1, .versions = MFC_V10_BIT | MFC_V12_BIT, }, + { + .fourcc = V4L2_PIX_FMT_VP9, + .codec_mode = S5P_FIMV_CODEC_VP9_ENC, + .type = MFC_FMT_ENC, + .num_planes = 1, + .versions = MFC_V12_BIT, + }, }; #define NUM_FORMATS ARRAY_SIZE(formats) @@ -1055,6 +1062,174 @@ static struct mfc_control controls[] = { .step = 1, .default_value = 0, }, + { + .id = V4L2_CID_MPEG_VIDEO_VP9_PROFILE, + .type = V4L2_CTRL_TYPE_MENU, + .minimum = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + .maximum = V4L2_MPEG_VIDEO_VP9_PROFILE_2, + .step = 1, + .default_value = V4L2_MPEG_VIDEO_VP9_PROFILE_0, + }, + { + .id = V4L2_CID_CODEC_VP9_I_FRAME_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 1, + .maximum = 255, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_CODEC_VP9_P_FRAME_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 1, + .maximum = 255, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_CODEC_VP9_MAX_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 230, + .maximum = 255, + .step = 1, + .default_value = 255, + }, + { + .id = V4L2_CID_CODEC_VP9_MIN_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 1, + .maximum = 24, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_CODEC_VP9_RC_FRAME_RATE, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 1, + .maximum = (1 << 16) - 1, + .step = 1, + .default_value = 1, + }, + { + .id = V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL, + .type = V4L2_CTRL_TYPE_MENU, + .minimum = V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV, + .maximum = V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_REF_PERIOD, + .step = 1, + .default_value = V4L2_CID_CODEC_VP9_GOLDEN_FRAME_USE_PREV, + }, + { + .id = V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 0, + .maximum = ((1 << 16) - 1), + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES, + .type = V4L2_CTRL_TYPE_MENU, + .minimum = V4L2_CID_CODEC_VP9_1_REF_PFRAME, + .maximum = V4L2_CID_CODEC_VP9_2_REF_PFRAME, + .step = 1, + .default_value = V4L2_CID_CODEC_VP9_1_REF_PFRAME, + }, + { + .id = V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = 0, + .maximum = 2, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH, + .type = V4L2_CTRL_TYPE_MENU, + .minimum = V4L2_CID_CODEC_VP9_0_PARTITION, + .maximum = V4L2_CID_CODEC_VP9_1_PARTITION, + .step = 1, + .default_value = V4L2_CID_CODEC_VP9_0_PARTITION, + }, + { + .id = V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR, + .type = V4L2_CTRL_TYPE_INTEGER, + .minimum = INT_MIN, + .maximum = INT_MAX, + .step = 1, + .default_value = 0, + }, + { + .id = V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER, + .type = V4L2_CTRL_TYPE_BOOLEAN, + .minimum = 0, + .maximum = 1, + .step = 1, + .default_value = 0, + }, { .id = V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, .type = V4L2_CTRL_TYPE_INTEGER, @@ -1791,6 +1966,36 @@ static void __enc_update_hevc_qp_ctrls_range(struct s5p_mfc_ctx *ctx, } } +/* + * Update range of all VP9 quantization parameter controls that depend on the + * V4L2_CID_CODEC_VP9_MIN_QP, V4L2_CID_CODEC_VP9_MAX_QP controls. + */ +static void __enc_update_vp9_qp_ctrls_range(struct s5p_mfc_ctx *ctx, + int min, int max) +{ + static const int __vp9_qp_ctrls[] = { + V4L2_CID_CODEC_VP9_I_FRAME_QP, + V4L2_CID_CODEC_VP9_P_FRAME_QP, + V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP, + V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP, + V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP, + }; + struct v4l2_ctrl *ctrl = NULL; + int i, j; + + for (i = 0; i < ARRAY_SIZE(__vp9_qp_ctrls); i++) { + for (j = 0; j < ARRAY_SIZE(ctx->ctrls); j++) { + if (ctx->ctrls[j]->id == __vp9_qp_ctrls[i]) { + ctrl = ctx->ctrls[j]; + break; + } + } + if (WARN_ON(!ctrl)) + break; + __v4l2_ctrl_modify_range(ctrl, min, max, ctrl->step, min); + } +} + static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl) { struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl); @@ -2194,6 +2399,73 @@ static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_MPEG_VIDEO_PREPEND_SPSPPS_TO_IDR: p->codec.hevc.prepend_sps_pps_to_idr = ctrl->val; break; + case V4L2_CID_MPEG_VIDEO_VP9_PROFILE: + p->codec.vp9.vp9_profile = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_RC_FRAME_RATE: + p->codec.vp9.rc_framerate = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_MIN_QP: + p->codec.vp9.rc_min_qp = ctrl->val; + __enc_update_vp9_qp_ctrls_range(ctx, ctrl->val, + p->codec.vp9.rc_max_qp); + break; + case V4L2_CID_CODEC_VP9_MAX_QP: + p->codec.vp9.rc_max_qp = ctrl->val; + __enc_update_vp9_qp_ctrls_range(ctx, + p->codec.vp9.rc_min_qp, ctrl->val); + break; + case V4L2_CID_CODEC_VP9_I_FRAME_QP: + p->codec.vp9.rc_frame_qp = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_P_FRAME_QP: + p->codec.vp9.rc_p_frame_qp = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_GOLDEN_FRAMESEL: + p->codec.vp9.vp9_goldenframesel = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_GF_REFRESH_PERIOD: + p->codec.vp9.vp9_gfrefreshperiod = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIERARCHY_QP_ENABLE: + p->codec.vp9.hier_qp_enable = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIERARCHY_RC_ENABLE: + p->codec.vp9.hier_rc_enable = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_QP: + p->codec.vp9.hier_qp_layer[0] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_QP: + p->codec.vp9.hier_qp_layer[1] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_QP: + p->codec.vp9.hier_qp_layer[2] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L0_BR: + p->codec.vp9.hier_bit_layer[0] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L1_BR: + p->codec.vp9.hier_bit_layer[1] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIER_CODING_L2_BR: + p->codec.vp9.hier_bit_layer[2] = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_REF_NUMBER_FOR_PFRAMES: + p->codec.vp9.num_refs_for_p = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_HIERARCHICAL_CODING_LAYER: + p->codec.vp9.num_hier_layer = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_MAX_PARTITION_DEPTH: + p->codec.vp9.max_partition_depth = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_DISABLE_INTRA_PU_SPLIT: + p->codec.vp9.intra_pu_split_disable = ctrl->val; + break; + case V4L2_CID_CODEC_VP9_DISABLE_IVF_HEADER: + p->codec.vp9.ivf_header = ctrl->val; + break; default: v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n", ctrl->id, ctrl->val); diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h index 87ac56756a16..a005623e2daa 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h @@ -277,6 +277,8 @@ struct s5p_mfc_regs { void __iomem *e_hevc_lf_beta_offset_div2; /* v10 */ void __iomem *e_hevc_lf_tc_offset_div2; /* v10 */ void __iomem *e_hevc_nal_control; /* v10 */ + void __iomem *e_vp9_options; /* v12 */ + void __iomem *e_vp9_golden_frame_option; /* v12 */ }; struct s5p_mfc_hw_ops { diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index db8ecc2740d7..048950778eee 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -365,6 +365,17 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->chroma_dpb_size + ctx->me_buffer_size)); ctx->bank2.size = 0; break; + case S5P_FIMV_CODEC_VP9_ENC: + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->me_buffer_size = + ALIGN(ENC_V120_VP9_ME_SIZE(lcu_width, lcu_height), 16); + ctx->scratch_buf_size = ALIGN(ctx->scratch_buf_size, 256); + ctx->bank1.size = + ctx->scratch_buf_size + ctx->tmv_buffer_size + + (ctx->pb_count * (ctx->luma_dpb_size + + ctx->chroma_dpb_size + ctx->me_buffer_size)); + ctx->bank2.size = 0; + break; default: break; } @@ -420,6 +431,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx) case S5P_MFC_CODEC_MPEG4_ENC: case S5P_MFC_CODEC_H263_ENC: case S5P_MFC_CODEC_VP8_ENC: + case S5P_FIMV_CODEC_VP9_ENC: ctx->ctx.size = buf_size->other_enc_ctx; break; default: @@ -1654,6 +1666,102 @@ static int s5p_mfc_set_enc_params_hevc(struct s5p_mfc_ctx *ctx) return 0; } +int s5p_mfc_set_enc_params_vp9(struct s5p_mfc_ctx *ctx) +{ + struct s5p_mfc_dev *dev = ctx->dev; + const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; + struct s5p_mfc_enc_params *p = &ctx->enc_params; + struct s5p_mfc_vp9_enc_params *p_vp9 = &p->codec.vp9; + unsigned int reg = 0; + int i; + + mfc_debug_enter(); + + s5p_mfc_set_enc_params(ctx); + + /* profile*/ + reg = 0; + reg |= (p_vp9->vp9_profile); + writel(reg, mfc_regs->e_picture_profile); + + reg = 0; + reg |= ((p_vp9->ivf_header & 0x1) << 12); + reg |= ((p_vp9->hier_qp_enable & 0x1) << 11); + reg |= (p_vp9->max_partition_depth & 0x1) << 3; + reg |= (p_vp9->intra_pu_split_disable & 0x1) << 1; + reg |= (p_vp9->num_refs_for_p - 1) & 0x1; + writel(reg, mfc_regs->e_vp9_options); + + reg = 0; + reg |= (p_vp9->vp9_goldenframesel & 0x1); + reg |= (p_vp9->vp9_gfrefreshperiod & 0xffff) << 1; + writel(reg, mfc_regs->e_vp9_golden_frame_option); + + reg = 0; + if (p_vp9->num_hier_layer) { + reg |= p_vp9->num_hier_layer & 0x3; + writel(reg, mfc_regs->e_num_t_layer); + /* QP value for each layer */ + if (p_vp9->hier_qp_enable) { + for (i = 0; i < (p_vp9->num_hier_layer & 0x3); i++) + writel(p_vp9->hier_qp_layer[i], + mfc_regs->e_hier_qp_layer0 + + i * 4); + } + if (p_vp9->hier_rc_enable) { + for (i = 0; i < (p_vp9->num_hier_layer & 0x3); i++) + writel(p_vp9->hier_bit_layer[i], + mfc_regs->e_hier_bit_rate_layer0 + + i * 4); + } + } + /* number of coding layer should be zero when hierarchical is disable */ + reg |= p_vp9->num_hier_layer; + writel(reg, mfc_regs->e_num_t_layer); + + /* qp */ + writel(0x0, mfc_regs->e_fixed_picture_qp); + if (!p->rc_frame && !p->rc_mb) { + reg = 0; + reg &= ~(0xff << 8); + reg |= (p_vp9->rc_p_frame_qp << 8); + reg &= ~(0xff); + reg |= p_vp9->rc_frame_qp; + writel(reg, mfc_regs->e_fixed_picture_qp); + } + + /* frame rate */ + if (p->rc_frame) { + reg = 0; + reg &= ~(0xffff << 16); + reg |= ((p_vp9->rc_framerate * FRAME_DELTA_DEFAULT) << 16); + reg &= ~(0xffff); + reg |= FRAME_DELTA_DEFAULT; + writel(reg, mfc_regs->e_rc_frame_rate); + } + + /* rate control config. */ + reg = readl(mfc_regs->e_rc_config); + /** macroblock level rate control */ + reg &= ~(0x1 << 8); + reg |= ((p->rc_mb & 0x1) << 8); + writel(reg, mfc_regs->e_rc_config); + + /* max & min value of QP */ + reg = 0; + /** max QP */ + reg &= ~(0xFF << 8); + reg |= (p_vp9->rc_max_qp << 8); + /** min QP */ + reg &= ~(0xFF); + reg |= p_vp9->rc_min_qp; + writel(reg, mfc_regs->e_rc_qp_bound); + + mfc_debug_leave(); + + return 0; +} + /* Initialize decoding */ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) { @@ -1775,6 +1883,8 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx) s5p_mfc_set_enc_params_vp8(ctx); else if (ctx->codec_mode == S5P_FIMV_CODEC_HEVC_ENC) s5p_mfc_set_enc_params_hevc(ctx); + else if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_ENC) + s5p_mfc_set_enc_params_vp9(ctx); else { mfc_err("Unknown codec for encoding (%x).\n", ctx->codec_mode); @@ -2538,6 +2648,17 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) R(e_hevc_lf_tc_offset_div2, S5P_FIMV_E_HEVC_LF_TC_OFFSET_DIV2_V10); R(e_hevc_nal_control, S5P_FIMV_E_HEVC_NAL_CONTROL_V10); + if (!IS_MFCV12(dev)) + goto done; + + /* Initialize registers used in MFC v10 only. + * Also, over-write the registers which have + * a different offset for MFC v10. + */ + + R(e_vp9_options, S5P_FIMV_E_VP9_OPTION_V12); + R(e_vp9_golden_frame_option, S5P_FIMV_E_VP9_GOLDEN_FRAME_OPTION_V12); + done: return &mfc_regs; #undef S5P_MFC_REG_ADDR From patchwork Wed Sep 7 06:47:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968496 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4D47C38145 for ; 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Wed, 7 Sep 2022 15:33:44 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063340epsmtip1b49b24c79ea821c800de80d5bed42025~SgG2SJoC02625726257epsmtip1y; Wed, 7 Sep 2022 06:33:40 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 08/15] media: s5p-mfc: Add YV12 and I420 multiplanar format support Date: Wed, 7 Sep 2022 12:17:08 +0530 Message-Id: <20220907064715.55778-9-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0VTaVBTVxTufXkvCc6EviJtL2lV+qpFkCVRlhuQykyZ+jriFKc/KjKSvglv AgMkmSRYaZmCosgiiwKlIIuylEqpaEwQWUaaYqVAnVJRLEMEhWLZS5C4gNhAov33nXO+76z3 8jlOY1whP1ahZdUKJp7irsObfnF383oWBGWiMcN29HdzCYFGKpq4qPrJQwwNVy/gyHjZwEP6 /jMcVHejg0CVnTcJdOXnBzi69I812ldiwtHDygsATZTe4yLd6B0C3Z/8HN1qKeOikxcNBPqp 08RDtQN9GPpet4yhKsMjHjre3slDprYmgI6ld2IhkG6oaAB0s6kG0AM1Zg59tdTEo6vbJjBa V5/JpYfutHHpyzUp9PHrz3A6V18P6JWj5Tw6q3OASy/oNtLdiwu8cMcDcTtjWCaaVbuyCpky OlYhD6b2fCb9SOrnLxJ7iSUogHJVMAlsMBUaFu71cWy8dQ2U6yEmPtHqCmc0Gsrnw51qZaKW dY1RarTBFKuKjlf5qrw1TIImUSH3VrDaQLFItN3PSvwiLua8roFQVT0Fh01FRiIV1PwBsoAD H5K+sC2vh8gC6/hOZCuAffMW3GaYAWyaK8ZshgXAo4s/vJIcMS9zbIF2AGtPLNslaRjMuF3A WWVxSU9omevhrmJn8giAoxnaVRKHTMOhqXeJtxpYT+6H5p5BbBXj5Bb43bHyNYGAlMD7NTrM Vm4T/PFix1pSBzIQ9hV2rXULyWwH+G1hrZ0UCrvnGwkbXg8nb+h5NiyEE3npdiyHwwtp9hlU sDxVb9fugh39ZdYR+Nbu3GFji4/NvQEWdV9Yo3BIR5izNGanC2BzxUtMwareLnt6CG/PGOwt 0LDgWqN9KzkAZmcM4PlgY+n/Jc4CUA9cWJUmQc5q/FRiBfvlq8vJlAk6sPbcPT5pBqaRf72N AOMDI4B8DuUsiG52ljkJopmkr1i1UqpOjGc1RuBnXeApjvBNmdL6XxRaqdhXIvL19/f3lezw F1NvCwq3AZkTKWe0bBzLqlj1Sx3GdxCmYnEhp9PlS6/rI4aeF0SNPwqIFQ4mT92brE2q0gft UP7+4GDw1J9t4TNRVdKFyH7jyjXL6NbxlfLIrrioqaG0N1LJc09h8U1pWeTcfhdDSn2P8pve JGb3rIC/5XR7cfoej7vZyby5pYOWPM/s9CdhKcYlr92PW4jM6uTrLyRhjfs2vJf0XLL5NT08 P3LyTGXfp3Xq6QbH3PE6twH39+c3d+BAl3M4YNbnRKv5Xc93ZqIWIxr3/jXslnR3n8eMz6EP Lm3bWpK/qd8916X1LSqwteEF8djxSojQm5g+V8otOgBE5r23cr/+LXIi3zjj6RkaNFGxazqT 0fx6tTci42ziLDs3qIcUrolhxB4ctYb5DzeYwWJ3BAAA X-Brightmail-Tracker: H4sIAAAAAAAAAzWRe0hTYRjG+87OzjlbKYc56uui0SzIVZph9lUmQRYHwm50tYsuPVjpdG7d I9JyRcNKl5HL1NBZbE2x01zmpXStsita5go7pd2WmhRbl1Uyalr/PS+/38Pzx0sJJMX4OGp7 xk5WnaFIlxFi3HZLFjKDmQ+TZxZUTUbv6wxC1F1qI1CF14Wh1xUeHNmv1pLI2lEsQJfuNgtR meOxEF1reYOjKx//0nYDjyNXWTVAvedeEYh72ylEPX3r0NP68wTKq6kVoioHT6JKZzuGLnKD GCqv/UoibZODRHyjDaDcow5sIWQspRbA1PFGwDiNbgFz/RxPMhWNvRjDmY8TzMvORoK5ajzE aG//wpmTVjNgfIdLSEbncBKMhwth7n/zkCsCE8QxKWz69t2sOiI2SbzNxFmEqvKfYC9/xi7M BsY2oAMiCtJRMMc9KNABMSWhGwCsqBkghgGEpt/6f1IQNPlc5LCUg8H8sx2kHxD0dPj98wPC D6S0FkCn6TjmPwR0MQ69+mah3wqi18Lbzh+4P+P0FFiUWzI0EUDPhT1GDhuemAgv1zQL/FlE z4Ptha1DXclf522RjcwHgRfACDMYy6o0ylSlJlIVmcHuCdcolJpdGanhyZlKDgz9Tx5WB66Z v4TbAUYBO4CUQCYNSKmTJksCUhT79rPqzET1rnRWYwfjKVw2JqBNdy9RQqcqdrJpLKti1f8p RonGZWM7OrZ6fesjYu7NfmHXc02FMdKDDQfiuIEjvaeykvbRa1Prb56JjuDvPL006nlKv1jL PmxaHE4OvA9Wgeq2oKVtuQWu5U/6KMOV4Ai5fkbagHd/8+Vlk6f2RK254dmY0DA4WuTsHB3f FX26JHHkHM8JS9R1fpro04cL8UtctlmB8nkTom1llfmtaq/Puik4edXcx5tDn1VnxeZYD9+Z 9OjRxfX1UDGpK6y7d8mCW7vt9639OfyWtGzZQ4PpWOWBRS1FcW8Ky92x3f1d0htHwlrF7+RK V7279gG7Yc/Kn3Hfs9z6E6uT8lqoxc/7jhpKfKWZCk2Vr0CbpwsNHW9OsLhDOmS4ZpsiUi5Q axR/AKK23QkuAwAA X-CMS-MailID: 20220907063344epcas5p1bb88aa1275e41bf266ac82e53a88ba2e X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063344epcas5p1bb88aa1275e41bf266ac82e53a88ba2e References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233651_384723_EA30AFC1 X-CRM114-Status: GOOD ( 24.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org YV12 and I420 format (3-plane) support is added. Stride information is added to all formats and planes since it is necessary for YV12/I420 which are different from width. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/regs-mfc-v12.h | 2 + .../platform/samsung/s5p-mfc/regs-mfc-v7.h | 1 + .../platform/samsung/s5p-mfc/regs-mfc-v8.h | 3 + .../platform/samsung/s5p-mfc/s5p_mfc_common.h | 4 + .../platform/samsung/s5p-mfc/s5p_mfc_dec.c | 45 ++++- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 86 +++++++-- .../platform/samsung/s5p-mfc/s5p_mfc_opr.h | 6 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c | 12 +- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 168 +++++++++++++++--- 9 files changed, 281 insertions(+), 46 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h index 7cb74a9cb769..07cb218c0179 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v12.h @@ -30,6 +30,8 @@ #define MFC_VERSION_V12 0xC0 #define MFC_NUM_PORTS_V12 1 #define S5P_FIMV_CODEC_VP9_ENC 27 +#define MFC_CHROMA_PAD_BYTES_V12 256 +#define S5P_FIMV_D_ALIGN_PLANE_SIZE_V12 256 /* Encoder buffer size for MFCv12 */ #define ENC_V120_BASE_SIZE(x, y) \ diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h index 4a7adfdaa359..50f9bf0603c1 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v7.h @@ -24,6 +24,7 @@ #define S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7 0xfa70 #define S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7 0xfa74 +#define S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7 0xfa78 #define S5P_FIMV_E_VP8_OPTIONS_V7 0xfdb0 #define S5P_FIMV_E_VP8_FILTER_OPTIONS_V7 0xfdb4 diff --git a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h index 162e3c7e920f..0ef9eb2dff22 100644 --- a/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h +++ b/drivers/media/platform/samsung/s5p-mfc/regs-mfc-v8.h @@ -17,13 +17,16 @@ #define S5P_FIMV_D_MIN_SCRATCH_BUFFER_SIZE_V8 0xf108 #define S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8 0xf144 #define S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8 0xf148 +#define S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8 0xf14C #define S5P_FIMV_D_MV_BUFFER_SIZE_V8 0xf150 #define S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8 0xf138 #define S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8 0xf13c +#define S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8 0xf140 #define S5P_FIMV_D_FIRST_PLANE_DPB_V8 0xf160 #define S5P_FIMV_D_SECOND_PLANE_DPB_V8 0xf260 +#define S5P_FIMV_D_THIRD_PLANE_DPB_V8 0xf360 #define S5P_FIMV_D_MV_BUFFER_V8 0xf460 #define S5P_FIMV_D_NUM_MV_V8 0xf134 diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h index 870d57bcf346..8f325c8878af 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_common.h @@ -56,6 +56,7 @@ #define MFC_NO_INSTANCE_SET -1 #define MFC_ENC_CAP_PLANE_COUNT 1 #define MFC_ENC_OUT_PLANE_COUNT 2 +#define VB2_MAX_PLANE_COUNT 3 #define STUFF_BYTE 4 #define MFC_MAX_CTRLS 147 @@ -182,6 +183,7 @@ struct s5p_mfc_buf { struct { size_t luma; size_t chroma; + size_t chroma_1; } raw; size_t stream; } cookie; @@ -682,6 +684,7 @@ struct s5p_mfc_ctx { int luma_size; int chroma_size; + int chroma_size_1; int mv_size; unsigned long consumed_stream; @@ -747,6 +750,7 @@ struct s5p_mfc_ctx { size_t scratch_buf_size; int is_10bit; int is_422; + int stride[VB2_MAX_PLANE_COUNT]; }; /* diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c index 411ca1e81a6f..29600b8469d4 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_dec.c @@ -56,6 +56,20 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 2, .versions = MFC_V6PLUS_BITS, }, + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, + { + .fourcc = V4L2_PIX_FMT_YVU420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT + }, { .fourcc = V4L2_PIX_FMT_H264, .codec_mode = S5P_MFC_CODEC_H264_DEC, @@ -359,10 +373,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) /* Set pixelformat to the format in which MFC outputs the decoded frame */ pix_mp->pixelformat = ctx->dst_fmt->fourcc; - pix_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_mp->plane_fmt[1].bytesperline = ctx->stride[1]; pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { /* This is run on OUTPUT The buffer contains compressed image @@ -937,6 +956,9 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { /* Output plane count is 2 - one for Y and one for CbCr */ *plane_count = 2; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + *plane_count = 3; /* Setup buffer count */ if (*buf_count < ctx->pb_count) *buf_count = ctx->pb_count; @@ -955,12 +977,17 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { psize[0] = ctx->luma_size; psize[1] = ctx->chroma_size; - + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + psize[2] = ctx->chroma_size_1; if (IS_MFCV6_PLUS(dev)) alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX]; else alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX]; + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX]; } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && ctx->state == MFCINST_INIT) { psize[0] = ctx->dec_src_buf_size; @@ -994,12 +1021,24 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb) mfc_err("Plane buffer (CAPTURE) is too small\n"); return -EINVAL; } + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + if (vb2_plane_size(vb, 2) < ctx->chroma_size_1) { + mfc_err("Plane buffer (CAPTURE) is too small\n"); + return -EINVAL; + } + } i = vb->index; ctx->dst_bufs[i].b = vbuf; ctx->dst_bufs[i].cookie.raw.luma = vb2_dma_contig_plane_dma_addr(vb, 0); ctx->dst_bufs[i].cookie.raw.chroma = vb2_dma_contig_plane_dma_addr(vb, 1); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + ctx->dst_bufs[i].cookie.raw.chroma_1 = + vb2_dma_contig_plane_dma_addr(vb, 2); + } ctx->dst_bufs_cnt++; } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { if (IS_ERR_OR_NULL(ERR_PTR( diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index f15324e64aec..3eac592f369f 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -59,6 +59,20 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 2, .versions = MFC_V6PLUS_BITS, }, + { + .fourcc = V4L2_PIX_FMT_YUV420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, + { + .fourcc = V4L2_PIX_FMT_YVU420M, + .codec_mode = S5P_MFC_CODEC_NONE, + .type = MFC_FMT_RAW, + .num_planes = 3, + .versions = MFC_V12_BIT, + }, { .fourcc = V4L2_PIX_FMT_H264, .codec_mode = S5P_MFC_CODEC_H264_ENC, @@ -1368,14 +1382,20 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; - unsigned long src_y_addr, src_c_addr, dst_addr; + unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr; unsigned int dst_size; src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0); src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + src_c_1_addr = + vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 2); + else + src_c_1_addr = 0; s5p_mfc_hw_call(dev->mfc_ops, set_enc_frame_buffer, ctx, - src_y_addr, src_c_addr); + src_y_addr, src_c_addr, src_c_1_addr); dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); dst_addr = vb2_dma_contig_plane_dma_addr(&dst_mb->b->vb2_buf, 0); @@ -1390,8 +1410,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) { struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *mb_entry; - unsigned long enc_y_addr = 0, enc_c_addr = 0; - unsigned long mb_y_addr, mb_c_addr; + unsigned long enc_y_addr = 0, enc_c_addr = 0, enc_c_1_addr = 0; + unsigned long mb_y_addr, mb_c_addr, mb_c_1_addr; int slice_type; unsigned int strm_size; @@ -1403,14 +1423,21 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT)); if (slice_type >= 0) { s5p_mfc_hw_call(dev->mfc_ops, get_enc_frame_buffer, ctx, - &enc_y_addr, &enc_c_addr); + &enc_y_addr, &enc_c_addr, &enc_c_1_addr); list_for_each_entry(mb_entry, &ctx->src_queue, list) { mb_y_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 0); mb_c_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 1); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + mb_c_1_addr = vb2_dma_contig_plane_dma_addr + (&mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + if ((enc_y_addr == mb_y_addr) + && (enc_c_addr == mb_c_addr) + && (enc_c_1_addr == mb_c_1_addr)) { list_del(&mb_entry->list); ctx->src_queue_cnt--; vb2_buffer_done(&mb_entry->b->vb2_buf, @@ -1423,8 +1450,15 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) &mb_entry->b->vb2_buf, 0); mb_c_addr = vb2_dma_contig_plane_dma_addr( &mb_entry->b->vb2_buf, 1); - if ((enc_y_addr == mb_y_addr) && - (enc_c_addr == mb_c_addr)) { + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + mb_c_1_addr = vb2_dma_contig_plane_dma_addr( + &mb_entry->b->vb2_buf, 2); + else + mb_c_1_addr = 0; + if ((enc_y_addr == mb_y_addr) + && (enc_c_addr == mb_c_addr) + && (enc_c_1_addr == mb_c_1_addr)) { list_del(&mb_entry->list); ctx->ref_queue_cnt--; vb2_buffer_done(&mb_entry->b->vb2_buf, @@ -1548,10 +1582,15 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc; pix_fmt_mp->num_planes = ctx->src_fmt->num_planes; - pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1]; pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } } else { mfc_err("invalid buf type\n"); return -EINVAL; @@ -1635,9 +1674,14 @@ static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f) s5p_mfc_hw_call(dev->mfc_ops, enc_calc_src_size, ctx); pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; - pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[0].bytesperline = ctx->stride[0]; pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; - pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; + pix_fmt_mp->plane_fmt[1].bytesperline = ctx->stride[1]; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + pix_fmt_mp->plane_fmt[2].bytesperline = ctx->stride[2]; + pix_fmt_mp->plane_fmt[2].sizeimage = ctx->chroma_size_1; + } ctx->src_bufs_cnt = 0; ctx->output_state = QUEUE_FREE; @@ -2678,10 +2722,16 @@ static int s5p_mfc_queue_setup(struct vb2_queue *vq, psize[0] = ctx->luma_size; psize[1] = ctx->chroma_size; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + psize[2] = ctx->chroma_size_1; if (IS_MFCV6_PLUS(dev)) { alloc_devs[0] = ctx->dev->mem_dev[BANK_L_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_L_CTX]; + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + alloc_devs[2] = ctx->dev->mem_dev[BANK_L_CTX]; } else { alloc_devs[0] = ctx->dev->mem_dev[BANK_R_CTX]; alloc_devs[1] = ctx->dev->mem_dev[BANK_R_CTX]; @@ -2720,6 +2770,10 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb) vb2_dma_contig_plane_dma_addr(vb, 0); ctx->src_bufs[i].cookie.raw.chroma = vb2_dma_contig_plane_dma_addr(vb, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + ctx->src_bufs[i].cookie.raw.chroma_1 = + vb2_dma_contig_plane_dma_addr(vb, 2); ctx->src_bufs_cnt++; } else { mfc_err("invalid queue type: %d\n", vq->type); @@ -2757,6 +2811,12 @@ static int s5p_mfc_buf_prepare(struct vb2_buffer *vb) mfc_err("plane size is too small for output\n"); return -EINVAL; } + if ((ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) && + (vb2_plane_size(vb, 2) < ctx->chroma_size_1)) { + mfc_err("plane size is too small for output\n"); + return -EINVAL; + } } else { mfc_err("invalid queue type: %d\n", vq->type); return -EINVAL; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h index a005623e2daa..700704985c26 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr.h @@ -295,9 +295,11 @@ struct s5p_mfc_hw_ops { int (*set_enc_stream_buffer)(struct s5p_mfc_ctx *ctx, unsigned long addr, unsigned int size); void (*set_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr); + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr); void (*get_enc_frame_buffer)(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr); + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr); void (*try_run)(struct s5p_mfc_dev *dev); void (*clear_int_flags)(struct s5p_mfc_dev *dev); int (*get_dspl_y_adr)(struct s5p_mfc_dev *dev); diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c index 28a06dc343fd..fcfaf125a5a1 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v5.c @@ -516,7 +516,8 @@ static int s5p_mfc_set_enc_stream_buffer_v5(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr) + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; @@ -525,7 +526,8 @@ static void s5p_mfc_set_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_get_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr) + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; @@ -1210,7 +1212,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) if (list_empty(&ctx->src_queue)) { /* send null frame */ s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], - dev->dma_base[BANK_R_CTX]); + dev->dma_base[BANK_R_CTX], 0); src_mb = NULL; } else { src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, @@ -1220,7 +1222,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) /* send null frame */ s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK_R_CTX], - dev->dma_base[BANK_R_CTX]); + dev->dma_base[BANK_R_CTX], 0); ctx->state = MFCINST_FINISHING; } else { src_y_addr = vb2_dma_contig_plane_dma_addr( @@ -1228,7 +1230,7 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) src_c_addr = vb2_dma_contig_plane_dma_addr( &src_mb->b->vb2_buf, 1); s5p_mfc_set_enc_frame_buffer_v5(ctx, src_y_addr, - src_c_addr); + src_c_addr, 0); if (src_mb->flags & MFC_BUF_FLAG_EOS) ctx->state = MFCINST_FINISHING; } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index 048950778eee..eecefcfc683b 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -508,16 +508,43 @@ static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6); ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6); + ctx->chroma_size_1 = 0; mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n" "buffer dimensions: %dx%d\n", ctx->img_width, ctx->img_height, ctx->buf_width, ctx->buf_height); - ctx->luma_size = calc_plane(ctx->img_width, ctx->img_height); - ctx->chroma_size = calc_plane(ctx->img_width, (ctx->img_height >> 1)); + switch (ctx->dst_fmt->fourcc) { + case V4L2_PIX_FMT_NV12M: + case V4L2_PIX_FMT_NV21M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height); + ctx->chroma_size = calc_plane(ctx->stride[1], + (ctx->img_height / 2)); + break; + case V4L2_PIX_FMT_YUV420M: + case V4L2_PIX_FMT_YVU420M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->stride[2] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12MT_HALIGN_V6); + ctx->luma_size = calc_plane(ctx->stride[0], ctx->img_height); + ctx->chroma_size = calc_plane(ctx->stride[1], + (ctx->img_height / 2)); + ctx->chroma_size_1 = calc_plane(ctx->stride[2], + (ctx->img_height / 2)); + break; + } + if (IS_MFCV8_PLUS(ctx->dev)) { /* MFCv8 needs additional 64 bytes for luma,chroma dpb*/ ctx->luma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; ctx->chroma_size += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; + ctx->chroma_size_1 += S5P_FIMV_D_ALIGN_PLANE_SIZE_V8; } if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || @@ -548,15 +575,53 @@ static void s5p_mfc_enc_calc_src_size_v6(struct s5p_mfc_ctx *ctx) mb_width = MB_WIDTH(ctx->img_width); mb_height = MB_HEIGHT(ctx->img_height); - ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN_V6); - ctx->luma_size = ALIGN((mb_width * mb_height) * 256, 256); - ctx->chroma_size = ALIGN((mb_width * mb_height) * 128, 256); - - /* MFCv7 needs pad bytes for Luma and Chroma */ - if (IS_MFCV7_PLUS(ctx->dev)) { + if (IS_MFCV12(ctx->dev)) { + switch (ctx->src_fmt->fourcc) { + case V4L2_PIX_FMT_NV12M: + case V4L2_PIX_FMT_NV21M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->luma_size = ctx->stride[0] * + ALIGN(ctx->img_height, 16); + ctx->chroma_size = ctx->stride[0] * + ALIGN(ctx->img_height / 2, 16); + break; + case V4L2_PIX_FMT_YUV420M: + case V4L2_PIX_FMT_YVU420M: + ctx->stride[0] = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[1] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[2] = ALIGN(ctx->img_width / 2, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->luma_size = ctx->stride[0] * + ALIGN(ctx->img_height, 16); + ctx->chroma_size = ctx->stride[1] * + ALIGN(ctx->img_height / 2, 16); + ctx->chroma_size_1 = ctx->stride[2] * + ALIGN(ctx->img_height / 2, 16); + break; + } ctx->luma_size += MFC_LUMA_PAD_BYTES_V7; - ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V7; + ctx->chroma_size += MFC_CHROMA_PAD_BYTES_V12; + ctx->chroma_size_1 += MFC_CHROMA_PAD_BYTES_V12; + } else { + ctx->buf_width = ALIGN(ctx->img_width, + S5P_FIMV_NV12M_HALIGN_V6); + ctx->stride[0] = ctx->buf_width; + ctx->stride[1] = ctx->buf_width; + ctx->luma_size = ALIGN((mb_width * mb_height) * 256, 256); + ctx->chroma_size = ALIGN((mb_width * mb_height) * 128, 256); + ctx->chroma_size_1 = 0; + /* MFCv7 needs pad bytes for Luma and Chroma */ + if (IS_MFCV7_PLUS(ctx->dev)) { + ctx->luma_size += MFC_LUMA_PAD_BYTES_V7; + ctx->chroma_size += MFC_LUMA_PAD_BYTES_V7; + } } + } /* Set registers for decoding stream buffer */ @@ -602,15 +667,21 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) writel(ctx->total_dpb_count, mfc_regs->d_num_dpb); writel(ctx->luma_size, mfc_regs->d_first_plane_dpb_size); writel(ctx->chroma_size, mfc_regs->d_second_plane_dpb_size); - + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->chroma_size_1, mfc_regs->d_third_plane_dpb_size); writel(buf_addr1, mfc_regs->d_scratch_buffer_addr); writel(ctx->scratch_buf_size, mfc_regs->d_scratch_buffer_size); if (IS_MFCV8_PLUS(dev)) { - writel(ctx->img_width, + writel(ctx->stride[0], mfc_regs->d_first_plane_dpb_stride_size); - writel(ctx->img_width, + writel(ctx->stride[1], mfc_regs->d_second_plane_dpb_stride_size); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->stride[2], + mfc_regs->d_third_plane_dpb_stride_size); } buf_addr1 += ctx->scratch_buf_size; @@ -639,6 +710,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) ctx->dst_bufs[i].cookie.raw.chroma); writel(ctx->dst_bufs[i].cookie.raw.chroma, mfc_regs->d_second_plane_dpb + i * 4); + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + mfc_debug(2, "\tChroma_1 %d: %zx\n", i, + ctx->dst_bufs[i].cookie.raw.chroma_1); + writel(ctx->dst_bufs[i].cookie.raw.chroma_1, + mfc_regs->d_third_plane_dpb + i * 4); + } } if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC || ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC || @@ -697,20 +775,24 @@ static int s5p_mfc_set_enc_stream_buffer_v6(struct s5p_mfc_ctx *ctx, } static void s5p_mfc_set_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, - unsigned long y_addr, unsigned long c_addr) + unsigned long y_addr, unsigned long c_addr, + unsigned long c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; writel(y_addr, mfc_regs->e_source_first_plane_addr); writel(c_addr, mfc_regs->e_source_second_plane_addr); + writel(c_1_addr, mfc_regs->e_source_third_plane_addr); mfc_debug(2, "enc src y buf addr: 0x%08lx\n", y_addr); mfc_debug(2, "enc src c buf addr: 0x%08lx\n", c_addr); + mfc_debug(2, "enc src cr buf addr: 0x%08lx\n", c_1_addr); } static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, - unsigned long *y_addr, unsigned long *c_addr) + unsigned long *y_addr, unsigned long *c_addr, + unsigned long *c_1_addr) { struct s5p_mfc_dev *dev = ctx->dev; const struct s5p_mfc_regs *mfc_regs = dev->mfc_regs; @@ -718,12 +800,17 @@ static void s5p_mfc_get_enc_frame_buffer_v6(struct s5p_mfc_ctx *ctx, *y_addr = readl(mfc_regs->e_encoded_source_first_plane_addr); *c_addr = readl(mfc_regs->e_encoded_source_second_plane_addr); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + *c_1_addr = readl(mfc_regs->e_encoded_source_third_plane_addr); + else + *c_1_addr = 0; enc_recon_y_addr = readl(mfc_regs->e_recon_luma_dpb_addr); enc_recon_c_addr = readl(mfc_regs->e_recon_chroma_dpb_addr); mfc_debug(2, "recon y addr: 0x%08lx y_addr: 0x%08lx\n", enc_recon_y_addr, *y_addr); - mfc_debug(2, "recon c addr: 0x%08lx\n", enc_recon_c_addr); + mfc_debug(2, "recon c addr: 0x%08lx c_addr: 0x%08lx\n", enc_recon_c_addr, *c_addr); } /* Set encoding ref & codec buffer */ @@ -900,6 +987,20 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx) writel(reg, mfc_regs->e_enc_options); /* 0: NV12(CbCr), 1: NV21(CrCb) */ writel(0x0, mfc_regs->pixel_format); + } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) { + /* 0: Linear, 1: 2D tiled*/ + reg = readl(mfc_regs->e_enc_options); + reg &= ~(0x1 << 7); + writel(reg, mfc_regs->e_enc_options); + /* 2: YV12(CrCb), 3: I420(CrCb) */ + writel(0x2, mfc_regs->pixel_format); + } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M) { + /* 0: Linear, 1: 2D tiled*/ + reg = readl(mfc_regs->e_enc_options); + reg &= ~(0x1 << 7); + writel(reg, mfc_regs->e_enc_options); + /* 2: YV12(CrCb), 3: I420(CrCb) */ + writel(0x3, mfc_regs->pixel_format); } /* memory structure recon. frame */ @@ -1806,8 +1907,12 @@ static int s5p_mfc_init_decode_v6(struct s5p_mfc_ctx *ctx) else writel(reg, mfc_regs->d_dec_options); - /* 0: NV12(CbCr), 1: NV21(CrCb) */ - if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) + /* 0: NV12(CbCr), 1: NV21(CrCb), 2: YV12(CrCb), 3: I420(CbCr) */ + if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YUV420M) + writel(0x3, mfc_regs->pixel_format); + else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(0x2, mfc_regs->pixel_format); + else if (ctx->dst_fmt->fourcc == V4L2_PIX_FMT_NV21M) writel(0x1, mfc_regs->pixel_format); else writel(0x0, mfc_regs->pixel_format); @@ -1893,8 +1998,12 @@ static int s5p_mfc_init_encode_v6(struct s5p_mfc_ctx *ctx) /* Set stride lengths for v7 & above */ if (IS_MFCV7_PLUS(dev)) { - writel(ctx->img_width, mfc_regs->e_source_first_plane_stride); - writel(ctx->img_width, mfc_regs->e_source_second_plane_stride); + writel(ctx->stride[0], mfc_regs->e_source_first_plane_stride); + writel(ctx->stride[1], mfc_regs->e_source_second_plane_stride); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + writel(ctx->stride[2], + mfc_regs->e_source_third_plane_stride); } writel(ctx->inst_no, mfc_regs->instance_id); @@ -2003,7 +2112,7 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_buf *dst_mb; struct s5p_mfc_buf *src_mb; - unsigned long src_y_addr, src_c_addr, dst_addr; + unsigned long src_y_addr, src_c_addr, src_c_1_addr, dst_addr; /* unsigned int src_y_size, src_c_size; */ @@ -2021,22 +2130,29 @@ static inline int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) if (list_empty(&ctx->src_queue)) { /* send null frame */ - s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0); + s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0); src_mb = NULL; } else { src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); src_mb->flags |= MFC_BUF_FLAG_USED; if (src_mb->b->vb2_buf.planes[0].bytesused == 0) { - s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0); + s5p_mfc_set_enc_frame_buffer_v6(ctx, 0, 0, 0); ctx->state = MFCINST_FINISHING; } else { src_y_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 0); src_c_addr = vb2_dma_contig_plane_dma_addr(&src_mb->b->vb2_buf, 1); + if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_YUV420M || + ctx->src_fmt->fourcc == V4L2_PIX_FMT_YVU420M) + src_c_1_addr = vb2_dma_contig_plane_dma_addr + (&src_mb->b->vb2_buf, 2); + else + src_c_1_addr = 0; mfc_debug(2, "enc src y addr: 0x%08lx\n", src_y_addr); mfc_debug(2, "enc src c addr: 0x%08lx\n", src_c_addr); - s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, src_c_addr); + s5p_mfc_set_enc_frame_buffer_v6(ctx, src_y_addr, + src_c_addr, src_c_1_addr); if (src_mb->flags & MFC_BUF_FLAG_EOS) ctx->state = MFCINST_FINISHING; } @@ -2562,6 +2678,8 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) S5P_FIMV_E_ENCODED_SOURCE_FIRST_ADDR_V7); R(e_encoded_source_second_plane_addr, S5P_FIMV_E_ENCODED_SOURCE_SECOND_ADDR_V7); + R(e_encoded_source_third_plane_addr, + S5P_FIMV_E_ENCODED_SOURCE_THIRD_ADDR_V7); R(e_vp8_options, S5P_FIMV_E_VP8_OPTIONS_V7); if (!IS_MFCV8_PLUS(dev)) @@ -2576,16 +2694,20 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) R(d_cpb_buffer_offset, S5P_FIMV_D_CPB_BUFFER_OFFSET_V8); R(d_first_plane_dpb_size, S5P_FIMV_D_FIRST_PLANE_DPB_SIZE_V8); R(d_second_plane_dpb_size, S5P_FIMV_D_SECOND_PLANE_DPB_SIZE_V8); + R(d_third_plane_dpb_size, S5P_FIMV_D_THIRD_PLANE_DPB_SIZE_V8); R(d_scratch_buffer_addr, S5P_FIMV_D_SCRATCH_BUFFER_ADDR_V8); R(d_scratch_buffer_size, S5P_FIMV_D_SCRATCH_BUFFER_SIZE_V8); R(d_first_plane_dpb_stride_size, S5P_FIMV_D_FIRST_PLANE_DPB_STRIDE_SIZE_V8); R(d_second_plane_dpb_stride_size, S5P_FIMV_D_SECOND_PLANE_DPB_STRIDE_SIZE_V8); + R(d_third_plane_dpb_stride_size, + S5P_FIMV_D_THIRD_PLANE_DPB_STRIDE_SIZE_V8); R(d_mv_buffer_size, S5P_FIMV_D_MV_BUFFER_SIZE_V8); R(d_num_mv, S5P_FIMV_D_NUM_MV_V8); R(d_first_plane_dpb, S5P_FIMV_D_FIRST_PLANE_DPB_V8); R(d_second_plane_dpb, S5P_FIMV_D_SECOND_PLANE_DPB_V8); + R(d_third_plane_dpb, S5P_FIMV_D_THIRD_PLANE_DPB_V8); R(d_mv_buffer, S5P_FIMV_D_MV_BUFFER_V8); R(d_init_buffer_options, S5P_FIMV_D_INIT_BUFFER_OPTIONS_V8); R(d_available_dpb_flag_lower, S5P_FIMV_D_AVAILABLE_DPB_FLAG_LOWER_V8); From patchwork Wed Sep 7 06:47:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) 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[182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20220907063348epsmtrp190de2606b8f9671f6d3f4d7303682145~SgG93sh0K0507305073epsmtrp1E; Wed, 7 Sep 2022 06:33:48 +0000 (GMT) X-AuditID: b6c32a4b-e33fb7000000d32c-a4-63183c06c377 Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id EC.DC.14392.C4B38136; Wed, 7 Sep 2022 15:33:48 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063344epsmtip1929229c3dfbd42a64dc308759b19a404~SgG6Vcsse2625726257epsmtip1z; Wed, 7 Sep 2022 06:33:44 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 09/15] media: s5p-mfc: Add support for rate controls in MFCv12 Date: Wed, 7 Sep 2022 12:17:09 +0530 Message-Id: <20220907064715.55778-10-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTeVBTVxTG5+blvRdgwryJtL3FCvShreyJQLwotM5o6WuxHabMtLQzlcbk FRBIQhKqbdksBVpGcCN1QCAWsDjIIpGwFTDQuAxVpwjIaI0iS1kUEDCojV0SAu1/v3POd865 8917eZhghHDnJco1rEouSaYJZ27LLz6+AUQ4lAoX+gLQRFsJjkYqWghU9XSSg+5VLXFR73kD iZoHT2Ko5rIRRzrTdRy19oxyUdOUrdpfYuaiSV0DQNOldwmkH7uJo/szH6GBjjICHTpnwFG9 yUyi08P9HPST/jkHVRoekyi3y0Qic2cLQN/mmTg7IFNXUQeYNnM1YIarFzGmvdRMMlWd0xxG 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Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In MFCv12, the rc configs are changed with support for CBR loose, CBR tight and Variable Bitrate (VBR) added. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 22 +++++++++++++++---- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h | 1 + 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index eecefcfc683b..c0b8434812e0 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -1039,10 +1039,24 @@ static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx) /* reaction coefficient */ if (p->rc_frame) { - if (p->rc_reaction_coeff < TIGHT_CBR_MAX) /* tight CBR */ - writel(1, mfc_regs->e_rc_mode); - else /* loose CBR */ - writel(2, mfc_regs->e_rc_mode); + if (IS_MFCV12(dev)) { + /* loose CBR */ + if (p->rc_reaction_coeff < LOOSE_CBR_MAX) + writel(1, mfc_regs->e_rc_mode); + /* tight CBR */ + else if (p->rc_reaction_coeff < TIGHT_CBR_MAX) + writel(0, mfc_regs->e_rc_mode); + /* VBR */ + else + writel(2, mfc_regs->e_rc_mode); + } else { + /* tight CBR */ + if (p->rc_reaction_coeff < TIGHT_CBR_MAX) + writel(1, mfc_regs->e_rc_mode); + /* loose CBR */ + else + writel(2, mfc_regs->e_rc_mode); + } } /* seq header ctrl */ diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h index 30269f3e68e8..24752a712fbf 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.h @@ -40,6 +40,7 @@ #define ENC_H264_LEVEL_MAX 42 #define ENC_MPEG4_VOP_TIME_RES_MAX ((1 << 16) - 1) #define FRAME_DELTA_H264_H263 1 +#define LOOSE_CBR_MAX 5 #define TIGHT_CBR_MAX 10 #define ENC_HEVC_RC_FRAME_RATE_MAX ((1 << 16) - 1) #define ENC_HEVC_QP_INDEX_MIN -12 From patchwork Wed Sep 7 06:47:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D8D9C38145 for ; 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Wed, 7 Sep 2022 15:33:52 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063348epsmtip1175500c4c56e238da9991a56fd227f41~SgG98Bvrg2482524825epsmtip1k; Wed, 7 Sep 2022 06:33:48 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 10/15] media: s5p-mfc: Add support for UHD encoding. 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Added corresponding support to set recommended profile and level for H264 in UHD scenario. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c | 9 ++++++--- .../media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 12 ++++++++++++ 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index 3eac592f369f..119e55c6f759 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -1627,9 +1627,12 @@ static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f) mfc_err("Unsupported format by this MFC version.\n"); return -EINVAL; } - - v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1, - &pix_fmt_mp->height, 4, 1080, 1, 0); + if (IS_MFCV12(dev)) + v4l_bound_align_image(&pix_fmt_mp->width, 8, 3840, 1, + &pix_fmt_mp->height, 4, 2160, 1, 0); + else + v4l_bound_align_image(&pix_fmt_mp->width, 8, 1920, 1, + &pix_fmt_mp->height, 4, 1080, 1, 0); } else { mfc_err("invalid buf type\n"); return -EINVAL; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index c0b8434812e0..db06e3387d14 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -1118,6 +1118,18 @@ static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx) reg |= ((p->num_b_frame & 0x3) << 16); writel(reg, mfc_regs->e_gop_config); + /* UHD encoding case */ + if ((ctx->img_width == 3840) && ctx->img_height == 2160) { + if (p_h264->level < 51) { + mfc_debug(2, "Set Level 5.1 for UHD\n"); + p_h264->level = 51; + } + if (p_h264->profile != 0x2) { + mfc_debug(2, "Set High profile for UHD\n"); + p_h264->profile = 0x2; + } + } + /* profile & level */ reg = 0; /** level */ From patchwork Wed Sep 7 06:47:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit 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20220907063352epsmtip10ceff6624ed0d28849c7b02bf8fa426c~SgHBQQTHf2639226392epsmtip1p; Wed, 7 Sep 2022 06:33:52 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 11/15] media: s5p-mfc: Add support for DMABUF for encoder Date: Wed, 7 Sep 2022 12:17:11 +0530 Message-Id: <20220907064715.55778-12-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: 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<20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233715_873747_39A9803D X-CRM114-Status: GOOD ( 19.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add dmabuf support for mfc encoder Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../media/platform/samsung/s5p-mfc/s5p_mfc.c | 4 ++-- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 21 +++++++++++-------- 2 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c index c483a95d5e92..2987f8984553 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc.c @@ -850,7 +850,7 @@ static int s5p_mfc_open(struct file *file) q->io_modes = VB2_MMAP; q->ops = get_dec_queue_ops(); } else if (vdev == dev->vfd_enc) { - q->io_modes = VB2_MMAP | VB2_USERPTR; + q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; q->ops = get_enc_queue_ops(); } else { ret = -ENOENT; @@ -877,7 +877,7 @@ static int s5p_mfc_open(struct file *file) q->io_modes = VB2_MMAP; q->ops = get_dec_queue_ops(); } else if (vdev == dev->vfd_enc) { - q->io_modes = VB2_MMAP | VB2_USERPTR; + q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF; q->ops = get_enc_queue_ops(); } else { ret = -ENOENT; diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index 119e55c6f759..404bce3641b9 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -1704,9 +1704,10 @@ static int vidioc_reqbufs(struct file *file, void *priv, struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); int ret = 0; - /* if memory is not mmp or userptr return error */ + /* if memory is not mmp or userptr or dmabuf return error */ if ((reqbufs->memory != V4L2_MEMORY_MMAP) && - (reqbufs->memory != V4L2_MEMORY_USERPTR)) + (reqbufs->memory != V4L2_MEMORY_USERPTR) && + (reqbufs->memory != V4L2_MEMORY_DMABUF)) return -EINVAL; if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { if (reqbufs->count == 0) { @@ -1783,9 +1784,10 @@ static int vidioc_querybuf(struct file *file, void *priv, struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); int ret = 0; - /* if memory is not mmp or userptr return error */ + /* if memory is not mmp or userptr or dmabuf return error */ if ((buf->memory != V4L2_MEMORY_MMAP) && - (buf->memory != V4L2_MEMORY_USERPTR)) + (buf->memory != V4L2_MEMORY_USERPTR) && + (buf->memory != V4L2_MEMORY_DMABUF)) return -EINVAL; if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { if (ctx->state != MFCINST_GOT_INST) { @@ -2841,11 +2843,12 @@ static int s5p_mfc_start_streaming(struct vb2_queue *q, unsigned int count) S5P_MFC_R2H_CMD_SEQ_DONE_RET, 0); } - - if (ctx->src_bufs_cnt < ctx->pb_count) { - mfc_err("Need minimum %d OUTPUT buffers\n", - ctx->pb_count); - return -ENOBUFS; + if (q->memory != V4L2_MEMORY_DMABUF) { + if (ctx->src_bufs_cnt < ctx->pb_count) { + mfc_err("Need minimum %d OUTPUT buffers\n", + ctx->pb_count); + return -ENOBUFS; + } } } From patchwork Wed Sep 7 06:47:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE664ECAAD3 for ; Wed, 7 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20220907063404epsmtrp235ce1895f0b8d808325c34056360a2d9~SgHMbYBbb1916519165epsmtrp2c; Wed, 7 Sep 2022 06:34:04 +0000 (GMT) X-AuditID: b6c32a4a-a5bff7000000d0d2-10-63183c26a31a Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 28.EC.14392.C5B38136; Wed, 7 Sep 2022 15:34:04 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063400epsmtip19c583cdf2873d408d03ccb3d80d3a342~SgHJIFjOE2638126381epsmtip1L; Wed, 7 Sep 2022 06:34:00 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 13/15] media: s5p-mfc: Load firmware for each run in MFCv12. Date: Wed, 7 Sep 2022 12:17:13 +0530 Message-Id: <20220907064715.55778-14-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTa1BTRxTHuzc3D+iEuQIdVijK3L5GEEhiki6vVlvGXvsS61Rbx4ppcicg IYm5QUqdIo8CNkArDHYAEQVCqbxUJDS8BoS0OAiODAj90Eh4KEVHMaZQpojThED77XfO+e/+ z57d5bG8bRx/XqJaT+vUMhXJ8cTb+re9Efp6NJQLcscl6J65jI1slW0cVLM8h6HJGgeO+q6Z uKh17BwL1Q30stEFyy02+uX6NI6u/umsjpRZcTR3oRmg+fK7HNQyM85GUw8OotGOCg4quGJi oyaLlYtqJ0Yw9FPLMwxVm/7iopxuCxdZu9oA+jbXgu2EVGNlI6DMViOgJoxPWVR7uZVL1XTN Y1RL/Xcc6o/xLg51zXiKyvn1H5z6vrUeUM+zznMpg2WCQzlatlCDiw5unNehpOgEWqagdUG0 Wq5RJKqVMeQH++PfjZdIBcJQYQR6kwxSy5LpGDL2w7jQ3Ykq5xjIoBMyVYozFSdjGDL8rWid JkVPByVoGH0MSWsVKq1YG8bIkpkUtTJMTesjhQKBSOIUHk1KuF9cjGs7uV/ZH/ZwM0AtxwA8 eJAQQ1NhHcvF3kQngPfG+Abg6eSnANrmzBx3sARgbVYpvrFi5ceNQjeAzxqmcHeQjcEzs1lr Kg6xHS4t3Fzz8CUyAZw5rXeJWEQ2Dq1DK1xXwYfYB3uGrJiLceI1aLt9ERgAj8cnIuHg79Fu t62w4UrvWn8ezvRIyQ22ax9I5HnAu4/s64eIhQU1q2w3+8AHA61cN/tDx+PudY0STjqygZu1 8HxGK+bmt2HvWAXu8mUR2+DljnB3OhCeHWxek7AIL1i4Mrsu50Nz5QaTsHroxroVhHcemdZb oGC72QjcQykEcLG0DZwBW8r/t7gIQD3YTGuZZCXNSLQiNZ36363JNcktYO2pB79vBlO2J2F9 AOOBPgB5LNKXrzD7yr35Clna17ROE69LUdFMH5A451fE8n9JrnH+FbU+XiiOEIilUqk4YodU SPrxS0KA3JtQyvR0Ek1rad3GOozn4Z+BlZoTVY1VryZW9C1v5WV+kT+/+beVDvNHMz90l90K UBt9Mm21nqpsr02HTWX9UcYZ/tjBv40FuY5hbKBxb/Cn6XdMVfagkyWfR64+4emyR4f1j/M9 A68f2DW5cPrlq4dWyZs0FITEiNJ37qt7kRy2TDcsHN17qencdGoUMF/afntE2bQkDjzcw0wV Tcwe6+/Md4y0Fi0G7irWPNeIDKOm49W28MnlpvksyeWonz/xWD7yTqDcuONAM9qkCz2e0J22 58Q3Ke2rC6mGL+2nZhUBomU63NKcExlwUp6nE70QO1N15LP0Vz5uvC98+J5fmnR3u9fK/jw/ Y8h4sz02PPTYor0ujsSZBJkwmKVjZP8CD4vUdXMEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprBIsWRmVeSWpSXmKPExsWy7bCSnG6MtUSywaHXvBZPd8xktXgwbxub xeIfz5ks7i/+zGJxaPNWdostV2YzWyw/foDVYv6Rc6wW2w8+YrHY+AIoe3HmXRaL5/PXMVq8 nHWPzWLT42usFg9fhVtc3jWHzaJnw1ZWi7VH7rJbLL1+kcli2aY/TBaLtn5ht2jde4Td4u6e bYwWLW1HmBwkPNbMW8PosePuEkaP60s+MXvsnHWX3WPxnpdMHptWdbJ53Lm2h81j85J6j9aj v1g8+rasYvT41zSX3aPryHU2j8+b5DxOff3MHsAXxWWTkpqTWZZapG+XwJXxbNIkloLd7BUf X+9nb2BcytbFyMkhIWAi8XvaDiCbi0NIYDejxPZnPYwQCQmJlb8nQdnCEiv/PWeHKGpkkjhy 8yc7SIJNQEfi2/vTYN0iAq2MEtdXdjKBOMwCs1kkfkw6wApSJSzgL7Hp7R2wUSwCqhIPLiwA sjk4eAWsJE7dsIHYIC+xesMBZhCbEyh8ccoJsFYhAUuJxzO2sU9g5FvAyLCKUTK1oDg3PbfY sMAwL7Vcrzgxt7g0L10vOT93EyM48rQ0dzBuX/VB7xAjEwfjIUYJDmYlEd6UHSLJQrwpiZVV qUX58UWlOanFhxilOViUxHkvdJ2MFxJITyxJzU5NLUgtgskycXBKNTBpsv89tUvU91LTyTNb Mxb1GG4Sm6Nns+17m/G/XVWfOj6vz5qlrjszMOajQ02i+qJncouDvNgl5D55MjCJzpq16N1G R9nMb4VMG8vWXbE6qLe14MJml4T0+z8eFu1n4d/4PfFyTTjPR88PS76vMOdeVaE451f3syL3 m2/452zdaP496NFfq5nlay67eN/QLvskdnPq0QSbeUdm19q+vHZtKR+jS2VtRPrhbV8K03/e mKEtIbr9/uJAD64+2Zcnblgfzgx25fkrtCzPz7stYTFPUVT4ls1dsZ7X2uf93qcZO1f1gaBM /UXFTwXyy6OOTjgoEar/8nDx6qUHunZyvp+WvnTi+YkLvlx4FPjSSz/qphJLcUaioRZzUXEi ANeW9BErAwAA X-CMS-MailID: 20220907063404epcas5p2e300613155b910ab587d015e77a2aa0e X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063404epcas5p2e300613155b910ab587d015e77a2aa0e References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233733_787488_F2ABCF25 X-CRM114-Status: GOOD ( 16.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In MFCv12, some section of firmware gets updated at each MFC run. Hence we need to reload original firmware for each run at the start. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c index 877e5bceb75b..a70283d4c519 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_ctrl.c @@ -51,8 +51,9 @@ int s5p_mfc_load_firmware(struct s5p_mfc_dev *dev) * into kernel. */ mfc_debug_enter(); - if (dev->fw_get_done) - return 0; + if (!IS_MFCV12(dev)) + if (dev->fw_get_done) + return 0; for (i = MFC_FW_MAX_VERSIONS - 1; i >= 0; i--) { if (!dev->variant->fw_name[i]) From patchwork Wed Sep 7 06:47:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81B66C6FA86 for ; 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Wed, 7 Sep 2022 15:34:08 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.109.115.6]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220907063404epsmtip1dcc688070decc938cb39160a4d9b2d27~SgHM7t-R12432724327epsmtip1h; Wed, 7 Sep 2022 06:34:04 +0000 (GMT) From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: m.szyprowski@samsung.com, andrzej.hajda@intel.com, mchehab@kernel.org, hverkuil-cisco@xs4all.nl, ezequiel@vanguardiasur.com.ar, jernej.skrabec@gmail.com, benjamin.gaignard@collabora.com, stanimir.varbanov@linaro.org, dillon.minfei@gmail.com, david.plowman@raspberrypi.com, mark.rutland@arm.com, robh+dt@kernel.org, krzk+dt@kernel.org, andi@etezian.org, alim.akhtar@samsung.com, aswani.reddy@samsung.com, pankaj.dubey@samsung.com, linux-fsd@tesla.com, smitha.t@samsung.com, aakarsh.jain@samsung.com Subject: [Patch v2 14/15] media: s5p-mfc: DPB Count Independent of VIDIOC_REQBUF Date: Wed, 7 Sep 2022 12:17:14 +0530 Message-Id: <20220907064715.55778-15-smitha.t@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220907064715.55778-1-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA0WTe0xTVxzHOffe3haTspsWs7PGMtJMFzqBFku5GNicArmDLSMasoVMS1Pu CkIfactDZzImc9mqMDSgA6VugDM8itKXCNTxKNPx2MZWZBlUcE5RCG4DcQ4YW9uL23/f/L6f 3+P8zjkclDeFCzj5WhNt0CoLRfgmzDUQJY4WJ0GVpM/HJ+921rLIGYsLJxufzCLkdOMSRvbb nWzS4T2Lkhev97LI855vWeSVvl8wsuO+3x2r9WHk7Pl2QD6ou4WTtjs3WeTtubfIH7vO4eSJ y04WafX42OSFiTGE/NK2hpANzkds8pjbwyZ9PS5AfviRB9kFqTZLG6A6fU2AmmhaRKmrdT42 1djzAKFsLZ/g1NTNHpyyN71PHRtcwahKRwug1o/WsymzZwKnlmwR1NDyEjszLLsgKY9W5tKG SFqr0uXma9XJoox9ij2KeLlEGi1NJBNEkVqlhk4WpbyeGZ2WX+hfgyiyWFlY5A9lKo1GUezL SQZdkYmOzNMZTckiWp9bqJfpY4xKjbFIq47R0qadUokkLt4P5hTk/T1rRvVnhaWTVS5QBs5A MwjlQEIGbfMO1Aw2cXhEN4B95tNYwOARiwDOH1czxmMAL0ya/QYnmOFYBAzjBtBZm8Iw5Qj0 dczgAQMntsPHvw0HdTjxAYB3PjYFIJQox6BvZJUdMPjEXthlb0YDGiO2wuWfh4IJXGInrFqu R5jxnoetl3uDTKg/PlZ9gxUoBInyUDj6WS3CTJQC3Z9KGJ4P56472IwWwKWHbpzRaji9VA4Y rYf1ZY6N+q/AXu+54MFQIgpe6oplwkJYM9QeRFAiDFas/rqBc2Gn5akWwYaRGxutIBxfcLKY aSjYPZXC7KcCwPGG16pARN3/DT4HoAU8R+uNGjVtjNfHaemS/25MpdPYQPCZi9M7we2Z32P6 AcIB/QByUFE4N7czXMXj5ioPHaYNOoWhqJA29oN4//ZOooLNKp3/n2hNCqksUSKTy+WyxB1y qehZbvVLQMUj1EoTXUDTetrwNA/hhArKkOS9g6lCzR8Xz0RYdnOt3+xLGhZQ328WDnDRmC/W Ln1nYb34xkJLbxaKCXyoorrk67WD1sEZPN26ezLW4hko4OwSyluzeKeA6wXr3bSS9JytxvWj Zug2lP4Dck7IxJWjD8P2UPyVV1ffPjA60N7eJOx754l3/6PiGP2Vv6qjpvDu90KvteVve/Pg NWzlq/n15EoNO2Nkfb7Ge/i+Y8GOtvLHFGFbopqNw3GIabs54cC7FWvOUrsjFd2Wah0ZKN7x jHRRXPznkazs7MHpU95pt5XDz9gy11V2K8ExM3+14V6zi+sV2ce5P8VhP1TVaRQhNfdOFvE6 QsqPdO0/HpJ2SIQZ85RSMWowKv8FwHEanW8EAAA= X-Brightmail-Tracker: H4sIAAAAAAAAAzWRa0hTYRjHe8/OzjmbLE5T6S1JbaSlpGVYvea6EEEn6oNIZFihUw9z3hqb VmqkmSs2QkSim1mmy7zG2tzUWqZzqSlakjjUZqXIusFSs5s2c0rffs/z/z38PzwUR3gdX0vJ MjJZRYYkTUTwcVOHyDckPhImbm2tXI8mm29x0fu7JgJV/nJg6F3lDI4sBiOJGgdLOehhVxsX 3bP2c1FT+ziOHn9cTAdu2XHkuPcIoE+3xwiknxjiog+fY9CbJ3cIdFVn5KIGq51ED2wDGKrS z2OowvidRKpnVhLZzSaACi9bsX2Qqb9bD5hmuxYwNu00h2m5bSeZSvMnjNHXqgnm7ZCZYAza PEb14g/OFDXWAsZVUEYyGquNYGb0vkzP7AwZtTKWL05i02RnWMWWPfH85L8ODUdeuu7caLEJ 5IMbUAMoCtLhsHEaaACPEtJPAfzRkOpmSENYM1cCltkT1rgc5LJzEYNtFsLNBL0Z/nD2LjKf 8qJVANpq1Jh74NClOPxV0sZ1W550FBz/UsVxM04HwNmRnqVrAb0LFs+WYcsNfrBO17bk8Bb3 A9e6ucttEXDipoksBivLwYpasIaVK9Ol6coweVgGezZUKUlXZmVIQxNPp+vB0uuCg5pBU+23 UAvAKGABkOKIvARJzV6JQkGSJDuHVZyOU2SlsUoL8KFw0WrBa83LOCEtlWSyqSwrZxX/U4zi rc3H2J+5AVKR5hI3JFDWpEs5POWZL0z0l2cXh6o8arbyc9RjV7aIpdNBwQcSfu9jK8RYtybu ZLXNc/T+Nb9OQxJw5qzob9He8X7q8pLPCWVd+1/46bb7OA0zsjy/E53ykfOWHdnJ8b67va8m qHwdhDmAxwyXuTqOdbdsqDKMPPTvVV93jW97NfpgZ55p5znv50d0qwv6yqODdfULkF/H0x8k omGMsr3DvDHWeGg4odyZGzn/59ScYFOJUVJe6L9QPdgXHjsXgS5HH3dKwK7hveJArZCPC1TU z1efx756P/4dMKVuPTO5tzXHI6soKPBo1VdZYdCFFJFInFBkiVglwpXJkrBgjkIp+Qe3jd5p KQMAAA== X-CMS-MailID: 20220907063408epcas5p4285be9e4db0a64b396da8d66fb5ab2ad X-Msg-Generator: CA X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220907063408epcas5p4285be9e4db0a64b396da8d66fb5ab2ad References: <20220907064715.55778-1-smitha.t@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_233737_862631_A0E42CE4 X-CRM114-Status: GOOD ( 19.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch allows allocation of DPB buffers based on MFC requirement so codec buffers allocations has been moved after state MFCINST_HEAD_PRODUCED. It is taken care that codec buffer allocation is performed in process context from userspace IOCTL call. Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- .../platform/samsung/s5p-mfc/s5p_mfc_enc.c | 17 ++--------------- .../platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c | 9 ++++++++- 2 files changed, 10 insertions(+), 16 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c index 404bce3641b9..9fdce20b69e2 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_enc.c @@ -1339,7 +1339,6 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; struct s5p_mfc_enc_params *p = &ctx->enc_params; struct s5p_mfc_buf *dst_mb; - unsigned int enc_pb_count; if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) { if (!list_empty(&ctx->dst_queue)) { @@ -1361,10 +1360,8 @@ static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) set_work_bit_irqsave(ctx); s5p_mfc_hw_call(dev->mfc_ops, try_run, dev); } else { - enc_pb_count = s5p_mfc_hw_call(dev->mfc_ops, + ctx->pb_count = s5p_mfc_hw_call(dev->mfc_ops, get_enc_dpb_count, dev); - if (ctx->pb_count < enc_pb_count) - ctx->pb_count = enc_pb_count; if (FW_HAS_E_MIN_SCRATCH_BUF(dev)) { ctx->scratch_buf_size = s5p_mfc_hw_call(dev->mfc_ops, get_e_min_scratch_buf_size, dev); @@ -1730,14 +1727,6 @@ static int vidioc_reqbufs(struct file *file, void *priv, } ctx->capture_state = QUEUE_BUFS_REQUESTED; - ret = s5p_mfc_hw_call(ctx->dev->mfc_ops, - alloc_codec_buffers, ctx); - if (ret) { - mfc_err("Failed to allocate encoding buffers\n"); - reqbufs->count = 0; - ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); - return -ENOMEM; - } } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { if (reqbufs->count == 0) { mfc_debug(2, "Freeing buffers\n"); @@ -1753,15 +1742,13 @@ static int vidioc_reqbufs(struct file *file, void *priv, return -EINVAL; } - if (IS_MFCV6_PLUS(dev)) { + if (IS_MFCV6_PLUS(dev) && (!IS_MFCV12(dev))) { /* Check for min encoder buffers */ if (ctx->pb_count && (reqbufs->count < ctx->pb_count)) { reqbufs->count = ctx->pb_count; mfc_debug(2, "Minimum %d output buffers needed\n", ctx->pb_count); - } else { - ctx->pb_count = reqbufs->count; } } diff --git a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c index db06e3387d14..866cf44ef003 100644 --- a/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/samsung/s5p-mfc/s5p_mfc_opr_v6.c @@ -379,7 +379,6 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) default: break; } - /* Allocate only if memory from bank 1 is necessary */ if (ctx->bank1.size > 0) { ret = s5p_mfc_alloc_generic_buf(dev, BANK_L_CTX, &ctx->bank1); @@ -2257,6 +2256,14 @@ static inline int s5p_mfc_run_init_enc_buffers(struct s5p_mfc_ctx *ctx) struct s5p_mfc_dev *dev = ctx->dev; int ret; + ret = s5p_mfc_hw_call(ctx->dev->mfc_ops, + alloc_codec_buffers, ctx); + if (ret) { + mfc_err("Failed to allocate encoding buffers\n"); + return -ENOMEM; + } + mfc_debug(2, "Allocated Internal Encoding Buffers\n"); + dev->curr_ctx = ctx->num; ret = s5p_mfc_set_enc_ref_buffer_v6(ctx); if (ret) { From patchwork Wed Sep 7 06:47:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Smitha T Murthy X-Patchwork-Id: 12968503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C699C38145 for ; Wed, 7 Sep 2022 06:48:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: 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Cc: linux-fsd@tesla.com Signed-off-by: Smitha T Murthy --- arch/arm64/boot/dts/tesla/fsd-evb.dts | 4 ++++ arch/arm64/boot/dts/tesla/fsd.dtsi | 22 ++++++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 1db6ddf03f01..17bb048f9d47 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -30,6 +30,10 @@ }; }; +&clock_mfc { + status = "okay"; +}; + &fin_pll { clock-frequency = <24000000>; }; diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..bca0ba030ee7 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -340,6 +340,18 @@ #clock-cells = <0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + mfc_left: region@84000000 { + compatible = "shared-dma-pool"; + no-map; + reg = <0 0x84000000 0 0x8000000>; + }; + }; + soc: soc@0 { compatible = "simple-bus"; #address-cells = <2>; @@ -832,6 +844,16 @@ clock-names = "fin_pll", "mct"; }; + mfc: mfc@12880000 { + compatible = "samsung,fsd-mfc"; + reg = <0x0 0x12880000 0x0 0x10000>; + interrupts = ; + clock-names = "mfc"; + clocks = <&clock_mfc MFC_MFC_IPCLKPORT_ACLK>; + memory-region = <&mfc_left>; + status = "okay"; + }; + ufs: ufs@15120000 { compatible = "tesla,fsd-ufs"; reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */